‘SARDAR VALLABHBHAT NATIONAL INSTITUTE OF TECHNOLOGY B. TECH. 11 CO (Sem 4) March-2012 (Mid Sem Exam) C0204: Computer Organization Total Marks: 30 16 Enlist all levels of Six level machines. (hat should the compiler program have to know for compil C=O [Answer the followings: Enlist addressing modes and explain addressing mode for branch insiructio ~ 2) [The memory unit of a computer has 256K words of 32 bits each. The computer has ar| instruction format with 4 fields: an opcode field; a mode field to specify 1 of 7 addressing modes; a register address field to specify 1 of 50 registers; and a memory address field for the| rd. Answer the followings: a. Whats the size of instruction word? ¥ b. How large must the mode field bo? als cc. How large must the register field be? yy 4. How large must the address field be? = @._How large is the opcode field? ay enstoe three different processor P1, P2, P3 executing the Same instruction set with the clock{ w tes and CPs given the following tabl _ Processor Clock rate _ PH _2GHz a 1 a 1.5 GHz, H BS 3.GHz 25 1 Vy 1) Find out which processor has highest performance. eee KL 2) Ifthe processors each execute a program in 10 sec, find the number of cycles and Mo number of instruction, oie" @.3 [Answer the fol SS 4) What decimal [02] a ¢ : 7 | 1009000001 | 1011 100000000500000006000a0000000000c060000000000000 oh ‘Sign [Exponent Fraction a) tbit_ | 11-bit 52-bit OR “ 4) _ Explain fast multiplication algorithm with diagram. Pe Pao 2) Apoiy Booth’s Algorithm to multiply -13 X-11 using 6-bil register and generate stepwise result [04] in tabular form. we 3) Apply first version of division algorithm to divide 7 by 3 using 4-bit register and generate| [04] stepwise result in tabular form. ‘if Answer the followings: 1),_Explain principle of locality in cache memory with example. t 2) For each of the following hexadecimal memory addresses, answer the following questions| ased on a 4-way set associative mapping. Here cache and main memory size is 256 MB and {64 GB respectively and each block containing 64 wards: + What cache set number will the given block be stored to? + What will thoir value for tag and word? 1) FCABES4D6,5 2)_4321678AF Wo 3) [Explain a case in which set associative behaves as direct mapping and a case in which i pehaves as an associative mapping, 0g es er? ae Stu ‘ oe Vyoo oN ok aos 8 Dod)