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List of Experiments All Labs
List of Experiments All Labs
1+ii:
Digittl [,ogic Design
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llxPcrirnettt l: l]anriliarizalion with tlre A'f-7(lf) l)rirr.rl,lc Arralog/Digital l,alrorator.y
'l'rainer (tligitlrl logic tlesign prospective)
aud l('s ol all l'gic gates. Vcril'ication ol'lnrth
tablcs ol'all logic gates.
"l.])xpct'irtteul 2: Cotrstt'ucliorr oIall Logic Gates b1, rrsiug trrrivcrsal gatcs, Nr\Nl) gate and
N( )l( uirtc, antl verilying llreir resulls.
Ilx;rcrintctrt 8: Desiguing of 2-to-1, 4-to-l line mrrltiplexer and a quaclruple 2-to-l line
I\'ll lX. Also ilrrplcnrent l-to-4 lirre tlcnrrrltiplcxer.
Iixpel'itttent 9: Designing of 4-lllT Magnitrrcle c:omparator and magnitrrcle comparison
trsing 7-ll S85 IC.
lixPerirncnt l0: Introcluction, clesign ancl testing of'Basic flip flop oircuits -.SC or SIt,
.lK, I) arrcl l'-l;lip Flops using NAND galc. Also rvitlr lc7,l7 (t an<l 1C7474.
llxpcrinrcnt I l : Designing of SISO, SIP0, l)lS0 ancl ['ll,O shill rogister using I) F-l;.
llx;lcrinrctrt I2: Designing of simple ring counter circuits nncl .lohnscln counter circuits.
IlxPorintcllt I3: Introrluctiou and Designing of synchronous Up ancl Down counter ancl
its irnplcmentation o.1'using .l-I( flip flop lC.
Ilxpcrinrcnt l4: Analysis of Pre-settable counters.
Iillectronic I)evi(.es & flircrrils * II
Ugl_al lfxperinien1L
IixPcrirrtetrt 7: l'o plot the rttagnitutlc ancl lllrtrse rcspuns.: of'a sir,,le [,orv l)ass Itc liller
Ilxpcrimerrt 8: J'o plot the magnituile and
Plrasc.r'cspousu ot'a simple I1igh pass ltC filter
l')xperiment 9: fo strrdy the freclueucy characteristics
of a sinrprle Lorv pass lilter ci'crrit
ancl to unclerstanal lhe behavior of ttre circuit with respect tcl the pole zcrg loc,ation
l'lx;let'itrtcttl l0: I'o sltttll'lltc lrcqrrency clraractcrisl ics ,ll'a sirnplc lliglr
,ass filrcr
circtrit antl to ttuclersletnclthe behavior of the circuit
rvith respccl 1o lhe pole zc:ro looation
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'lixpc.iltrerrt I l: Plol tltc r,agniturle ancl 1;hase response <rf a series resonrrnl 6antl pass
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llxPc'irtreut l2: 'l'o Plol the nragnitttcle ancl phaso response of a seriss res.nnnt
bancl stop
li lter
oscillatory respollse
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