Professional Documents
Culture Documents
3482fa PDF
3482fa PDF
U
TYPICAL APPLICATIO
10µH 0.1µF
VIN
5V
Output Voltage Ripple
1µF SW PUMP
VIN MONIN
fSET LT3482
OFF ON SHDN VOUT2
VAPD
0.47µF
RIPPLE
CTRL VOUT1 0.1µF 1M
100mV/DIV
0.47µF
GND FB
MON APD 85V 14k
AT 2.5mA
3482fa
1
LT3482
W W W U
ABSOLUTE AXI U RATI GS PIN CONFIGURATION
(Note 1)
Input Voltage (VIN) ....................................................16V TOP VIEW
CTRL
MON
fSET
VOUT1, SW Voltage ....................................................48V
FB
VOUT2, PUMP, MONIN, APD Voltage..........................90V 16 15 14 13
VOUT1
PUMP
SW
SW
Maximum Junction Temperature .......................... 125°C
UD PACKAGE
Storage Temperature Range................... –65°C to 125°C 16-LEAD (3mm × 3mm) PLASTIC QFN
TJMAX = 125°C, θJA = 68°C/W, θJC = 4.2°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LT3482EUD#PBF LT3482EUD#TRPBF LCFG 16-Lead (3mm × 3mm) Plastic QFN 0°C to 85°C
LT3482IUD#PBF LT3482IUD#TRPBF LCFG 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free parts, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 3V, V⎯S⎯H⎯D⎯N = 3V unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Minimum Operating Voltage 2.5 V
Maximum Operating Voltage 16 V
Feedback Voltage CTRL = 1.5V 1.215 1.235 1.255 V
● 1.200 1.260 V
Feedback Line Regulation 0.025 0.07 %/V
FB Pin Bias Current ● 30 100 nA
Supply Current FB = 1.3V, Not Switching 3.3 4.0 mA
V⎯S⎯H⎯D⎯N = 0 0.1 0.5 µA
Switching Frequency fSET = 0V 580 650 750 kHz
fSET = 2V 1.0 1.1 1.3 MHz
Maximum Duty Cycle fSET = 0V 95 %
Switch Current Limit 280 360 420 mA
Switch VCESAT ISW = 150mA 130 220 mV
Switch Leakage Current SW = 5V 2 µA
Schottky Forward Voltage ISCHOTTKY = 150mA 880 mV
Schottky Reverse Leakage VOUT1 – SW = 50V 5 µA
SHDN Voltage High 1.5 V
3482fa
2
LT3482
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 3V, V⎯S⎯H⎯D⎯N = 3V unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
SHDN Voltage Low 0.4 V
SHDN Pin Bias Current 35 50 µA
fSET Voltage High 1.5 V
fSET Voltage Low 0.4 V
fSET Bias Current fSET = 2V 22 40 µA
CTRL to FB Offset CTRL = 0.5V –5 2 10 mV
● –10 2 15 mV
APD Current Monitor Gain IAPD = 250nA, 10V ≤ MONIN ≤ 90V ● 0.180 0.20 0.215
IAPD = 2.5mA, 20V ≤ MONIN ≤ 90V ● 0.185 0.20 0.215
Monitor Output Voltage Clamp 11.5 V
APD Monitor Voltage Drop MONIN – APD at IAPD = 1mA, MONIN = 90V 5 V
MONIN Pin Current Limit APD = 0V, MONIN = 40V 15 mA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 2: The LT3482E is guaranteed to meet specified performance from
may cause permanent damage to the device. Exposure to any Absolute 0°C to 85°C. Specifications over the –40°C to 85°C operating temperature
Maximum Rating condition for extended periods may affect device reli- range are assured by design, characterization and correlation with statisti-
ability and lifetime. cal process controls. The LT3482I is guaranteed to meet performance
specifications over the –40°C to 125°C operating temperature range.
3482fa
3
LT3482
U W
TYPICAL PERFOR A CE CHARACTERISTICS (TA = 25°C unless otherwise specified)
Oscillator Frequency vs Switch Current Limit Switch Current Limit vs
Temperature vs Duty Cycle Temperature
1200 400 360
250 300
900
200 280
800
150 260
700
fSET = 0V 100 240
600 50 220
500 0 200
–50 –25 0 25 50 75 100 125 0 20 40 60 80 100 –50 –25 0 25 50 75 100 125
TEMPERATURE (°C) DUTY CYCLE (%) TEMPERATURE (°C)
3482 G01 3482 G02 3482 G03
IMON (A)
1.0E-05
20 –4
1.0E-06
–6
19 1.0E-07
–8 IAPD = 2.5mA
1.0E-08 IAPD = 10µA
IAPD = 250nA
18 1.0E-09 –10
10 20 30 40 50 60 70 80 90 1.0E-08 1.0E-06 1.0E-04 1.0E-02 –50 –25 0 25 50 75 100 125
MONIN (V) IAPD (A) TEMPERATURE (°C)
3482 G04 3482 G05 3482 G06
6
250
5
FB PIN VOLTAGE (V)
1.24
MONIN – APD (V)
4
150
3 VIN = 3V
100 1.23
2
1 50
0 0 1.22
1.00E-07 1.00E-05 1.00E-03 0 50 100 150 200 250 300 350 –50 –25 0 25 50 75 100 125
REFERENCE CURRENT (A) SWITCH CURRENT (mA) TEMPERATURE (°C)
!"& /% 3482 G08 3482 G09
3482fa
4
LT3482
U U U
PI FU CTIO S
APD (Pin 2): Connect APD cathode to this pin. SHDN (Pin 12): Shutdown Pin. Tie to 1.5V or higher to
MONIN (Pin 3): Current Monitor Power Supply Pin. An enable device; 0.4V or less to disable device. This pin also
external lowpass filter can be included here to further functions as soft-start between 1.5V and 2V.
reduce supply voltage ripple. CTRL (Pin 13): Internal Reference Override Pin. This allows
VOUT2 (Pin 4): Voltage Doubler Output Pin. Put a 50V the FB voltage to be externally set between 0V and 1.2V.
rated capacitor between this pin and VOUT1. Tie a resistor Tie this pin higher than 1.5V to use the internal reference
divider to the FB pin and GND. of 1.235V.
VOUT1 (Pin 5): Boost Output Pin. Put a capacitor between FB (Pin 14): Feedback Pin. Connect the output resistor
this pin and the GND plane. Minimize the length of the divider tap here.
trace to the capacitor. fSET (Pin 15): Oscillator Frequency Selection Pin. Tie this
PUMP (Pin 6): Charge Pump Pin. Put a 50V rating bypass pin to above 1.5V or higher to select the higher switching
capacitor between SW and PUMP to form a complete volt- frequency of 1.1MHz. For lower switching frequency, tie
age doubler with the internal integrated Schottky diodes. to GND.
Minimize trace length to the capacitor. MON (Pin 16): Current Monitor Output Pin. It sources a
SW (Pins 7, 8): Switch Pin. Minimize the trace length on current equal to 20% of the APD current and converts to
this pin to reduce EMI. a reference voltage through an external resistor.
GND (Pins 9, 10): Ground. Pins connected internally. For Exposed Pad (Pin 17): GND. This pin must be soldered
best performance, connect both pins to board ground. to the PCB.
VIN (Pin 11): Input Supply Pin. This pin must be locally
bypassed.
3482fa
5
LT3482
U W U
FU CTIO AL DIAGRA
CFLY
L1
VIN
11 7 8 6
VIN SW SW PUMP
9 GND D3
VOUT2
4
D1 D2 C2 R1 CPL
VOUT1
10 GND 5
FB
C1 R2
1.235V MONIN
REFERENCE
+ 3
– DRIVER
+ A1
– RC A2 R S Q Q1
APD
EAMP +
CC CURRENT
PWM MIRROR
COMPARATOR
+ APD
2
Σ
C3
–
RAMP CURRENT
GENERATOR SENSE
VIN
AMPLIFIER
RS
650kHz/1.1MHz
12 SHDN OSCILLATOR NC 1
CS
CTRL FB fSET MON
13 14 15 16
3482 BD
CONTROL
BLOCK
R3 C4
U
OPERATIO
The LT3842 boost converter uses a constant frequency current level to keep the output in regulation. If the error
current mode control scheme to provide excellent line amplifier’s output increases, more current is delivered to
and load regulation. Operation can be best understood by the output; if it decreases, less current is delivered.
referring to the Functional Diagram. At the start of each
The LT3482 has an integrated high side APD current moni-
oscillator cycle, the SR latch is set, which turns on the
tor with a 5:1 ratio. The MONIN pin can accept a supply
power switch, Q1. A voltage proportional to the switch
voltage up to 90V, which is suitable for APD photodiode
current is added to a stabilizing ramp and the resulting sum
applications. The MON pin has an open-circuit protection
is fed into the positive terminal of the PWM comparator,
feature and is internally clamped to 11.5V.
A2. When this voltage exceeds the level at the negative
input of A2, the SR latch is reset turning off the power If an APD is tied to the APD pin, the current will be mir-
switch. The level at the negative input of A2 is set by the rored to the MON pin and converted to a voltage signal
error amplifier A1, and is simply an amplified version of the by the resistor R3. This voltage signal can be used to
difference between the feedback voltage and the reference drive an external control block to adjust the APD voltage
voltage of 1.235V, or externally provided CTRL voltage. by adjusting the feedback threshold of EAMP A1 through
In this manner, the error amplifier sets the correct peak the CTRL input.
3482fa
6
LT3482
U U W U
APPLICATIO S I FOR ATIO
Switching Frequency Table 1. Inrush Peak Current
VIN (V) L (µH) C (µF) IP (A)
The LT3482 can operate at either 650kHz nominal or
5 10 1 0.87
1.1MHz nominal; the voltage at the fSET pin selects which
5 22 1 0.68
frequency is used. At 1.1MHz, a physically smaller induc-
tor and capacitor can be used in a given application, but
Setting Output Voltage
higher frequencies will slightly decrease efficiency and
maximum duty cycle. Generally if efficiency and maximum The LT3482 is equipped with both an internal 1.235V refer-
duty cycle are crucial, the lower switching frequency should ence and an auxiliary reference input (the CTRL pin). This
be selected by connecting fSET to GND. If application size allows users to select between using the built-in reference
and cost are more important, connect fSET to VIN to select and supplying an external reference voltage. The voltage
the higher switching frequency. at the CTRL pin can be adjusted while the chip is operating
to alter the output voltage of LT3482 for purposes such as
Inrush Current
APD’s bias voltage adjustment. To use the internal 1.235V
The LT3482 has built-in Schottky diodes for the boost reference, the CTRL pin should be held higher than 1.5V,
and charge pump. When supply voltage is applied to the which can be done by tying it to VIN. When the CTRL
VIN pin, the voltage difference between VIN and VOUT1 pin is between 0V and 1.2V, the LT3482 will regulate the
generates inrush current flowing from input through the output such that the FB pin voltage is equal to the CTRL
inductor and the Schottky diode (D1 in the Functional pin voltage.
Diagram) to charge the output capacitor. The selection of
To set the output voltage, select the values of R1 and R2
inductor and capacitor value should ensure the peak of
(see Figure 1) according to the following equation:
the inrush current to be below 1A. In addition, the LT3482
turn-on should be delayed until the inrush current is less ⎛V ⎞
than the maximum current limit. The peak inrush current R1= R2 ⎜ OUT2 – 1⎟
⎝ VREF ⎠
can be estimated as follows:
where VREF = 1.235V if the internal reference is used or
⎛ ⎞ VREF = CTRL if CTRL is between 0V and 1.2V. R2 can be
V – 0.6 ⎜ π ⎟ selected to load the output to maintain a constant switching
IP = IN • exp ⎜ – ⎟ frequency when the APD load is very low. Preventing entry
L
–1 ⎜ L ⎟
⎜⎝ 2 – 1⎟ into pulse skipping mode is an important consideration
C C ⎠ for post filtering the regulator output.
where L is the inductance and C is the output capacitance.
Table 1 gives inrush peak currents for some component
selections.
4
VOUT2
LT3482 R1
13 14
CTRL FB
R2
3482 F01
3482fa
7
LT3482
U U W U
APPLICATIO S I FOR ATIO
Inductor Selection capacitors C1 and C2 at the output nodes. A typical 0.1µF
capacitor is used as the flying capacitor CFLY to form the
The inductors used with the LT3482 should have a satura-
charge pump. Always use a capacitor with sufficient volt-
tion current rating of 0.3A or greater. If the device is used in
age rating.
an application where the input supply will be hot-plugged,
the saturation current rating should be equal to or greater Either ceramic or solid tantalum capacitors may be used
than the peak inrush current. For best loop stability, the for the input decoupling capacitor, which should be placed
inductor value selected should provide a ripple current of as close as possible to the LT3482. A 1µF capacitor is
60mA or more. For a given VIN and VOUT1, the inductor sufficient for most applications.
value to use in continuous conduction mode (CCM) is
estimated by the formula: Phase Lead Capacitor
8
LT3482
U U W U
APPLICATIO S I FOR ATIO
In some applications, a long cable or wire is used to connect Layout Hints
the LT3482 to APD. When APD is shorted to GND, APD pin
The high speed operation of the LT3842 demands care-
voltage might ring below ground and damage the internal
ful attention to board layout. You will not get advertised
circuitry. To prevent damage during short-circuit event, a
performance with careless layout. Figure 3 shows the
20Ω resistor must be added in series with the APD.
recommended component placement.
R2
VIN
R1
16 15 14 13
CPL
1 12
APD 2 11
17 CIN
3 10
GND
CMON 4 9 L1
(OPT)
RMON
(OPT) 5 6 7 8
C2 CFLY
C1
3482 F03
3482fa
9
LT3482
U
TYPICAL APPLICATIO S
5V to 85V APD Bias Power Supply Efficiency
C2 60
L1
0.1µF
10µH
VIN
50
5V
C1 SW PUMP
1µF 40
EFFICIENCY (%)
VIN MONIN
fSET LT3482 30
OFF ON SHDN VOUT2
C4
0.47µF C6 R1 20
CTRL VOUT1
C5 0.1µF 1M
0.47µF 10
GND FB
MON APD 85V R2
AT 2.5mA 14k 0
0 0.5 1 1.5 2 2.5 3 3.5
C7 R3 C3
10k IMONIN (mA)
10nF 0.1µF
3482 TA02a
3482 TA02b
3.3V to 70V APD Bias Power Supply with Fast Current Monitor Response Efficiency
C2 60
L1
0.1µF
6.8µH
VIN
3.3V 50
C1 SW PUMP
1µF 40
EFFICIENCY (%)
VIN MONIN
fSET LT3482 R1
100Ω 30
OFF ON SHDN VOUT2
C4
0.47µF C6 R2 C3 20
CTRL VOUT1
C5 0.1µF 1M 0.1µF
0.47µF
GND FB 10
MON APD R3
16.5k 0
R4 70V 0 0.5 1 1.5 2 2.5
10k AT 2mA IMONIN (mA)
3482 TA03a
3482 TA03b
C1: MURATA X7R GRM21BR71C105KA01B
C2: AVX 06035C104KAT2A
C3, C6: AVX 08051C104KAT2A APD Input Load for Current Monitor Current Monitor Step Response
C4, C5: MURATA X7R GRM31MR71H474KA01B Step Response Measurement
L1: COILCRAFT ME3220-682ML OR EQUIVALENT
2 APD
VMON
10k 2V/DIV
NODE A 5V REF GND
0V VNODE A
2mA 20V/DIV
2k
0mA
REF GND
3482 TA03c
500ns/DIV
3482fa
10
LT3482
U
PACKAGE DESCRIPTIO
UD Package
16-Lead Plastic QFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1691)
0.70 ±0.05
PACKAGE OUTLINE
0.25 ±0.05
0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
BOTTOM VIEW—EXPOSED PAD
R = 0.115 PIN 1 NOTCH R = 0.20 TYP
3.00 ± 0.10 0.75 ± 0.05 OR 0.25 × 45° CHAMFER
TYP
(4 SIDES) 15 16
PIN 1 0.40 ± 0.10
TOP MARK
(NOTE 6) 1
1.45 ± 0.10 2
(4-SIDES)
3482fa
11
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LT3482
U
TYPICAL APPLICATIO
3.3V to 40V APD Bias Power Supply Efficiency
L1 70
5.6mH
VIN
3.3V 60
C1 SW PUMP
1mF 50
VIN MONIN
EFFICIENCY (%)
fSET LT3482 R3
100W
40
OFF ON SHDN VOUT2
30
C3 R1 C4
0.1mF 0.1mF
CTRL VOUT1
C2 1M 20
1mF
GND FB
10
MON APD R2
28k
R4 0
40V 0 0.5 1 1.5 2 2.5 3 3.5 4
10k AT 3mA
3482 TA04a IMONIN (mA)
3482 TA04b
C1: MURATA X7R GRM21BR71C105KA01B
C2: MURATA X7R GRM31MR71H105KA88B
C3, C4: AVX 06035C104KAT2A
L1: COILCRAFT ME3220-562ML OR EQUIVALENT
RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
LT1930/LT1930A 1A (ISW), 1.2MHz/2.2MHz High Efficiency Step-Up VIN: 2.6V to 16V, VOUT(MAX) = 34V, IQ = 4.2mA/5.5mA, ISD < 1µA,
DC/DC Converters ThinSOTTM Package
LT3460 0.3A (ISW), 1.3MHz High Efficiency Step-Up VIN: 2.5V to 16V, VOUT(MAX) = 38V, IQ = 2mA, ISD < 1µA, ThinSOT
DC/DC Converter Package
LT3461/LT3461A 0.3A (ISW), 1.3MHz/3MHz High Efficiency Step-Up VIN: 2.5V to 16V, VOUT(MAX) = 38V, IQ = 2.8mA, ISD < 1µA, SC70 and
DC/DC Converters with Integrated Schottky ThinSOT Package
LT3465/LT3465A Constant Current, 1.2MHz/2.7MHz High Efficiency White VIN: 2.7V to 16V, VOUT(MAX) = 34V, IQ = 1.9mA, ISD < 1µA, ThinSOT
LED Boost Regulator with Integrated Schottky Package
ThinSOT is a trademark on Linear Technology Corporation.
3482fa