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 WHAT
 WHY APB
 WHERE
 AMBA

AHB APB

Advanced Microcontroller Bus Architecture (AMBA)

 Defines an on-chip communications standard for
designing high performance embedded
microcontrollers which are used in system-on-chips
designs
Three Components:
■Advanced High-performance Bus
(AHB)
■Advanced System Bus (ASB)
■Advanced Peripheral Bus (APB)
 The APB is part of the Advanced Microcontroller Bus
Architecture (AMBA) protocol family-Mainly used as general
purpose register based peripherals such as timers, interrupt
controllers, UARTs, I/O ports, etc.
 Optimized for minimal power consumption and reduced
interface complexity.
 The APB protocol is non pipelined protocol. In APB Every
transfer takes at least two cycles(Setup Phase and Access
Phase).
 APB is used to interface to any peripherals which are of low
bandwidth and do not require high performance of pipelined
bus interface
 Low power
 Latched address and control
 Simple interface
 Suitable for many interface.
 Single Master – Limits interface
 Scalability-performance suffers as bus is loaded
 Single outstanding request : Poor throughput and
multi threading performance bottleneck
 Computing: Net book, Smart book, Tablet, eReader,
thin client.

 Mobile Handset: Smartphone’s, Feature phones.

 When read request and write request are simultaneously
occurs the bridge gives the high priority to read request.
This condition creates the race condition in APB Bridge.
 For example FIFO has only one date item to read operation.
If read and write requests are simultaneously occurs the
bridge first execute the read request and it read the single
date item from the FIFO and now the read date FIFO was
empty.
 Again read and write requests are simultaneously occurs
again it execute read request but there is no data item in
read data FIFO so transaction will fail. This situation is
called race condition.