IEEE Xplore Abstract - Hardware implementsion of visible watermarking
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Hardware implementation of visible
watermarking
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3 Pancangan, .;Bhuras Un, Cen na Lgasanmugan, E; Kean Kame, TV.
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Development of Personal Computers and Claud Computing, Internet of Things s making dupicaling the
data very feasible. In this paper we are proposing visible watermarking using FPGA which provides one
to one compouns mapping that allows reversible watermarking, This method can be applied for diferent
Iypos of host mages te binary, opaque monochrome and translucent fullcolor ones. Tho ulate
cbjective ofthe research s to develop low power, high performance, realime, relable and secured
watermarking system which can provide bustness over certain atacks namely cover-up attack,
cropping noise, scaling and geometric attacks,
Published in
Computation of Power, Energy Information and Cemmuincation (IGCPEIC), 2015 Intemational
Conference on
Date of Conference:
22-28 Aprl2015
Page(s) Conference Location
0400 - 0402 Chennai
Print ISBN: vot
97861-4673-0524.6 s0.110mnCCPEIC.2015.7250489
INSPEC Accession Number Publisher:
15440650, (eee
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