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J2
1
6
2
D 7 D
Vin VR1 Vdd
3 J1 1 3

GND
8 Vin Vout
C4
4 Resistor LED
9 9 Vdc + +
0.1uF Power Jack C1 LM2940 5.0 C2
5 Transistor

2
47uF 1.0 uF
Pwr

Note: The power jack and the battery are


mechanically interlocked to assure
they are used mutually exclusively.

J3
3
2
1
C >> C
Vdd
Prototype Area
Vss
Vss
Vdd Vdd
Reset

P15
PushButton P14
BS1
P13
Vin BS2 Vin P12
Vss 1 24 P11
Sout Vin
PCO 2 23 P10
Sin Vss
PCI 3 22 X1 P9
C3 ATN RES
Vdd 4 21 Vin Vdd P8
Vss Vdd 20 19
Rst 5 20 P15 P14 P7
0.1uF P0 P15 18 17
P0 6 BS2-IC 19 P13 P12 P6
P1 P14 16 15
P1 7 18 P11 P10 P5
P2 P13 14 13
B P2 8 17 P9 P8 P4 B
P3 P12 12 11
P3 9 16 P7 P6 P3
P4 P11 10 9
P4 10 15 P5 P4 P2
P5 P10 8 7
P5 11 14 P3 P2 P1
P6 P9 6 5
P6 12 13 P1 P0 P0
P7 P8 4 3
P7 Vss Vss
2 1 Vdd Vss

Title
A A
Super Carrier
Size Number Revision
A A
Date: 19-May-2005 Sheet 1 of 1
File: P:\Engineering\..\SuperCarrier.sch Drawn By: John Barrowman
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