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GDM1602K Extended PDF
GDM1602K Extended PDF
LCD MODULE
Features
1. 5x8 dots with cursor
2. Built-in controller (KS0066U or equivalent)
3. Easy interface with 4-bit or 8-bit MPU
4. +5V power supply (also available for =3.0V)
5. 1/16 duty cycle
6. N.V. optional
7. BKL to be driven by pin1, pin2, or pin15, pin16 or A, K
Outline dimension
Display Pattern
Contrast adjust
V: A 2/9 2001/12/05
GDM1602K
Optical characteristics
TN type display module (Ta=25 , VDD=5.0V)
Item Symbol Condition Min. Typ. Max. Unit
Viewing angle -25 - -
Cr 4 deg
-30 - 30
Contrast ratio Cr - 2 - -
Response time (rise) Tr - - 120 150
ms
Response time (fall) Tr - - 120 150
Electrical characteristics
DC characteristics
Parameter Symbol Conditions Min. Typ. Max. Unit
Supply voltage for LCD VDD -V0 Ta =25 - 4.6 - V
Input voltage VDD 4.7 - 5.5
Supply current IDD Ta=25 , VDD =5.0V - 1.5 2.5 mA
Input leakage current ILKG - - 1.0 uA
“H” level input voltage VIH 2.2 - VDD
“L” level input voltage VIL Twice initial value or less 0 - 0.6
“H” level output voltage VOH LOH=-0.25mA 2.4 - - V
“L” level output voltage VOL LOH=1.6mA - - 0.4
Backlight supply voltage VF - 4.2 4.6
Instruction description
Outline
To overcome the speed difference between the internal clock of KS0066U and the MPU clock, KS0066U performs
internal operations by storing control in formations to IR or DR. The internal operation is determined according to the
signal from MPU, composed of read/write and data bus (Refer to Table7).
Instructions can be divided largely into four groups:
1) KS0066U function set instructions (set display methods, set data length, etc.)
2) Address set instructions to internal RAM
3) Data transfer instructions with internal RAM
4) Others
The address of the internal RAM is automatically increased or decreased by 1.
Instruction Table
Instruction code Execution
Instruction RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Description time (fosc=
270 KHZ
Write “20H” to DDRA and set
Clear DDRAM address to “00H” from 1.53ms
0 0 0 0 0 0 0 0 0 1
Display AC
Set DDRAM address to “00H”
From AC and return cursor to
Return Its original position if shifted. 1.53ms
0 0 0 0 0 0 0 0 1 -
Home The contents of DDRAM are not
changed.
Entry mode Assign cursor moving direction
0 0 0 0 0 0 0 1 I/D SH And blinking of entire display 39us
Set
Set display (D), cursor (C), and
Display ON/
0 0 0 0 0 0 1 D C B
Blinking of cursor (B) on/off
OFF control Control bit.
Set cursor moving and display
Cursor or Shift control bit, and the 39us
0 0 0 0 0 1 S/C R/L - - Direction, without changing of
Display shift
DDRAM data.
Set interface data length (DL: 8-
Bit/4-bit), numbers of display
Function set 0 0 0 0 1 DL N F - - 39us
Line (N: =2-line/1-line) and,
Display font type (F: 5x11/5x8)
Set CGRAM Set CGRAM address in address
0 0 0 1 AC5 AC4 AC3 AC2 AC1 AC0 Counter. 39us
Address
Set DDRAM Set DDRAM address in address
0 0 1 AC6 AC5 AC4 AC3 AC2 AC1 AC0 Counter. 39us
Address
Whether during internal
Read busy
Operation or not can be known
Flag and 0 1 BF AC6 AC5 AC4 AC3 AC2 AC1 AC0 By reading BF. The contents of 0us
Address Address counter can also be read.
Write data to Write data into internal RAM
1 0 D7 D6 D5 D4 D3 D2 D1 D0 (DDRAM/CGRAM). 43us
Address
Read data Read data from internal RAM
1 1 D7 D6 D5 D4 D3 D2 D1 D0 (DDRAM/CGRAM). 43us
From RAM
NOTE:
When an MPU program with checking the busy flag (DB7) is made, it must be necessary 1/2fosc is
necessary for executing the next instruction by the falling edge of the “E” signal after the busy flag (DB7)
goes to “Low”.
Contents
1) Clear display
Clear all the display data by writing “20H” (space code) to all DDRAM address, and set DDRAM
address to “00H” into AC (address counter).
Return cursor to the original status, namely, bring the cursor to the left edge on the fist line of the
display.
Make the entry mode increment (I/D=“High”).
V: A 5/9 2001/12/05
GDM1602K
2) Return home
V: A 6/9 2001/12/05
GDM1602K
Shifting of right/left cursor position or display without writing or reading of display data.
This instruction is used to correct or search display data.
During 2-line mode display, cursor moves to the 2nd line after the 40th digit of the 1st line.
Note that display shift is performed simultaneously in all the lines.
When display data is shifted repeatedly, each line is shifted individually.
When display shift is performed, the contents of the address counter are not changed.
6) Function set
V: A 7/9 2001/12/05
GDM1602K
from “40H” to “67H”.
Display position 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
DDRAM address 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
DDRAM address 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F
V: A 8/9 2001/12/05
GDM1602K
Standard character pattern
V: A 9/9 2001/12/05