Professional Documents
Culture Documents
Unit-2 of C Architecture (Autorecovered)
Unit-2 of C Architecture (Autorecovered)
The control unit that operates the CPU BUS system directs the
information flow through the registers and ALU by selecting the
various component sin the system.
For example-:
R1 <- R2 +R3
CONTROL WORD
There are 14 binary selection inputs in the unit, and their
combined value specifies control word.
It consists of four fields.
3 3 3 5
SEL A SEL B SEL D OPR
Three fields contain three bits each, and one field has five bits.
The three bits of SEL A select a source register for the A input of
the ALU.
The three bits of SEL B select a register for the B input of the ALU.
The three bits of SEL D select a destination register using the
decoder and its seven loads output.
The five bits of OPR select one of the operations in the ALU.
The 14- bit control word when applied to the selection inputs
specify a particular microoperation.
The control word for y=the given microoperation can be derived from
the selection variables.
For example, the subtract microoperation given by the statement.
R1 <- R2-R3
specifies R2 for the A input of the ALU, R3 for the B input of the ALU,
R1 for the destination register and an ALU operation to subtract A –
B.
The binary control for the subtract microoperation is
010 011 001 00101 and is obtained as follows.
Field SEL A SEL B SEL D OPR
Symbol R2 R3 R1 SUB
Control word 010 011 001 00101
STACK ORGANISATION
Stack
A storage device that stores information in such a
manner that the item stored last is the first item
received.
Also called last-in-first out(LIFO)list.
The stack is a memory unit with an address register
called a stack pointer (SP), which always points at the
top element in the stack.
The two operations of a stack are the insertion (PUSH)
and deletion (POP) of elements.
PUSH operation increments the SP.
POP operation decrement the SP.
REGISTER STACK
A stack can be placed in a portion of a large memory or it can be
organized as a collection of finite number of registers.
The organisation of a 64-word register stack.
The stack pointer register (SP) contains a binary number whose
value is equal to the address of the word that is currently on top
of the stack.
Three items are placed in the stack: A, B and C in that order.
Item C is on top of the stack so that the content of SP is now 3.
The stack is popped by reading the memory word at address 3 and
decrementing the content of SP.
Item B is now on the top of the stack since SP holds address 2.
To insert a new item , the stack is pushed by incrementing SP.
ADDRESS
EMPTY
63
3
SP C
2
B
1
A
0
DR
MEMORY STACK
A stack can exist as a stand-alone.
Stack can be implemented in a random-access memory (RAM)
attached to a CPU.
The implementation of a stack in the CPU is done by assigning a
portion of memory to a stack operation and using a processor
register as a stack pointer.
A portion of computer memory divided into three segments:
program, data and stack.
The program counter PC points at the address of the next
instruction in the program.
The address register (AR) points at an array of data.
The stack pointer SP points at the top of the stack.
The three register are connected to a common address bus, and
either one can provide an address for memory.
PC is used during the phase to read an instruction.
AR is used during the execute phase to read operand.
SP is used to push or pop items into or from the stack.
Memory unit address
Program 1000
PC
(instructions)
AR
Data 2000
(operands)
stack 3000
3997
SP 3998
3999
4000
4001
DR
Example :
The items in the stack communicate with a data register. A new item
is inserted with the push operation as follows:
- PUSH: SP SP - 1
M[SP] DR
SP SP + 1
INFIX TO POSTFIX
A*B+C*D
(3*4) + (5*6)
MBOL SCANNED STACK POSTFIXEXPRESSION DESCRIPTION
( (
3 ( 3
* (* 3
4 (* 34
) 34*
+ + 34*
( +( 34*
5 +( 34*5
* +(* 34*5
6 +(* 34*56
) + 34*56*
+ 34*56*+
6
4 5 5 30
12 42
3 12 12 12
22
(5-2) * {9+8(3-2)}
OL SCANNED STACKS POSTFIXEXPRESSION DESCRIPTION
First perform the
( ( arithmetic inside the
parentheses (5-2)
5 ( 5
- (- 5
2 (- 52
) 52-
After (5-2) , (3-2) perform
( ( because it is in
parentheses.
3 ( 52-3
- (- 52-3
2 (- 52-32
) 52-32-
Next we perform the
{ { 52-32- expression inside the
LARGE BRACKET brackets.
9 { 52-32-9
+ {+ 52-32-9
8 {+ 52-32-98
} 52-32-98+
* * 52-32-98+*
INSTRUCTION FORMAT
The format of an instruction is usually depicted in a rectangular
box.
An instruction is normally made up of a combination of an
operation code and sum way of specifying an operand, most
commonly by its location or address in memory.
An operation code field that specifies the operation to be
performed.
An address field that designates a memory address or a
processor register.
A mode field that that specifies the way the operand.
3. Stack organisation
Computers with stack organisation would have PUSH and POP
instruction which require an address field. Thus, the instruction
PUSH X
will push the word at address X to the top of the stack the stack
pointer is updated automatically. Operation-type instruction do not
need an address field in stack organised computers. This is because
the operation is performed on the two items that are on top of the
stack. The instruction in a stack computer consist of an operation
code only with no address field.
Three address instruction
Memory addresses for the two operands and one destination need
to be specified.
It is also called general register organization.
Instruction-
ADD R1, A, B R1<-M[A]+M[B]
ADD R2, C, D R2<-M[C]+M[D]
MUL X, R1, R2 M[X]<-R1*R2
It is assumed that the computer has two processor registers, R1
and R2. The symbol M[A] denotes the operand at memory address
symbolized by A.
ADDRESSING MODE
The operation field of an instruction specifies the operation to be
performed. And this operation must be performed on some data.
So each instruction need to specify data on which the operation is to
be performed. But the operand(data) may be in accumulator, general
purpose register or at some specified memory location.
So, appropriate location (address) of data is need to be specified.
In computer, there are various ways of specifying the address of
data.
These various ways of specifying the address of data are known as
“Addressing Modes”.