library IEEE;

use IEEE.STD_LOGIC_1164.all;
use ieee.numeric_std.all;
use ieee.std_logic_unsigned.all;

entity ripple is
generic (n: natural:=4);
port(
Cin : in STD_LOGIC;
A, B : in STD_LOGIC_VECTOR(2**n-1
downto 0);
Q : out STD_LOGIC_VECTOR(2**n-1
downto 0);
Cout : out STD_LOGIC
);
end;

architecture rtl of ripple is

signal suma, sA, sB, sQ : STD_LOGIC_VECTOR(2**n+1 downto 0);
begin
sA <= "0"&A&Cin;
sB <= "0"&B&Cin;
sQ <= sA + sB;

Q <= sQ(2**n downto 1);

Cout <= SQ(2**n+1);
end;