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PL2303 PDF
PL2303 PDF
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Revision History
Table of Contents
1.0 FEATURES........................................................................................................6
List of Figures
Figure 3-1 Block Diagram of PL-2303....................................................................................... 7
Figure 4-1 Pin Assignment Outline of PL-2303 ......................................................................... 8
Figure 8-1 Byte Write Timing Diagram .................................................................................... 14
Figure 8-2 Selective Read Timing Diagram ............................................................................ 15
Figure 8-3 Reset Timing Diagram ........................................................................................... 15
Figure 9-1 Outline Diagram of PL-2303 SSOP28 ................................................................... 16
Figure 10-1a SSOP28 Carrier Tape ........................................................................................ 17
Figure 10-1b IC Reel Placements ........................................................................................... 17
Figure 10-2 Reel Dimension ................................................................................................... 18
List of Tables
Table 5-1 Pin Assignment & Description ................................................................................... 9
Table 6-1 Supported Data Formats ......................................................................................... 10
Table 6-2 Baud Rate Setting ................................................................................................... 10
Table 7-1 EEPROM Contents ................................................................................................. 11
Table 7-2 Device Configuration Register ................................................................................ 11
Table 8-1 Absolute Maximum Ratings..................................................................................... 13
Table 8-2 DC Characteristics .................................................................................................. 13
Table 8-3 Clock Characteristics .............................................................................................. 13
Table 8-4 Temperature Characteristics ................................................................................... 14
Table 8-5 USB Transceiver Characteristics ............................................................................ 14
Table 8-6 Power-On Reset...................................................................................................... 15
Table 9-1 Package Dimension ................................................................................................ 16
Table 10-2 Reel Part Number Information .............................................................................. 18
Table 11-1 Ordering Information.............................................................................................. 18
1.0 Features
Fully compliant with USB Specification v1.1 and USB CDC v1.1
Supports RS232 Serial interface
Supports automatic handshake mode
Supports Remote wake-up and power management
256-bytes buffer each for upstream and downstream data flow
Supports default ROM or external EEPROM for device configuration
On-chip USB transceiver
On-chip crystal oscillator running at 12MHz
Supports Windows 98/SE, ME, 2000, XP, Windows CE3.0, CE .NET, Linux, and Mac OS
Designed for Windows XP/2000 Certified Logo Drivers
USB-IF Logo Compliant with TID 10240590
28-Pin SSOP package
2.0 Introduction
The PL-2303 operates as a bridge between one USB port and one standard RS232 Serial port. The
two large on-chip buffers accommodate data flow from two different buses. The USB bulk-type data is
adopted for maximum data transfer. Automatic handshake is supported at the Serial port. With these, a
much higher baud rate can be achieved compared to the legacy UART controller.
This device is also compliant with USB power management and remote wakeup scheme. Only
minimum power is consumed from the host during Suspend. By integrating all the function in a
SSOP-28 package, this chip is suitable for cable embedding. Users just simply hook the cable into PC
or hub’s USB port, and then they can connect to any RS-232 devices.
USB Port
USB
Transceiver
REGISTER/
Control USB CONFIG/
Unit SIE STATUS/
CONTROL
DOWN UP
STREAM STREAM
BUFFER BUFFER
CLOCK
SYNTHESIZER
RS-232 SERIAL
INTERFACE
EEPROM
OSCILLATOR
INTERFACE
SSOP 28 PACKAGE
(TOP VIEW)
TXD 1 28 OSC2
DTR_N 2 27 OSC1
RTS_N 3 26 PLL_TEST
VDD_232 4 25 GND_PLL
RXD 5 24 VDD_PLL
RI_N 6 23 LD_MODE
GND 7 22 TRI_MODE
VDD 8 21 GND
DSR_N 9 20 VDD
DCD_N 10 19 RESET
CTS_N 11 18 GND_3V3
SHTD_N 12 17 VDD_3V3
EE_CLK 13 16 DM
EE_DATA 14 15 DP
The Device Configuration Register is used to control some vendor-specific functions. The meaning of
each bit in Device Configuration Register is shown in Table 7-2. Reserved and unused pins always set
to the default value.
8.2 DC Characteristics
Table 8-2 DC Characteristics
Parameter Symbol Min Typ Max Units
Power Supply Current IDD 0.5 19 24 mA
Input Voltage
Low VIL -- -- 0.3* VDD V
High VIH 0.7* VDD -- -- V
Output Voltage
Low VOL -- -- 0.4 V
High VOH 3.5 -- -- V
Schmitt Trigger Threshold Voltage*1
Negative going Vt- -- 1.10 -- V
Positive going Vt+ -- 1.87 -- V
Output Voltage, 3.3V*2
Low VOL -- -- 0.4 V
High VOH 2.4 -- -- V
Input Leakage Current IL -1 -- 1 uA
Tri-state Leakage Current Ioz -10 -- 10 uA
Input Capacitance CIN -- 3 -- Pf
Output Capacitance COUT -- 3 -- Pf
Bi-directional Buffer Capacitance CBID -- 3 -- Pf
Operating Voltage Range -- 4.4 5 5.25 V
Suspend Current ISUS -- 400 490 uA
*1. RS232 pins RXD_I, RI_I, DSR_I, DCD_I, CTS_I are 5V TTL Schmitt Trigger inputs.
*2. RS232 pins TXD, DTR_N, RTS_N are 3.3V tri-state outputs.
Notes: