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fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/LPT.2016.2628758, IEEE Photonics
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Real-Time Generation and Reception of OFDM Signals
for X-Band RoF Uplink with Heterodyne Detection
Ming Chen, Xin Xiao, Jianjun Yu, Xinying Li, and Fan Li
 simple one-tap channel equalization. However, the real-time
Abstract— A field programmable gate arrays based real-time
orthogonal frequency-division multiplexing (OFDM) transceiver
is implemented for the uplink of an X-band radio-over-fiber (RoF)
system with heterodyne detection for the first time. Digital
intermediate-frequency I/Q modulation and demodulation, and
forward error correction (FEC) are applied. The Minn’s timing
synchronization method is slightly modified with reduced
implementation complexity for the proposed OFDM-RoF system.
By using Reed-Solomon code with symbol interleaving technique,
the real-time transmission of the X-band 16-ary quadrature
amplitude modulation OFDM-RoF signal over 10 m wireless and
2.26 km single mode fiber link is successfully achieved with a
post-FEC bit error rate below 1×10-9.
Index Terms—- Digital signal processing (DSP), Orthogonal
frequency-division multiplexing (OFDM), Radio-over-fiber
(RoF), X-band.
I. INTRODUCTION
W ith the rapid growth of high data-rate services such as the
Internet of Things and mobile Internet, new technologies
or/and network architectures with high data rate and high
cellular density may be required to meet the high bandwidth
requirements of end-users in future mobile networks [1].
Radio-over-fiber (RoF) is a very promising technique to satisfy
these requirements as well as extend the network’s coverage
[2-4]. Moreover, orthogonal frequency division multiplexing
(OFDM) with high spectral efficiency (SE) and excellent
robustness against inter-symbol interference (ISI) has been
widely applied to traditional wired and wireless communication
systems. In recent years, OFDM has been introduced into
high-speed fiber-optic transmission systems [5-6], and
extensively studied by both offline and real-time digital signal
processing (DSP) approaches [5-9]. Moreover, OFDM-based
RoF has attracted much attention for future gigabit broadband
access networks [10-11], due to its significant advantages such
as high SE, robustness against optical fiber dispersion and
This work was supported in part by the National High-Tech Research and
Development Program (863 Program) of China under Grant 2015AA016904
and in part by the National Natural Science Foundation of China under Grant
61325002 and Grant 61250018.
M. Chen is with the ZTE (TX) Inc., NJ 07960, USA, and also with the
College of Physics and Information Science, Hunan Normal University,
Changsha 410081, China (e-mail: ming.chen@hunnu.edu.cn).
X. Xiao, X. Li and F. Li are with the ZTE (TX) Inc., NJ 07960, USA (e-mail:
xiao.xin@ztetx.com; smileseaxy@gmail.com; fanli0809@gmail.com).
J. Yu is with Key Laboratory for Information Science of Electromagnetic
Waves (MOE), Fudan University, Shanghai, China 200334
(jianjun@fudan.edu.cn).
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demonstration of OFDM signal transmission over RoF links
can rarely be found in the existing publications. It is very
important to further verify the feasibility of the DSP algorithms
in the real-time environments realized by using field
programmable gate arrays (FPGAs) or application-specific
integrated chips (ASICs).
Recently, we have experimentally demonstrated
FPGA-based zero-intermediate-frequency (zero-IF) real-time
X-band (8-12 GHz) OFDM signals transmission over 1.5 m
wireless and 2.26 km single mode fiber (SMF) RoF links [12].
The real-valued baseband OFDM signals are generated with
Hermitian symmetry input vectors during inverse fast Fourier
transform (IFFT), which are directly up-converted to
radio-frequency (RF) signals by using an RF mixer. A common
clock from up-conversion at the transmitter is applied to an RF
mixer rather than an I/Q demodulator for down-conversion at
the receiver. Such a zero-IF (or homodyne) OFDM-RoF,
compared with a non-zero-IF receiver (or heterodyne receiver),
has a simple implementation of the digital baseband transceiver.
However, it is very sensitive to residual carrier frequency offset
and phase shift between the local oscillator and RF carrier of
the received RF-OFDM signal at the receiver. Therefore,
accurate carrier recovery and phase alignment should be
realized for the asynchronous OFDM-RoF system where the
transmitters and receivers are separated physically. Otherwise,
it will lead to the fluctuation in the amplitude of the
down-converted signals. The carrier recovery is a challenge for
such an OFDM-RoF system in practical applications.
Instead of the zero-IF signal, heterodyne detection, except
for envelope detection [13], is an alternative way to deal with
the issues mentioned above. In a heterodyne receiver, both the
carrier frequency offset induced common phase error (CPE)
and the phase shift can be regarded as a part of channel phase
response, which can be accurate estimated and compensated by
advanced DSP techniques.
In this letter, we carefully design an IF-OFDM transceiver
based on off-the-shelf field programmable gate arrays (FPGAs),
which is different from our previous work [12], for an X-band
RoF uplink transmission system with heterodyne detection.
The timing synchronization method proposed by H. Minn [14]
is slightly modified with reduced implementation complexity
for the proposed real-time asynchronous OFDM-RoF system.
A Reed-Solomon code, RS (255, 223), combined with multiple
symbol interleaving/de-interleaving (IL/De-IL) technique is
applied to enhance the bit error rate (BER) performance of the
real-time OFDM-RoF system with 2.26-km fiber and 10-m
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(a) Transmitter (b) Receiver

8 ENC #0 8 8 DEC #0 8

& 2:1 down-sampling

& 4:1 down-sampling

Adding Sync Pattern

16-QAM De-Mapping
Phase Est. & Comp.
Channel Est. & Eq.
I/Q Demodulation
16-QAM Mapping
& Pilot Insertion
8 ENC #1 8 8 DEC #1 8

Digital Clipping

& Training Seq.

Error Detection
I/Q Modulation
256-point IFFT
16×14

16×16

16×14

32×10

16×10

16×16
DAC Interface

ADC Interface

Symbol De-IL
4×16
Timing Sync.

64-point FFT
CP Removal
PRBS ROM

Adding CP
Symbol IL

From ADC
To DAC
8 ENC #2 8 8 DEC #2 8

LPF(2nd)
LPF (1st)
From PC

To PC
8 72 28 72
ENC #3 8 8
DEC #3 8
40
…

…
…

…
8 ENC #7 8 8 DEC #7 8
8 ENC #8 8 8 DEC #8 8
Fig. 1. Architecture of the proposed FPGA-based real-time IF-OFDM (a) transmitter and (b) receiver.
wireless link. Thus, the differences and enhancements of this response and magnitude response of the two FIR LPFs are
paper from our previous work [12], which can be concluded as shown in Figs. 2(a) and 2(b), respectively. After the 2nd
the following three aspects: (1) digital IF-OFDM transceiver resampling operation, a timing synchronization method with
design, (2) asynchronous OFDM-RoF with heterodyne reduced complexity is proposed for the real-time receiver. The
detection, and (3) longer wireless transmission distance. timing metric of the synchronization can be expressed as
M  d    L    P  d    L  1  R  d   (1)
II. ARCHITECTURE OF THE PROPOSED FPGA-BASED where
REAL-TIME IF-OFDM TRANSCEIVER L2 M 1

The proposed architecture of the FPGA-based real-time

P d    p  k p  k  1  r*  d  kM  m  r  d   k  1 M  m  (2)
k 0 m0

IF-OFDM transceiver is illustrated in Fig. 1. At the transmitter, ML 1

R d    r d  n
2

as shown in Fig. 1(a), the pseudo random binary sequence (3)

n 0
(PRBS) is first generated offline and then uploaded into
where   and * represent the real part extraction operator and
read-only memory (ROM) in a Xilinx Virtex-6 FPGA. Nine
parallel RS (255, 223) encoders (ENCs) encode 72 bits from the conjugate of a complex number, respectively; p  k  ,
PRBS ROM per clock cycle to 9 symbols of 8-bit width each. k  0, L  1 denotes the signs of the repeated parts in the
The encoded symbols are interleaved by a multiple-symbol synchronization pattern, and L and M are the number and
interleaver [15], mapped with 16-QAM symbols with 14-bit length of the repeated part, respectively; r  n  is the
quantization, and assigned to 36 data-carrying subcarriers (SCs)
with indices from -20 to 20 excluding ±14, ±7, and 0. Here, four complex-valued sample after the 2nd resampling operation. In
pilot SCs are modulated with binary phase-shift keying (BPSK) 250 1st FIR LPF (a) 0 (b)
1st FIR LPF

Magnitude (dB)
200 2nd FIR LPF
with the indices of ±14 and ±7 for the residual phase estimation
150 -20
[16]. After that 256-point IFFT with 16 parallel channels is 2nd FIR LPF
h(n)

100
performed with an oversampling factor of 4, the IFFT outputs 50 -40
are digitally clipped, and 16-point cyclic prefix (CP) is 0
-60
-50
appended. A 64-point timing synchronization pattern [14]
0 4 8 12 16 20 24 28 0.0 0.5 1.0 1.5 2.0 2.5
having a form of [A A A -A], where A = IFFT([1 1 -1 1 1 1 1 -1 n Frequency (GHz)
1 1 -1 1 -1 -1 -1 1]), after oversampling by a factor of 4 and Fig. 2. Two FIR LPFs’ (a) impulse response h(n) and (b) magnitude response.
other four complex-valued training sequences (TSs) for this letter, L  4 , M  16 , and p       . It should be noted
channel estimation [17] are added. In this letter, an OFDM that the residual frequency offset after I/Q demodulation is
frame consists of one timing synchronization pattern, 4 TSs, small, so only real parts of P  d  are enough to calculate the
and 255 data-carrying OFDM symbols. Digital I/Q
timing metric, and the operations of both P  d  and R  d  to the
up-conversion is realized after complex-valued OFDM signal
generation. The up-converted real-valued signals centered at 2nd power can be avoided. As a result, half of real-valued
312.5-MHz are scaled, fed to a digital-to-analog converter multipliers can be saved compared to the Minn’s method [16].
Once timing synchronization is done, the CP with a length
(DAC) interface, and sent to 2.5-GS/s 14-bit DAC. The net data
of 4 samples is removed, 64-point fast Fourier transform (FFT)
rate excluding all overheads is 1.14-Gb/s.
operation is then performed. The channel estimation is realized
At the receiver as shown in Fig. 1(b), the IF-OFDM signals
by using the 4 TSs, and one-tap channel equalization is applied
centered at 912.5-MHz captured by a 5-GS/s 10-bit ADC are
to the 36 data-carrying SCs and four pilot SCs. The residual
first fed to a Xilinx Virtex-7 FPGA, and then 32 parallel 10-bit
phases are mainly caused by two factors: (1) small residual
signed samples from the ADC interface are first resampled. The
frequency offset and (2) sampling clock frequency offset
resampling process includes the following two steps: (1) the
(SCFO) between DAC and ADC. Here, the SCFO is small, and
parallel samples are filtered by the 1st 32-tap finite impulse
we mainly focus on the correction of the former factor-induced
response (FIR) low-pass filter (LPF) to reduce the out-of-band
CPE. The residual phases on four pilot SCs are extracted and
noise and (2) 2:1 down-sampling is performed for the filtered
the CPEs over OFDM symbols are estimated and compensated
samples. Then the resampled samples are down-converted by a
before 16-QAM de-mapping. The QAM de-mapped bits are fed
digital I/Q demodulator operating at 912.5-MHz. After that, the
to the corresponding symbol de-interleaver, and then decoded
down-converted samples are resampled by realizing the 2nd
by nine parallel RS (255, 223) decoders (DECs). Finally, error
32-tap FIR LPF filtering and 4:1 down-sampling. The impulse

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625 MHz
(a) FPGA-based 2.5 GS/s Mixer #1 Antennas Bias (h)
(d) Antenna

DAC
Antenna OFDM LPF DML
(b) (c)EA #1
Transmitter 6 dB EA #2 (e)
10 GHz 10 m wireless ATT

2.26 km
SMF-28
Mixer #1 On-board Clock #1 Clock #2
2.5 GHz Clock
SMF-28
10 MHz 9.4 GHz Power Meter
Clock #1

S
PC 625 MHz Ref PD & Mixer #2
Transmitter FPGA
FPGA-based Clock #2
& DAC (f) PD

ADC
OFDM
(g)
EA #3 Receiver FPGA
USB Cable VOA
Receiver 5 GS/s Mixer #2 PC & ADC

Power (dBm)
0 0

Power (dBm)
0
Power (dBm)

0
Power (dBm)

0.6

Power (dBm)

Est. CPE (Rad)

0 w/ modulation (e)

Power (dBm)
-20 (b) -20 (c) -20 (d) -20
(f) -20 (g)
-20 -40 0.4
-40 -40
-40 -40 -40
-60 -60 -60 0.2
-60 -80 -80
-60
w/o modulation -80 -60 (i)
-80 0.0
0.0 0.5 1.0 1.5 2.0 8 9 10 11 12 8 9 10 11 12 1560.0 1560.5 8 9 10 11 12 0.0 0.5 1.0 1.5 2.0 0 100 200
Frequency (GHz) Frequency (GHz) Frequency (GHz) Wavelength (nm) Frequency (GHz) Frequency (GHz) OFDM Symbol Index
Fig. 3. Experiment setup of real-time IF-OFDM X-band RoF uplink transmission system.
detection is performed for the decoded bits. In addition, some FPGA-based receiver. The IF signal is boosted by the 3rd EA
internal signals of the receiver FPGA including timing metrics, (EA #3) with 45-GH BW and 20-dB gain and then captured by
recovered 16-QAM symbols, estimated CPEs and error bits the ADC operating at 5-GS/s. The ADC clock is generated from
count are also captured by the Xilinx ChipScope module and the on-board voltage-controlled oscillator (VCO) with a
uploaded to a personal computer (PC) via universal serial bus 10-MHz reference from Clock #2. Finally, the 2.5-GS/s
(USB) cable. IF-OFDM samples and a 625-MHz clock are fed to the receiver
FPGA. The spectra of both the RF signal after
III. EXPERIMENTAL SETUP optical-to-electrical (O/E) conversion and the IF signal after
EA #3 are shown in Figs. 3(f) and 3(g), respectively. Here, the
The experimental setup of the proposed real-time
156.25-MHz operating clocks for the transmitter and receiver
OFDM-RoF system uplink transmission at X-band is shown in
FPGAs are derived from the 625-MHz clocks generated by the
Fig. 3. Also, two photographs of the transmitter and receiver are
DAC and ADC, respectively. Even though the experimental
also given in Figs. 3(a) and 3(h), respectively. At the transmitter,
setup is similar to that of presented in Ref. [12], there are still
the 2.5-GS/s digital OFDM signals are generated from the
some distinct differences: (1) asynchronous clocks for both
transmitter FPGA and sent to the DAC clocked by the on-board
DAC/ADC and up/down-conversion are employed, (2)
2.5-GHz clock source. Then the converted IF-OFDM signal
heterodyne detection scheme is performed at the receiver, and
with a bandwidth (BW) of ~400-MHz and centered at
(3) longer wireless transmission distance is investigated.
312.5-MHz, is filtered by an LPF (Mini-Circuits, VLP-11) with
the 3-dB BW of 1-GHz. Its spectrum is shown in Fig. 3(b). The
filtered signal is up-converted into RF signals centered at IV. RESULTS AND DISCUSSION
10-GHz via the 1st 10-GHz mixer [See Fig. 3(c)], boosted by After 10-m wireless and 2.26-km SMF-28 transmission, the
the 1st electrical power amplifier (EA #1), and then sent to air real-time measured Real(P(d)), R(d) and timing metric M(d) of
by a linear vertical/horizontal polarity directional antenna (MTI the proposed timing synchronization as a function of sample
Wireless Edge, MT-9010), with 25-dB gain and 3-dB index at ROPs of 2 and -4-dBm, are given in Figs. 4(a) and 4(b),
beamwidth of 8°, for 10-m wireless transmission. The received respectively. It can be seen clearly that the shape of timing
RF signal is first attenuated by a 6-dB electrical attenuator and metric around its peak is very sharp and stable for both high and
amplified by the 2nd EA (EA #2) with 25-GHz BW and 25-dB low ROP cases. It indicates that the timing estimation is
gain. The spectrum of the received RF signal is plotted in Fig. accurate at the peak of timing metric, which is considered as the
3(d). The amplified RF signal with a peak-to-peak voltage of start position of an OFDM frame. Here, the maximum search of
~2.8-V is used to drive a 10-Gb/s directly modulated laser the timing metric is only performed when the timing metric is
(DML, NEL NTT NLK1551SSC) biased at 72-mA with the larger than the threshold of 100 in our experiment. It also
BW of ~ 20GHz. The generated intensity-modulated signal should be mentioned that there is a plateau with high magnitude
with a power of 7-dBm after electrical-to-optical (E/O) 10E4 Real(P(d))
(a)
Real(P(d))
5E4
conversion is coupled into 2.26-km SMF-28. The optical
0E4
spectra of optical carrier with and without modulation at the -5E4
resolution of 0.01-nm are also shown in Fig. 3(e).
10E4 R(d) R(d)
At the receiver side, the received optical signal is attenuated (b)
by a variable optical attenuator (VOA), and then the received 5E4

optical power (ROP) can be measured by the power meter. The

150 M(d) M(d)
attenuated optical signal is directly detected by a 15-GHz 100
Threshold
50 Threshold
photo-detector (PD) and mixed with a 9.4-GHz clock generated 0
by the 2nd external clock source (Clock #2), to down-convert -50
Timing Estimate Timing Estimate
-100
the RF signal to IF signal centered at 912.5-MHz. It should be 0 250 500 750 0 250 500 750 1000
Sample Index Sample Index
noted that the effects of the residual frequency offset will be Fig. 4. Real-time measurements for the timing synchronizaion at ROPs of (a)
compensated by the method mentioned above in the 2-dBm and (b) -4-dBm.

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lasted about 4 TSs’ duration after the timing synchronization
pattern, which is attributed to the higher average power of the
TS than the synchronization pattern and data-carrying OFDM
symbols. However, its effect on the calculation of timing metric
is negligible. Also, the calculated timing metrics are more than
100 samples (25 clock cycles) behind of Real[P(d)] and R(d),
which is due to the division operation described in Eq. (1).
4000 4000
(a) (b)
2000 2000
0 0
-2000 -2000
-4000 -4000
-4000 -2000 0 2000 4000 -4000 -2000 0 2000 4000
Fig. 5. Real-time measured results: 16-QAM constellations (a) after channel
equlizationn and (b) after CPE correction.
Figs. 5(a) and 5(b) show the 16-QAM constellations with six
different colors, each color represents a subcarrier, after
channel equalization and after residual phase compensation,
respectively, where the 16-QAM symbols on the SCs with
indices of ±20, ±10 and ±1, are real-time captured in the
receiver FPGA. In our real-time receiver, the 16-QAM symbols
are the only phase compensated in the channel equalization
function [8] to avoid division operations during amplitude
compensation. As depicted in Fig. 5(b), the phase rotation
caused by the CPE has been well compensated by using the
pilot-aided CPE correction method. The estimated CPE is
shown in Fig. 3(i). As it is expected that, the phase shift induced
the amplitude fluctuations on the constellation data collected
from a certain data subcarrier are avoided, and CPEs caused by
the small residual frequency offset are also compensated by
DSP technique. It should be mentioned that SCFO-induced
phase rotations on SCs should be taken into account when the
SCFO is larger enough [18].
1 w/o FEC, 10-m wireless + OBTB
w/ FEC, 10-m wireless + OBTB
w/o FEC, 10-m wireless + 2.26-km SMF-28
2 w/ FEC, 10-m wireless + 2.26-km SMF-28
-10log10(BER)
3
4 OFC/NFOEC 2011, paper OWK5.
5 [12]
6 FEC-Enabled 4/16/64-QAM-OFDM Signal Transmission in an X-Band
7 RoF System,” IEEE Photon. J., vol. 8, no. 2, 2016, Art. ID 7902908.
8
9 [13]
-8 -7 -6 -5
-4 -3 -2 -1 0 1 2 3
ROP (dBm)
Fig. 6. Real-time measured BER performances for uncoded and coded signals.
To explore the BER performance of the proposed
OFDM-RoF uplink transmission, the BERs are calculated by
counting over 65536 OFDM frames containing more than
2×109 information-bearing bits. After 10-m wireless and
2.26-km SMF-28 transmission, about 2-dB power penalty is
observed for both the uncoded and RS coded OFDM-RoF
signals at a BER of 1×10-3. It also shows that the post-FEC
BER less than 1×10-9 can be achieved when the BER of the
uncoded signal is around 1×10-3. In addition, the nearly free
error transmission of the coded signal at ROPs higher than
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4
-6-dBm at optical back-to-back (OBTB) and post-SMF
transmission at ROPs higher than -3-dBm are also observed.
V. CONCLUSION
In this letter, an FPGA-based real-time RS coded IF-OFDM
transceiver has been implemented for the proposed X-band
RoF uplink transmission system. The training symbol-based
timing synchronization with reduced implementation
complexity was investigated in such system and exhibited a
good timing synchronization performance. The transmission of
the real-time 16-QAM-encoded OFDM-RoF signals over 10-m
wireless and 2.26-km SMF-28 with a BER below 1×10-9 can be
successfully achieved by using RS (255, 223) code with
symbol-interleaving/de-interleaving technique.
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