Design of Ku-Band SIR Interdigital Bandpass Filter Using Silicon-
Based Micromachining Technology
Sheng-Chi Hsieh, Chia-Chan Chang, Yi-Ming Chen, Chun-Chi Lin, and Sheng-Fuh Chang
Department of Electrical Engineering, National Chung Cheng University, Minhsiung, Chiayi, 62102,
Taiwan, R.O.C
Abstract — This paper presents design, fabrication, and
measurement of a Ku-band micromachined bandpass filter.
The fourth-order interdigital filterd based on step-
impedance resonators (SIRs) is fabricated and self-packaged
by three high-resistivity( Ї 10Kcm) silicon wafers to
achieve compactness and low loss. The proposed circuit is
designed to produce a passband of 21% centered at 14.2 GHz.
Experimental results exhibit that the insertion loss is 2.3dB
and the return loss is better than 20 dB within passband. The
fabrication technology can be applied for other
micromachined devices.
Index Term — Micromachined, bandpass filter,
Interdigital filter, Step-impedance resonator (SIR).
I. INTRODUCTION
With the increasing demand of full integrated receivers
for low-cost wireless communication systems, the
monolithic passive components, such as antennas, filters
and couplers, etc., have drawn intensive research interests
in recent years [1][2]. To be compatible to those
developed CMOS monolithic microwave integrated
circuits (MMICs), the silicon-based manufacture is in
essential need. However, the loss from the silicon
substrate could result in poor circuit performances,
including smaller dynamic range, high noise figure, and
large power consumption. For that reason, the microwave
micromachined device becomes very attractive due to its
fabrication flexibility.
Although the on-chip filters have been reported recently
in literatures in standard CMOS process [3], most of them
are designed around 60 GHz. However, for those
components operated at lower frequencies, the large
dimension of circuitry implies more losses from the
substrate, metal and even radiation phenomenon. To
overcome these problems, a 14.2-GHz fourth-order
interdigital bandpass filter is fabricated using silicon-
based micromachining technologies. With bulk
micromachining and cavity shielding, the circuit
performance can be thus enhanced.
There are several design issues in this work. Firstly, the
silicon dioxide membrane used for circuitry supporting is
relatively large, showing a great fabrication challenge. In
addition, the discontinuities like GCPW (G-S-G probing)
to MS (filter) mode transition should be carefully
examined for good matching. Also, to avoid the reliability
978-1-4244-5458-7/10/$26.00 © 2010 IEEE
problem often seen in MEMS device, this filter is
packaged in a micromachined cavity, yielding the
assembling difficulty.
The experimental results demonstrate promising
performances of the fabricated filter. At the same time, it
also verifies the successful silicon fabrication techniques
along with micropackaging, which can be applied in
manufacture of other devices.
II. FILTER DESIGN
The conventional interdigital resonator, consisting of
O/4 uniform lines with short-circuited, is commonly
utilized in the filter design. However, the required length
of O/4 may bring a size issue, especially in monolithic
realization. To miniaturize the circuit size, the step-
impedance resonator is applied to this interdigital
bandpass filter design.
A. Step-Impedance Resonant
A O/4 step-impedance resonator, as shown in Fig. 1, is
composed of two transmission segments connected in
series, each of which has electrical lengths of T1 and T 2
and characteristic impedances of Z1 and Z 2 , respectively.
The high-impedance segment ( Z1 ) is grounded, whereas
the low-impedance segment ( Z 2 ) is with an open-
circuited end. The impedance ratio is defined
as R Z 2 / Z1 , wherein 0d R d1. By examining the input
admittance Yin of the composite transmission line from the
open end, the fundamental resonance condition ( Yin 0 )
of this SIR can be derived [4]:
R tan T1 tan T 2 (1)
The electrical length at the resonant frequency is thus
found as
R
TT T1  T 2 T1  tan 1 ( ) (2)
tan T1
Theoretically, when 0  R  1 and T1 T 2 , the total
electrical length reaches a minimum
104 SiRF 2010
value TT ,min 2 tan 1 R , which is less than 90q. This
reveals a great benefit in size reduction when SIRs are
employed into filter designs. In addition, the spurious
passband can be also shifted to higher frequencies,
resulting in good outband suppressions.
the external quality factors Q according to the filter
specification. Note that the chosen T1 is slightly different
with T 2 by counting the via-hole placement.
Also, the parallel coupling with impedance transformer
is applied for input/output tapping feed. The dimensions
of the complete filter are listed in Table II.

Z 2 , T2 Z1 , T1 TABLE I
PARAMETERS OF THE FOURTH-ORDER BANDPASS FILTER
g0 1 g5 1 Qe1 5.467
g1 0.7654 K12 0.1177 R 0.36
Yin
g2 1.8478 K 23 0.0757 T1 36.3q
Fig. 1. Schematic of the O/4 step-impedance resonator g3 1.8478 K 34 0.1177 T2 24.8q
g4 0.7654 QeN 5.467

TABLE II
DIMENSIONS OF THE FILTER (UNIT: mm)
AR 0.18 S1 0.07
AQ 1.27 S2 0.345
AQ
AT AP 1.4 S3 0.175
W1 0.66 WT 0.08
W2 0.07 AT 2.3
AP

AR
III. FABRICATION
Fig. 2. Schematic of the proposed interdigital bandpass filters
The proposed filter is constructed and assembled using
three high-resistivity ( Ї 10K :-cm) silicon wafers[6].
Each wafer has thickness of 550 Pm. The middle wafer
B. Filter Parameters consists of the main body of the filter, whereas the top and
bottom wafers are used for shielding and self-packaging.
The schematic of proposed fourth-order interdigital
Figure 3 shows the lay-ups and cross-section schematics
bandpass filter is shown in Fig. 2. The center frequency is
of this proposed three-layer micromachined filter. For the
chosen as 14.2 GHz with fractional bandwidth (FBW) of
middle part, a 3-μm membrane layer of silicon dioxide is
21%. The design procedure for all filters is done in a
first deposited on silicon substrate using Plasma Enhance
similar manner, where the derived equations for the
Chemical Vapor Deposition (PECVD). Afterward, the
prototype are given as below [5].
filter circuitry is patterned on the membrane using
g 0 g1 standard 3-μm aluminum (Al) sputter technique. The
Qe1 (4)
FBW following step is to etch away the substrate underneath the
g N g N 1 filter circuitry until the filter is left standing on the thin
QeN , (5)
FBW dielectric membrane. The backside cavity is formed as
FBW well at the same time. In addition, to ensure good
K i ,i 1 , i 1," , N  1 . (6) shielding of the structure, via grooves are opened
g i gi 1
surrounding the filter circuitry by inductively coupled
plasma (ICP) etching.
Table I shows that the chosen SIR structure, the The top wafer, which contains the upper cavity and
synthesized element values, the coupling coefficient K and probing windows, is also etched by ICP and metalized

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with Al, as shown in Fig 5. Since the G-S-G probes with
150-m pitch are used here for testing, the window
openings should be big enough to land the probe tips. The
window size of 3 mmu1.69 mm is thus chosen in this case.
Finally, a metallization layer of 3-m Al is sputtered on
the bottom wafer to form the ground plane. Those three
wafers are stacked together using silver epoxy to 2.97 mm
accomplish the final structure. To secure the precise
assembly, additional alignment marks are also patterned
5.435 mm
on each wafer. The cavity shielding is to reduce radiation
loss both into air and dielectric substrate. It should be
mentioned that the cavity height is chosen carefully to (a)
avoid the cavity mode excitation. The circuit size is 8.035
mm u2.97 mm for the filter only, and 13.435 mmu6.17
mm including the vias and probing windows. The
photographs of the fabricated components are shown in
Fig. 4-5.

Top Wafer

Middle Wafer

Bottom Wafer

Metal
(b)
Silicon

Fig. 4. Photographs of the middle wafer (a) viewed from

topside (b) viewed from backside
Fig. 3. The cross-section and lay-ups of the micromachined
filter structure

IV. SIMULATION AND MEASUREMENT RESULTS

The entire micromachined filter is computed using 3-D
simulator Ansoft HFSS. Figure 6 compares the simulation
and measurement results. The simulation shows that the
return loss is better than 15 dB and insertion loss is less
than 2 dB at 14.2 GHz. On the other hand, the
measurement data exhibits that insertion loss is less than
2.3 dB and return losses is better than 20 dB. The
agreement between simulated and measured responses is
good, except that the center frequency is up-shifted 300
MHz from the simulated value. The insertion loss is Fig. 5. Photograph of the top wafer (viewed from inside)
slightly increased due to the feeding transition effects and
degrading unloaded Q. The relative bandwidth is 22%.

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REFERENCES
[1] T. S. D. Cheung and J. R. Long, “Shielded passive devices
-20 for silicon-based monolithic microwave and millimeter-
wave integrated circuits,” IEEE J. Solid-State Circuits, vol.
S11 / S21 , (dB)

41, pp. 1183, May 2006.

[2] B. Dehlink , M. Engl , K. Aufinger and H. Knapp
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May 2007.
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[4] M. Sagawa, M. Makimoto and S. Yamashita, “Geometrical
structures and fundamental characteristics of microwave
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Fig. 6. Measurement and EM simulation responses. [5] J. S. Hong and M. J. Lancaster, Microstrip Filters for
RF/Microwave Application, John Wiey and Sons, 2001.
[6] S. V. Roberston, L.P.B. Katehi, and G. M. Rebeiz,
“Micromachined w-band filters,” IEEE Trans. Microwave
V. CONCLUSION Theory Tech., vol. 44, no. 4, pp. 598-606, Apr. 1996.

In this paper, a Ku-band micromachined bandpass filter

has been presented. This fourth-order interdigital filter is
designed based on SIRs with miniature size. The filter is
constructed on silicon substrate with main circuitry sitting
on single-supporting dielectric membrane, leading to low
cost and possible integration with other MMICs. The
experimental results verify the circuit design as well as
fabrication technique. As a final note, although the current
work is motivated by the filter design, it also exhibits the
ability and confidence to fabricate other high-frequency
MEMS devices, such as membrane antennas, etc.,
showing great potentials for various applications.

ACKNOWLEDGEMENT
The authors would like to thank National Nano Device
Laboratories (NDL), Tainan, Taiwan for supporting the
fabrication facilities.

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