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5 4 3 2 1

PCB STACK UP
LAYER 1 : TOP
PB2/PB2A BLOCK DIAGRAM 01
LAYER 2 : SGND1 PCI DEVICES IRQ ROUTING
LAYER 3 : IN1 CPU CPU THERMAL
PCI DEVICE IDSEL# REQ# / GNT# Interrupts
LAYER 4 : SVCC SENSOR
LAYER 5 : IN2 R5C832 AD17 REQ0# / GNT0# INT A/B#
Merom 14.318MHz
D
PAG 30 D
LAYER 6 : IN3 478P (uPGA)/35W
LAYER 7 : SGND2 PAG 3,4 CLK_CPU_BCLK,CLK_CPU_BCLK#
LAYER 8 : BOT CLK_MCH_BCLK,CLK_MCH_BCLK# CLOCK GEN
DREFCLK,DREFCLK# ICS9LPR363DGLF
DREFSSCLK,DREFSSCLK# 64pinsTSSOP
PAG 2
CPU CORE MAX8736
PAG 40
NVDIA NB8X
PCI-Express 16X NB8P-SE-256M
SYSTEM POWER MAX8734 HDMI CON
PAG 41 NB8M-SE-128M
DDRII-SODIMM1 DDRII 533,667 MHz PAG 25
NORTH BRIDGE P 15,16,17,18,19,20
DDR II SMDDR_VTERM PAG 12,13
1.8V/1.8VSUS(TPS51116) Crestline
PAG 42
DDRII-SODIMM2 DDRII 533,667 MHz CRT PORT DVI-I PORT
PAG 24 PAG 24 LVDS(1 Channel)
C VCCP +1.5V AND GMCH PAG 12,13 PAG C

1.05V(TPS51124) 5,6,7,8,9,10,11 LCD CNN


PAG 43
PAG 25
DMI LINK NBSRCCLK, NBSRCCLK#
SATA - HDD SATA0 150MB
VGACORE(1.025V)MAX1993
PAG 33
PAG 44 PCI BUS / 33MHz PAG 32 RICOH IEEE1394
PATA (66/100/133)
PATA- CD-ROM RICOH 832 PAG 27
SYSTEM CHARGER(MAX8672) PAG 33 PAG 26~28
PAG 45,46 Memory
0,1,2,3
USB2.0 CardReader
USB2.0 I/O PortsX4 SOUTH BRIDGE PAG 28
4
Bluetooth TV Tune
Voltage Rails 6 ICH-8M PCI-E
WebCam
ON S0~S2 ON S3 ON S4 ON S5 Ctl Signal
Voltage Rails 7 Azalia
Mini_PCI_E
VCC_CORE X VR_ON
8
PAG 20,21,22,23 Mini PCI-E LAN Express E_SATA
VCCP X MAINON TV Tune Card Marvell Card
JMB360
WLAN
B B
SMDDR_VTERM X MAINON 9 M8039 PAG 28
Express Card CONEXANT PAG 33
INT-MIC PAG 31 PAG 32
VGACORE MAINON CX20549
X
PAG 35 PAG 34
VGA1.2 X MAINON LPC E_SATA
RJ45
CIR PAG 32
PAG 33
RVCC3 X X X RVCCD
Flash ITE8512
VCC1.25 MAINON SPI
X MB PCB: DA0PB2MB8D0
PAG 38 USB:32PB2UB0000
VCC1.5 X MAINON MAX9789A SW/B PCB: DA0PB2PI8D0
TP:33PB2TB0000
VCC1.8 X MAIND Keyboard PAGE 38 AUDIO USB/B PCB: DA0PB2TB8D0
Amplifier
SW:34PB2SB0000
VCC2.5 X MAINON Touch Pad PAG 29 MDC DAA TP/B PCB: DA0PB2TR8D0
VCC3 X MAIND PAG 35 CX20548 256M
VCC5 X MAIND PAG 37 MB:31PB2MB0010 /K0 PB2A/NB8P-SE Infineon
MB:31PB2MB0020 /I0 PB2A/NB8P-SE Hynix
1.8VSUS SUSON FAN HP Jack/
X X 128M
Speaker
3VSUS X X SUSD PAG 30
PAG 35 MODEM RJ 11 MB:31PB2MB0000 /L0 PB2/NB8M-SE Infineon
A A
5VSUS X X SUSD MB:31PB2MB0040 /J0 PB2/NB8M-SE Hynix
PAG 37
3VPCU X X X X 8734LDO5
5VPCU X X X X 8734LDO5
15VPCU X X X X 5VPCU Quanta Computer Inc.
PROJECT : PB2
Size Document Number Rev
A
BLOCK DIAGRAM
Date: Friday, March 23, 2007 Sheet 1 of 46
5 4 3 2 1
1 2 3 4 5 6 7 8

VCC3

L23
1 2 CLK_3.3V
CLK_3.3V
14.318MHz
BG614318Q33

XTL-5_3X3_2-3_8-1_2H
02
BLM21PG600SN1D(60,3A)

1
C425
C423 C452 C435 C462 C449 C454 C441 C438 C475 30P CLK_XIN
10U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U

2
FCE P/N:BG614318F84
Y2
14.318MHZ/20P P/N:BG614318Q33
A A

1
CLK_XOUT
C474 30P

3/13 Modify 0==>33 ohm


VCC3
U10
VCC3 VDDCPU CLK_XIN 58
L25 X1 RHCLK_CPU RP47
CPUT_L0 52 4 3 4P2R-S-33 CLK_CPU_BCLK (3)
1 2 VDDCPU 51 RHCLK_CPU# 2 1
R243 R235 ICS9PR363DGLF CPUC_L0 CLK_CPU_BCLK# (3)
BLM21PG600SN1D(60,3A) 49 RHCLK_MCH RP44 4 3 4P2R-S-33
CPUT_L1F CLK_MCH_BCLK (5)
1

1
C450 *10K *10K CLK_XOUT 57 48 RHCLK_MCH# 2 1
X2 CPUC_L1F CLK_MCH_BCLK# (5)
0.1U
10U C445 62 44 RSRC_TV RP42 4 3 4P2R-S-33
(22) PM_STPCPU# CLK_PCIE_MINI_TV (31)
2

2 CPU_STOP# CPUITPT_L2/PCIET_L8
63 43 RSRC_TV# 2 1
(22) PM_STPPCI# PCI/PCIEX_STOP# CPUITPC_L2/PCIEC_L8 CLK_PCIE_MINI_TV# (31)
CGCLK_SMB 54 R218 33
(13) CGCLK_SMB SCLK VGA_27M_IN (14)
VCC3 VDDA CGDAT_SMB 55
L24 (13) CGDAT_SMB SDATA R_DREFSSCLK RP45
27FIX/LCD_SSCGT/PCIET_L0 17 2 1 *4P2R-S-33 DREFSSCLK (6)
1 2 VDDA 18 R_DREFSSCLK# 4 3
27SS/LCD_SSCGC/PCIEC_L0 DREFSSCLK# (6)
BLM21PG600SN1D(60,3A) CLKUSB_48 R241 33 R215 33
(22) CLKUSB_48 VGA_27M_SSIN (14)
1

C434 CLK_BSEL0 R236 2.2K 12


C442 R223 10K CLK_BSEL1 FSA/USB_48MHZ RSRC_SATA RP37
VCC3 16 FSB/TEST_MODE SATACLKT_L 26 2 1 4P2R-S-33 CLK_PCIE_SATA (20)
10U 0.1U R229 10K CLK_BSEL2 61 27 RSRC_SATA# 4 3 CLK_PCIE_SATA# (20)
2

FSC/REF1/TEST_SEL SATACLKC_L
14M_ICH R224 33 60 19 R_CLK_PCIE_VGARP43 2 1 4P2R-S-33
(22) 14M_ICH REF0 PCIET_L1 CLK_PCIE_VGA (19)
20 R_CLK_PCIE_VGA# 4 3
PCIEC_L1 CLK_PCIE_VGA# (19)
VCC3 22 CLK_PCIE_NEW RP41 2 1 4P2R-S-33
B PCIET_L2 CLK_PCIE_NEW_C (28) B
CLK_3.3V 1 23 CLK_PCIE_NEW# 4 3
VDDPCI PCIEC_L2 CLK_PCIE_NEW_C# (28)
7 VDDPC1
11 24 RSRC_ICH RP39 2 1 4P2R-S-33
VDD48 PCIET_L3 CLK_PCIE_ICH (21)
25 RSRC_ICH# 4 3
PCIEC_L3 CLK_PCIE_ICH# (21)
Q14 R220 R216 56 30 CLK_PCIE_MINI_ RP35 2 1 4P2R-S-33
VDDREF PCIET_L4 CLK_PCIE_MINI_WLAN (31)
2

10K 10K 21 31 CLK_PCIE_MINI_# 4 3


VDDPCIEX PCIEC_L4 CLK_PCIE_MINI_WLAN# (31)
2N7002E 28
CGDAT_SMB VDDPCIEX RSRC_MCH RP36
(22,28,31) PDAT_SMB 3 1 42 VDDPCIEX PCIET_L5 36 4 3 4P2R-S-33 CLK_PCIE_3GPLL (6)
VDDCPU 50 35 RSRC_MCH# 2 1
VDDCPU PCIEC_L5 CLK_PCIE_3GPLL# (6)

VCC3 R203 1K/F 47 39 RSRC1_LAN RP38 4 3 4P2R-S-33


VREF PCIET_L6 CLK_PCIE_LAN (32)
VDDA 45 38 RSRC1_LAN# 2 1
VDDA PCIEC_L6 CLK_PCIE_LAN# (32)
VCC3 R204 220/F
P/N:CS12202FB14 41 PCIE_JMB360 RP40 4 3 4P2R-S-33
PEREQ1#/PCIET_L7 CLK_PCIE_JMB360 (33)
Q15 P/N:CS12202FB06 40 PCIE_JMB360# 2 1
PEREQ2#/PCIEC_L7 CLK_PCIE_JMB360# (33)
2

(22) CK_PWG 10 VTTPWR_GD/PD# *PEREQ3# 32


2N7002E 33 R_PCIE_REQ3# R193 475/F
*PEREQ4# PCIE_REQ3# (28)
3 1 CGCLK_SMB RP46 1 2 *4P2R-S-0 R_DREFCLK 14 R_PCIE_REQ4# R194 475/F
(22,28,31) PCLK_SMB (6) DREFCLK PCIET_L9/DOTT_96MHZ PCIE_REQ4# (6)
3 4 R_DREFCLK# 15
(6) DREFCLK# PCIEC_L9/DOTC_96MHZL
PWRSAVE# 34 64 R_PCLK_DEBUG R247 22 PCLK_DEBUG
*PWRSAVE# **REQ_SEL/PCICLK0 PCLK_DEBUG (31)
(96MHz)
37 3 R_PCLK_R5C832 R234 33 PCLK_R5C832
GND PCICLK1 PCLK_R5C832 (26)
2 GND PCICLK2 4
6 GND 3/16 Modify 33==>22 ohm
13 5 SELPCIEX0_LCD#
* Internal pull up to VDD GND *SELPCIEX0_LCD#/PCICLK3
R_PCLK_DEBUG 29 GND
**Internal pull down to 53 8 R_PCLK_ICH R232 22 PCLK_ICH
CPU Clock select GND H:PEREQ 59
GND ITP_EN/PCICLK_F4
9 R_PCI_CLK_8512 R221 22 PCI_CLK_8512
PCLK_ICH (21)
GND *SELLCD_27#/PCICLK_F5 PCI_CLK_8512 (38)
46 GNDA
CPU_BSEL0 R214 0 CLK_BSEL0 R222 0 L:PCI_E
(3) CPU_BSEL0 MCH_BSEL0 (6)
C R217 *56 ALLPR363K00 C
VCCP P/N:ALLPR363K00 VER:D 3/16 Modify 15p==>10p
R246 *10K VCC3
R225 1K/F VCC3 14M_ICH C458 15P
R237 *10K VCC3
R_PCI_CLK_8512 PCIE_REQ3# R191 10K PCLK_DEBUG C466 10P
R_PCLK_DEBUG R242 10K
L:27M PWRSAVE# R197 *10K CLKUSB_48 C465 15P
R_PCI_CLK_8512 R219 10K
H:PCI_E SELPCIEX0_LCD# R227 *10K PCI_CLK_8512 C457 10P
R_PCLK_ICH R233 10K
FSC FSB FSA Spread 96/100M R239 10K PCLK_ICH C470 10P
BSEL2 BSEL1 BSEL0 CPU SRC PCI REF USB DOT %
0 0 0 266.66 100 33.33 14.318 48 96 0.5 Down PCIE_REQ4# R195 10K VCC3

0 0 1 133.33 100 33.33 14.318 48 96 0.5 Down 10/24 modify


ITP_EN(PIN8)
* 0 1 0 200.00 100 33.33 14.318 48 96 0.5 Down
LOW : PIN43/44 SRC
0 1 1 166.66 100 33.33 14.318 48 96 0.5 Down PIN 5 PIN 9 Pin14/15 Pin17/187
HIGH : PIN43,44 CPUITP
1 0 0 333.33 100 33.33 14.318 48 96 0.5 Down
PCIE_REQ1# PCIE_L0 PCIE_L6 LO (10K) PCIEX9 27M
1 0 1 100.00 100 33.33 14.318 48 96 0.5 Down LO (10K)
PCIE_REQ2# PCIE_L1 PCIE_L8 HI (NC) DOT96 LCD
1 1 0 400.00 100 33.33 14.318 48 96 0.5 Down
PCIE_REQ3# PCIE_L2 PCIE_L4 LO (10K) PCIEX9 PCIEX0
1 1 1 200.00 100 33.33 14.318 48 96 0.5 Down HI (NC)
PCIE_REQ4# PCIE_L3 PCIE_L5 PCIE_L7 HI (NC) DOT96 PCIEX0
D D

1.Level 1 Environment-related Substances Should NEVER be Used.


2.Purchase ink, paint, wire rods, and Molding resins only from the business Partners that Sony approves as Green Partners.

Quanta Computer Inc.


PROJECT : PB2
Size Document Number Rev
A
CLOCK GENERATOR
Date: Friday, March 23, 2007 Sheet 2 of 46
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

H_A#[3..16] U39A H_D#[0..63] U39B H_D#[0..63]


(5) H_A#[3..16] (5) H_D#[0..63] H_D#[0..63] (5)
H_A#3 J4 H1 H_D#0 E22 Y22 H_D#32
A[3]# ADS# H_ADS# (5) D[0]# D[32]#
H_A#4 L5 E2 H_D#1 F24 AB24 H_D#33
A[4]# BNR# H_BNR# (5) D[1]# D[33]#
H_A#5 L4 G5 H_D#2 E26 V24 H_D#34
A[5]# BPRI# H_BPRI# (5) D[2]# D[34]#
H_A#6 K5 H_D#3 G22 V26 H_D#35
H_A#7 A[6]# H_D#4 D[3]# D[35]# H_D#36
M3 A[7]# DEFER# H5 H_DEFER# (5) F23 D[4]# D[36]# V23
H_A#8 N2 F21 H_D#5 G25 T22 H_D#37
A[8]# DRDY# H_DRDY# (5) D[5]# D[37]#
H_A#9 J1 E1 H_D#6 E25 U25 H_D#38
A[9]# DBSY# H_DBSY# (5) D[6]# D[38]#
H_A#10 N3 H_D#7 E23 U23 H_D#39
A A[10]# H_BR0# (5) D[7]# D[39]# A

ADDR GROUP 0

DATA GRP 0
DATA GRP 2
H_A#11 P5 F1 H_D#8 K24 Y25 H_D#40
H_A#12 A[11]# BR0# R485 56 H_D#9 D[8]# D[40]# H_D#41
P2 A[12]# G24 D[9]# D[41]# W22
H_A#13 L2 D20 H_IERR# 1 2 H_D#10 J24 Y23 H_D#42

CONTROL
A[13]# IERR# VCCP D[10]# D[42]#
H_A#14 P4 B3 H_D#11 J23 W24 H_D#43
A[14]# INIT# H_INIT# (20) D[11]# D[43]#
H_A#15 P1 H_D#12 H22 W25 H_D#44
H_A#16 A[15]# H_D#13 D[12]# D[44]# H_D#45
R1 A[16]# LOCK# H4 H_LOCK# (5) F26 D[13]# D[45]# AA23
M1 H_D#14 K22 AA24 H_D#46
(5) H_ADSTB#0 H_REQ#[0..4] ADSTB[0]# D[14]# D[46]#
C1 H_RESET# H_D#15 H23 AB25 H_D#47
(5) H_REQ#[0..4] RESET# H_RESET# (5) D[15]# D[47]#
H_REQ#0 K3 F3 J26 Y26
REQ[0]# RS[0]# H_RS#0 (5) (5) H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 (5)
H_REQ#1 H2 F4 H26 AA26
REQ[1]# RS[1]# H_RS#1 (5) (5) H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 (5)
H_REQ#2 K2 G3 H25 U22
REQ[2]# RS[2]# H_RS#2 (5) (5) H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 (5)
H_REQ#3 J3 G2
REQ[3]# TRDY# H_TRDY# (5) H_D#[0..63] H_D#[0..63]
H_REQ#4 L1
H_A#[17..35] REQ[4]# (5) H_D#[0..63] H_D#[0..63] (5)
G6 H_D#16 N22 AE24 H_D#48
(5) H_A#[17..35] HIT# H_HIT# (5) D[16]# D[48]#
H_A#17 Y2 E4 H_D#17 K25 AD24 H_D#49
A[17]# HITM# H_HITM# (5) D[17]# D[49]#
H_A#18 U5 H_D#18 P26 AA21 H_D#50
H_A#19 A[18]# ITP_BPM#0 H_D#19 D[18]# D[50]# H_D#51
R3 A[19]# BPM[0]# AD4 R23 D[19]# D[51]# AB22
H_A#20 W6 AD3 ITP_BPM#1 Layout Note: H_D#20 L23 AB21 H_D#52
A[20]# BPM[1]# D[20]# D[52]#
ADDR GROUP 1
H_A#21 ITP_BPM#2 H_D#21 H_D#53

XDP/ITP SIGNALS
U4 A[21]# BPM[2]# AD1 Place voltage M24 D[21]# D[53]# AC26
H_A#22 Y5 AC4 ITP_BPM#3 H_D#22 L22 AD20 H_D#54
A[22]# BPM[3]# divider within D[22]# D[54]#

DATA GRP 1
DATA GRP 3
H_A#23 U1 AC2 ITP_BPM#4 H_D#23 M23 AE22 H_D#55
H_A#24 A[23]# PRDY# ITP_BPM#5 0.5" of GTLREF H_D#24 D[23]# D[55]# H_D#56
R4 A[24]# PREQ# AC1 P25 D[24]# D[56]# AF23
H_A#25 T5 AC5 ITP_TCK pin H_D#25 P23 AC25 H_D#57
H_A#26 A[25]# TCK ITP_TDI H_D#26 D[25]# D[57]# H_D#58
T3 A[26]# TDI AA6 P22 D[26]# D[58]# AE21
H_A#27 W2 AB3 ITP_TDO H_D#27 T24 AD21 H_D#59
H_A#28 A[27]# TDO ITP_TMS VCCP H_D#28 D[27]# D[59]# H_D#60
W5 A[28]# TMS AB5 R24 D[28]# D[60]# AC22
H_A#29 Y4 AB6 ITP_TRST# H_D#29 L25 AD23 H_D#61
H_A#30 A[29]# TRST# ITP_DBRESET# H_D#30 D[29]# D[61]# H_D#62
U2 A[30]# DBR# C20 SYS_RST# (22) T25 D[30]# D[62]# AF22

2
H_A#31 V4 H_D#31 N25 AC23 H_D#63
H_A#32 A[31]# 75/F R486 R499 D[31]# D[63]#
B W3 A[32]# (5) H_DSTBN#1 L26 DSTBN[1]# DSTBN[3]# AE25 H_DSTBN#3 (5) B
H_A#33 AA4 THERMAL VCCP 1K/F M26 AF24
A[33]# (5) H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 (5)
H_A#34 AB2 N24 AC20
A[34]# (5) H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 (5)
H_A#35 AA3 D21 CPU_PROCHOT#

1
A[35]# PROCHOT# H_THERMDA V_CPU_GTLREF AD26 COMP0
(5) H_ADSTB#1 V1 ADSTB[1]# THERMDA A24 H_THERMDA (30) GTLREF COMP[0] R26 Note:
B25 H_THERMDC CPU_TEST1 C23 MISC COMP[1] U26 COMP1 H_DPRTSTP need to daisy chain
THERMDC H_THERMDC (30) TEST1

2
A6 CPU_TEST2 D25 AA1 COMP2
(20) H_A20M# A20M# TEST2 COMP[2] from ICH8 to IMVP6 to CPU.
A5 C7 PM_THRMTRIP# CPU_TEST3 C24 Y1 COMP3
(20) H_FERR# FERR# THERMTRIP# PM_THRMTRIP# (6,20) TEST3 COMP[3]
ICH

C4 R491 56 R500 CPU_TEST4 AF26


(20) H_IGNNE# IGNNE# TEST4
1 2 VCCP 2K/F CPU_TEST5 AF1 E5
TEST5 DPRSTP# H_DPRSTP# (6,20)
D5 H CLK CPU_TEST6 A26 B5
(20) H_STPCLK# H_DPSLP# (20)

1
STPCLK# TEST6 DPSLP#
(20) H_INTR C6 LINT0 DPWR# D24 H_DPWR# (5)
(20) H_NMI B4 LINT1 BCLK[0] A22 CLK_CPU_BCLK (2) (2) CPU_BSEL0 B22 BSEL[0] PWRGOOD D6 H_PWRGD (20)
A3 A21 PAD T198 B23 D7
(20) H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# (2) BSEL[1] SLP# H_CPUSLP# (5)
PAD T80 C21 AE6
BSEL[2] PSI# PM_PSI# (40)
M4 RSVD[01]
N5 Merom Ball-out Rev 1a
RSVD[02]
T2 RSVD[03]
V3
RESERVED

RSVD[04] R488 *1K/F


B2 RSVD[05]
C3 1 2 CPU_TEST1 PAD T81 CPU_TEST3
RSVD[06] R489 *1K/F PAD T203 CPU_TEST5
D2 RSVD[07]
D22 1 2 CPU_TEST2
RSVD[08]
D3 RSVD[09]
For the purpose of testability, route these signals
F6 C772 *0.1U through a ground referenced Z0 = 55ohm trace that
RSVD[10] CPU_TEST4
2 1
ends in a via that is near a GND via and is
R490 *0 accessible through an oscilloscope connection.
Merom Ball-out Rev 1a 1 2 CPU_TEST6
C C
Place C close to the
CPU_TEST4 pin. Make sure
Populate ITP700Flex for bringup CPU_TEST4 routing is
Layout Note: reference to GND and away
VCCP Place R4,R361,R346 & R7 close to CPU. from other noisy signal.
COMP0
COMP1
COMP2
COMP3
1

VCC3
R167 R192 R189 ITP debug signals FSB BCLK BSEL2 BSEL1 BSEL0

2
51/F 51 39/F R186
150/F *PAD 533 133 0 0 1 R187 R188 R498 R497
ITP_DBRESET# R487 150/F 54.9/F 27.4/F 54.9/F 27.4/F
T194
2

ITP_BPM#0 667 166 0 1 1


ITP_TDI T91 *PAD ITP_BPM#1
*PAD

1
ITP_TMS T82 T90 *PAD ITP_BPM#2 800 200 0 1 0
*PAD
ITP_TCK T84 T202 *PAD ITP_BPM#3
*PAD
ITP_TDO R1901 2 0 T89 T88 *PAD ITP_BPM#4 Comp0,2 connect with Zo=27.4ohm,Comp1,3
*PAD
ITP_TRST# T85 T201 *PAD ITP_BPM#5 connect with Zo=55ohm, make those traces
*PAD
T87 T200 *PAD
R170 22.6/F length shorter than 0.5".Trace should be
H_RESET# 1 2 *PAD
at least 25 mils away from any other
Layout Note: T79 ITP disable guidelines toggling signal.
Place R8 close ITP.
Signal Resistor Value Connect To Resistor Placement
TDI 150 ohm +/- 5% VTT Within 2.0" of the ITP
D D
R1982 27/F
1 ITP_TCK TMS 39 ohm +/- 1% VTT Within 2.0" of the ITP
*PAD
2 1 ITP_TRST# T86
*PAD
R196 649/F T83 TRST# 500-680ohm +/- 5% GND Within 2.0" of the ITP
TCK 27 ohm +/- 1% GND Within 2.0" of the ITP
TDO 150 ohm +/- 5% VTT Within 2.0" of the ITP Quanta Computer Inc.
PROJECT : PB2
Note: Populate R5, R8, C372 & R430 when ITP connector is populated. Size Document Number Rev
A
CPU
Date: Friday, March 23, 2007 Sheet 3 of 46
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

ICCODE:
VCC_CORE VCC_CORE for Merom processors
U39C recommended design U39D
A7 AB20 A4 P6
A9
VCC[001] VCC[068]
AB7
target is 44A A8
VSS[001] VSS[082]
P21
VCC_CORE VCC[002] VCC[069] VSS[002] VSS[083]
A10 VCC[003] VCC[070] AC7 A11 VSS[003] VSS[084] P24
A12 VCC[004] VCC[071] AC9 A14 VSS[004] VSS[085] R2
A13 VCC[005] VCC[072] AC12 A16 VSS[005] VSS[086] R5
A15 VCC[006] VCC[073] AC13 A19 VSS[006] VSS[087] R22

1
A17 VCC[007] VCC[074] AC15 A23 VSS[007] VSS[088] R25
C416 C763 C764 C765 C766 A18 AC17 AF2 T1
10U 10U 10U 10U 10U VCC[008] VCC[075] VSS[008] VSS[089]
A20 AC18 B6 T4
2

2
A VCC[009] VCC[076] VSS[009] VSS[090] A
B7 VCC[010] VCC[077] AD7 B8 VSS[010] VSS[091] T23
B9 VCC[011] VCC[078] AD9 B11 VSS[011] VSS[092] T26
B10 VCC[012] VCC[079] AD10 B13 VSS[012] VSS[093] U3
B12 VCC[013] VCC[080] AD12 B16 VSS[013] VSS[094] U6
VCC_CORE B14 AD14 B19 U21
VCC[014] VCC[081] VSS[014] VSS[095]
B15 VCC[015] VCC[082] AD15 B21 VSS[015] VSS[096] U24
B17 VCC[016] VCC[083] AD17 B24 VSS[016] VSS[097] V2
B18 VCC[017] VCC[084] AD18 C5 VSS[017] VSS[098] V5
1

1
B20 VCC[018] VCC[085] AE9 C8 VSS[018] VSS[099] V22
C433 C428 C767 C768 C376 C9 AE10 C11 V25
10U 10U 10U 10U 10U VCC[019] VCC[086] VSS[019] VSS[100]
C10 AE12 C14 W1
2

2
VCC[020] VCC[087] VSS[020] VSS[101]
C12 VCC[021] VCC[088] AE13 C16 VSS[021] VSS[102] W4
C13 VCC[022] VCC[089] AE15 C19 VSS[022] VSS[103] W23
C15 VCC[023] VCC[090] AE17 C2 VSS[023] VSS[104] W26
8 inside cavity, north side, secondary layer. C17 VCC[024] VCC[091] AE18 C22 VSS[024] VSS[105] Y3
C18 VCC[025] VCC[092] AE20 C25 VSS[025] VSS[106] Y6
D9 VCC[026] VCC[093] AF9 D1 VSS[026] VSS[107] Y21
VCC_CORE D10 AF10 ICCP: D4 Y24
VCC[027] VCC[094] VSS[027] VSS[108]
D12 AF12 D8 AA2
D14
VCC[028] VCC[095]
AF14 1before vccore stable D11
VSS[028] VSS[109]
AA5
VCC[029] VCC[096] VSS[029] VSS[110]
D15 VCC[030] VCC[097] AF15 peak current is 4.5A D13 VSS[030] VSS[111] AA8
1

1
D17 AF17 D16 AA11
C431 C429 C427 C426 C432 D18
VCC[031] VCC[098]
AF18 VCCP 2.after vccore stable D19
VSS[031] VSS[112]
AA14
10U 10U 10U 10U 10U VCC[032] VCC[099] VSS[032] VSS[113]
E7 AF20 continue current is D23 AA16
2

2
VCC[033] VCC[100] VSS[033] VSS[114]
E9 D26 AA19
E10
VCC[034]
G21
2.5A E3
VSS[034] VSS[115]
AA22
VCC[035] VCCP[01] VSS[035] VSS[116]
E12 VCC[036] VCCP[02] V6 E6 VSS[036] VSS[117] AA25

1
E13 VCC[037] VCCP[03] J6 E8 VSS[037] VSS[118] AB1
VCC_CORE E15 K6 + C409 E11 AB4
VCC[038] VCCP[04] 330U/2.5V VSS[038] VSS[119]
B E17 VCC[039] VCCP[05] M6 E14 VSS[039] VSS[120] AB8 B
E18 J21 E16 AB11

2
VCC[040] VCCP[06] VSS[040] VSS[121]
E20 VCC[041] VCCP[07] K21 E19 VSS[041] VSS[122] AB13
1

1
F7 VCC[042] VCCP[08] M21 E21 VSS[042] VSS[123] AB16
C374 C373 C430 C387 C375 F9 N21 E24 AB19
10U 10U 10U 10U 10U VCC[043] VCCP[09] VSS[043] VSS[124]
F10 N6 F5 AB23
2

2
VCC[044] VCCP[10] VSS[044] VSS[125]
F12 VCC[045] VCCP[11] R21 F8 VSS[045] VSS[126] AB26
F14 R6 VCC1.5 F11 AC3
VCC[046] VCCP[12] VSS[046] VSS[127]
F15 VCC[047] VCCP[13] T21 F13 VSS[047] VSS[128] AC6
8 inside cavity, south side, secondary layer. F17 VCC[048] VCCP[14] T6 F16 VSS[048] VSS[129] AC8
F18 VCC[049] VCCP[15] V21 F19 VSS[049] VSS[130] AC11
F20 VCC[050] VCCP[16] W21 F2 VSS[050] VSS[131] AC14
AA7 VCC[051] ICCA 130mA F22 VSS[051] VSS[132] AC16
VCC_CORE AA9 B26 F25 AC19
VCC[052] VCCA[01] VSS[052] VSS[133]
AA10 VCC[053] VCCA[02] C26 G4 VSS[053] VSS[134] AC21
AA12 VCC[054] G1 VSS[054] VSS[135] AC24

1
AA13 AD6 C727 C725 G23 AD2
VCC[055] VID[0] CPU_VID0 (40) VSS[055] VSS[136]
1

AA15 AF5 0.01U 10U G26 AD5


VCC[056] VID[1] CPU_VID1 (40) VSS[056] VSS[137]
C417 C385 C368 C370 C371 C372 AA17 AE5 H3 AD8
CPU_VID2 (40)

2
10U 10U 10U 10U 10U 10U VCC[057] VID[2] VSS[057] VSS[138]
AA18 AF4 CPU_VID3 (40) H6 AD11
2

VCC[058] VID[3] VSS[058] VSS[139]


AA20 VCC[059] VID[4] AE3 CPU_VID4 (40) H21 VSS[059] VSS[140] AD13
AB9 VCC[060] VID[5] AF3 CPU_VID5 (40) H24 VSS[060] VSS[141] AD16
AC10 VCC[061] VID[6] AE2 CPU_VID6 (40) J2 VSS[061] VSS[142] AD19
6 inside cavity, north side, primary layer. AB10 VCC[062] J5 VSS[062] VSS[143] AD22
AB12 VCC[063] Layout Note: J22 VSS[063] VSS[144] AD25
AB14 VCC[064] VCCSENSE AF7 VCCSENSE VCCSENSE (40) Place C105 near PIN J25 VSS[064] VSS[145] AE1
VCC_CORE AB15 K1 AE4
VCC[065] B26. VSS[065] VSS[146]
AB17 VCC[066] K4 VSS[066] VSS[147] AE8
AB18 VCC[067] VSSSENSE AE7 VSSSENSE VSSSENSE (40) K23 VSS[067] VSS[148] AE11
K26 VSS[068] VSS[149] AE14
1

C C
Merom Ball-out Rev 1a L3 AE16
C746 C747 C748 C749 C750 C751 VSS[069] VSS[150]
. L6 VSS[070] VSS[151] AE19
10U 10U 10U 10U 10U 10U L21 AE23
2

VSS[071] VSS[152]
L24 VSS[072] VSS[153] AE26
M2 VSS[073] VSS[154] A2
M5 VSS[074] VSS[155] AF6
6 inside cavity, south side, primary layer. M22 VSS[075] VSS[156] AF8
M25 VSS[076] VSS[157] AF11
N1 VSS[077] VSS[158] AF13
VCC_CORE N4 AF16
VSS[078] VSS[159]
N23 VSS[079] VSS[160] AF19

1
N26 VSS[080] VSS[161] AF21
R502 P3 A25
100/F VSS[081] VSS[162]
VSS[163] AF25
VCCP
Merom Ball-out Rev 1a

2
VCC_CORE (40) .
VCCSENSE
VCC1.5 (9,21,23,28,31,41,43)
1

VSSSENSE
VCCP (2,3,5,6,8,9,20,23,43)
C413 C386 C415 C388 C414 C389

1
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
2

R501
100/F

Layout out:

2
Place these inside socket cavity on North side secondary.

Route VCCSENSE and VSSSENSE


D D
traces at 27.4ohms and
length matched to within 25
mil. Place PU and PD within
2 inch of CPU.

Quanta Computer Inc.


PROJECT : PB2
Size Document Number Rev
A
CPU
Date: Friday, March 23, 2007 Sheet 4 of 46
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

05
U38A H_A#[3..35]
H_D#[0..63] H_A#[3..35] (3)
J13 H_A#3
(3) H_D#[0..63] H_A#_3
H_D#0 E2 B11 H_A#4
H_D#1 H_D#_0 H_A#_4 H_A#5
A
G2 H_D#_1 H_A#_5 C11 A
H_D#2 G7 M11 H_A#6
H_D#3 H_D#_2 H_A#_6 H_A#7
M6 H_D#_3 H_A#_7 C15
H_D#4 H7 F16 H_A#8
H_D#5 H_D#_4 H_A#_8 H_A#9
H3 H_D#_5 H_A#_9 L13
H_D#6 G4 G17 H_A#10
H_D#7 H_D#_6 H_A#_10 H_A#11
F3 H_D#_7 H_A#_11 C14
H_D#8 N8 K16 H_A#12
H_D#9 H_D#_8 H_A#_12 H_A#13
H2 H_D#_9 H_A#_13 B13
H_D#10 M10 L16 H_A#14
H_D#11 H_D#_10 H_A#_14 H_A#15
N12 H_D#_11 H_A#_15 J17
H_D#12 N9 B14 H_A#16
VCCP H_D#13 H_D#_12 H_A#_16 H_A#17
H5 H_D#_13 H_A#_17 K19
H_D#14 P13 P15 H_A#18
H_D#15 H_D#_14 H_A#_18 H_A#19
K9 H_D#_15 H_A#_19 R17
H_D#16 M2 B16 H_A#20
H_D#_16 H_A#_20
1

H_D#17 W10 H20 H_A#21


R177 H_D#18 H_D#_17 H_A#_21 H_A#22
Y8 H_D#_18 H_A#_22 L19
221/F H_D#19 V4 D17 H_A#23
H_D#20 H_D#_19 H_A#_23 H_A#24
M3 H_D#_20 H_A#_24 M17
H_D#21 J1 N16 H_A#25
2

H_SWING H_D#22 H_D#_21 H_A#_25 H_A#26


N5 H_D#_22 H_A#_26 J19
H_D#23 N3 B18 H_A#27
H_D#_23 H_A#_27
1

H_D#24 W6 E19 H_A#28


H_D#_24 H_A#_28
2

R180 H_D#25 W9 B17 H_A#29


100/F C398 H_D#26 H_D#_25 H_A#_29 H_A#30
N2 H_D#_26 H_A#_30 B15
0.1U H_D#27 Y7 E17 H_A#31
1

H_D#28 H_D#_27 H_A#_31 H_A#32


Y9 C18
2

H_D#29 H_D#_28 H_A#_32 H_A#33


P4 H_D#_29 H_A#_33 A19
H_D#30 W3 B19 H_A#34
H_D#31 H_D#_30 H_A#_34 H_A#35
B N1 H_D#_31 H_A#_35 N19 B
H_D#32 AD12
H_D#33 H_D#_32
AE3 H_D#_33 H_ADS# G12 H_ADS# (3)
H_D#34 AD9 H17
H_D#_34 H_ADSTB#_0 H_ADSTB#0 (3)
H_D#35 AC9 G20
H_D#_35 H_ADSTB#_1 H_ADSTB#1 (3)
H_D#36 AC7 C8
H_D#_36 H_BNR# H_BNR# (3)

HOST
VCCP H_D#37 AC14 E8
H_D#_37 H_BPRI# H_BPRI# (3)
H_D#38 AD11 F12
H_D#_38 H_BREQ# H_BR0# (3)
impedance 55 ohm H_D#39 AC11 D6
H_D#_39 H_DEFER# H_DEFER# (3)
H_D#40 AB2 C10
H_D#_40 H_DBSY# H_DBSY# (3)
H_D#41 AD7 AM5
H_D#_41 HPLL_CLK CLK_MCH_BCLK (2)
1

H_D#42 AB1 AM7


H_D#_42 HPLL_CLK# CLK_MCH_BCLK# (2)
R496 R495 H_D#43 Y3 H8
H_D#_43 H_DPWR# H_DPWR# (3)
54.9/F 54.9/F H_D#44 AC6 K7
H_D#_44 H_DRDY# H_DRDY# (3)
H_D#45 AE2 E4
H_D#_45 H_HIT# H_HIT# (3)
H_D#46 AC5 C6 H_HITM# (3)
2

H_SCOMP H_D#47 H_D#_46 H_HITM#


AG3 H_D#_47 H_LOCK# G10 H_LOCK# (3)
H_SCOMP# H_D#48 AJ9 B7
H_D#_48 H_TRDY# H_TRDY# (3)
H_D#49 AH8
H_D#50 H_D#_49
AJ14 H_D#_50
H_D#51 AE9
H_RCOMP H_D#52 H_D#_51
AE11 H_D#_52
H_D#53 AH12 K5
H_D#_53 H_DINV#_0 H_DINV#0 (3)
1

H_D#54 AJ5 L2
H_D#_54 H_DINV#_1 H_DINV#1 (3)
R176 H_D#55 AH5 AD13
H_D#_55 H_DINV#_2 H_DINV#2 (3)
24.9/F Layout Note: H_D#56 AJ6 AE13
H_D#_56 H_DINV#_3 H_DINV#3 (3)
H_RCOMP trace should be H_D#57 AE7
H_D#58 H_D#_57
AJ7 M7 H_DSTBN#0 (3)
2

10-mil wide with 20-mil H_D#59 H_D#_58 H_DSTBN#_0


AJ2 H_D#_59 H_DSTBN#_1 K3 H_DSTBN#1 (3)
C
spacing. H_D#60 AE5 H_D#_60 H_DSTBN#_2 AD2 H_DSTBN#2 (3) C
H_D#61 AJ3 AH11
H_D#_61 H_DSTBN#_3 H_DSTBN#3 (3)
H_D#62 AH2
H_D#63 H_D#_62
AH13 H_D#_63 H_DSTBP#_0 L7 H_DSTBP#0 (3)
H_DSTBP#_1 K2 H_DSTBP#1 (3)
H_DSTBP#_2 AC2 H_DSTBP#2 (3)
H_SWING B3 AJ10
H_SWING H_DSTBP#_3 H_DSTBP#3 (3)
VCCP H_RCOMP C2 H_RCOMP
H_REQ#_0 M14 H_REQ#0 (3)
H_SCOMP W1 E13
H_SCOMP H_REQ#_1 H_REQ#1 (3)
2

H_SCOMP# W2 A11
H_SCOMP# H_REQ#_2 H_REQ#2 (3)
R175 H13
H_REQ#_3 H_REQ#3 (3)
1K/F B6 B12
(3) H_RESET# H_CPURST# H_REQ#_4 H_REQ#4 (3)
(3) H_CPUSLP# E5 H_CPUSLP#
E12 H_RS#0 (3)
1

H_RS#_0
H_RS#_1 D7 H_RS#1 (3)
H_RS#_2 D8 H_RS#2 (3)
H_REF B9 H_AVREF
A9 H_DVREF
1

CRESTLINE_1p0
1

R172 C358
2K/F 0.1U
2

965GM P/N:AJ0QN120T45
2

Layout Note: 965PM P/N:AJ0QN140T46


Place the 0.1 uF
D decoupling capacitor D
within 100 mils from
GMCH pins.

Quanta Computer Inc.


PROJECT : PB2
Size Document Number Rev
A
NB
Date: Friday, March 23, 2007 Sheet 5 of 46
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

P36
P37
U38B

RSVD1
AV29 R113
T62
*0
J40
H39
U38C

L_BKLT_CTRL
R105 24.9/F
N43 VCC3G_PCIE_R 1 2
+VCC_PEG
06
RSVD2 SM_CK_0 M_A_CLK0 (13) (15,25) BLON L_BKLT_EN PEG_COMPI
R35 BB23 VCC3 R120 *10K E39 M43
RSVD3 SM_CK_1 M_A_CLK1 (13) L_CTRL_CLK PEG_COMPO
N35 BA25 R115 *10K E40
RSVD4 SM_CK_3 M_B_CLK0 (13) L_CTRL_DATA
AR12 AV23 R118 *0 C37
RSVD5 SM_CK_4 M_B_CLK1 (13) (15,25) EDIDCLK L_DDC_CLK
AR13 R123 *0 D35 J51 PEG_RXN0
RSVD6 (15,25) EDIDDATA L_DDC_DATA PEG_RX#_0 PEG_RXN0 (19)
AM12 AW30 R110 *0 K40 L51 PEG_RXN1
RSVD7 SM_CK#_0 M_A_CLK0# (13) (15,25) DIGON L_VDD_EN PEG_RX#_1 PEG_RXN1 (19)
AN13 BA23 N47 PEG_RXN2
RSVD8 SM_CK#_1 M_A_CLK1# (13) PEG_RX#_2 PEG_RXN2 (19)
J12 AW25 <check list & CRB> R112 *2.4K LVDS_IBG L41 T45 PEG_RXN3
RSVD9 SM_CK#_3 M_B_CLK0# (13) LVDS_IBG PEG_RX#_3 PEG_RXN3 (19)
AR37 AW23 For Calero : 1.5K IV&EV Dis/Enable *PAD L43 T50 PEG_RXN4
RSVD10 SM_CK#_4 M_B_CLK1# (13) T61 LVDS_VBG PEG_RX#_4 PEG_RXN4 (19)
AM36 For N41 U40 PEG_RXN5
RSVD11 setting LVDS_VREFH PEG_RX#_5 PEG_RXN6
PEG_RXN5 (19)
AL36 RSVD12 SM_CKE_0 BE29 M_A_CKE0 (12,13) Cresstline:2.4K N40 LVDS_VREFL PEG_RX#_6 Y44 PEG_RXN6 (19)
AM37 AY32 D46 Y40 PEG_RXN7
RSVD13 SM_CKE_1 M_A_CKE1 (12,13) (14) LA_CLK# LVDSA_CLK# PEG_RX#_7 PEG_RXN7 (19)
A D20 BD39 C45 AB51 PEG_RXN8 A
RSVD14 SM_CKE_3 M_B_CKE0 (12,13) (14) LA_CLK LVDSA_CLK PEG_RX#_8 PEG_RXN8 (19)
BG37 D44 W49 PEG_RXN9

MUXING
SM_CKE_4 M_B_CKE1 (12,13) LVDSB_CLK# PEG_RX#_9 PEG_RXN9 (19)
E42 AD44 PEG_RXN10
LVDSB_CLK PEG_RX#_10 PEG_RXN10 (19)

LVDS
WW22 update BG20 M_A_CS#0 (12,13) AD40 PEG_RXN11
PEG_RXN11 (19)
SM_CS#_0 PEG_RX#_11 PEG_RXN12
--- MA14 needs SM_CS#_1 BK16 M_A_CS#1 (12,13) (14) LA_DATAN0 G51 LVDSA_DATA#_0 PEG_RX#_12 AG46 PEG_RXN12 (19)
to be routed if BG16 E51 AH49 PEG_RXN13
SM_CS#_2 M_B_CS#0 (12,13) (14) LA_DATAN1 LVDSA_DATA#_1 PEG_RX#_13 PEG_RXN13 (19)
H10 BE13 F49 AG45 PEG_RXN14
customers are RSVD20 SM_CS#_3 M_B_CS#1 (12,13) (14) LA_DATAN2 LVDSA_DATA#_2 PEG_RX#_14 PEG_RXN15
PEG_RXN14 (19)
planning on B51 RSVD21 PEG_RX#_15 AG41 PEG_RXN15 (19)
BJ20 RSVD22 SM_ODT_0 BH18 M_A_ODT0 (12,13)
using 2Gb

RSVD

GRAPHICS
BK22 BJ15 G50 J50 PEG_RXP0
technology and RSVD23 SM_ODT_1 M_A_ODT1 (12,13) (14) LA_DATAP0 LVDSA_DATA_0 PEG_RX_0 PEG_RXP0 (19)
BF19 BJ14 E50 L50 PEG_RXP1
RSVD24 SM_ODT_2 M_B_ODT0 (12,13) (14) LA_DATAP1 LVDSA_DATA_1 PEG_RX_1 PEG_RXP1 (19)
width=8 (by 8) BH20 BE16 F48 M47 PEG_RXP2

DDR
RSVD25 SM_ODT_3 M_B_ODT1 (12,13) (14) LA_DATAP2 LVDSA_DATA_2 PEG_RX_2 PEG_RXP2 (19)
DIMMs BK18 U44 PEG_RXP3
RSVD26 PEG_RX_3 PEG_RXP3 (19)
BJ18 BL15 SMRCOMPP T49 PEG_RXP4
RSVD27 SM_RCOMP PEG_RX_4 PEG_RXP4 (19)
BF23 BK14 SMRCOMPN G44 T41 PEG_RXP5
RSVD28 SM_RCOMP# LVDSB_DATA#_0 PEG_RX_5 PEG_RXP5 (19)
BG23 C399 0.1U B47 W45 PEG_RXP6
RSVD29 LVDSB_DATA#_1 PEG_RX_6 PEG_RXP6 (19)
BC23 BK31 SM_RCOMP_VOH B45 W41 PEG_RXP7
RSVD30 SM_RCOMP_VOH LVDSB_DATA#_2 PEG_RX_7 PEG_RXP7 (19)
BD24 BL31 SM_RCOMP_VOL C406 0.1U AB50 PEG_RXP8
RSVD31 SM_RCOMP_VOL PEG_RX_8 PEG_RXP8 (19)
(12,13) SA_MA14 BJ29 Y48 PEG_RXP9
SA-MA14 PEG_RX_9 PEG_RXP9 (19)
(12,13) SB_MA14 BE24 AR49 SMDDR_VREF_MCH R183 0 E44 AC45 PEG_RXP10
SB_MA14 SM_VREF_0 SMDDR_VREF (13,42) LVDSB_DATA_0 PEG_RX_10 PEG_RXP10 (19)
BH39 AW4 R179 *10K/F A47 AC41 PEG_RXP11
RSVD34 SM_VREF_1 LVDSB_DATA_1 PEG_RX_11 PEG_RXP11 (19)
AW20 R182 *10K/F 1.8VSUS A45 AH47 PEG_RXP12
RSVD35 LVDSB_DATA_2 PEG_RX_12 PEG_RXP12 (19)
BK20 AG49 PEG_RXP13
RSVD36 PEG_RX_13 PEG_RXP13 (19)
CRESTLINE T186 PAD C48 AH45 PEG_RXP14

PCI-EXPRESS
LVDSA_DATA#_3 PEG_RX_14 PEG_RXP14 (19)
new pin T60 PAD D47 B42 For 965GM TV disable AG42 PEG_RXP15
LVDSA_DATA_3 DPLL_REF_CLK DREFCLK (2) PEG_RX_15 PEG_RXP15 (19)
define B44 RSVD39 DPLL_REF_CLK# C42 DREFCLK# (2)
C44 H48 R596 *75/F E27 N45 C_PEG_TXN0C229 0.1U
RSVD40 DPLL_REF_SSCLK DREFSSCLK (2) TVA_DAC PEG_TX#_0 PEG_TXN_C0 (19)
A35 H47 R597 *75/F G27 U39 C_PEG_TXN1C697 0.1U
RSVD41 DPLL_REF_SSCLK# DREFSSCLK# (2) TVB_DAC PEG_TX#_1 PEG_TXN_C1 (19)

CLK
B37 R599 *75/F K27 U47 C_PEG_TXN2C231 0.1U
RSVD42 TVC_DAC PEG_TX#_2 PEG_TXN_C2 (19)
B36 RSVD43 PEG_CLK K44 CLK_PCIE_3GPLL (2) PEG_TX#_3 N51 C_PEG_TXN3C699 0.1U
PEG_TXN_C3 (19)

TV
B34 RSVD44 PEG_CLK# K45 CLK_PCIE_3GPLL# (2) F27 TVA_RTN PEG_TX#_4 R50 C_PEG_TXN4C701 0.1U
PEG_TXN_C4 (19)
C34 RSVD45 J27 TVB_RTN PEG_TX#_5 T42 C_PEG_TXN5C232 0.1U
PEG_TXN_C5 (19)
Layout Note: DMI_TXN[3:0] (21) L27 TVC_RTN PEG_TX#_6 Y43 C_PEG_TXN6C235 0.1U
PEG_TXN_C6 (19)
Location of all MCH_CFG strap PEG_TX#_7 W46 C_PEG_TXN7C703 0.1U
PEG_TXN_C7 (19)
AN47 DMI_TXN0 VCC3 R128 *2.2K TV_DCONSEL_0 M35 W38 C_PEG_TXN8C237 0.1U
B resistors needs to be close to DMI_RXN_0 TV_DCONSEL_0 PEG_TX#_8 PEG_TXN_C8 (19) B
AJ38 DMI_TXN1 R135 *2.2K TV_DCONSEL_1 P33 AD39 C_PEG_TXN9C705 0.1U
minmize stub. DMI_RXN_1 TV_DCONSEL_1 PEG_TX#_9 PEG_TXN_C9 (19)
AN42 DMI_TXN2 AC46 C_PEG_TXN10
C239 0.1U
DMI_RXN_2 PEG_TX#_10 PEG_TXN_C10 (19)
AN46 DMI_TXN3 <FAE> AC49 C_PEG_TXN11
C707 0.1U
DMI_RXN_3 DMI_TXP[3:0] (21) PEG_TX#_11 PEG_TXN_C11 (19)
If no use can be NC
PEG_TX#_12 AC42 C_PEG_TXN12
C709 0.1U
PEG_TXN_C12 (19)
AM47 DMI_TXP0 AH39 C_PEG_TXN13
C241 0.1U
DMI_RXP_0 PEG_TX#_13 PEG_TXN_C13 (19)
P27 AJ39 DMI_TXP1 AE49 C_PEG_TXN14
C695 0.1U
(2) MCH_BSEL0 CFG_0 DMI_RXP_1 PEG_TX#_14 PEG_TXN_C14 (19)
R153 1K/F_4 N27 AN41 DMI_TXP2 AH44 C_PEG_TXN15
C243 0.1U
VCCP CFG_1 DMI_RXP_2 PEG_TX#_15 PEG_TXN_C15 (19)
R162 1K/F_4 N24 AN45 DMI_TXP3
CFG_2 DMI_RXP_3 DMI_RXN[3:0] (21)
PAD T72 CFG3 C21 R87 *0 CRT_BLUE1 H32 M45 C_PEG_TXP0 C228 0.1U
CFG_3 (14,24) CRT_B CRT_BLUE PEG_TX_0 PEG_TXP_C0 (19)
PAD T195 CFG4 C23 AJ46 DMI_RXN0 G32 T38 C_PEG_TXP1 C696 0.1U
CFG_4 DMI_TXN_0 CRT_BLUE# PEG_TX_1 PEG_TXP_C1 (19)
DMI

(11) MCH_CFG_5 CFG5 F23 AJ41 DMI_RXN1 R86 *0 CRT_GREEN1 K29 T46 C_PEG_TXP2 C230 0.1U
CFG_5 DMI_TXN_1 (14,24) CRT_G CRT_GREEN PEG_TX_2 PEG_TXP_C2 (19)
PAD T70 CFG6 N23 AM40 DMI_RXN2 J29 N50 C_PEG_TXP3 C698 0.1U
CFG_6 DMI_TXN_2 CRT_GREEN# PEG_TX_3 PEG_TXP_C3 (19)
PAD T78 CFG7 G23 AM44 DMI_RXN3 R85 *0 CRT_RED1 F29 R51 C_PEG_TXP4 C700 0.1U
CFG_7 DMI_TXN_3 DMI_RXP[3:0] (21) (14,24) CRT_R CRT_RED PEG_TX_4 PEG_TXP_C4 (19)

VGA
PAD T74 CFG8 J20 E29 U43 C_PEG_TXP5 C233 0.1U
CFG_8 CRT_RED# PEG_TX_5 PEG_TXP_C5 (19)
CFG

(11) MCH_CFG_9 CFG9 C20 AJ47 DMI_RXP0 W42 C_PEG_TXP6 C234 0.1U
CFG_9 DMI_TXP_0 PEG_TX_6 PEG_TXP_C6 (19)
T69
PAD CFG10 R24 AJ42 DMI_RXP1 Y47 C_PEG_TXP7 C702 0.1U
CFG_10 DMI_TXP_1 PEG_TX_7 PEG_TXP_C7 (19)
PAD T75 CFG11 L23 AM39 DMI_RXP2 R114 *0 DDCCLK_R K33 Y39 C_PEG_TXP8 C236 0.1U
CFG_11 DMI_TXP_2 (14,24) DVICLK CRT_DDC_CLK PEG_TX_8 PEG_TXP_C8 (19)
(11) MCH_CFG_12 CFG12 J23 AM43 DMI_RXP3 R119 *0 DDCDATA_RG35 AC38 C_PEG_TXP9 C704 0.1U
CFG_12 DMI_TXP_3 (14,24) DVIDAT CRT_DDC_DATA PEG_TX_9 PEG_TXP_C9 (19)
(11) MCH_CFG_13 CFG13 E23 R132 *39 HSYNC11 F33 AD47 C_PEG_TXP10C238 0.1U
CFG_13 (14,24) HSYNC_COM CRT_HSYNC PEG_TX_10 PEG_TXP_C10 (19)
PAD T76 CFG14 E20 R147 *0 CRTIREF C32 AC50 C_PEG_TXP11C706 0.1U
CFG_14 CRT_TVO_IREF PEG_TX_11 PEG_TXP_C11 (19)
PAD T71 CFG15 K23 R138 *39 VSYNC11 E33 AD43 C_PEG_TXP12C708 0.1U
CFG_15 (14,24) VSYNC_COM CRT_VSYNC PEG_TX_12 PEG_TXP_C12 (19)
(11) MCH_CFG_16 CFG16 M20 <check lisr & CRB> AG39 C_PEG_TXP13C240 0.1U
CFG_16 PEG_TX_13 PEG_TXP_C13 (19)
PAD T68 CFG17 M24 For Calero : 255 <FAE> AE50 C_PEG_TXP14C694 0.1U
PEG_TXP_C14 (19)
GRAPHICS VID

CFG18 CFG_17 PEG_TX_14


PAD T67 L32 CFG_18
For Cresstline:1.3K/F Flexible and safe <check list>
PEG_TX_15 AH43 C_PEG_TXP15C242 0.1U
PEG_TXP_C15 (19)
(11) MCH_CFG_19 CFG19 N33 For external VGA:0 HSYNC/VSYNC serial R
CFG20 CFG_19
(11) MCH_CFG_20 L35 ohm place close to NB
CFG_20 CRESTLINE_1p0
IV&EV Dis/Enable setting
IV&EV Dis/Enable setting
E35 DFGT_VID_0 T64
R106 0 PM_BMBUSY#_R GFX_VID_0 DFGT_VID_1 T189 In Crestline EDS
(22) PM_BMBUSY# G41 PM_BM_BUSY# GFX_VID_1 A39
(3,20) H_DPRSTP# R116 0 ICH_DPRSTP#_R L39 C38 DFGT_VID_2 T190 Rev.1.0, Render
PM_DPRSTP# GFX_VID_2 DFGT_VID_3 T188 <check list>
(13) PM_EXTTS#0 L36 PM_EXT_TS#_0 GFX_VID_3 B39 Standby Voltage is
PM

(13) PM_EXTTS#1 R126 0 PM_EXTTS#1_R J36 E36 DFGT_VR_EN T191 SDVO/PCIE/LVDS not
PM_EXT_TS#_1 GFX_VR_EN not finalized
(22,40) DELAY_VR_PWRGOOD AW49 implement
R164 100 PLTRST_MCH# PWROK yet(TBD), 1.05V for
C
(19,21) PLT_RST-R# AV20 RSTIN#
16 lanes NC C
R168 *0 PM_THRMTRIP#_GMCH N20 Graphic Voltage
(3,20) PM_THRMTRIP# THERMTRIP#
R125 0 PM_DPRSLPVR_GMCH G36 range(VCC_AXG) is DREFSSCLK R101 4.7K VCC1.25
(22,40) DPRSLPVR DPRSLPVR between 0.9975V(min.) DREFSSCLK# R103 4.7K
AM49 and 1.1025V(max.). <FAE>
CL_CLK CL_CLK0 (22)
AK50 CL_DATA0 (22) Vgfx max at 1.1025V @ If no use DREFCLK PU and
GMCH pwrok is 3.3v CL_DATA <check list> <check list>
BJ51 AT43 ECPWROK (15,22,38) 8A (estimated) DREFCLK# PD
NC_1 CL_PWROK
IV&EV Dis/Enable setting For EV@ For IV@
ME

tolerant BK51 NC_2 CL_RST# AN49 CL_RST#0 (22,31)


BK50 AM50 Connect to GND Connect to 150ohm
NC_3 CL_VREF MCH_CLVREF
BL50 NC_4 CRT R/G/B CRT R/G/B
BL49 DREFCLK R111 4.7K VCC1.25 TV A/B/C TV A/B/C
NC_5 DREFCLK# R104 4.7K
BL3 NC_6 HSYNC/VSYNC Connect to 0ohm
BL2 only resever AT3/5 not HSYNC/VSYNC
NC_7
NC

BK1 support IAMT,but design <design guide>


NC_8 T65 If no use
BJ1 NC_9 SDVO_CTRL_CLK H35 line suggest to connection
E1 K36 T63 DREFCLK PU and R144 0 HSYNC11
NC_10 SDVO_CTRL_DATA these pin ,do not NC R143 0 VSYNC11
A5 G39 DREFCLK# PD
MISC

NC_11 CLK_REQ# PCIE_REQ4# (2)


C51 NC_12 ICH_SYNC# G40 MCH_ICH_SYNC# (22)
B50 NC_13
A50 R137 0 CRT_BLUE1
NC_14
A49 NC_15 TEST_1 A37
BK2 R32 CLKREQ# ( MCH drives CLK_REQ# R149 0 CRT_GREEN1
NC_16 TEST_2
to control the PCI-E diff clk
2

CRESTLINE_1p0 input itself ) R150 0 CRT_RED1


R145 R479
20K 0

1.8VSUS
1

1
1

R134
1K/F VCC1.25 1.8VSUS
1.8VSUS (8,9,13,41,42)
2

SM_RCOMP_VOH
VCC1.25 (9,23,43)
1

D D
VCC3 (2,3,8,9,11,13,14,15,16,19,20,21,22,23,24,25,26,28,30,31,33,38,40,41)
1

C306 C299 R471


VCC3 0.01U 2.2U/10V 1K/F R169
R142 20/F
2

R124 1 2 10K PM_EXTTS#0 3.01K/F


2

R130 1 2 10K PM_EXTTS#1 MCH_CLVREF SMRCOMPP


2

SMRCOMPN
1

SM_RCOMP_VOL
2

C244 R472
Quanta Computer Inc.
1

C307 C283 0.1U 392/F


0.01U 2.2U/10V R173
1

R122 20/F
PROJECT : PB2
2

1K/F
2

Size Document Number Rev


2

A
NB
Date: Friday, March 23, 2007 Sheet 6 of 46
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

07
A (13) M_A_DQ[63:0] (13) M_B_DQ[63:0] A
U38D
M_A_DQ0 AR43 BB19
SA_DQ_0 SA_BS_0 M_A_BS#0 (12,13)
M_A_DQ1 AW44 BK19 U38E
SA_DQ_1 SA_BS_1 M_A_BS#1 (12,13)
M_A_DQ2 BA45 BF29 M_B_DQ0 AP49 AY17
SA_DQ_2 SA_BS_2 M_A_BS#2 (12,13) SB_DQ_0 SB_BS_0 M_B_BS#0 (12,13)
M_A_DQ3 AY46 M_B_DQ1 AR51 BG18
SA_DQ_3 M_A_CAS# (12,13) SB_DQ_1 SB_BS_1 M_B_BS#1 (12,13)
M_A_DQ4 AR41 BL17 M_B_DQ2 AW50 BG36
SA_DQ_4 SA_CAS# SB_DQ_2 SB_BS_2 M_B_BS#2 (12,13)
M_A_DQ5 AR45 M_B_DQ3 AW51
SA_DQ_5 M_A_DQM[0..7] (13) SB_DQ_3
M_A_DQ6 AT42 AT45 M_A_DQM0 M_B_DQ4 AN51 BE17
SA_DQ_6 SA_DM_0 SB_DQ_4 SB_CAS# M_B_CAS# (12,13)
M_A_DQ7 AW47 BD44 M_A_DQM1 M_B_DQ5 AN50
SA_DQ_7 SA_DM_1 SB_DQ_5 M_B_DQM[0..7] (13)
M_A_DQ8 BB45 BD42 M_A_DQM2 M_B_DQ6 AV50 AR50 M_B_DQM0
M_A_DQ9 SA_DQ_8 SA_DM_2 M_A_DQM3 M_B_DQ7 SB_DQ_6 SB_DM_0 M_B_DQM1
BF48 SA_DQ_9 SA_DM_3 AW38 AV49 SB_DQ_7 SB_DM_1 BD49
M_A_DQ10 BG47 AW13 M_A_DQM4 M_B_DQ8 BA50 BK45 M_B_DQM2
M_A_DQ11 SA_DQ_10 SA_DM_4 M_A_DQM5 M_B_DQ9 SB_DQ_8 SB_DM_2 M_B_DQM3
BJ45 SA_DQ_11 SA_DM_5 BG8 BB50 SB_DQ_9 SB_DM_3 BL39
M_A_DQ12 BB47 AY5 M_A_DQM6 M_B_DQ10 BA49 BH12 M_B_DQM4
M_A_DQ13 SA_DQ_12 SA_DM_6 M_A_DQM7 M_B_DQ11 SB_DQ_10 SB_DM_4 M_B_DQM5
BG50 SA_DQ_13 SA_DM_7 AN6 BE50 SB_DQ_11 SB_DM_5 BJ7
M_A_DQ14 BH49 M_B_DQ12 BA51 BF3 M_B_DQM6
SA_DQ_14 M_A_DQS[7:0] (13) SB_DQ_12 SB_DM_6
M_A_DQ15 BE45 AT46 M_A_DQS0 M_B_DQ13 AY49 AW2 M_B_DQM7
SA_DQ_15 SA_DQS_0 SB_DQ_13 SB_DM_7

A
M_A_DQ16 AW43 BE48 M_A_DQS1 M_B_DQ14 BF50
SA_DQ_16 SA_DQS_1 SB_DQ_14 M_B_DQS[7:0] (13)
M_A_DQ17 BE44 BB43 M_A_DQS2 M_B_DQ15 BF49 AT50 M_B_DQS0
M_A_DQ18 SA_DQ_17 SA_DQS_2 M_A_DQS3 M_B_DQ16 SB_DQ_15 SB_DQS_0 M_B_DQS1
BG42 SA_DQ_18 SA_DQS_3 BC37 BJ50 SB_DQ_16 SB_DQS_1 BD50

B
M_A_DQ19 BE40 BB16 M_A_DQS4 M_B_DQ17 BJ44 BK46 M_B_DQS2
M_A_DQ20 SA_DQ_19 SA_DQS_4 M_A_DQS5 M_B_DQ18 SB_DQ_17 SB_DQS_2 M_B_DQS3
BF44 BH6 BJ43 BK39

MEMORY
M_A_DQ21 SA_DQ_20 SA_DQS_5 M_A_DQS6 M_B_DQ19 SB_DQ_18 SB_DQS_3 M_B_DQS4
BH45 SA_DQ_21 SA_DQS_6 BB2 BL43 SB_DQ_19 SB_DQS_4 BJ12
M_A_DQ22 BG40 AP3 M_A_DQS7 M_B_DQ20 BK47 BL7 M_B_DQS5
SA_DQ_22 SA_DQS_7 M_A_DQS#[7:0] (13) SB_DQ_20 SB_DQS_5
M_A_DQ23 BF40 AT47 M_A_DQS#0 M_B_DQ21 BK49 BE2 M_B_DQS6

MEMORY
M_A_DQ24 SA_DQ_23 SA_DQS#_0 M_A_DQS#1 M_B_DQ22 SB_DQ_21 SB_DQS_6 M_B_DQS7
AR40 SA_DQ_24 SA_DQS#_1 BD47 BK43 SB_DQ_22 SB_DQS_7 AV2 M_B_DQS#[7:0] (13)
M_A_DQ25 AW40 BC41 M_A_DQS#2 M_B_DQ23 BK42 AU50 M_B_DQS#0
M_A_DQ26 SA_DQ_25 SA_DQS#_2 M_A_DQS#3 M_B_DQ24 SB_DQ_23 SB_DQS#_0 M_B_DQS#1
AT39 SA_DQ_26 SA_DQS#_3 BA37 BJ41 SB_DQ_24 SB_DQS#_1 BC50
M_A_DQ27 AW36 BA16 M_A_DQS#4 M_B_DQ25 BL41 BL45 M_B_DQS#2
M_A_DQ28 SA_DQ_27 SA_DQS#_4 M_A_DQS#5 M_B_DQ26 SB_DQ_25 SB_DQS#_2 M_B_DQS#3
B AW41 SA_DQ_28 SA_DQS#_5 BH7 BJ37 SB_DQ_26 SB_DQS#_3 BK38 B
M_A_DQ29 AY41 BC1 M_A_DQS#6 M_B_DQ27 BJ36 BK12 M_B_DQS#4
M_A_DQ30 SA_DQ_29 SA_DQS#_6 M_A_DQS#7 M_B_DQ28 SB_DQ_27 SB_DQS#_4 M_B_DQS#5
AV38 SA_DQ_30 SA_DQS#_7 AP2 BK41 SB_DQ_28 SB_DQS#_5 BK7
M_A_DQ31 AT38 M_B_DQ29 BJ40 BF2 M_B_DQS#6
SA_DQ_31 M_A_A[13:0] (12,13) SB_DQ_29 SB_DQS#_6
M_A_DQ32 AV13 BJ19 M_A_A0 M_B_DQ30 BL35 AV3 M_B_DQS#7
M_A_DQ33 SA_DQ_32 SA_MA_0 M_A_A1 M_B_DQ31 SB_DQ_30 SB_DQS#_7
AT13 BD20 BK37
SYSTEM

SA_DQ_33 SA_MA_1 SB_DQ_31 M_B_A[13:0] (12,13)


M_A_DQ34 AW11 BK27 M_A_A2 M_B_DQ32 BK13 BC18 M_B_A0
M_A_DQ35 SA_DQ_34 SA_MA_2 M_A_A3 M_B_DQ33 SB_DQ_32 SB_MA_0 M_B_A1
AV11 SA_DQ_35 SA_MA_3 BH28 BE11 SB_DQ_33 SB_MA_1 BG28
M_A_DQ36 AU15 BL24 M_A_A4 M_B_DQ34 BK11 BG25 M_B_A2

SYSTEM
M_A_DQ37 SA_DQ_36 SA_MA_4 M_A_A5 M_B_DQ35 SB_DQ_34 SB_MA_2 M_B_A3
AT11 SA_DQ_37 SA_MA_5 BK28 BC11 SB_DQ_35 SB_MA_3 AW17
M_A_DQ38 BA13 BJ27 M_A_A6 M_B_DQ36 BC13 BF25 M_B_A4
M_A_DQ39 SA_DQ_38 SA_MA_6 M_A_A7 M_B_DQ37 SB_DQ_36 SB_MA_4 M_B_A5
BA11 SA_DQ_39 SA_MA_7 BJ25 BE12 SB_DQ_37 SB_MA_5 BE25
M_A_DQ40 BE10 BL28 M_A_A8 M_B_DQ38 BC12 BA29 M_B_A6
M_A_DQ41 SA_DQ_40 SA_MA_8 M_A_A9 M_B_DQ39 SB_DQ_38 SB_MA_6 M_B_A7
BD10 SA_DQ_41 SA_MA_9 BA28 BG12 SB_DQ_39 SB_MA_7 BC28
M_A_DQ42 BD8 BC19 M_A_A10 M_B_DQ40 BJ10 AY28 M_B_A8
M_A_DQ43 SA_DQ_42 SA_MA_10 M_A_A11 M_B_DQ41 SB_DQ_40 SB_MA_8 M_B_A9
AY9 SA_DQ_43 SA_MA_11 BE28 BL9 SB_DQ_41 SB_MA_9 BD37
M_A_DQ44 BG10 BG30 M_A_A12 M_B_DQ42 BK5 BG17 M_B_A10
M_A_DQ45 SA_DQ_44 SA_MA_12 M_A_A13 M_B_DQ43 SB_DQ_42 SB_MA_10 M_B_A11
AW9 SA_DQ_45 SA_MA_13 BJ16 BL5 SB_DQ_43 SB_MA_11 BE37
M_A_DQ46 BD7 M_B_DQ44 BK9 BA39 M_B_A12
DDR

M_A_DQ47 SA_DQ_46 M_B_DQ45 SB_DQ_44 SB_MA_12 M_B_A13


BB9 SA_DQ_47 BK10 SB_DQ_45 SB_MA_13 BG13
M_A_DQ48 BB5 BE18 M_B_DQ46 BJ8
SA_DQ_48 SA_RAS# M_A_RAS# (12,13) SB_DQ_46
M_A_DQ49 AY7 AY20 TP_SA_RCVEN# M_B_DQ47 BJ6 AV16

DDR
SA_DQ_49 SA_RCVEN# SB_DQ_47 SB_RAS# M_B_RAS# (12,13)
M_A_DQ50 AT5 T73 M_B_DQ48 BF4 AY18 TP_SB_RCVEN#
M_A_DQ51 SA_DQ_50 M_B_DQ49 SB_DQ_48 SB_RCVEN# T77
AT7 SA_DQ_51 SA_WE# BA19 M_A_WE# (12,13) BH5 SB_DQ_49
M_A_DQ52 AY6 M_B_DQ50 BG1 BC17
SA_DQ_52 SB_DQ_50 SB_WE# M_B_WE# (12,13)
M_A_DQ53 BB7 M_B_DQ51 BC2
M_A_DQ54 SA_DQ_53 M_B_DQ52 SB_DQ_51
AR5 SA_DQ_54 BK3 SB_DQ_52
M_A_DQ55 AR8 M_B_DQ53 BE4
M_A_DQ56 SA_DQ_55 M_B_DQ54 SB_DQ_53
AR9 SA_DQ_56 BD3 SB_DQ_54
M_A_DQ57 AN3 M_B_DQ55 BJ2
C
M_A_DQ58 SA_DQ_57 M_B_DQ56 SB_DQ_55 C
AM8 SA_DQ_58 BA3 SB_DQ_56
M_A_DQ59 AN10 M_B_DQ57 BB3
M_A_DQ60 SA_DQ_59 M_B_DQ58 SB_DQ_57
AT9 SA_DQ_60 AR1 SB_DQ_58
M_A_DQ61 AN9 M_B_DQ59 AT3
M_A_DQ62 SA_DQ_61 M_B_DQ60 SB_DQ_59
AM9 SA_DQ_62 AY2 SB_DQ_60
M_A_DQ63 AN11 M_B_DQ61 AY3
SA_DQ_63 M_B_DQ62 SB_DQ_61
AU2 SB_DQ_62
CRESTLINE_1p0 M_B_DQ63 AT2 SB_DQ_63
CRESTLINE_1p0

D D

Quanta Computer Inc.


PROJECT : PB2
Size Document Number Rev
A
NB
Date: Friday, March 23, 2007 Sheet 7 of 46
1 2 3 4 5 6 7 8
5 4 3 2 1

VCCP

AT35
AT34
AH28
U38G

VCC_1
VCC_2
VCC_3
VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
T17
T18
VCC3

R493
1
10
2 +VCC_GMCH_L
D17
1

CH751H-40HPT
2 AB33
AB36
AB37
U38F

VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
08
AC32 VCC_5 VCC_AXG_NCTF_3 T19 Ivcc (External GFX 1.310 A, AC33 VCC_NCTF_4 VSS_NCTF_1 T27
AC31 T21 AC35 T37
AK32
VCC_4 VCC_AXG_NCTF_4
T22 integrate 1.572 A) AC36
VCC_NCTF_5 VSS_NCTF_2
U24

VCC CORE
VCC_6 VCC_AXG_NCTF_5 VCC_NCTF_6 VSS_NCTF_3
AJ31 VCC_7 VCC_AXG_NCTF_6 T23 AD35 VCC_NCTF_7 VSS_NCTF_4 U28
AJ28 T25 VCCP AD36 V31
VCC_8 VCC_AXG_NCTF_7 VCC_NCTF_8 VSS_NCTF_5
AH32 VCC_9 VCC_AXG_NCTF_8 U15 AF33 VCC_NCTF_9 VSS_NCTF_6 V35
D
AH31 VCC_10 VCC_AXG_NCTF_9 U16 AF36 VCC_NCTF_10 VSS_NCTF_7 AA19 D
AH29 VCC_11 VCC_AXG_NCTF_10 U17 AH33 VCC_NCTF_11 VSS_NCTF_8 AB17
AF32 VCC_12 VCC_AXG_NCTF_11 U19 AH35 VCC_NCTF_12 VSS_NCTF_9 AB35

VSS NCTF
VCC_AXG_NCTF_12 U20 AH36 VCC_NCTF_13 VSS_NCTF_10 AD19

1
U21 + AH37 AD37
VCC_AXG_NCTF_13 C759 C740 C290 C275 C303 VCC_NCTF_14 VSS_NCTF_11
VCC_AXG_NCTF_14 U23 AJ33 VCC_NCTF_15 VSS_NCTF_12 AF17
R30 U26 Layout Note: 220U/2.5V 22U/6.3V 0.22U/10V 0.22U/10V 0.1U AJ35 AF35

2
VCC_13 VCC_AXG_NCTF_15 VCC_NCTF_16 VSS_NCTF_13
VCC_AXG_NCTF_16 V16 370 mils from edge. AK33 VCC_NCTF_17 VSS_NCTF_14 AK17
VCC_AXG_NCTF_17 V17 AK35 VCC_NCTF_18 VSS_NCTF_15 AM17
IVCCSM supply VCC_AXG_NCTF_18 V19 Layout Note: AK36 VCC_NCTF_19 VSS_NCTF_16 AM24
V20 Inside GMCH cavity. AK37 AP26
current 1 VCC_AXG_NCTF_19
V21 AD33
VCC_NCTF_20 VSS_NCTF_17
AP28
VCC_AXG_NCTF_20 VCC_NCTF_21 VSS_NCTF_18
channel VCC_AXG_NCTF_21 V23
VCCP
AJ36 VCC_NCTF_22 VSS_NCTF_19 AR15
V24 AM35 AR19
1.615A 2 VCC_AXG_NCTF_22 VCC_NCTF_23 VSS_NCTF_20

VCC NCTF
Y15 AL33 AR28
channel 1.8VSUS
3.318A
POWER VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
Y16
Y17
Ivcc_AXG Graphics core supply
current 7.7A
+VGFX_CORE_INT R185 *0 AL35
AA33
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VSS_NCTF_21

AU32 Y19 R184 *0 AA35


VCC_SM_1 VCC_AXG_NCTF_26 VCC_NCTF_27
AU33 VCC_SM_2 VCC_AXG_NCTF_27 Y20 AA36 VCC_NCTF_28
AU35 VCC_SM_3 VCC_AXG_NCTF_28 Y21 AP35 VCC_NCTF_29

1
AV33 VCC_SM_4 VCC_AXG_NCTF_29 Y23 AP36 VCC_NCTF_30
AW33 Y24 + C419 R598 AR35
VCC_SM_5 VCC_AXG_NCTF_30 *330U/2.5V VCC_NCTF_31
AW35 VCC_SM_6 VCC_AXG_NCTF_31 Y26 0 AR36 VCC_NCTF_32
AY35 Y28 Y32

2
VCC_SM_7 VCC_AXG_NCTF_32 VCC_NCTF_33
BA32 Y29 Y33
BA33
BA35
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
AA16
AA17
Layout Note:
370 mils from edge.
Y35
Y36
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
POWER
BB33 VCC_SM_11 VCC_AXG_NCTF_36 AB16 H=1.9mm A test check Y37 VCC_NCTF_37 VSS_SCB1 A3
BC32 AB19 when use T30 B2

VSS SCB
VCC_SM_12 VCC_AXG_NCTF_37 VCC_NCTF_38 VSS_SCB2
BC33 VCC_SM_13 VCC_AXG_NCTF_38 AC16 P/N:CH733LM8812 external VGA can T34 VCC_NCTF_39 VSS_SCB3 C1
C BC35 VCC_SM_14 VCC_AXG_NCTF_39 AC17 remove or not.. T35 VCC_NCTF_40 VSS_SCB4 BL1 C
BD32 VCC_SM_15 VCC_AXG_NCTF_40 AC19 Layout Note: U29 VCC_NCTF_41 VSS_SCB5 BL51
BD35 AD15 andrew U31 A51
VCC_SM_16 VCC_AXG_NCTF_41 Inside GMCH cavity for VCC_AXG. VCC_NCTF_42 VSS_SCB6
BE32 VCC_SM_17 VCC_AXG_NCTF_42 AD16 U32 VCC_NCTF_43
BE33 VCC_SM_18 VCC_AXG_NCTF_43 AD17 U33 VCC_NCTF_44
BE35 VCC_SM_19 VCC_AXG_NCTF_44 AF16 U35 VCC_NCTF_45
VCC GFX NCTF

BF33 AF19 U36


VCC SM

VCC_SM_20 VCC_AXG_NCTF_45 VCC_NCTF_46

1
BF34 VCC_SM_21 VCC_AXG_NCTF_46 AH15 V32 VCC_NCTF_47
BG32 AH16 C336 C316 C331 C314 C411 C412 V33
VCC_SM_22 VCC_AXG_NCTF_47 *0.1U *0.1U *0.47U/10V *1U *10U *22U/6.3V VCC_NCTF_48
BG33 AH17 2 for IAMT power if not V36

2
VCC_SM_23 VCC_AXG_NCTF_48 VCC_NCTF_49 VCCP
BG35 VCC_SM_24 VCC_AXG_NCTF_49 AH19 support need to V37 VCC_NCTF_50
BH32 VCC_SM_25 VCC_AXG_NCTF_50 AJ16 connection to S0 power
BH34 VCC_SM_26 VCC_AXG_NCTF_51 AJ17 VCC_AXM_1 AT33
BH35 AJ19 AT31

VCC AXM
VCC_SM_27 VCC_AXG_NCTF_52 VCC_AXM_2
BJ32 VCC_SM_28 VCC_AXG_NCTF_53 AK16 VCC_AXM_3 AK29
BJ33 VCC_SM_29 VCC_AXG_NCTF_54 AK19 VCC_AXM_4 AK24
BJ34 VCC_SM_30 VCC_AXG_NCTF_55 AL16 Layout Note: VCC_AXM_5 AK23
BK32 AL17 VCCP AL24 AJ26
VCC_SM_31 VCC_AXG_NCTF_56 Inside GMCH VCC_AXM_NCTF_1 VCC_AXM_6
BK33 VCC_SM_32 VCC_AXG_NCTF_57 AL19 GMCH 1.05V current(A) Remark AL26 VCC_AXM_NCTF_2 VCC_AXM_7 AJ23
BK34 AL20
cavity. AL28
VCC_SM_33 VCC_AXG_NCTF_58 VCC_AXM_NCTF_3
BK35 VCC_SM_34 VCC_AXG_NCTF_59 AL21 ( 1.3A for AM26 VCC_AXM_NCTF_4
BL33 VCC_SM_35 VCC_AXG_NCTF_60 AL23 VCC Core 1.573 external Ivcc_AXM AM28 VCC_AXM_NCTF_5

VCC AXM NCTF


AU30 AM15 GFX ) AM29
VCC_SM_36 VCC_AXG_NCTF_61
AM16 for integrated Controller C288 C285 C305 AM31
VCC_AXM_NCTF_6
VCC_AXG_NCTF_62 0.1U 0.1U 0.1U VCC_AXM_NCTF_7
AM19 VCC_AXG 7.7 Gfx supply AM32

2
+VGFX_CORE_INT VCC_AXG_NCTF_63 VCC_AXM_NCTF_8
AM20 AM33
VCC_AXG_NCTF_64
AM21
current AP29
VCC_AXM_NCTF_9
VCC_AXG_NCTF_65 VCC_AXM_NCTF_10
R20 VCC_AXG_1 VCC_AXG_NCTF_66 AM23 VCC_AXD 0.2 540mA AP31 VCC_AXM_NCTF_11
T14 VCC_AXG_2 VCC_AXG_NCTF_67 AP15 AP32 VCC_AXM_NCTF_12
B
W13 VCC_AXG_3 VCC_AXG_NCTF_68 AP16 AP33 VCC_AXM_NCTF_13 B
W14 VCC_AXG_4 VCC_AXG_NCTF_69 AP17 VTT 0.85 FSB VCCP AL29 VCC_AXM_NCTF_14
Y12 VCC_AXG_5 VCC_AXG_NCTF_70 AP19 AL31 VCC_AXM_NCTF_15

1
AA20 VCC_AXG_6 VCC_AXG_NCTF_71 AP20 AL32 VCC_AXM_NCTF_16
AA23 AP21 VCC_PEG 1.2 for PCIEG C296 C320 C297 AR31
VCC_AXG_7 VCC_AXG_NCTF_72 22U/6.3V 0.22U/10V 0.22U/10V VCC_AXM_NCTF_17
AA26 AP23 AR32

2
VCC_AXG_8 VCC_AXG_NCTF_73 VCC_AXM_NCTF_18
AA28 VCC_AXG_9 VCC_AXG_NCTF_74 AP24 AR33 VCC_AXM_NCTF_19
AB21 VCC_AXG_10 VCC_AXG_NCTF_75 AR20 VCC_AXM 0.54 for IAMT
AB24 VCC_AXG_11 VCC_AXG_NCTF_76 AR21 function
AB29 VCC_AXG_12 VCC_AXG_NCTF_77 AR23 Layout Note:
AC20 VCC_AXG_13 VCC_AXG_NCTF_78 AR24 Place close to GMCH edge.
AC21 AR26 VCCR_RX_DMI 0.25 DMI CRESTLINE_1p0
VCC_AXG_14 VCC_AXG_NCTF_79
VCC GFX

AC23 VCC_AXG_15 VCC_AXG_NCTF_80 V26


AC24 VCC_AXG_16 VCC_AXG_NCTF_81 V28
AC26 VCC_AXG_17 VCC_AXG_NCTF_82 V29 SUM 12.313
AC28 Y31 1.8VSUS 1.8VSUS
VCC_AXG_18 VCC_AXG_NCTF_83
AC29 VCC_AXG_19
AD20 VCC_AXG_20
AD23 VCC_AXG_21

1
AD24 AW45 VCCSM_LF1
VCC SM LF

VCC_AXG_22 VCC_SM_LF1

1
AD28 BC39 VCCSM_LF2 +
VCC_AXG_23 VCC_SM_LF2

1
AF21 BE39 VCCSM_LF3 C771 C319 C329
VCC_AXG_24 VCC_SM_LF3 VCCSM_LF4 C310 330U/2.5V 22U/6.3V 22U/6.3V
AF26 BD17

2
VCC_AXG_25 VCC_SM_LF4 VCCSM_LF5 0.1U
AA31 BD4

2
VCC_AXG_26 VCC_SM_LF5 VCCSM_LF6
AH20 VCC_AXG_27 VCC_SM_LF6 AW8
AH21 AT6 VCCSM_LF7
VCC_AXG_28 VCC_SM_LF7
AH23 VCC_AXG_29
1

AH24 VCC_AXG_30
Layout Note:
AH26 C362 C354 C402 C340 C281 C282 C262 Layout Note: Place on the edge.
VCC_AXG_31 0.1U 0.1U 0.22U/10V 0.22U/10V 0.47U/10V 1U 1U
AD31 Place C901 where LVDS
2

VCC_AXG_32
A AJ20 VCC_AXG_33
A
AN14
and DDR2 taps.
VCC_AXG_34

CRESTLINE_1p0
Quanta Computer Inc.
PROJECT : PB2
Size Document Number Rev
A
NB
Date: Friday, March 23, 2007 Sheet 8 of 46
5 4 3 2 1
5 4 3 2 1

09
LVDS Disable/Enable guideline
External VGA with EV@part,Internal VGA with IV@ part
IV&EV Dis/Enable setting
CRT/TV Disable/Enable guideline If SDVO Disable If LVDS
Signal LVDS Disable enable
+3V_VCCSYNC External VGA with EV@part,Internal VGA with IV@ part
VCCD_LVDS GND 1.8V
VCC3 R141 *0 Ball Enable Disable Ball Enable Disable
VCCA_LVDS GND 1.8V
C298 R131
<FAE> VCCA_CRT_DAC 3.3V GND VCCA_TVC_DAC 3.3V GND VCC_TX_LVDS GND 1.8V
INT VGA disable *0.1U 0
VCCSYNC connect
to GND VCCD_CRT 1.5V GND VCCD_TVDAC 1.5V 1.5V

VCCD_QDAC 1.5V GND VCCA_DAC_BG 3.3V GND


D D

VCCA_TVA_DAC 3.3V GND VSS_DAC_BG GND GND


L36 R480 *0
VCC3 1 2 +VCCA_CRTDAC 1 2 +3V_VCCA_CRT_DAC
*BLM18PG181SN1 VCCA_TVB_DAC 3.3V GND VCCSYNC 3.3V GND

1
FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC R482 VCCP
C722
*0.1U 0
+3V_VCC_HV

2
U38H D7
CH751H-40HPT_NC 40 mil
+3V_TV_DAC R492 R483 *0 J32 U13 wide

1
+VCC_TVBG +1.8VSUS_VCC_TX_LVDS VCCSYNC VTT_1
2 1 2 1 VTT_2 U12
A33 U11 Ivcc_VTT FSB +3V_VCC_HV_L
VCCA_CRT_DAC_1 VTT_3

1
*0.03/F R484 B33 U9
VCCA_CRT_DAC_2 VTT_4 supply

1
U8 C352 C761

CRT
VTT_5

1
C726 0 U7 2.2U/6.3V 4.7U current +3V_VCC_HV

2
*0.1U VTT_6
A30 U5
0.85A

2
VCCA_DAC_BG VTT_7 R96
VTT_8 U3
B32 U2 10
VSSA_DAC_BG VTT_9 VCCP
U1

2
VTT_10
VTT_11 T13 Place on the edge.
+1.25V_VCCA_DPLLA B49 T11 R478 0
VCCA_DPLLA VTT_12

VTT
VTT_13 T10
+1.25V_VCCA_DPLLB H49 T9
VCCA_DPLLB VTT_14
T7

PLL
VTT_15

1
FB_120ohm+-25%_100mHz +1.25V_VCCA_HPLL AL2 T6
VCC1.25 +1.8VSUS_VCC_TX_LVDS VCCA_HPLL VTT_16 C361 C760 + C418 VCC3
VCC1.25_200mA_0.2ohm DC
80mA VTT_17 T5
L14 +1.25V_VCCA_MPLL AM2 T3 0.1U 4.7U 220U/2.5V

2
+1.25V_VCCA_DPLLA VCCA_MPLL VTT_18
50mA 2 1 T2

2
L38 *0 VTT_19
IV&EV Dis/Enable setting R3

A LVDS
VTT_20

1
2 1 +1.25V_VCCA_HPLL A41 R2
VCCA_LVDS VTT_21

1
BLM11A121S + C256 C251 C716 VCC1.25 VCC1.25
10uH+-20%_100mA 10mA VTT_22 R1
1

*470U/4V B41 Place on the edge.


VSSA_LVDS
1

C756 0.1U R476 *1000P

2
C769 0.1U AT23 +1.25V_AXD R174 0
2

22U/10V 0 VCC_AXD_1 R158


AU28
2

VCC3 VCC_AXD_2
80mA K50 VCCA_PEG_BG VCC_AXD_3 AU24 0

1
C L34 C
AT29

A PEG
VCC_AXD_4

AXD
L39 150mA 2 1 +1.25V_VCCA_DPLLB K49 AT25 C324 C339
BLM11A121S *0 VSSA_PEG_BG VCC_AXD_5 1U 22U/10V +1.25V_VCC_AXF
AT30 Place caps close

2
VCC_AXD_6

1
2 1 +1.25V_VCCA_MPLL
to VCC_AXD.

1
0.1Caps should be + C693 C248 +1.25V_VCCD_PEG_PLL U51 AR29
VCCA_PEG_PLL VCC_AXD_NCTF

1
R494 placed 200 mils *470U/4V C252 100mA
0.5/F/0603 0.1U 0.1U C342 C343

2
with in its pins.
1

1 2 +VCCA_MPLL_L Ivcca_PEG_BG AW18 B23 +1.25V_VCC_AXF 1U 10U/6.3V

2
C757 VCCA_SM_1 VCC_AXF_1
supply current AV19 B21 Ivcc_DMI supply

AXF
+VCCA_MPLL_L 0.1U AU19
VCCA_SM_2
POWER VCC_AXF_2
A21 +1.25V_VCC_DMI
2

100mA VCCA_SM_3 VCC_AXF_3 current 100mA


AU18 VCCA_SM_4
1

AU17 AJ50 +1.25V_VCC_DMI R470 0 VCC1.25


C770 VCCA_SM_5 VCC_DMI
Place caps close

A SM

1
22U/10V VCC1.25 R178 0 +1.25V_VCCA_SM AT22 to VCC_AXF
2

VCCA_SM_7 +1.8VSUS_VCC_SM_CK C710


AT21 BK24

SM CK
VCCA_SM_8 VCC_SM_CK_1 0.1U
AT19 BK23 200mA

2
VCCA_SM_9 VCC_SM_CK_2

1
+ C332 C350 C410 C344 AT18 BJ24
C424 4.7U 22U/6.3V 22U/6.3V 1U VCCA_SM_10 VCC_SM_CK_3
AT17 VCCA_SM_11 VCC_SM_CK_4 BJ23
100U/6.3V-3528 1 AR17 +1.8VSUS_VCC_TX_LVDS 1.8VSUS

2
VCCA_SM_NCTF_1
AR16 VCCA_SM_NCTF_2 100mA
L35 *0
A43 +1.8VSUS_VCC_TX_LVDS 2 1

A CK
VCC_TX_LVDS
BC29 VCCA_SM_CK_1

1
VCC1.25 R152 0 +1.25V_VCCA_SM_CK BB29 +3V_VCC_HV 1uH+-20%_300mA
VCCA_SM_CK_2

1
C40 R475 +
VCC_HV_1
1

C300 C25 B40 0 C715 C712

HV
VCCA_TVA_DAC_1 VCC_HV_2
1

1
22U/6.3V C302 C313 C311 VCC3 R151 *0 B25 *1000P *220U/6.3V

2
VCCA_TVA_DAC_2

1
1U 1U 0.1U C27 IV&EV Dis/Enable setting
2

R148 0 VCCA_TVB_DAC_1 C717


B27 AD51

TV
2

2 VCCA_TVB_DAC_2 VCC_PEG_1
B28 W50 0.1U

2
VCCA_TVC_DAC_1 VCC_PEG_2 +VCC_PEG VCCP
A28 VCCA_TVC_DAC_2 VCC_PEG_3 W51

PEG
+1.5V_VCCD_TVDAC V49 R542 Ivcc_PEG

D TV/CRT
VCC1.5 +1.5V_VCCD_TVDAC R146 0 VCC_PEG_4 0
V50
R121 0 R136 *0 +1.5V_VCCD_CRT M32
VCC_PEG_5 supply current
VCCD_CRT

1
1 2 +1.5V_VCCD_TVDAC L29 91uH+-20%_1.5A 1.2A
VCCD_TVDAC

1
AH50 +VCC_RXR_DMI +

DMI
VCC_RXR_DMI_1
1

+1.5V_VCCD_QDAC N28 AH51 C222 C268


C284 VCCD_QDAC VCC_RXR_DMI_2 220U/2.5V 10U/6.3V

2
0.1U +VCCA_MPLL_L +VCCA_MPLL_L AN2
2

VCCD_HPLL +VTTLF1 VCCP


A7 Ivcc_RX_DMI

VTTLF
+1.25V_VCCD_PEG_PLL VTTLF1 +VTTLF2
U48 F2
L18 250mA
VCCD_PEG_PLL VTTLF2
AH1 +VTTLF3 R569 supply current

LVDS
VTTLF3
1

B B
1 2 +VCCQ_TVDAC +1.8V_VCCD_LVDS J41 VCCD_LVDS_1
0 250mA
*BLM18PG181SN1 C762 C258 150mA H42 VCCD_LVDS_2
1

1
R159 0.1U 0.1U 91uH+-20%_1.5A
2

1
FB_180ohm+-25%_ C317 +
*0.1U 0 C227 C249
100mHz_1500mA_
2

CRESTLINE_1p0 220U/2.5V 10U/6.3V

2
0.09ohm DC
1.8VSUS R100 *0
+VTTLF1
+VTTLF2
C259 C261 R107 +VTTLF3
1.8VSUS

1
FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC *1U *10U 0 L19
C758 C384 C742 0
0.47U/10V 0.47U/10V 0.47U/10V +1.8VSUS_VCC_SM_CK 2 1

2
+3V_TV_DAC

1
1uH+-20%_300mA
L37
VCC3 1 2 R163

1
1/F/0603
*BLM18PG181SN1 C334 C333

1 2
1

22U/10V 0.1U +VCC_SM_CK_L

2
C732
*10U C330
2

10U/6.3V

2
VCC1.25
L33 100mA
1 2 +1.25V_VCCD_PEG_PLL
22nF & 0.1uF for BLM21PG600SN1D(60,3A)
1

VCC_TVDACA:C_R should
be placed with in 250 FB_220ohm+-25%_100MHz
R464
mils from Crestline. _2A_0.1ohm DC 1/F/0603
1
1 2

C253
IV&EV Dis/Enable setting 0.1U
2

C685
10U/6.3V
2

A A

Quanta Computer Inc.


PROJECT : PB2
Size Document Number Rev
A
NB
Date: Friday, March 23, 2007 Sheet 9 of 46
5 4 3 2 1
5 4 3 2 1

A13
A15
A17
A24
U38I

VSS_1
VSS_2
VSS_3
VSS_100
VSS_101
VSS_102
AW24
AW29
AW32
AW5
C46
C50
C7
D13
D24
U38J
VSS_199
VSS_200
VSS_201
VSS_202
VSS_287
VSS_288
VSS_289
VSS_290
W11
W39
W43
W47
W5
10
VSS_4 VSS_103 VSS_203 VSS_291
AA21 VSS_5 VSS_104 AW7 D3 VSS_204 VSS_292 W7
AA24 VSS_6 VSS_105 AY10 D32 VSS_205 VSS_293 Y13
AA29 VSS_7 VSS_106 AY24 D39 VSS_206 VSS_294 Y2
D
AB20 VSS_8 VSS_107 AY37 D45 VSS_207 VSS_295 Y41 D
AB23 VSS_9 VSS_108 AY42 D49 VSS_208 VSS_296 Y45
AB26 VSS_10 VSS_109 AY43 E10 VSS_209 VSS_297 Y49
AB28 VSS_11 VSS_110 AY45 E16 VSS_210 VSS_298 Y5
AB31 VSS_12 VSS_111 AY47 E24 VSS_211 VSS_299 Y50
AC10 VSS_13 VSS_112 AY50 E28 VSS_212 VSS_300 Y11
AC13 VSS_14 VSS_113 B10 E32 VSS_213 VSS_301 P29
AC3 VSS_15 VSS_114 B20 E47 VSS_214 VSS_302 T29
AC39 VSS_16 VSS_115 B24 F19 VSS_215 VSS_303 T31
AC43 VSS_17 VSS_116 B29 F36 VSS_216 VSS_304 T33
AC47 VSS_18 VSS_117 B30 F4 VSS_217 VSS_305 R28
AD1 VSS_19 VSS_118 B35 F40 VSS_218
AD21 VSS_20 VSS_119 B38 F50 VSS_219
AD26 VSS_21 VSS_120 B43 G1 VSS_220
AD29 VSS_22 VSS_121 B46 G13 VSS_221 VSS_306 AA32
AD3 VSS_23 VSS_122 B5 G16 VSS_222 VSS_307 AB32
AD41 VSS_24 VSS_123 B8 G19 VSS_223 VSS_308 AD32
AD45 VSS_25 VSS_124 BA1 G24 VSS_224 VSS_309 AF28
AD49 VSS_26 VSS_125 BA17 G28 VSS_225 VSS_310 AF29
AD5 VSS_27 VSS_126 BA18 G29 VSS_226 VSS_311 AT27
AD50 VSS_28 VSS_127 BA2 G33 VSS_227 VSS_312 AV25
AD8 VSS_29 VSS_128 BA24 G42 VSS_228 VSS_313 H50
AE10 VSS_30 VSS_129 BB12 G45 VSS_229
AE14 VSS_31 VSS_130 BB25 G48 VSS_230
AE6 VSS_32 VSS_131 BB40 G8 VSS_231
AF20 BB44 H24
AF23
AF24
VSS_33
VSS_34
VSS_35
VSS VSS_132
VSS_133
VSS_134
BB49
BB8
H28
H4
VSS_232
VSS_233
VSS_234
AF31 VSS_36 VSS_135 BC16 H45 VSS_235
AG2 VSS_37 VSS_136 BC24 J11 VSS_236
C AG38 VSS_38 VSS_137 BC25 J16 VSS_237
C
AG43 VSS_39 VSS_138 BC36 J2 VSS_238
AG47 VSS_40 VSS_139 BC40 J24 VSS_239
AG50 VSS_41 VSS_140 BC51 J28 VSS_240
AH3 BD13 J33
AH40
AH41
VSS_42
VSS_43
VSS_44
VSS_141
VSS_142
VSS_143
BD2
BD28
J35
J39
VSS_241
VSS_242
VSS_243
VSS
AH7 VSS_45 VSS_144 BD45
AH9 VSS_46 VSS_145 BD48 K12 VSS_245
AJ11 VSS_47 VSS_146 BD5 K47 VSS_246
AJ13 VSS_48 VSS_147 BE1 K8 VSS_247
AJ21 VSS_49 VSS_148 BE19 L1 VSS_248
AJ24 VSS_50 VSS_149 BE23 L17 VSS_249
AJ29 VSS_51 VSS_150 BE30 L20 VSS_250
AJ32 VSS_52 VSS_151 BE42 L24 VSS_251
AJ43 VSS_53 VSS_152 BE51 L28 VSS_252
AJ45 VSS_54 VSS_153 BE8 L3 VSS_253
AJ49 VSS_55 VSS_154 BF12 L33 VSS_254
AK20 VSS_56 VSS_155 BF16 L49 VSS_255
AK21 VSS_57 VSS_156 BF36 M28 VSS_256
AK26 VSS_58 VSS_157 BG19 M42 VSS_257
AK28 VSS_59 VSS_158 BG2 M46 VSS_258
AK31 VSS_60 VSS_159 BG24 M49 VSS_259
AK51 VSS_61 VSS_160 BG29 M5 VSS_260
AL1 VSS_62 VSS_161 BG39 M50 VSS_261
AM11 VSS_63 VSS_162 BG48 M9 VSS_262
AM13 VSS_64 VSS_163 BG5 N11 VSS_263
AM3 VSS_65 VSS_164 BG51 N14 VSS_264
AM4 VSS_66 VSS_165 BH17 N17 VSS_265
B
AM41 VSS_67 VSS_166 BH30 N29 VSS_266 B
AM45 VSS_68 VSS_167 BH44 N32 VSS_267
AN1 VSS_69 VSS_168 BH46 N36 VSS_268
AN38 VSS_70 VSS_169 BH8 N39 VSS_269
AN39 VSS_71 VSS_170 BJ11 N44 VSS_270
AN43 VSS_72 VSS_171 BJ13 N49 VSS_271
AN5 VSS_73 VSS_172 BJ38 N7 VSS_272
AN7 VSS_74 VSS_173 BJ4 P19 VSS_273
AP4 VSS_75 VSS_174 BJ42 P2 VSS_274
AP48 VSS_76 VSS_175 BJ46 P23 VSS_275
AP50 VSS_77 VSS_176 BK15 P3 VSS_276
AR11 VSS_78 VSS_177 BK17 P50 VSS_277
AR2 VSS_79 VSS_178 BK25 R49 VSS_278
AR39 VSS_80 VSS_179 BK29 T39 VSS_279
AR44 VSS_81 VSS_180 BK36 T43 VSS_280
AR47 VSS_82 VSS_181 BK40 T47 VSS_281
AR7 VSS_83 VSS_182 BK44 U41 VSS_282
AT10 VSS_84 VSS_183 BK6 U45 VSS_283
AT14 VSS_85 VSS_184 BK8 U50 VSS_284
AT41 VSS_86 VSS_185 BL11 V2 VSS_285
AT49 VSS_87 VSS_186 BL13 V3 VSS_286
AU1 VSS_88 VSS_187 BL19
AU23 VSS_89 VSS_188 BL22
AU29 BL37 CRESTLINE_1p0
VSS_90 VSS_189
AU3 VSS_91 VSS_190 BL47
AU36 VSS_92 VSS_191 C12
AU49 VSS_93 VSS_192 C16
AU51 VSS_94 VSS_193 C19
AV39 VSS_95 VSS_194 C28
AV48 VSS_96 VSS_195 C29
A AW1 VSS_97 VSS_196 C33 A
AW12 VSS_98 VSS_197 C36
AW16 VSS_99 VSS_198 C41

CRESTLINE_1p0

Quanta Computer Inc.


PROJECT : PB2
Size Document Number Rev
A
NB
Date: Friday, March 23, 2007 Sheet 10 of 46
5 4 3 2 1
5 4 3 2 1

Strap table
All strap are sampled with respect to the leading edge of the GMCH Power OK(PWROK) Signal
CFG[17:3] Have internal Pull-up
CFG[18:19] Have internal Pull-down
11
Any CFG signal strapping option not list below should be left NC Pin

Pin Name Strap description Configuration

CFG[2:0] FSB Frequency Select 010 = FSB 800MHz


D 011 = FSB 667MHz D

CFG[4:3] Reserved

CFG5 DMI X2 Select 0 = DMI X2


1 = DMI X4(Default)

CFG6 Reserved

CFG7 CPU Strap 0 = Reserved


1 = Mobile CPU(Default)

CFG8 Low power PCI Express 0 = Normal mode


1 = Low Power mode

CFG9 PCI Express Graphics Lane Reversal 0 = Reverse Lanes


1 = Normal operation(Default)

CFG[11:10] Reserved
C C
CFG[13:12] XOR/ALLZ 00 = Reserved
01 = XOR Mode Enable
10 = All-Z Mode Enabled
11 = Normal operation(Default)

CFG[15:14] Reserved

CFG16 FSB Dynamic ODT 0 = Dynamic ODT disable


1 = Dynamic ODT Enable(Default)

CFG[18:17] Reserved

SDVO_CTRLDATA SDVO Present 0 = No SDVO Card present(Default)


1 = SDVO Card Present

CFG19 DMI Lane Reversal 0 = Normal operation(Default)


1 = Reverse Lanes

CFG20 SDVO/PCIe concurrent 0 = Only SDVO or PCIE x1 is operation(Default)


1 = SDVO and PCIE x1 are operating simultaneously via the PEG port
B B

DMI X2 Select DMI Lane Reversal XOR /ALLz /Clock Un-gating PCI Express Graphics SDVO Present

MCH_CFG_5 Low = DMIX2 MCH_CFG_19 Low = Normal operation(Default) MCH_CFG_12MCH_CFG_13 Configuration MCH_CFG_9 Low = Reverse Lane Strap define at External
High = IDMIX4(Default) High = Reverse Lane High = Normal operation(Default)
DVI control page
0 0 Clock gating disable

VCC3
(6) MCH_CFG_5 (6) MCH_CFG_9
0 1 XOR Mode Enable

1 0 ALL-z Mode Enable


R156 R160
R129
*4.02K/F 1 1 Normal operation(Default) *4.02K/F
*4.02K/F

(6) MCH_CFG_19
FSB Dynamic ODT SDVO/PCIE Concurrent operation
Low = Only SDVO or PCIE X1 is
MCH_CFG_16 Low = ODT Disable MCH_CFG_20 operational(Default)
(6) MCH_CFG_12
High = ODT Enable(Default) High = SDVO andPCIE X1 are operating (6) MCH_CFG_13
simultaneously via the PEG port

A A
(6) MCH_CFG_16 VCC3 R155 R157

*4.02K/F *4.02K/F

R161

*4.02K/F R127

*4.02K/F
Quanta Computer Inc.
PROJECT : PB2
Size Document Number Rev
A
(6) MCH_CFG_20 NB
Date: Friday, March 23, 2007 Sheet 11 of 46
5 4 3 2 1
1 2 3 4 5 6 7 8

DDRII DUAL CHANNEL A,B. 12


M_B_A[13..0]
A M_B_A[13..0] (7,13) A
1.8VSUS
1.8VSUS (6,8,9,13,41,42)
VCC3
DDRII A CHANNEL VCC3 (2,3,6,8,9,11,13,14,15,16,19,20,21,22,23,24,25,26,28,30,31,33,38,40,41)

M_A_A[13..0]
SMDDR_VTERM
M_A_A[13..0] (7,13)
SMDDR_VTERM (42) DDRII B CHANNEL
SMDDR_VTERM
SMDDR_VTERM

SMDDR_VTERM

C397 C379 C380 C341 C382 C394 C348 C357 C360 C404 C349 C403 C407
C347 C408 C367 C337 C365 C353 C359 C338 C396 C335 C395 C366 C381 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U

Layout note: Place one cap close to every 2 pullup resistors terminated to SMDDR_VTERM

B B

RP23 1 2 56X2
(7,13) M_B_BS#1
(6,13) M_A_ODT0 M_A_ODT0 RP32 1 2 56X2 M_B_A0 3 4
M_A_A13 3 4 M_B_A3 RP21 1 2 56X2
M_A_A8 RP17 1 2 56X2 M_B_A1 3 4
M_A_A5 3 4 M_B_A8 RP16 1 2 56X2
M_A_A3 RP22 1 2 56X2 M_B_A5 3 4 SMDDR_VTERM
M_A_A1 3 4 SMDDR_VTERM
M_B_A4 RP19 1 2 56X2
M_A_CKE1 RP13 3 4 56X2 M_B_A2 3 4
(6,13) M_A_CKE1
M_A_A11 1 2 M_B_A12 RP12 1 2 56X2
M_A_A10 RP30 3 4 56X2 M_B_A9 3 4
1 2 M_B_A7 RP15 1 2 56X2
(7,13) M_A_CAS#
M_A_A7 RP18 3 4 56X2 M_B_A6 3 4
M_A_A6 1 2 (7,13) M_B_BS#2 RP9 1 2 56X2
M_A_A2 RP20 1 2 56X2 3 4 SMDDR_VTERM
(6,13) M_B_CKE0
M_A_A4 3 4 SMDDR_VTERM
(7,13) M_B_RAS# RP27 3 4 56X2
(7,13) M_A_RAS# RP28 3 4 56X2 1 2
(6,13) M_B_CS#0
M_A_BS#1 1 2 RP25 1 2 56X2
(7,13) M_A_BS#1 (7,13) M_B_BS#0
M_A_A9 RP14 3 4 56X2 (7,13) M_B_WE# 3 4
M_A_A12 1 2 M_B_A10 RP29 3 4 56X2
RP26 1 2 56X2 (7,13) M_B_CAS# 1 2 SMDDR_VTERM
(7,13) M_A_WE#
C M_A_BS#0 3 4 SMDDR_VTERM C
(7,13) M_A_BS#0

(6,13) SB_MA14 R165 1 2 56 SMDDR_VTERM RP24 1 2 56X2


(6,13) M_A_CS#0
M_A_A0 3 4
(6,13) SA_MA14 R166 1 2 56 M_B_A13 RP31 3 4 56X2
(6,13) M_B_ODT0 1 2
(6,13) M_B_ODT1 M_ODT3 RP33 1 2 56X2
(6,13) M_B_CS#1 3 4
RP34 1 2 56X2
(6,13) M_A_CS#1
M_ODT1 3 4
(6,13) M_A_ODT1
RP11 3 4 56X2
(6,13) M_B_CKE1
M_B_A11 1 2
RP10 1 2 56X2
(6,13) M_A_CKE0
3 4 SMDDR_VTERM
(7,13) M_A_BS#2

D D

Quanta Computer Inc.


PROJECT : PB2
Size Document Number Rev
A
DDR2
Date: Friday, March 23, 2007 Sheet 12 of 46
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

CGCLK_SMB VCC3

13
CGCLK_SMB (2) VCC3 (2,3,6,8,9,11,14,15,16,19,20,21,22,23,24,25,26,28,30,31,33,38,40,41)
CGDAT_SMB 1.8VSUS
CGDAT_SMB (2) 1.8VSUS (6,8,9,41,42)
M_A_CKE[0..1] M_A_CLK0 M_B_CKE[0..1] M_B_CLK0
M_A_CS#[0..1] M_A_CKE[0..1] (6,12) M_A_CLK0 (6) M_A_DQM[0..7] M_B_CS#[0..1] M_B_CKE[0..1] (6,12) M_B_CLK0 (6)
M_A_CLK0# M_B_CLK0#
M_A_CS#[0..1] (6,12) M_A_CLK0# (6) M_A_DQ[0..63] M_A_DQM[0..7] (7) M_B_CS#[0..1] (6,12) M_B_CLK0# (6) M_B_DQM[0..7]
M_A_CLK1 M_B_CLK1
M_A_CLK1 (6) M_A_DQS[0..7] M_A_DQ[0..63] (7) M_B_CLK1 (6) M_B_DQ[0..63] M_B_DQM[0..7] (7)
M_A_RAS# M_A_CLK1# M_B_RAS# M_B_CLK1#
M_A_RAS# (7,12) M_A_BS#[0..2] M_A_CLK1# (6) M_A_DQS#[0..7] M_A_DQS[0..7] (7) M_B_RAS# (7,12) M_B_BS#[0..2] M_B_CLK1# (6) M_B_DQS[0..7] M_B_DQ[0..63] (7)
M_A_CAS# M_B_CAS#
M_A_CAS# (7,12) M_A_ODT[0..1] M_A_BS#[0..2] (7,12) M_A_A[13..0] M_A_DQS#[0..7] (7) M_B_CAS# (7,12) M_B_ODT[0..1] M_B_BS#[0..2] (7,12) M_B_DQS#[0..7] M_B_DQS[0..7] (7)
M_A_WE# M_B_WE#
M_A_WE# (7,12) M_A_ODT[0..1] (6,12) M_A_A[13..0] (7,12) M_B_WE# (7,12) M_B_ODT[0..1] (6,12) M_B_A[13..0] M_B_DQS#[0..7] (7)
M_B_A[13..0] (7,12)

A A
M_B_DQ4 5 123 M_B_DQ36 M_A_DQ5 5 123 M_A_DQ32 1 2 1 2
DQ0 DQ32 DQ0 DQ32 SMDDR_VREF_DIMM VREF VSS_1 SMDDR_VREF_DIMM VREF VSS_1
M_B_DQ5 7 125 M_B_DQ38 M_A_DQ1 7 125 M_A_DQ35 3 3
M_B_DQ2 DQ1 DQ33 M_B_DQ35 M_A_DQ3 DQ1 DQ33 M_A_DQ37 VSS_2 VSS_2
17 DQ2 DQ34 135 17 DQ2 DQ34 135 VSS_3 8 VSS_3 8
M_B_DQ3 19 137 M_B_DQ39 M_A_DQ2 19 137 M_A_DQ38 1.8VSUS 81 9 1.8VSUS 81 9
M_B_DQ1 DQ3 DQ35 M_B_DQ37 M_A_DQ4 DQ3 DQ35 M_A_DQ33 1.8VSUS VDD_1 VSS_4 1.8VSUS VDD_1 VSS_4
4 DQ4 DQ36 124 4 DQ4 DQ36 124 82 VDD_2 VSS_5 12 82 VDD_2 VSS_5 12
M_B_DQ0 6 126 M_B_DQ32 M_A_DQ0 6 126 M_A_DQ36 1.8VSUS 87 15 1.8VSUS 87 15
M_B_DQ7 DQ5 DQ37 M_B_DQ34 M_A_DQ7 DQ5 DQ37 M_A_DQ39 1.8VSUS VDD_3 VSS_6 1.8VSUS VDD_3 VSS_6
14 DQ6 DQ38 134 14 DQ6 DQ38 134 88 VDD_4 VSS_7 18 88 VDD_4 VSS_7 18
M_B_DQ6 16 136 M_B_DQ33 M_A_DQ6 16 136 M_A_DQ34 1.8VSUS 95 21 1.8VSUS 95 21
M_B_DQ13 DQ7 DQ39 M_B_DQ40 M_A_DQ13 DQ7 DQ39 M_A_DQ40 1.8VSUS VDD_5 VSS_8 1.8VSUS VDD_5 VSS_8
23 DQ8 DQ40 141 23 DQ8 DQ40 141 96 VDD_6 VSS_9 24 96 VDD_6 VSS_9 24
M_B_DQ12 25 143 M_B_DQ41 M_A_DQ8 25 143 M_A_DQ41 1.8VSUS 103 27 1.8VSUS 103 27
M_B_DQ11 DQ9 DQ41 M_B_DQ46 M_A_DQ15 DQ9 DQ41 M_A_DQ46 1.8VSUS VDD_7 VSS_10 1.8VSUS VDD_7 VSS_10
35 DQ10 DQ42 151 35 DQ10 DQ42 151 104 VDD_8 VSS_11 28 104 VDD_8 VSS_11 28
M_B_DQ10 37 153 M_B_DQ43 M_A_DQ10 37 153 M_A_DQ42 1.8VSUS 111 33 1.8VSUS 111 33
M_B_DQ8 DQ11 DQ43 M_B_DQ45 M_A_DQ9 DQ11 DQ43 M_A_DQ45 1.8VSUS VDD_9 VSS_12 1.8VSUS VDD_9 VSS_12
20 DQ12 DQ44 140 20 DQ12 DQ44 140 112 VDD_10 VSS_13 34 112 VDD_10 VSS_13 34
M_B_DQ9 22 142 M_B_DQ44 M_A_DQ12 22 142 M_A_DQ44 1.8VSUS 117 39 1.8VSUS 117 39
M_B_DQ14 DQ13 DQ45 M_B_DQ47 M_A_DQ14 DQ13 DQ45 M_A_DQ43 1.8VSUS VDD_11 VSS_14 1.8VSUS VDD_11 VSS_14
36 DQ14 DQ46 152 36 DQ14 DQ46 152 118 VDD_12 VSS_15 40 118 VDD_12 VSS_15 40
M_B_DQ15 38 154 M_B_DQ42 M_A_DQ11 38 154 M_A_DQ47 41 41
DQ15 DQ47 DQ15 DQ47 VSS_16 VSS_16

PC2100 DDR2 SDRAM

PC2100 DDR2 SDRAM


M_B_DQ20 43 157 M_B_DQ55 M_A_DQ16 43 157 M_A_DQ52 42 42
M_B_DQ17 DQ16 DQ48 M_B_DQ49 M_A_DQ21 DQ16 DQ48 M_A_DQ48 M_B_ODT0 VSS_17 M_A_ODT0 VSS_17
45 DQ17 DQ49 159 45 DQ17 DQ49 159 114 ODT0 VSS_18 47 114 ODT0 VSS_18 47
M_B_DQ19 55 173 M_B_DQ51 M_A_DQ23 55 173 M_A_DQ55 M_B_ODT1 119 48 M_A_ODT1 119 48
M_B_DQ23 DQ18 DQ50 M_B_DQ53 M_A_DQ19 DQ18 DQ50 M_A_DQ54 ODT1 VSS_19 ODT1 VSS_19
57 DQ19 DQ51 175 57 DQ19 DQ51 175 VSS_20 53 VSS_20 53

SO-DIMM (200P)

SO-DIMM (200P)
M_B_DQ21 44 158 M_B_DQ48 M_A_DQ20 44 158 M_A_DQ53 54 54
M_B_DQ16 DQ20 DQ52 M_B_DQ52 M_A_DQ17 DQ20 DQ52 M_A_DQ49 VSS_21 VSS_21
46 DQ21 DQ53 160 46 DQ21 DQ53 160 (6) PM_EXTTS#1 50 NC_1 VSS_22 59 (6) PM_EXTTS#0 50 NC_1 VSS_22 59
PC2100 DDR2 SDRAM SO-DIMM

PC2100 DDR2 SDRAM SO-DIMM


M_B_DQ18 56 174 M_B_DQ50 M_A_DQ18 56 174 M_A_DQ50 69 60 69 60
M_B_DQ22 DQ22 DQ54 M_B_DQ54 M_A_DQ22 DQ22 DQ54 M_A_DQ51 NC_2 VSS_23 NC_2 VSS_23
58 DQ23 DQ55 176 58 DQ23 DQ55 176 83 NC_3 VSS_24 65 83 NC_3 VSS_24 65
M_B_DQ28 61 179 M_B_DQ61 M_A_DQ24 61 179 M_A_DQ60 84 66 84 66
M_B_DQ29 DQ24 DQ56 M_B_DQ60 M_A_DQ28 DQ24 DQ56 M_A_DQ56 (6,12) SB_MA14 NC_4/A15 VSS_25 NC_4/A15 VSS_25
63 DQ25 DQ57 181 63 DQ25 DQ57 181 86 NC_5/A14 VSS_26 71 (6,12) SA_MA14 86 NC_5/A14 VSS_26 71
M_B_DQ27 73 189 M_B_DQ59 M_A_DQ31 73 189 M_A_DQ62 M_B_A13 116 72 M_A_A13 116 72
M_B_DQ26 DQ26 DQ58 M_B_DQ63 M_A_DQ30 DQ26 DQ58 M_A_DQ58 NC_6/A13 VSS_27 NC_6/A13 VSS_27
75 DQ27 DQ59 191 75 DQ27 DQ59 191 120 NC_7 VSS_28 77 120 NC_7 VSS_28 77
M_B_DQ24 62 180 M_B_DQ56 M_A_DQ25 62 180 M_A_DQ57 163 78 163 78
M_B_DQ25 DQ28 DQ60 M_B_DQ57 M_A_DQ29 DQ28 DQ60 M_A_DQ61 NC_8 VSS_29 NC_8 VSS_29
64 DQ29 DQ61 182 64 DQ29 DQ61 182 VSS_30 121 VSS_30 121
M_B_DQ31 74 192 M_B_DQ58 M_A_DQ27 74 192 M_A_DQ59 122 122
M_B_DQ30 DQ30 DQ62 M_B_DQ62 M_A_DQ26 DQ30 DQ62 M_A_DQ63 VSS_31 VSS_31
76 DQ31 DQ63 194 76 DQ31 DQ63 194 162 VSS_45 VSS_32 127 162 VSS_45 VSS_32 127
165 VSS_46 VSS_33 128 165 VSS_46 VSS_33 128
B M_B_A0 M_B_DQM0 M_A_A0 M_A_DQM0 B
102 A0 DM0 10 102 A0 DM0 10 168 VSS_47 VSS_34 132 168 VSS_47 VSS_34 132
M_B_A1 101 26 M_B_DQM1 M_A_A1 101 26 M_A_DQM1 171 133 171 133
M_B_A2 A1 DM1 M_B_DQM2 M_A_A2 A1 DM1 M_A_DQM2 VSS_48 VSS_35 VSS_48 VSS_35
100 A2 DM2 52 100 A2 DM2 52 172 VSS_49 VSS_36 138 172 VSS_49 VSS_36 138
M_B_A3 99 67 M_B_DQM3 M_A_A3 99 67 M_A_DQM3 177 139 177 139
M_B_A4 A3 DM3 M_B_DQM4 M_A_A4 A3 DM3 M_A_DQM4 VSS_50 VSS_37 VSS_50 VSS_37
98 A4 DM4 130 98 A4 DM4 130 178 VSS_51 VSS_38 144 178 VSS_51 VSS_38 144
M_B_A5 97 147 M_B_DQM5 M_A_A5 97 147 M_A_DQM5 183 145 183 145
M_B_A6 A5 DM5 M_B_DQM6 M_A_A6 A5 DM5 M_A_DQM6 VSS_52 VSS_39 VSS_52 VSS_39
94 A6 DM6 170 94 A6 DM6 170 184 VSS_53 VSS_40 149 184 VSS_53 VSS_40 149
M_B_A7 M_B_DQM7 M_A_A7 M_A_DQM7
(200P)

M_B_A8
92
93
A7
A8
DM7
DQS0
185
13 M_B_DQS0 M_A_A8
92
93
A7
A8
(200P) DM7
DQS0
185
13 M_A_DQS0
187
190
VSS_54
VSS_55
VSS_41
VSS_42
150
155
187
190
VSS_54
VSS_55
VSS_41
VSS_42
150
155
M_B_A9 91 11 M_B_DQS#0 M_A_A9 91 11 M_A_DQS#0 193 156 193 156
M_B_A10 A9 DQS0 M_B_DQS1 M_A_A10 A9 DQS0 M_A_DQS1 VSS_56 VSS_43 VSS_56 VSS_43
105 A10/AP DQS1 31 105 A10/AP DQS1 31 196 VSS_57 VSS_44 161 196 VSS_57 VSS_44 161
M_B_A11 90 29 M_B_DQS#1 M_A_A11 90 29 M_A_DQS#1 201 202 201 202
M_B_A12 A11 DQS1 M_B_DQS2 M_A_A12 A11 DQS1 M_A_DQS2 VSS_58 VSS_59 VSS_58 VSS_59
89 A12 DQS2 51 89 A12 DQS2 51
49 M_B_DQS#2 49 M_A_DQS#2
M_B_BS#0 DQS2 M_B_DQS3 M_A_BS#0 DQS2 M_A_DQS3
107 BA0 DQS3 70 107 BA0 DQS3 70
M_B_BS#1 106 68 M_B_DQS#3 M_A_BS#1 106 68 M_A_DQS#3 DDR2-H=9.2 DDR2-H=5.2
M_B_BS#2 BA1 DQS3 M_B_DQS4 M_A_BS#2 BA1 DQS3 M_A_DQS4 CN10B CN9B
85 NC/BA2 DQS4 131 85 NC/BA2 DQS4 131
129 M_B_DQS#4 129 M_A_DQS#4
M_B_CLK0 DQS4 M_B_DQS5 M_A_CLK0 DQS4 M_A_DQS5
30 CLK0 DQS5 148 30 CLK0 DQS5 148 FOX P/N:DGMK00000C0
M_B_CLK0# 32 146 M_B_DQS#5 M_A_CLK0# 32 146 M_A_DQS#5 FOX P/N:DGMK0002610
CLK0 DQS5 M_B_DQS6 CLK0 DQS5 M_A_DQS6
DQS6 169 DQS6 169 TYCO P/N:DGMK0000498
M_B_CLK1 164 167 M_B_DQS#6 M_A_CLK1 164 167 M_A_DQS#6 TYCO P/N:DGMK0004205
M_B_CLK1# CLK1 DQS6 M_B_DQS7 M_A_CLK1# CLK1 DQS6 M_A_DQS7
166 CKL1 DQS7 188 166 CKL1 DQS7 188
186 M_B_DQS#7 186 M_A_DQS#7
CGCLK_SMB DQS7 CGCLK_SMB DQS7
197 SCL 197 SCL
CGDAT_SMB 195 110 M_B_CS#0 CGDAT_SMB 195 110 M_A_CS#0
DIM2_SA0 SDA CS0 M_B_CS#1 DIM1_SA0 SDA CS0 M_A_CS#1
198 SA0 CS1 115 198 SA0 CS1 115
DIM2_SA1 200 108 M_B_RAS# DIM1_SA1 200 108 M_A_RAS#
SA1 RAS M_B_CAS# SA1 RAS M_A_CAS#
CAS 113 CAS 113
VCC3 199 109 M_B_WE# VCC3 199 109 M_A_WE#
VDDSPD WE M_B_CKE0 VDDSPD WE M_A_CKE0 C713 470P/50V
CKE0 79 CKE0 79
80 M_B_CKE1 80 M_A_CKE1 1 2 SMDDR_VREF_DIMM R97 0
CKE1 CKE1 SMDDR_VREF (6,42)
C C
CKEA 0,1 CKEB 0,1 R99 1.8VSUS
DDR2-H=9.2 H 9.2 DDR2-H=5.2 H 5.2
CN10A CN9A R477 *10K/F *10K/F

DIM2_SA0 R202 10K R201 10K DIM1_SA0


DIM2_SA1 R200 10K R199 10K DIM1_SA1
VCC3

SMbus address A4 SMbus address A0

1.8VSUS 1.8VSUS
Place these Caps near So-Dimm1. Place these Caps near So-Dimm2.

C738 C755 C735 C745 C741 C355 C754 C356 C364 C401 C393 C744 C739 C743 C752 C734 C400 C753 C383 C369 C345 C346
2.2U/6.3V 2.2U/6.3V 2.2U/6.3V2.2U/6.3V 2.2U/6.3V.1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V 2.2U/6.3V2.2U/6.3V2.2U/6.3V2.2U/6.3V2.2U/6.3V.1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V

VCC3
SMDDR_VREF_DIMM SMDDR_VREF_DIMM VCC3

C436 C439
C714 C718 2.2U/6.3V .1U/10V C255 C247 C437 C440
.1U/10V 2.2U/6.3V .1U/10V 2.2U/6.3V 2.2U/6.3V .1U/10V
D D

SO-DIMM BYPASS PLACEMENT : SO-DIMM BYPASS PLACEMENT :


Place these Caps near So-Dimm1. Place these Caps near So-Dimm2
No Vias Between the Trace of PIN to CAP. No Vias Between the Trace of PIN to CAP.
Quanta Computer Inc.
PROJECT : PB2
Size Document Number Rev
A
DDR2
Date: Friday, March 23, 2007 Sheet 13 of 46
1 2 3 4 5 6 7 8
5 4 3 2 1

14
YELLOW BLOCK is
R40 0 OPTION SIGNAL FROM NB FOR UMA VGA
VCC1.8 for G8X chip
only
TXLCLKOUT+ RP8 3 4 *4P2R-S-0 LA_CLK LA_CLK (6)
80mA R68 *0 15mil TXLCLKOUT- 1 2 LA_CLK# LA_CLK# (6)
VCC2.5
U31D
C124 470P/50V IFPAB_PLLVDD AC9 AJ9 C_TXLCLKOUT- TXLOUT0+ RP5 1 2 *4P2R-S-0 LA_DATAP0 LA_DATAP0 (6)
C125 4700P/25V IFPAB_PLLVDD IFPA_TXC# C_TXLCLKOUT+ TXLOUT0- LA_DATAN0
IFPA_TXC AK9 3 4 LA_DATAN0 (6)
C129 10U/6.3V AJ6 C_TXLOUT0- TXLOUT1+ RP6 3 4 *4P2R-S-0 LA_DATAP1 LA_DATAP1 (6)
IFPA_TXD0# C_TXLOUT0+ TXLOUT1- LA_DATAN1
IFPA_TXD0 AH6 1 2 LA_DATAN1 (6)
AD9 AH7 C_TXLOUT1-
IFPAB_PLLGND IFPA_TXD1# C_TXLOUT1+ TXLOUT2+ RP7 LA_DATAP2
IFPA_TXD1 AH8 1 2 *4P2R-S-0 LA_DATAP2 (6)
AK8 C_TXLOUT2- TXLOUT2- 3 4 LA_DATAN2 LA_DATAN2 (6)
D
C154 470P/50V IFPA_IOVDD AF9 IFPA_TXD2# C_TXLOUT2+ D
IFPA_IOVDD IFPA_TXD2 AJ8
45mA C148 4700P/25V AF8 AH5
C158 10U/6.3V IFPB_IOVDD IFPA_TXD3#
LVDS IFPA_TXD3 AJ5
R70 0 15mil AL4
VCC1.8 IFPB_TXC#
IFPB_TXC AK4
IFPABVPROBE AM4 AM5
T178 IFPAB_VPROBE IFPB_TXD4#
IFPABRSET AL5 AM6 OPTION SIGNAL FROM Nvidia to VGA
T176 IFPAB_RSET IFPB_TXD4
IFPB_TXD5# AL7
AM7 C_TXLCLKOUT+
RP4 3 4 4P2R-S-0
IFPB_TXD5 TXLCLKOUT+ (25)
15mil AK5 C_TXLCLKOUT- 1 2
IFPB_TXD6# TXLCLKOUT- (25)
AK6 C_TXLOUT0- RP1 3 4 4P2R-S-0
IFPB_TXD6 TXLOUT0- (25)
AL8 C_TXLOUT0+ 1 2
IFPB_TXD7# TXLOUT0+ (25)
R66 0 DACA_VDD AK7 C_TXLOUT1- RP2 1 2 4P2R-S-0
VCC3 IFPB_TXD7 TXLOUT1- (25)
C_TXLOUT1+ 3 4 TXLOUT1+ (25)
C133 470P/50V AD10 K2 L_DDCCLK R30 0 DVICLK C_TXLOUT2- RP3 3 4 4P2R-S-0
DACA_VDD I2CA_SCL DVICLK (6,24) TXLOUT2- (25)
C137 4700P/25V J3 L_DDCDAT R29 0 DVIDAT C_TXLOUT2+ 1 2
I2CA_SDA DVIDAT (6,24) TXLOUT2+ (25)
C146 10U/6.3V
AF10 CRT_HSYNC R77 0 HSYNC_COM
DACA_HSYNC HSYNC_COM (6,24)
15mil CRTDACA_VSYNC AK10 CRT_VSYNC R78 0 VSYNC_COM
VSYNC_COM (6,24)
C149 .01U/16V
DACA_VREF AH10 AH11 L_CRT_R R82 0 CRT_R
DACA_VREF DACA_RED CRT_R (6,24)
R458 124/F DACA_RSET AH9 AJ12 L_CRT_G R83 0 CRT_G
DACA_RSET DACA_GREEN CRT_G (6,24)
AG9 AH12 L_CRT_B R84 0 CRT_B
DACA_IDUMP DACA_BLUE CRT_B (6,24)
R71 10K V8 DACB_VDD
NB8X:VCC1.8 DACB_RED R6
DACB_GREEN T5
G73:VCC2.5 R5 TV T6 L_CRT_R R79 150/F
DACB_VREF DACB_BLUE L_CRT_G R80 150/F
C
Modify 09/27 R7
V7
DACB_RSET L_CRT_B R81 150/F C
DACB_IDUMP
15mil
IFPCDVPROBEAK3 AM3 TXC_HDMI-
T59 IFPCD_VPROBE IFPC_TXC# TXC_HDMI- (25)
R42 0 IFPCDRSET AH3 AM2 TXC_HDMI+
VCC1.8 T58 IFPCD_RSET IFPC_TXC TXC_HDMI+ (25)
AE1 TX0_HDMI- HDMI_SCL R415 2K
IFPC_TXD0# TX0_HDMI- (25) VCC5
R56 *0 AE2 TX0_HDMI+ HDMI_SDA R28 2K
VCC2.5 IFPC_TXD0 TX0_HDMI+ (25)
C111 470P/50V AF2 TX1_HDMI-
IFPC_TXD1# TX1_HDMI- (25)
40mA C112 4700P/25V 15mil IFPCD_PLLVDD AA10 AF1 TX1_HDMI+
IFPCD_PLLVDD IFPC_TXD1 TX1_HDMI+ (25)
C106 10U/6.3V AH1 TX2_HDMI-
IFPC_TXD2# TX2_HDMI- (25)
AB10 AG1 TX2_HDMI+
IFPCD_PLLGND IFPC_TXD2 TX2_HDMI+ (25)
TMDS IFPD_TXC# AH2 DVI_CLK- (24)
300mA IFPC_DVI_3V R14 0 AG3
IFPD_TXC DVI_CLK+ (24)
15mil C126 470P/50V IFPC_IOVDD AD6 AJ1
IFPC_IOVDD IFPD_TXD4# DVI_TX0- (24)
C127 4700P/25V AK1
IFPD_TXD4 DVI_TX0+ (24)
C679 10U/6.3V AL1
IFPD_TXD5# DVI_TX1- (24)
IFPC_DVI_3V R69 0 IFPD_IOVDD AE7 AL2
IFPD_IOVDD IFPD_TXD5 DVI_TX1+ (24)
15mil C159 10U/6.3V 15mil AJ3
IFPD_TXD6# DVI_TX2- (24)
C147 470P/50V AJ2
IFPD_TXD6 DVI_TX2+ (24)
need add to 3v C139 4700P/25V
120mA R67 10K DACC_VD AD7 H4 HDMI_SCL HDMI_SCL (25)
DACC_VDD I2CB_SCL HDMI_SDA
I2CB_SDA J4 HDMI_SDA (25)
YELLOW BLOCK is
VGA1.2V AG7 DAC_HSYNC
for G8X chip DACC_HSYNC T52
DACDACC_VSYNC AG5 DAC_VSYNC
T57
only AH4 AF6 DAC_RED
DACC_VREF DACC_RED T49
R49 0 AF5 AG6 DAC_GRN
DACC_RSET DACC_GREEN T55
AG4 AE5 DAC_BLU
DACC_IDUMP DACC_BLUE T54
VCC2.5 R53 *0
40mA C90 .1U/10V NV_PLLVDD T9 T2 R432 10K
C91 4700P/25V PLLVDD XTALOUTBUFF VGA_27M_SSIN_R R434 0 VGA_27M_SSIN
B XTALSSIN T1 VGA_27M_SSIN (2) B
40mA C92 10U/6.3V
R45 *0 T10 U1 VGA_27M_IN_R R437 0 VGA_27M_IN
VCC2.5 VID_PLLVDD XTALIN VGA_27M_IN (2)
C88 .1U/10V DISP_PLLVDD XTAL
C93 4700P/25V
VGA1.2V R48 0 C78 10U/6.3V R435
R440 10K
15mil
U10 PLLGND XTALOUT U2 *301/F G73 use 150/301 ohm
U_GPU_G3
NB8X use 0 ohm
NB8X:VGA1.2
G73:VCC2.5

R372 0
NB8P-SE P/N:AJB8PSE0T02 Q2
VCC3
AO3409 3
NB8M-SE P/N:AJB8MSE0T02 VGA_GD# 2
C10
.1U/10V
VCC3
R373
*0
15mil
1

R11
10K R13 10K IFPC_DVI_3V
3
IPFC_C

A A
2
2N7002E-T1-E3
Q1
1

FOR IFPC VDD LEAKAGE CIRCIUT


Quanta Computer Inc.
PROJECT : PB2
Size Document Number Rev
A
VGA
Date: Friday, March 23, 2007 Sheet 14 of 46
5 4 3 2 1
5 4 3 2 1

NB8M-SE:"0x0428" Please set to "1000"

15
15mil
U31E NB8P-SE DevID "0x0425",
VCC3 M7 P2 MIOAD0 VCC3
MIOA_VDDQ_0 MIOAD0 MIOAD1 VCC3
M8 MIOA_VDDQ_1 MIOAD1 N2 Set to "0101",R57 no stuff ,R445 and R446 stuff 2kohm
C67 0.1U R8 N1 MIOAD2 P/N:AR0AT7RB013
MIOA_VDDQ_2 MIOAD2 T161 VCC3
T8 N3 MIOAD3
MIOA_VDDQ_3 MIOAD3 T23
U9 M1 MIOAD4 R371
MIOA_VDDQ_4 MIOAD4 T159
M3 MIOAD5 10K U21
MIOAD5 T11
MIOACAL_PU L3 P5 MIOAD6 HDCP_SDA 5 8 R62 10K MIOBD0 R61 *10K
T17
MIOACAL_PD L1 MIOACAL_PU_GND MIOAD6 MIOAD7 SDA VCC RAM_CFG0
T158 MIOACAL_PD_VDDQ MIOAD7 N6 T27 3 SDA VCC 7
MIOA_VREF L2 N5 MIOAD8 R447 *10K MIOBD1 R448 10K RAM_CFG1
T157 MIOA_VREF MIOAD8
M4 MIOAD9 C639
MIOAD9 MIOAD10 HDCP_SCL R65 10K MIOBD8 R64 *10K
D MIOAD10 L4 T15 6 SCL RAM_CFG2 D
MIOAD L5 MIOAD11 1 0.1U
MIOAD11 T6 GND
R3 MIOAHSYNC R376 2 4 R60 10K MIOBD9 R59 *10K RAM_CFG3
MIOA_HSYNC T9 NC2 GND
R1 MIOAVSYNC
MIOA_VSYNC T163
P1 MIOADE 10K AT88SC0808C VIPD4 R446 2K PCI_DEVICE0
MIOA_DE T160
P3 MIOACTL3 AR0AT7RB013
MIOA_CTL3 T19
R4 MIOA_CKO PCI_DEVICE[3:0] VIPD5 R444 *2K PCI_DEVICE1
MIOA_CLKOUT T162
P4 MIOA_CKO# for HDMI function Default are
MIOA_CLKOUT# T25
15mil M5 MIOA_CKI "0",can remove VIPD3 R445 2K PCI_DEVICE2
MIOA_CLKIN T21
MIOBD0 pull down VIPD11 R57 *2K
VCC3 AA8 MIOB_VDDQ_0 MIOBD0 AC3 PCI_DEVICE3
AB7 AC1 MIOBD1 PCI_DEVICE[3:0] DESCRIPTION resister from
C116PCI_DEVICE4
.1U/10V AB8 MIOB_VDDQ_1 MIOBD1 MIOBD2 nvidia HANK G73_AD3 R450 *2K
MIOB_VDDQ_2 MIOBD2 AC2 T173 GREEN
AC6 AB2 VIPD3 1000 NB8M-SE G86-700-AX recommend
MIOB_VDDQ_3 MIOBD3
AB1 VIPD4 BLOCK can 0101 NB8P-SE G86-770-AX
MIOBD4 VIPD5 remove if
AC7 MIOB_VDDQ_4 MIOBD5 AA1 0111 NB8M-GS G86-730-AX
MIOBCAL_PD Y1 AB3 MIOBD6 R441 use G8X others Reserved R35 *2K MIOAHSYNC R38 2K SLOT_CLOCK_CFG
T170 MIOBCAL_PD_VDDQ MIOBD6 T172
MIOBCAL_PU Y3 AA3 MIOBD7
T38 MIOBCAL_PU_GND MIOBD7
MIOBVREF Y2 AC5 MIOBD8
T168 MIOB_VREF MIOBD8
AB5 MIOBD9 *10K MIOBD7 pull 12/14 modify R426 2K MIOAD1 SUB_VENDOR
MIOBD9 VIPD10
MIOBD MIOBD10 AB4 T45 down and
AA5 VIPD11 MIOB_DE SHARE M/B SYSTEM BIOS, SUB VENDOR
MIOBD11 T41 VCC3
AE3 ROMTYPE1
MIOB_VSYNC T50 pull up ID NEED PULL DOWN .
AF3 3GIO_PADCFG3 R449
MIOB_HSYNC MIOB_DE from nvidia
MIOB_DE AD1
AD3 G73_AD3
T46
HANK
MIOB_CTL3 G73_AD4 *10K
MIOB_CLKOUT AD4 T44 recommend
AD5 G73_AD5 NB8M VRAM Configuration Table
MIOB_CLKOUT# T48
AE4 G73_AE4
MIOB_CLKIN T53
RAM_CFG[3:0] DESCRIPTION Vendor
C F6 G73_F6 VCC3 C
CLAMP T3
GFX_THMD- J1 G2 EDIDCLK 0000 DDR2 16Mx16x4, 64bit, 128MB Elpida
THERMDN I2CC_SCL EDIDCLK (6,25)
GFX_THMD+ K1 G1 EDIDDATA GFX_VID0 R26 *2K 0001 DDR2 16Mx16x4, 64bit, 128MB Samsung
THERMDP I2CC_SDA EDIDDATA (6,25)
K3 DVI_DET 0010 DDR2 16Mx16x4, 64bit, 128MB Infineon
GPIO0 DVI_DET (24)
H1 HDMI_DET 9/28 modify JTAG_TMS R454 10K 0011 DDR2 16Mx16x4, 64bit, 128MB Hynix
GPIO1 HDMI_DET (25)
GPIO2 K5 T10 0100 Reserved
G5 G72_DISP_ON JTAG_TDI R455 10K 0101 DDR2 32Mx16x4, 64bit, 256MB Samsung
GPIO3 BLON
THERMAL GPIO4 E2 BLON (6,25) 0110 DDR2 32Mx16x4, 64bit, 256MB Infineon
J5 GFX_VID0 JTAG_TCK R456 10K 0111 DDR2 32Mx16x4, 64bit, 256MB Hynix
GPIO GPIO5 GFX_VID1
GPIO6 G6 T2 1000 DDR2 16Mx16x2, 32bit, 64MB Elpida
YELLOW K6 GFX_VID2 GFX_VID0 JTAG_TRST# R457 10K 1001 DDR2 16Mx16x2, 32bit, 64MB Samsung
GPIO7 T13
JTAG_TCK AJ11 E1 VGA_OVT# 1010 DDR2 16Mx16x2, 32bit, 64MB Infineon
BLOCK is T181
JTAG_TMS AK11 JTAG_TCK GPIO8 GPIO9
H : Low Voltage DIGON R399 2K
T183 JTAG_TMS GPIO9 D2 T151 (6,25) DIGON GPIO1 PULL 1011 DDR2 16Mx16x2, 32bit, 64MB Hynix
for G8X JTAG_TDI AK12 H5 GPIO10 L : Normal Voltage DOWN strap others Reserved
T184 JTAG_TDI GPIO10 T8
chip JTAG_TDO AL12 F4 GPIO11 HDMI_DET R418 *2K can be
T179 JTAG_TDO GPIO11 T1
JTAG_TRST# AL13 E3 GFX_GPIO12 VGACORECTL G86
only T182 JTAG_TRST# GPIO12 remove from
DVI_DET R425 *2K
STRAP F1 AE26 MSTRAPSEL0 HI 1.15V nvidia HANK NB8P VRAM Configuration Table
T155 STRAP MEMSTRAPSEL0 T43
AD26 MSTRAPSEL1
T47
BLON R413 2K recommend
MEMSTRAPSEL1 MSTRAPSEL2
MEMSTRAPSEL2 AH31 T174 LO 1.2V RAM_CFG[3:0] DESCRIPTION Vendor
GPIO13 U3 AH32 MSTRAPSEL3
T32 RFU6 MEMSTRAPSEL3 T175
T12 VGA_FU7 V3 0000 DDR2 16Mx16x8, 128bit, 256MB Elpida
VGA_FU8 RFU7 ROM_CS#
T24 U6 RFU8 ROMCS# AA4 T42 0001 DDR2 16Mx16x8, 128bit, 256MB Samsung
T28 DACB_CSYNC U5 W2 ROM_SI 0010 DDR2 16Mx16x8, 128bit, 256MB Infineon
RFU9 ROM_SI T166
GPIO14 U4 AA6 ROM_SO R392 0 0011 DDR2 16Mx16x8, 128bit, 256MB Hynix
T31 RFU10 ROM_SO T35
T16 VGA_FU11 V4 ROM AA7 ROM_CK 0100 Reserved
RFU11 ROM_SCLK T40 3VPCU
VGA_FU12 V6 G3 HDCP_SCL 0101 DDR2 32Mx16x8, 128bit, 512MB Samsung
T29 RFU12 I2CH_SCL
T18 VGA_FU13 W3 H3 HDCP_SDA 0110 DDR2 32Mx16x8, 128bit, 512MB Infineon
VGA_FU14 RFU13 I2CH_SDA U24
T165 V1 RFU14 0111 DDR2 32Mx16x8, 128bit, 512MB Hynix

5
T34 VGA_FU15 Y5 1000 DDR2 16Mx16x4, 64bit, 128MB Elpida
B
VGA_FU16 RFU15 RESET_BUF# GFX_VID0 B
T167 W1 RFU16 BUFRST# F3 T5 2 1001 DDR2 16Mx16x4, 64bit, 128MB Samsung
T39 VGA_FU17 W4 T3 STEREO 4 1010 DDR2 16Mx16x4, 64bit, 128MB Infineon
RFU17 STEREO T30 V_PWRCNTL (44)
GREEN VGA_FU18 W5 M6 SWAPRDY_A ECPWROK 1 1011 DDR2 16Mx16x4, 64bit, 128MB Hynix
T26 RFU18 SWAPRDY_A T20
T33 VGA_FU19 V5 A26 VGA_TEST R412 10K R397 0 1100 Reserved
BLOCK can VGA_FU20 Y6
RFU19 TESTMEMCLK
H2 VGA_TMODE R420 10K *TC7SH08FU 1101 DDR2 32Mx16x4, 64bit, 256MB Samsung
T37

3
remove if RFU20 TESTMODE 3VPCU 1110 DDR2 32Mx16x4, 64bit, 256MB Infineon
use G8X U_GPU_G3 1111 DDR2 32Mx16x4, 64bit, 256MB Hynix
U25

5
VCC3 VCC3
G72_DISP_ON 2
4 DIGON (6,25)
(6,22,38) ECPWROK 1
1

10K *TC7SH08FU

3
R410 VCC3 VCC3
2 Q28
DTA124EU
3

R428 2K MIOAD0 R430 *2K PEX_PLL_EN


3

GFX_GPIO12 R409 R374


MIOAD6 R422 2K 3GIO_PADCFG_LUT_ADR0
2 *2.2K *2.2K
(38,45) ACIN
U27 MIOAD8 R32 *2K 3GIO_PADCFG_LUT_ADR1
R411 EDIDDATA R396 *0 GFX_SDA 7 4 VGA_OVT# R403 0
SDAT OVT -SYS_SHDN-1 (30)
Q20 EDIDCLK R394 *0 GFX_SCL 8 MIOAD9 R34 *2K 3GIO_PADCFG_LUT_ADR2
2N7002E-T1-E3 10K SCLK GPIO9 R391 0
6 THERM_ALERT# (22,30)
1

R402 *200/F MAX6649_V ALERT 3GIO_PADCFG3 R72 *2K


VCC3 1 VCC 3GIO_PADCFG_LUT_ADR3
2 GFX_THMD+
C657 DXP Default are
Boot Status
GND

C658 "0",can remove


A
1/24 modify 5 GND DXN 3 1/5 modify pull down resister
A
ACIN GPIO12 *0.1U *2200P/50V from nvidia HANK
FOR BATTERY MODE FUNCTION recommend
9

H H *G799P8X GFX_THMD-
GFX_GPIO12=H ENABLE *MAX6649
L L GFX_GPIO12=L DISABLE
VGA THERMAIL CIRCUIT Quanta Computer Inc.
PROJECT : PB2
Size Document Number Rev
A
VGA
Date: Friday, March 23, 2007 Sheet 15 of 46
5 4 3 2 1
5 4 3 2 1

16
Channel C is available on G73M only NB8M:
U31B U31C Stuff 5pcs 0.1u caps on FBVTT power rail
VMA_DQ0 N27 A12 VMC_DQ0 B7 AA23
FBAD0 FBVDD_0 VCC1.8 FBCD0 FBVTT_0 VCC1.8
VMA_DQ1 M27 A15 C74 .1U/10V VMC_DQ1 A7 AB23 C57 .1U/10V
VMA_DQ2 FBAD1 FBVDD_1 C59 .1U/10V VMC_DQ2 FBCD1 FBVTT_1 C162 .1U/10V
N28 FBAD2 FBVDD_2 A18 C7 FBCD2 FBVTT_2 H16
VMA_DQ3 L29 A21 C14 .1U/10V VMC_DQ3 A2 H17 C156 .1U/10V
VMA_DQ4 FBAD3 FBVDD_3 C24 .1U/10V VMC_DQ4 FBCD3 FBVTT_3 C35 .1U/10V
K27 FBAD4 FBVDD_4 A24 B2 FBCD4 FBVTT_4 J10
VMA_DQ5 K28 A27 C104 .47U/10V VMC_DQ5 C4 J23 C51 .47U/10V
VMA_DQ6 FBAD5 FBVDD_5 C110 .47U/10V VMC_DQ6 FBCD5 FBVTT_5 C52 .47U/10V
J29 FBAD6 FBVDD_6 A3 A5 FBCD6 FBVTT_6 J24 (17) VMA_DQ[63..0]
VMA_DQ7 J28 A30 C56 10U/4V VMC_DQ7 B5 J9 C54 10U/4V
VMA_DQ8 FBAD7 FBVDD_7 C26 .1U/10V VMC_DQ8 FBCD7 FBVTT_7 C62 .1U/10V
D
P30 FBAD8 FBVDD_8 A6 F9 FBCD8 FBVTT_8 K11 (17) VMA_DM[7..0] D
VMA_DQ9 N31 A9 C23 .1U/10V VMC_DQ9 F10 K12 C21 .1U/10V
VMA_DQ10 FBAD9 FBVDD_9 C77 .1U/10V VMC_DQ10 FBCD9 FBVTT_9 C30 .1U/10V
N30 FBAD10 FBVDD_10 AA32 D12 FBCD10 FBVTT_10 K21 (17) VMA_WDQS[7..0]
VMA_DQ11 N32 AD32 C25 .1U/10V VMC_DQ11 D9 K22 C628 .1U/10V
VMA_DQ12 FBAD11 FBVDD_11 C50 .47U/10V VMC_DQ12 FBCD11 FBVTT_11 C47 .47U/10V
L31 FBAD12 FBVDD_12 AG32 E12 FBCD12 FBVTT_12 K24 (17) VMA_RDQS[7..0]
VMA_DQ13 L30 AK32 C31 .47U/10V VMC_DQ13 D11 K9 C55 .47U/10V
VMA_DQ14 FBAD13 FBVDD_13 C76 10U/4V VMC_DQ14 FBCD13 FBVTT_13 C53 10U/4V
J30 FBAD14 FBVDD_14 C32 E8 FBCD14 FBVTT_14 L23
VMA_DQ15 L32 F32 VMC_DQ15 D8 M23
VMA_DQ16 FBAD15 FBVDD_15 VMC_DQ16 FBCD15 FBVTT_15
H30 FBAD16 FBVDD_16 J32 PLACE NEAR GPU E7 FBCD16 FBVTT_16 T25 PLACE NEAR GPU
VMA_DQ17 K30 M32 VMC_DQ17 F7 U25
VMA_DQ18 FBAD17 FBVDD_17 VMC_DQ18 FBCD17 FBVTT_17
H31 FBAD18 FBVDD_18 R32 D6 FBCD18
VMA_DQ19 F30 V32 VMC_DQ19 D5
FBAD19 FBVDD_19 FBCD19 (18) VMC_DQ[63..0]
VMA_DQ20 H32 VMC_DQ20 D3 C13 VMC_MA3
FBAD20 FBCD20 FBC_CMD0 VMC_MA3 (18)
VMA_DQ21 E31 AA25 VMC_DQ21 E4 A16 VMC_MA0
FBAD21 FBVDDQ_0 VCC1.8 FBCD21 FBC_CMD1 VMC_MA0 (18) (18) VMC_DM[7..0]
VMA_DQ22 D30 AA26 C150 .1U/10V VMC_DQ22 C3 A13 VMC_MA2
FBAD22 FBVDDQ_1 FBCD22 FBC_CMD2 VMC_MA2 (18)
VMA_DQ23 E30 AB25 C38 .1U/10V VMC_DQ23 B4 B17 VMC_MA1
FBAD23 FBVDDQ_2 FBCD23 FBC_CMD3 VMC_MA1 (18) (18) VMC_WDQS[7..0]
VMA_DQ24 H28 AB26 C123 .1U/10V VMC_DQ24 C10 B20 VMC_MA3H
FBAD24 FBVDDQ_3 FBCD24 FBC_CMD4 VMC_MA3H (18)
VMA_DQ25 H29 G11 C155 .1U/10V VMC_DQ25 B10 A19 VMC_MA4H
FBAD25 FBVDDQ_4 FBCD25 FBC_CMD5 VMC_MA4H (18) (18) VMC_RDQS[7..0]
VMA_DQ26 E29 G12 C89 .47U/10V VMC_DQ26 C8 B19 VMC_MA5H
FBAD26 FBVDDQ_5 FBCD26 FBC_CMD6 VMC_MA5H (18)
VMA_DQ27 J27 G15 C109 .47U/10V VMC_DQ27 A10 B14 VMC_BA2
FBAD27 FBVDDQ_6 FBCD27 FBC_CMD7 T4
VMA_DQ28 F27 G18 C94 10U/4V VMC_DQ28 C11 E16 VMC_CS0#
FBAD28 FBVDDQ_7 FBCD28 FBC_CMD8 VMC_CS0# (18)
VMA_DQ29 E27 G21 C113 .1U/10V VMC_DQ29 C12 A14 VMC_WE#
FBAD29 FBVDDQ_8 FBCD29 FBC_CMD9 VMC_WE# (18)
VMA_DQ30 E28 G22 C71 .1U/10V VMC_DQ30 A11 C15 VMC_BA0
FBAD30 FBVDDQ_9 FBCD30 FBC_CMD10 VMC_BA0 (18)
VMA_DQ31 F28 H11 C79 .1U/10V VMC_DQ31 B11 B16 VMC_CKE VMA_ODT_R R438 0 VMA_ODT
FBAD31 FBVDDQ_10 FBCD31 FBC_CMD11 VMC_CKE (18) VMA_ODT (17)
VMA_DQ32 AD29 H12 C37 .1U/10V VMC_DQ32 B28 F17 VMC_ODT_R
VMA_DQ33 FBAD32 FBVDDQ_11 C49 .47U/10V VMC_DQ33 FBCD32 FBC_CMD12 VMC_MA2H
AE29 FBAD33 FBVDDQ_12 H15 C27 FBCD33 FBC_CMD13 C19 VMC_MA2H (18)
VMA_DQ34 AD28 H18 C80 .47U/10V VMC_DQ34 C26 D15 VMC_MA12 VMA_DEBUG R436 *0 NB8M: use R438
FBAD34 FBVDDQ_13 FBCD34 FBC_CMD14 VMC_MA12 (18)
VMA_DQ35 AC28 H21 C20 10U/4V VMC_DQ35 B26 C17 VMC_RAS#
FBAD35 FBVDDQ_14 FBCD35 FBC_CMD15 VMC_RAS# (18)
VMA_DQ36 AB29 H22 VMC_DQ36 C30 A17 VMC_MA11 R442 NB8P: A02 use R438
FBAD36 FBVDDQ_15 FBCD36 FBC_CMD16 VMC_MA11 (18)
VMA_DQ37 AA30 L25 PLACE NEAR GPU VMC_DQ37 B31 C16 VMC_MA10
FBAD37 FBVDDQ_16 FBCD37 FBC_CMD17 VMC_MA10 (18)
C VMA_DQ38 Y28 L26 VMC_DQ38 C29 D14 VMC_BA1 10K C
FBAD38 FBVDDQ_17 FBCD38 FBC_CMD18 VMC_BA1 (18)
VMA_DQ39 AB30 M25 VMC_DQ39 A31 F16 VMC_MA8
FBAD39 FBVDDQ_18 C686 FBCD39 FBC_CMD19 VMC_MA8 (18)
VMA_DQ40 AM30 M26 VMC_DQ40 D28 C14 VMC_MA9
FBAD40 FBVDDQ_19 FBCD40 FBC_CMD20 VMC_MA9 (18)
VMA_DQ41 VMC_DQ41 VMC_MA6
+
AF30 FBAD41 FBVDDQ_20 R25 D27 FBCD41 FBC_CMD21 C18 VMC_MA6 (18) Modify 1/5
VMA_DQ42 AJ31 R26 VMC_DQ42 F26 E14 VMC_MA5
FBAD42 FBVDDQ_21 FBCD42 FBC_CMD22 VMC_MA5 (18)
VMA_DQ43 AJ30 V25 *220U/6.3V VMC_DQ43 D24 B13 VMC_MA7
FBAD43 FBVDDQ_22 FBCD43 FBC_CMD23 VMC_MA7 (18)
VMA_DQ44 AJ32 V26 VMC_DQ44 E23 FBC E15 VMC_MA4 VMC_ODT_R R23 0 VMC_ODT
FBAD44 FBVDDQ_23 FBCD44 FBC_CMD24 VMC_MA4 (18) VMC_ODT (18)
VMA_DQ45 AK29 VMC_DQ45 E26 F15 VMC_CAS#
FBAD45 FBCD45 FBC_CMD25 VMC_CAS# (18)
VMA_DQ46 AM31 VMC_DQ46 E24 A20 VMC_MA13
FBAD46 FBCD46 FBC_CMD26 T150
VMA_DQ47 AL30 P32 VMA_MA3 VMC_DQ47 F23 VMC_DEBUG R24 *0
FBAD47 FBA_CMD0 VMA_MA3 (17) FBCD47
VMA_DQ48 AE32 FBA U27 VMA_MA0 VMC_DQ48 B23 NB8M: use R23
FBAD48 FBA_CMD1 VMA_MA0 (17) FBCD48
VMA_DQ49 AE30 P31 VMA_MA2 VMC_DQ49 A23 E13 VMC_CLK0 R21
FBAD49 FBA_CMD2 VMA_MA2 (17) FBCD49 FBC_CLK0 VMC_CLK0 (18)
VMA_DQ50 AE31 U30 VMA_MA1 VMC_DQ50 C25 F13 VMC_CLK0# NB8P: A02 use R23
FBAD50 FBA_CMD3 VMA_MA1 (17) FBCD50 FBC_CLK0# VMC_CLK0# (18)
VMA_DQ51 AD30 Y31 VMA_MA3H VMC_DQ51 C23 F18 VMC_CLK1 10K
FBAD51 FBA_CMD4 VMA_MA3H (17) FBCD51 FBC_CLK1 VMC_CLK1 (18)
VMA_DQ52 AC31 W32 VMA_MA4H VMC_DQ52 A22 E17 VMC_CLK1# VCC3 VCC3
FBAD52 FBA_CMD5 VMA_MA4H (17) FBCD52 FBC_CLK1# VMC_CLK1# (18)
VMA_DQ53 AC32 W31 VMA_MA5H VMC_DQ53 C22
FBAD53 FBA_CMD6 VMA_MA5H (17) FBCD53
VMA_DQ54 AB32 T32 VMA_BA2 VMC_DQ54 C21
FBAD54 FBA_CMD7 T164 FBCD54
VMA_DQ55 AB31 V27 VMA_CS0# VMC_DQ55 B22 C20 FBC_CMD27
FBAD55 FBA_CMD8 VMA_CS0# (17) FBCD55 RFU4 T152
VMA_DQ56 AG27 T28 VMA_WE# VMC_DQ56 E22 D1 G73_D1 R19 R22
FBAD56 FBA_CMD9 VMA_WE# (17) FBCD56 RFU5 T153
VMA_DQ57 AF28 T31 VMA_BA0 VMC_DQ57 D22
FBAD57 FBA_CMD10 VMA_BA0 (17) FBCD57
VMA_DQ58 AH28 U32 VMA_CKE VMC_DQ58 D21 F12 VMC_DEBUG *2.2K *2.2K
FBAD58 FBA_CMD11 VMA_CKE (17) FBCD58 FBC_DEBUG
VMA_DQ59 AG28 W29 VMA_ODT_R VMC_DQ59 E21
VMA_DQ60 FBAD59 FBA_CMD12 VMA_MA2H VMC_DQ60 FBCD59 VMC_REFCK R95 0
AG29 FBAD60 FBA_CMD13 W30 VMA_MA2H (17) E18 FBCD60 FBC_REFCLK B1 THMDAT (30)
VMA_DQ61 AD27 T27 VMA_MA12 VMC_DQ61 D19 C1 VMC_REFCK# R98 0
FBAD61 FBA_CMD14 VMA_MA12 (17) FBCD61 FBC_REFCLK# THMCLK (30)
VMA_DQ62 AF27 V28 VMA_RAS# VMC_DQ62 D18
FBAD62 FBA_CMD15 VMA_RAS# (17) FBCD62
VMA_DQ63 AE28 V30 VMA_MA11 VMC_DQ63 E19
FBAD63 FBA_CMD16 VMA_MA11 (17) FBCD63
U31 VMA_MA10
FBA_CMD17 VMA_MA10 (17)
R27 VMA_BA1
FBA_CMD18 VMA_BA1 (17)
VMA_DM0 M29 V29 VMA_MA8 VMC_DM0 A4
FBADQM0 FBA_CMD19 VMA_MA8 (17) FBCDQM0
VMA_DM1 M30 T30 VMA_MA9 VMC_DM1 E11 G8 G73_G8 L5
B FBADQM1 FBA_CMD20 VMA_MA9 (17) FBCDQM1 FBC_PLLVDD T7 B
VMA_DM2 G30 W28 VMA_MA6 VMC_DM2 F5 15mil 10nH
FBADQM2 FBA_CMD21 VMA_MA6 (17) FBCDQM2
VMA_DM3 F29 R29 VMA_MA5 VMC_DM3 C9 G10 FBC_PLLAVDD
FBADQM3 FBA_CMD22 VMA_MA5 (17) FBCDQM3 FBC_PLLAVDD VGA1.2V
VMA_DM4 AA29 R30 VMA_MA7 VMC_DM4 C28
FBADQM4 FBA_CMD23 VMA_MA7 (17) FBCDQM4
VMA_DM5 AK30 P29 VMA_MA4 VMC_DM5 F24 G9 C15 C16 C17
FBADQM5 FBA_CMD24 VMA_MA4 (17) FBCDQM5 FBC_PLLGND
VMA_DM6 AC30 U28 VMA_CAS# VMC_DM6 C24
FBADQM6 FBA_CMD25 VMA_CAS# (17) FBCDQM6
VMA_DM7 AG30 Y32 VMA_MA13 VMC_DM7 E20 470P/50V 4700P/25V 4.7U
FBADQM7 FBA_CMD26 T169 FBCDQM7
P28 VMA_CLK0
FBA_CLK0 VMA_CLK0 (17)
VMA_WDQS0 L28 R28 VMA_CLK0# VMC_WDQS0 C5
FBADQS_WP0 FBA_CLK0# VMA_CLK0# (17) FBCDQS_WP0
VMA_WDQS1 K31 Y27 VMA_CLK1 VMC_WDQS1 E10 K26 FBCAL_PD R43 40.2/F_4
FBADQS_WP1 FBA_CLK1 VMA_CLK1 (17) FBCDQS_WP1 FBCAL_PD_VDDQ VCC1.8
VMA_WDQS2 G32 AA27 VMA_CLK1# VMC_WDQS2 E5
FBADQS_WP2 FBA_CLK1# VMA_CLK1# (17) FBCDQS_WP2
VMA_WDQS3 G28 VMC_WDQS3 B8 H26 FBCAL_PU R41 40.2/F_4
VMA_WDQS4 AB28 FBADQS_WP3 VMC_WDQS4 FBCDQS_WP3 FBCAL_PU_GND
FBADQS_WP4 A29 FBCDQS_WP4
VMA_WDQS5 AL32 VMC_WDQS5 D25 J26 FBCAL_TERM R39 *40.2/F_4
VMA_WDQS6 AF32 FBADQS_WP5 VMC_WDQS6 FBCDQS_WP5 FBCAL_TERM_GND
FBADQS_WP6 B25 FBCDQS_WP6
VMA_WDQS7 AH30 VMC_WDQS7 F20
FBADQS_WP7 FBA_CMD27 FBCDQS_WP7
RFU2 Y30 T171 stuff 40.2ohm on R43 and R41 for NB8M-SE
AC26 G73_AC26
RFU3 T36
VMA_RDQS0 M28 VMC_RDQS0 C6
VMA_RDQS1 FBADQS_RN0 VMA_DEBUG VMC_RDQS1 FBCDQS_RN0
K32 FBADQS_RN1 FBA_DEBUG AC27 E9 FBCDQS_RN1
F_VREF2 filter can be
VMA_RDQS2 G31 GREEN BLOCK can VMC_RDQS2 E6 A28 FB_VREF2 15mil remove from nvidia
FBADQS_RN2 FBCDQS_RN2 FB_VREF2 T149
VMA_RDQS3 G27 D32 VMA_REFCK VMC_RDQS3 A8 HANK recommend
VMA_RDQS4 AA28
FBADQS_RN3 FBA_REFCLK
D31 VMA_REFCK#
T156 remove if use G8X VMC_RDQS4 B29
FBCDQS_RN3
FBADQS_RN4 FBA_REFCLK# T154 FBCDQS_RN4
VMA_RDQS5 AL31 VMC_RDQS5 E25 G70,G71: Stuff these parts
VMA_RDQS6 FBADQS_RN5 C40 4.7U VMC_RDQS6 FBCDQS_RN5
AF31 FBADQS_RN6 A25 FBCDQS_RN6 G72M,G73M : NC
VMA_RDQS7 AH29 VGA1.2V VMC_RDQS7 F21
FBADQS_RN7 C46 .1U/10V FBCDQS_RN7
G23 H_PLLVDD L8 0
FBA_PLLVDD U_GPU_G3
15mil
A
FBA_PLLAVDD G25 15mil FBA_PLLAVDD L10
VGA1.2V A
FB_VREF1 E32 FB_VREF1 C68 10nH
FBA_PLLGND G24
C45
*1K/F R407 4.7U 0.1U
VCC1.8
U_GPU_G3 YELLOW BLOCK is for
*1K/F R408

*0.1U C659 C63 C58


G8X chip only Quanta Computer Inc.
For NB8M 470P/50V 4700P/25V For EMI
Stuff 1k ohm on R407,R408 PROJECT : PB2
VREF = FBVDDQ * and 0.1u C659 For NB8M-SE Size Document Number Rev
A
Rbot/(Rtop + Rbot) VGA
Date: Friday, March 23, 2007 Sheet 16 of 46
5 4 3 2 1
5 4 3 2 1

VMA_DQ0
VMA_DQ4
VMA_DQ2
VMA_DQ1
VMA_DQ7
VMA_DQ6
B9
B1
D9
D1
D3
D7
U3
UDQ7
UDQ6
UDQ5
UDQ4
UDQ3
VREF

VDD1
J2 VMREFA0

A1
E1
15mil
R37

R33

C42 0.1U
1.5K/F

1K/F
VCC1.8
VMA_DQ22
VMA_DQ18
VMA_DQ23
VMA_DQ17
VMA_DQ20
B9
B1
D9
D1
D3
U29
UDQ7
UDQ6
UDQ5
UDQ4
VREF J2 VMREFA0

A1
15mil

(16) VMA_CLK0
VMA_CLK0
VMA_CLK0#
17
UDQ2 VDD2 UDQ3 VDD1 (16) VMA_CLK0#
VMA_DQ5 C2 J9 VMA_DQ19 D7 E1 VMA_CLK1
UDQ1 VDD3 UDQ2 VDD2 (16) VMA_CLK1
VMA_DQ3 C8 M9 VMA_DQ16 C2 J9 VMA_CLK1#
UDQ0 VDD4 UDQ1 VDD3 (16) VMA_CLK1#
VMA_DQ12 F9 R1 VMA_DQ21 C8 M9
LDQ7 VDD5 VCC1.8 UDQ0 VDD4
VMA_DQ14 F1 VMA_DQ31 F9 R1
LDQ6 LDQ7 VDD5 VCC1.8
VMA_DQ15 H9 A9 VMA_DQ27 F1 VMA_CKE R443 10K
D
VMA_DQ13 LDQ5 VDDQ1 VMA_DQ26 LDQ6 D
H1 LDQ4 VDDQ2 C1 H9 LDQ5 VDDQ1 A9
VMA_DQ9 H3 C3 VMA_DQ30 H1 C1
VMA_DQ8 H7
LDQ3
LDQ2
VDDQ3
VDDQ4 C7 Nvidia suggest VMA_DQ29 H3
LDQ4
LDQ3
VDDQ2
VDDQ3 C3
VMA_DQ10 G2 C9 VMA_DQ24 H7 C7 VCC1.8
VMA_DQ11 LDQ1 VDDQ5 VMA_DQ28 LDQ2 VDDQ4
G8 E9 G2 C9
LDQ0 VDDQ6
VDDQ7 G1 VREF=40% VMA_DQ25 G8
LDQ1
LDQ0
VDDQ5
VDDQ6 E9
VMA_DM0 B3 G3 G1 R424
VMA_DM1 UDM VDDQ8 VMA_DM2 VDDQ7
F3 LDM VDDQ9 G7 B3 UDM VDDQ8 G3 *0
G9 VMA_DM3 F3 G7
VMA_WDQS0 B7 UDQS
VDDQ10 1/5 modify LDM VDDQ9
VDDQ10 G9
VMA_RDQS0 A8 VMA_WDQS2 B7
VMA_WDQS1 UDQS VMA_RDQS2 UDQS
F7 LDQS VDDL J1 A8 UDQS
VMA_RDQS1 E8 VMA_WDQS3 F7 J1
LDQS VMA_RDQS3 LDQS VDDL
E8 LDQS
VMA_CLK0 J8 A2
VMA_CLK0# CK NC1 VMA_CLK0 R421 R423 C669
K8 CK NC2 E2 J8 CK NC1 A2
L1 VMA_CLK0# K8 E2 121 121 *0.1U
VMA_BA1 NC3 CK NC2
(16) VMA_BA1 L3 BA1 NC4 R3 NC3 L1
VMA_BA0 L2 R7 VMA_BA1 L3 R3
(16) VMA_BA0 BA0 NC5 BA1 NC4
R8 G72M-Z: NO STUFF VMA_BA0 L2 R7 VMA_CLK0
NC6 BA0 NC5 (16) VMA_CLK0
VMA_MA12 R2 R8
(16) VMA_MA12 A12 G72M:120 ohm NC6
VMA_MA11 P7 VMA_MA12 R2 VMA_CLK0#
(16) VMA_MA11 A11 A12 (16) VMA_CLK0#
VMA_MA10 M2 A3 VMA_MA11 P7
(16) VMA_MA10
VMA_MA9 A10 VSS1 G73M: 480 ohm VMA_MA10 A11
(16) VMA_MA9 P3 A9 VSS2 E3 M2 A10 VSS1 A3
VMA_MA8 P8 J3 VMA_MA9 P3 E3
(16) VMA_MA8 A8 VSS3 A9 VSS2
VMA_MA7 P2 N1 VMA_MA8 P8 J3
(16)
(16)
VMA_MA7
VMA_MA6
VMA_MA6 N7
A7
A6
VSS4
VSS5 P9 VMA_MA7 P2
A8
A7
VSS3
VSS4 N1 1/23 modify
VMA_MA5 N3 VMA_MA6 N7 P9
(16) VMA_MA5 A5 A6 VSS5
VMA_MA4 N8 A7 VMA_MA5 N3
C
(16)
(16)
VMA_MA4
VMA_MA3
VMA_MA3 N2
A4
A3
VSSQ1
VSSQ2 B2 VMA_MA4 N8
A5
A4 VSSQ1 A7 NB8M/8P: Stuff 121 ohm on R421,R423,R452,R451 C
VMA_MA2 M7 B8 VMA_MA3 N2 B2
(16) VMA_MA2 A2 VSSQ3 A3 VSSQ2
VMA_MA1 M3 D2 VMA_MA2 M7 B8
(16) VMA_MA1 A1 VSSQ4 A2 VSSQ3 VCC1.8
VMA_MA0 M8 D8 VMA_MA1 M3 D2
(16) VMA_MA0 A0 VSSQ5 A1 VSSQ4
E7 VMA_MA0 M8 D8
VMA_ODT VSSQ6 A0 VSSQ5
(16) VMA_ODT K9 ODT VSSQ7 F2 VSSQ6 E7
VMA_CKE K2 F8 VMA_ODT K9 F2 R453
(16) VMA_CKE CKE VSSQ8 ODT VSSQ7
VMA_CS0# L8 H2 VMA_CKE K2 F8 *0
(16) VMA_CS0# CS VSSQ9 CKE VSSQ8
VMA_WE# K3 H8 VMA_CS0# L8 H2
(16) VMA_WE# WE VSSQ10 CS VSSQ9
VMA_RAS# K7 VMA_WE# K3 H8
(16) VMA_RAS# RAS WE VSSQ10
VMA_CAS# L7 J7 VMA_RAS# K7
(16) VMA_CAS# CAS VSSDL RAS
VMA_CAS# L7 J7
GDDR2-BGA84 CAS VSSDL
GDDR2-BGA84

R452 R451 C678


U32 121 121 *0.1U
VMA_DQ43 B9 J2 VMREFA1 R75 1.5K/F U6
UDQ7 VREF VCC1.8
VMA_DQ47 B1 15mil VMA_DQ59 B9 J2 VMREFA1
VMA_DQ41 UDQ6 R76 1K/F VMA_DQ56 UDQ7 VREF VMA_CLK1
D9 UDQ5 B1 UDQ6 15mil (16) VMA_CLK1
VMA_DQ45 D1 VMA_DQ58 D9
VMA_DQ40 UDQ4 C161 0.1U VMA_DQ61 UDQ5
D3 UDQ3 VDD1 A1 D1 UDQ4
VMA_DQ42 D7 E1 VMA_DQ62 D3 A1 VMA_CLK1#
UDQ2 VDD2 UDQ3 VDD1 (16) VMA_CLK1#
VMA_DQ46 C2 J9 VMA_DQ57 D7 E1
VMA_DQ44 UDQ1 VDD3 VMA_DQ63 UDQ2 VDD2
C8 UDQ0 VDD4 M9 C2 UDQ1 VDD3 J9
VMA_DQ39 F9 R1 VMA_DQ60 C8 M9
LDQ7 VDD5 VCC1.8 UDQ0 VDD4
VMA_DQ33 F1 VMA_DQ52 F9 R1
LDQ6 LDQ7 VDD5 VCC1.8 VCC1.8
VMA_DQ37 H9 A9 VMA_DQ53 F1
VMA_DQ32 LDQ5 VDDQ1 VMA_DQ51 LDQ6 C157 C13 C29 C674
H1 LDQ4 VDDQ2 C1 H9 LDQ5 VDDQ1 A9
VMA_DQ35 H3 C3 VMA_DQ54 H1 C1
B
VMA_DQ38 LDQ3 VDDQ3 VMA_DQ55 LDQ4 VDDQ2 1000P/50V 0.01U 0.1U 10U/4V B
H7 LDQ2 VDDQ4 C7 H3 LDQ3 VDDQ3 C3
VMA_DQ34 G2 C9 VMA_DQ49 H7 C7
VMA_DQ36 LDQ1 VDDQ5 VMA_DQ48 LDQ2 VDDQ4
G8 LDQ0 VDDQ6 E9 G2 LDQ1 VDDQ5 C9
G1 VMA_DQ50 G8 E9
VMA_DM5 VDDQ7 LDQ0 VDDQ6
B3 UDM VDDQ8 G3 VDDQ7 G1
VMA_DM4 F3 G7 VMA_DM7 B3 G3
LDM VDDQ9 UDM VDDQ8 VCC1.8
G9 VMA_DM6 F3 G7
VDDQ10 LDM VDDQ9 (16) VMA_DQ[63..0]
VMA_WDQS5 B7 G9 C168 C19 C34 C619
VMA_RDQS5 UDQS VMA_WDQS7 VDDQ10
A8 UDQS B7 UDQS (16) VMA_DM[7..0]
VMA_WDQS4 F7 J1 VMA_RDQS7 A8 1000P/50V 0.01U 0.1U 10U/4V
VMA_RDQS4 LDQS VDDL VMA_WDQS6 UDQS
E8 LDQS F7 LDQS VDDL J1 (16) VMA_WDQS[7..0]
VMA_RDQS6 E8
VMA_CLK1 LDQS
J8 CK NC1 A2 (16) VMA_RDQS[7..0]
VMA_CLK1# K8 E2 VMA_CLK1 J8 A2
CK NC2 VMA_CLK1# CK NC1
NC3 L1 K8 CK NC2 E2 VCC1.8
VMA_BA1 L3 R3 L1
VMA_BA0 BA1 NC4 VMA_BA1 NC3 C650 C166 C33 C189
L2 BA0 NC5 R7 L3 BA1 NC4 R3 256Mb : AKD5JGAT^05
R8 VMA_BA0 L2 R7
VMA_MA12 NC6 BA0 NC5 1000P/50V 0.01U 0.1U 10U/4V
512Mb : AKD59G-T^01
R2 A12 NC6 R8
VMA_MA11 P7 VMA_MA12 R2
VMA_MA10 A11 VMA_MA11 A12
M2 A10 VSS1 A3 P7 A11
VMA_MA9 P3 E3 VMA_MA10 M2 A3
VMA_MA8 A9 VSS2 VMA_MA9 A10 VSS1
P8 A8 VSS3 J3 P3 A9 VSS2 E3 VCC1.8
VMA_MA7 P2 N1 VMA_MA8 P8 J3
VMA_MA6 A7 VSS4 VMA_MA7 A8 VSS3 C18 C675 C36 C12
N7 A6 VSS5 P9 P2 A7 VSS4 N1
VMA_MA5H N3 VMA_MA6 N7 P9
(16) VMA_MA5H A5 A6 VSS5
VMA_MA4H N8 A7 VMA_MA5H N3 1000P/50V 0.01U 0.1U 10U/4V
(16) VMA_MA4H A4 VSSQ1 A5
VMA_MA3H N2 B2 VMA_MA4H N8 A7
(16) VMA_MA3H A3 VSSQ2 A4 VSSQ1
VMA_MA2H M7 B8 VMA_MA3H N2 B2
(16) VMA_MA2H A2 VSSQ3 A3 VSSQ2
A VMA_MA1 M3 D2 VMA_MA2H M7 B8 A
VMA_MA0 A1 VSSQ4 VMA_MA1 A2 VSSQ3
M8 A0 VSSQ5 D8 M3 A1 VSSQ4 D2
E7 VMA_MA0 M8 D8
VMA_ODT VSSQ6 A0 VSSQ5
K9 ODT VSSQ7 F2 VSSQ6 E7
VMA_CKE K2 F8 VMA_ODT K9 F2
VMA_CS0# CKE VSSQ8 VMA_CKE ODT VSSQ7
L8 CS VSSQ9 H2 K2 CKE VSSQ8 F8
VMA_WE# K3 H8 VMA_CS0# L8 H2
VMA_RAS#
VMA_CAS#
K7
WE
RAS
VSSQ10 VMA_WE#
VMA_RAS#
K3
CS
WE
VSSQ9
VSSQ10 H8 Quanta Computer Inc.
L7 CAS VSSDL J7 K7 RAS
VMA_CAS# L7 J7
GDDR2-BGA84 CAS VSSDL PROJECT : PB2
GDDR2-BGA84 Size Document Number Rev
A
VGA
Date: Friday, March 23, 2007 Sheet 17 of 46
5 4 3 2 1
5 4 3 2 1

U22 U1
VMC_DQ3
VMC_DQ2
VMC_DQ4
VMC_DQ0
VMC_DQ7
VMC_DQ6
VMC_DQ1
B9
B1
D9
D1
D3
D7
C2
UDQ7
UDQ6
UDQ5
UDQ4
UDQ3
UDQ2
VREF

VDD1
VDD2
J2 VMREFB0

A1
E1
J9
15mil
R7

R6

C8
1.5K/F

1K/F

0.1U
VCC1.8
VMC_DQ17
VMC_DQ20
VMC_DQ16
VMC_DQ21
VMC_DQ23
VMC_DQ18
VMC_DQ22
B9
B1
D9
D1
D3
D7
C2
UDQ7
UDQ6
UDQ5
UDQ4
UDQ3
UDQ2
VREF

VDD1
VDD2
J2 VMREFB0

A1
E1
J9
15mil (16)

(16)
VMC_CLK0
(16) VMC_CLK0#
VMC_CLK1
(16) VMC_CLK1#
VMC_CLK0
VMC_CLK0#
VMC_CLK1
VMC_CLK1#
18
VMC_DQ5 UDQ1 VDD3 VMC_DQ19 UDQ1 VDD3
C8 UDQ0 VDD4 M9 C8 UDQ0 VDD4 M9
VMC_DQ15 F9 R1 VMC_DQ30 F9 R1 VMC_CKE R377 10K
LDQ7 VDD5 VCC1.8 LDQ7 VDD5 VCC1.8
VMC_DQ10 F1 VMC_DQ28 F1
VMC_DQ14 LDQ6 VMC_DQ31 LDQ6
H9 LDQ5 VDDQ1 A9 H9 LDQ5 VDDQ1 A9
VMC_DQ12 H1 C1 VMC_DQ24 H1 C1 VCC1.8
D
VMC_DQ9 LDQ4 VDDQ2 VMC_DQ25 LDQ4 VDDQ2 D
H3 LDQ3 VDDQ3 C3 H3 LDQ3 VDDQ3 C3
VMC_DQ13 H7 C7 VMC_DQ29 H7 C7
VMC_DQ8 LDQ2 VDDQ4 VMC_DQ26 LDQ2 VDDQ4 R5
G2 LDQ1 VDDQ5 C9 G2 LDQ1 VDDQ5 C9
VMC_DQ11 G8 E9 VMC_DQ27 G8 E9 *0
LDQ0 VDDQ6 LDQ0 VDDQ6
VDDQ7 G1 VDDQ7 G1
VMC_DM0 B3 G3 VMC_DM2 B3 G3
VMC_DM1 UDM VDDQ8 VMC_DM3 UDM VDDQ8
F3 LDM VDDQ9 G7 F3 LDM VDDQ9 G7
VDDQ10 G9 VDDQ10 G9
VMC_WDQS0 B7 VMC_WDQS2 B7
VMC_RDQS0 UDQS VMC_RDQS2 UDQS
A8 UDQS A8 UDQS
VMC_WDQS1 F7 J1 VMC_WDQS3 F7 J1
VMC_RDQS1 LDQS VDDL VMC_RDQS3 LDQS VDDL R3 R4
E8 LDQS E8 LDQS
121 121 C7
VMC_CLK0 J8 A2 VMC_CLK0 J8 A2 *0.1U
VMC_CLK0# CK NC1 VMC_CLK0# CK NC1
K8 CK NC2 E2 K8 CK NC2 E2
L1 L1 VMC_CLK0
NC3 NC3 (16) VMC_CLK0
VMC_BA1 L3 R3 VMC_BA1 L3 R3
(16) VMC_BA1 BA1 NC4 BA1 NC4
VMC_BA0 L2 R7 VMC_BA0 L2 R7
(16) VMC_BA0 BA0 NC5 BA0 NC5
R8 R8 VMC_CLK0#
NC6 NC6 (16) VMC_CLK0#
VMC_MA12 R2 VMC_MA12 R2
(16) VMC_MA12 A12 A12
VMC_MA11 P7 VMC_MA11 P7
(16) VMC_MA11 A11 A11
VMC_MA10 M2 A3 VMC_MA10 M2 A3
(16) VMC_MA10 A10 VSS1 A10 VSS1
VMC_MA9 P3 E3 VMC_MA9 P3 E3
(16) VMC_MA9 A9 VSS2 A9 VSS2
VMC_MA8 P8 J3 VMC_MA8 P8 J3
(16) VMC_MA8 A8 VSS3 A8 VSS3
VMC_MA7 P2 N1 VMC_MA7 P2 N1
(16)
(16)
VMC_MA7
VMC_MA6
VMC_MA6 N7
A7
A6
VSS4
VSS5 P9 VMC_MA6 N7
A7
A6
VSS4
VSS5 P9 1/23 modify
VMC_MA5 N3 VMC_MA5 N3
(16) VMC_MA5 A5 A5
VMC_MA4 N8 A7 VMC_MA4 N8 A7
(16)
(16)
VMC_MA4
VMC_MA3
VMC_MA3 N2
A4
A3
VSSQ1
VSSQ2 B2 VMC_MA3 N2
A4
A3
VSSQ1
VSSQ2 B2 Stuff 121 ohm on R3,R4,R9,R10
C VMC_MA2 M7 B8 VMC_MA2 M7 B8 C
(16) VMC_MA2 A2 VSSQ3 A2 VSSQ3
VMC_MA1 M3 D2 VMC_MA1 M3 D2
(16) VMC_MA1 A1 VSSQ4 A1 VSSQ4
VMC_MA0 M8 D8 VMC_MA0 M8 D8
(16) VMC_MA0 A0 VSSQ5 A0 VSSQ5
VSSQ6 E7 VSSQ6 E7
VMC_ODT K9 F2 VMC_ODT K9 F2
(16) VMC_ODT ODT VSSQ7 ODT VSSQ7 VCC1.8
VMC_CKE K2 F8 VMC_CKE K2 F8
(16) VMC_CKE CKE VSSQ8 CKE VSSQ8
VMC_CS0# L8 H2 VMC_CS0# L8 H2
(16) VMC_CS0# CS VSSQ9 CS VSSQ9
VMC_WE# K3 H8 VMC_WE# K3 H8
(16) VMC_WE# WE VSSQ10 WE VSSQ10
VMC_RAS# K7 VMC_RAS# K7 R8
(16) VMC_RAS# RAS RAS
VMC_CAS# L7 J7 VMC_CAS# L7 J7 *0
(16) VMC_CAS# CAS VSSDL CAS VSSDL
GDDR2-BGA84 GDDR2-BGA84

U23 U2
VMC_DQ32 B9 J2 VMREFB1 R366 1.5K/F VMC_DQ51 B9 J2 VMREFB1 R10 R9 C9
UDQ7 VREF VCC1.8 UDQ7 VREF
VMC_DQ36 B1 15mil VMC_DQ52 B1 15mil 121 121 *0.1U
VMC_DQ33 UDQ6 R367 1K/F VMC_DQ48 UDQ6
D9 UDQ5 D9 UDQ5
VMC_DQ37 D1 VMC_DQ54 D1
VMC_DQ39 UDQ4 C627 0.1U VMC_DQ55 UDQ4 VMC_CLK1
D3 UDQ3 VDD1 A1 D3 UDQ3 VDD1 A1 (16) VMC_CLK1
VMC_DQ35 D7 E1 VMC_DQ50 D7 E1
VMC_DQ38 UDQ2 VDD2 VMC_DQ53 UDQ2 VDD2
C2 UDQ1 VDD3 J9 C2 UDQ1 VDD3 J9
VMC_DQ34 C8 M9 VMC_DQ49 C8 M9 VMC_CLK1#
UDQ0 VDD4 UDQ0 VDD4 (16) VMC_CLK1#
VMC_DQ43 F9 R1 VMC_DQ57 F9 R1
LDQ7 VDD5 VCC1.8 LDQ7 VDD5 VCC1.8
VMC_DQ41 F1 VMC_DQ63 F1
VMC_DQ46 LDQ6 VMC_DQ58 LDQ6
H9 LDQ5 VDDQ1 A9 H9 LDQ5 VDDQ1 A9
VMC_DQ40 H1 C1 VMC_DQ59 H1 C1
VMC_DQ45 LDQ4 VDDQ2 VMC_DQ60 LDQ4 VDDQ2
B
H3 LDQ3 VDDQ3 C3 H3 LDQ3 VDDQ3 C3 VCC1.8 B
VMC_DQ47 H7 C7 VMC_DQ61 H7 C7
VMC_DQ42 LDQ2 VDDQ4 VMC_DQ62 LDQ2 VDDQ4 C631 C660 C624 C6
G2 LDQ1 VDDQ5 C9 G2 LDQ1 VDDQ5 C9
VMC_DQ44 G8 E9 VMC_DQ56 G8 E9
LDQ0 VDDQ6 LDQ0 VDDQ6 1000P/50V 0.01U 0.1U 10U/4V
VDDQ7 G1 VDDQ7 G1
VMC_DM4 B3 G3 VMC_DM6 B3 G3
UDM VDDQ8 UDM VDDQ8 (16) VMC_DQ[63..0]
VMC_DM5 F3 G7 VMC_DM7 F3 G7
LDM VDDQ9 LDM VDDQ9
VDDQ10 G9 VDDQ10 G9 (16) VMC_DM[7..0]
VMC_WDQS4 B7 VMC_WDQS6 B7
VMC_RDQS4 UDQS VMC_RDQS6 UDQS
A8 UDQS A8 UDQS VCC1.8 (16) VMC_WDQS[7..0]
VMC_WDQS5 F7 J1 VMC_WDQS7 F7 J1
VMC_RDQS5 LDQS VDDL VMC_RDQS7 LDQS VDDL C22 C103 C623 C618
E8 LDQS E8 LDQS (16) VMC_RDQS[7..0]
VMC_CLK1 J8 A2 VMC_CLK1 J8 A2 1000P/50V 0.01U 0.1U 10U/4V
VMC_CLK1# CK NC1 VMC_CLK1# CK NC1
K8 CK NC2 E2 K8 CK NC2 E2
NC3 L1 NC3 L1 256Mb : AKD5JGAT^05
VMC_BA1 L3 R3 VMC_BA1 L3 R3
VMC_BA0 BA1 NC4 VMC_BA0 BA1 NC4 512Mb : AKD59G-T^01
L2 BA0 NC5 R7 L2 BA0 NC5 R7
NC6 R8 NC6 R8 VCC1.8
VMC_MA12 R2 VMC_MA12 R2
VMC_MA11 A12 VMC_MA11 A12 C652 C625 C130 C617
P7 A11 P7 A11
VMC_MA10 M2 A3 VMC_MA10 M2 A3 0.01U
VMC_MA9 A10 VSS1 VMC_MA9 A10 VSS1 1000P/50V 0.1U 10U/4V
P3 A9 VSS2 E3 P3 A9 VSS2 E3
VMC_MA8 P8 J3 VMC_MA8 P8 J3
VMC_MA7 A8 VSS3 VMC_MA7 A8 VSS3
P2 A7 VSS4 N1 P2 A7 VSS4 N1
VMC_MA6 N7 P9 VMC_MA6 N7 P9
VMC_MA5H A6 VSS5 VMC_MA5H A6 VSS5
(16) VMC_MA5H N3 A5 N3 A5 VCC1.8
VMC_MA4H N8 A7 VMC_MA4H N8 A7
(16) VMC_MA4H A4 VSSQ1 A4 VSSQ1
VMC_MA3H N2 B2 VMC_MA3H N2 B2 C114 C626 C32 C620
(16) VMC_MA3H A3 VSSQ2 A3 VSSQ2
VMC_MA2H M7 B8 VMC_MA2H M7 B8
(16) VMC_MA2H A2 VSSQ3 A2 VSSQ3
A VMC_MA1 M3 D2 VMC_MA1 M3 D2 1000P/50V 0.01U 0.1U 10U/4V A
VMC_MA0 A1 VSSQ4 VMC_MA0 A1 VSSQ4
M8 A0 VSSQ5 D8 M8 A0 VSSQ5 D8
VSSQ6 E7 VSSQ6 E7
VMC_ODT K9 F2 VMC_ODT K9 F2
VMC_CKE ODT VSSQ7 VMC_CKE ODT VSSQ7
K2 CKE VSSQ8 F8 K2 CKE VSSQ8 F8
VMC_CS0# L8 H2 VMC_CS0# L8 H2
VMC_WE# CS VSSQ9 VMC_WE# CS VSSQ9
K3 H8 K3 H8
VMC_RAS#
VMC_CAS#
K7
WE
RAS
VSSQ10 VMC_RAS#
VMC_CAS#
K7
WE
RAS
VSSQ10 Quanta Computer Inc.
L7 CAS VSSDL J7 L7 CAS VSSDL J7

GDDR2-BGA84 GDDR2-BGA84 PROJECT : PB2


Size Document Number Rev
A
VGA
Date: Friday, March 23, 2007 Sheet 18 of 46
5 4 3 2 1
5 4 3 2 1

U31F U31A 500mA


VGACORE

19
(44) VGACORE
AA12 D4 PEG_RXP0 C195 0.1U C_PEG_RXP0 AJ15 AD23
GND_0 GND_80 (6) PEG_RXP0 PEX_TX0 PEX_IOVDD_0 VGA1.2V
AA2 D7 PEG_RXN0 C196 0.1U C_PEG_RXN0 AK15 AF23 C142 0.1U (14,16,43) VGA1.2V VGA1.2V
GND_1 GND_81 (6) PEG_RXN0 PEX_TX0# PEX_IOVDD_1
AA21 F11 AF24 C145 0.1U
GND_2 GND_82 PEG_RXP1 C170 0.1U C_PEG_RXP1 AH16 PEX_IOVDD_2 C128 1U
AA31 GND_3 GND_83 F14 (6) PEG_RXP1 PEX_TX1 PEX_IOVDD_3 AF25 PLACE NEAR GPU
AB27 F19 PEG_RXN1 C173 0.1U C_PEG_RXN1 AG16 AG24 C134 1U
GND_4 GND_84 (6) PEG_RXN1 PEX_TX1# PEX_IOVDD_4
AB6 F2 AG25 C682 4.7U
GND_5 GND_85 PEG_RXP2 C197 0.1U C_PEG_RXP2 AG17 PEX_IOVDD_5
AC10 GND_6 GND_86 F22 (6) PEG_RXP2 PEX_TX2
AC23 F25 PEG_RXN2 C198 0.1U C_PEG_RXN2 AH17
GND_7 GND_87 (6) PEG_RXN2 PEX_TX2#
AC29 GND_8 GND_88 F31 PEX_IOVDDQ_0 AC16 VGA1.2V
AC4 F8 PEG_RXP3 C199 0.1U C_PEG_RXP3 AG18 AC17 1500mA
GND_9 GND_89 (6) PEG_RXP3 PEX_TX3 PEX_IOVDDQ_1
AD16 G26 PEG_RXN3 C200 0.1U C_PEG_RXN3 AH18 AC21 C105 0.1U
GND_10 GND_90 (6) PEG_RXN3 PEX_TX3# PEX_IOVDDQ_2
AD17 G29 AC22 C153 0.1U
GND_11 GND_91 PEG_RXP4 C171 0.1U C_PEG_RXP4 PEX_IOVDDQ_3 C141 0.47U/10V
AD2 GND_12 GND_92 G4 (6) PEG_RXP4 AK18 PEX_TX4 PEX_IOVDDQ_4 AE18
D PEG_RXN4 C174 0.1U C_PEG_RXN4 C140 0.47U/10V D
AD31 GND_13 GND_93 G7 (6) PEG_RXN4 AJ18 PEX_TX4# PEX_IOVDDQ_5 AE21
AE17 H27 AE22 C131 1U PLACE NEAR GPU G8X Total power consumption
GND_14 GND_94 PEG_RXP5 C175 0.1U C_PEG_RXP5 PEX_IOVDDQ_6 C138 1U
AE27 H6 (6) PEG_RXP5 AJ19 AF12
AE6
GND_15 GND_95
J16 PEG_RXN5 C176 0.1U C_PEG_RXN5 AH19
PEX_TX5 PEX_IOVDDQ_7
AF18 C119 10U/4V 1.NVDD CORE POWER 1.2 - 1.0
GND_16 GND_96 (6) PEG_RXN5 PEX_TX5# PEX_IOVDDQ_8
AF11 J17 AF21 C143 0.1U -- 11.01A
GND_17 GND_97 PEG_RXP6 C201 0.1U C_PEG_RXP6 AG20 PEX_IOVDDQ_9 C151 0.1U
AF26 J2 (6) PEG_RXP6 AF22
AF29
GND_18 GND_98
J31 PEG_RXN6 C194 0.1U C_PEG_RXN6 AH20 PEX_TX6 PEX_IOVDDQ_10 2.PCIE VGA1.2V -- 1.75A
GND_19 GND_99 (6) PEG_RXN6 PEX_TX6#
3.FBVDDQ 1.8V ----- 3.12A
AF4 K10 PEG_RXP7 C177 0.1U C_PEG_RXP7 AG21 K16 VGACORE
AF7
GND_20 GND_100
K23
(6) PEG_RXP7
PEG_RXN7 C178 0.1U C_PEG_RXN7 AH21 PEX_TX7 VDD_0
K17
4.VDD I/O 3.3V ---- 0.49A
GND_21 GND_101 (6) PEG_RXN7 PEX_TX7# VDD_1
AG10 GND_22 GND_102 K29 VDD_2 N13 C96 0.1U 5.PLL 2.5V ---
AG11 K4 PEG_RXP8 C202 0.1U C_PEG_RXP8 AK21 N14 C82 0.1U
GND_23 GND_103 (6) PEG_RXP8 PEX_TX8 VDD_3
AG14 L27 PEG_RXN8 C203 0.1U C_PEG_RXN8 AJ21 N16 C97 0.1U
GND_24 GND_104 (6) PEG_RXN8 PEX_TX8# VDD_4
AG15 L6 N17 C85 0.1U
GND_25 GND_105 PEG_RXP9 C179 0.1U C_PEG_RXP9 VDD_5 C99 0.1U
AG19 GND_26 GND_106 M12 (6) PEG_RXP9 AJ22 PEX_TX9 VDD_6 N19
AG2 M2 PEG_RXN9 C172 0.1U C_PEG_RXN9 AH22 P13 C118 10U/4V
GND_27 GND_107 (6) PEG_RXN9 PEX_TX9# VDD_7
AG22 M31 P14 C84 0.1U
GND_28 GND_108 PEG_RXP10 C205 0.1U C_PEG_RXP10 AG23 VDD_8 C101 1U
AG31 GND_29 GND_109 N15 (6) PEG_RXP10 PEX_TX10 VDD_9 P16 power up sequence
AG8 N18 PEG_RXN10 C204 0.1U C_PEG_RXN10 AH23 P17 C86 0.1U
GND_30 GND_110 (6) PEG_RXN10 PEX_TX10# VDD_10
AH24 N29 P19 C100 0.1U PLACE NEAR GPU
GND_31 GND_111 PEG_RXP11 C180 0.1U C_PEG_RXP11 AK24 VDD_11 C87 0.1U
AJ10 GND_32 GND_112 N4 (6) PEG_RXP11 PEX_TX11 VDD_12 R16
AJ13 P15 PEG_RXN11 C181 0.1U C_PEG_RXN11 AJ24 R17 C98 0.1U
GND_33 GND_113 (6) PEG_RXN11 PEX_TX11# VDD_13
AJ16 P18 T14 C66 10U/4V
GND_34 GND_114 PEG_RXP12 C206 0.1U C_PEG_RXP12 AJ25 VDD_15 C120 0.47U/10V
AJ17 GND_35 GND_115 P27 (6) PEG_RXP12 PEX_TX12 VDD_16 T15 I/O 3.3V
AJ20 P6 PEG_RXN12 C207 0.1U C_PEG_RXN12 AH25 T18 C108 0.47U/10V
GND_36 GND_116 (6) PEG_RXN12 PEX_TX12# VDD_17
AJ23 R13 T19 C75 0.47U/10V NVCORE
GND_37 GND_117 PEG_RXP13 C182 0.1U C_PEG_RXP13 AH26 VDD_18 C81 0.47U/10V
AJ26 GND_38 GND_118 R14 (6) PEG_RXP13 PEX_TX13 VDD_19 U13
AJ29 R15 PEG_RXN13 C183 0.1U C_PEG_RXN13 AG26 1.8VFBDDQ
GND_39 GND_119 (6) PEG_RXN13 PEX_TX13#
AJ4 R18 PEG_RXP14 C209 0.1U C_PEG_RXP14 AK27 U14 C95 1U
GND_40 GND_120 (6) PEG_RXP14 PEX_TX14 VDD_20
AJ7 R19 PEG_RXN14 C208 0.1U C_PEG_RXN14 AJ27 U15 C83 1U 1.2V
GND_41 GND_121 (6) PEG_RXN14 PEX_TX14# VDD_21
AK2 R2 U18 C121 0.47U/10V
C GND_42 GND_122 PEG_RXP15 C185 0.1U C_PEG_RXP15 AJ28 VDD_22 C117 0.47U/10V C
AK28 GND_43 GND_123 R20 (6) PEG_RXP15 PEX_TX15 VDD_23 U19
AK31 R31 PEG_RXN15 C184 0.1U C_PEG_RXN15 AH27 V16 C69 0.47U/10V 2.5V
GND_44 GND_124 (6) PEG_RXN15 PEX_TX15# VDD_24
AL11 T16 V17 C70 0.47U/10V
GND_45 GND_125 PEG_TXP_C0 VDD_25 C102 0.47U/10V
AL14 GND_46 GND_126 T17 (6) PEG_TXP_C0 AK13 PEX_RX0 VDD_26 W13
AL19 T24 PEG_TXN_C0 AK14 W14 C73 0.47U/10V
GND_47 GND_127 (6) PEG_TXN_C0 PEX_RX0# VDD_27
AL22 T29 W16 C65 10U/4V
GND_48 GND_128 PEG_TXP_C1 VDD_28
AL25 GND_49 GND_129 T4 (6) PEG_TXP_C1 AM14 PEX_RX1 PCIE VDD_29 W17
AL3 U16 PEG_TXN_C1 AM15 W19
GND_50 GND_130 (6) PEG_TXN_C1 PEX_RX1# VDD_30
AL6 GND_51 GND_131 U17 VDD_31 Y13
AL9 U24 PEG_TXP_C2 AL15 Y14
GND_52 GND_132 (6) PEG_TXP_C2 PEX_RX2 VDD_32
AM13 U29 PEG_TXN_C2 AL16 Y16
GND_53 GND_133 (6) PEG_TXN_C2 PEX_RX2# VDD_33
AM16 GND_54 GND_134 U8 VDD_34 Y17
AM17 V13 PEG_TXP_C3 AK16 Y19
GND_55 GND_135 (6) PEG_TXP_C3 PEX_RX3 VDD_35
AM20 V14 PEG_TXN_C3 AK17 Y20
GND_56 GND_136 (6) PEG_TXN_C3 PEX_RX3# VDD_36
AM23 GND_57 GND_137 V15
AM26 V18 PEG_TXP_C4 AL17
GND_58 GND_138 (6) PEG_TXP_C4 PEX_RX4
AM29 V19 PEG_TXN_C4 AL18 P20
GND_59 GND_139 (6) PEG_TXN_C4 PEX_RX4# VDD_LP_0
VDD_LP_1 T20
B12 V2 PEG_TXP_C5 AM18 T23
GND_60 GND_140 (6) PEG_TXP_C5 PEX_RX5 VDD_LP_2
B15 V20 PEG_TXN_C5 AM19 U20 For 3.3V swing, we can remove R97,
GND_61 GND_141 (6) PEG_TXN_C5 PEX_RX5# VDD_LP_3
B18 GND_62 GND_142 V31 VDD_LP_4 U23 R104 and R98 and replace R? with 0 Ohm
B21 W15 PEG_TXP_C6 AK19 W20
GND_63 GND_143 (6) PEG_TXP_C6 PEX_RX6 VDD_LP_5 resistor.
B24 W18 PEG_TXN_C6 AK20
GND_64 GND_144 (6) PEG_TXN_C6 PEX_RX6#
B27 W27 N20 VDD_SENSE
GND_65 GND_145 VDD_SENSE T22
B3 W6 PEG_TXP_C7 AL20 M21 GND_SENSE VCC3
GND_66 GND_146 (6) PEG_TXP_C7 PEX_RX7 GND_SENSE T14
B30 Y15 PEG_TXN_C7 AL21
GND_67 GND_147 (6) PEG_TXN_C7 PEX_RX7#
B6 GND_68 GND_148 Y18

1
B9 Y29 PEG_TXP_C8 AM21
GND_69 GND_149 (6) PEG_TXP_C8 PEX_RX8
C2 Y4 PEG_TXN_C8 AM22 AC11 D2 R15
GND_70 GND_150 (6) PEG_TXN_C8 PEX_RX8# VDD33_0 VCC3
C31 AL10 AC12 *24.3K/F
GND_71 GND_151 PEG_TXP_C9 VDD33_1 C60 0.1U CH501H-40PT L-F
D10 GND_72 GND_152 AM10 (6) PEG_TXP_C9 AK22 PEX_RX9 VDD33_2 AC24
D13 AG13 PEG_TXN_C9 AK23 AD24 C64 0.1U C220 0.01U/50V/X7R/0603
(6) PEG_TXN_C9

2
B GND_73 GND_153 PEX_RX9# VDD33_3 C44 0.1U SPDIF_VGA B
D16 GND_74 VDD33_4 AE11 SPDIF (34)
D17 PEG_TXP_C10 AL23 AE12 C135 0.47U/10V PLACE NEAR GPU
GND_75 (6) PEG_TXP_C10 PEX_RX10 VDD33_5

1
D20 PEG_TXN_C10 AL24 H7 C115 0.47U/10V
GND_76 (6) PEG_TXN_C10 PEX_RX10# VDD33_6
D23 J7 C72 0.47U/10V D1 R17
GND_77 PEG_TXP_C11 VDD33_7 C48 1U *3.4K/F R16
D26 GND_78 (6) PEG_TXP_C11 AM24 PEX_RX11 VDD33_8 K7
D29 PEG_TXN_C11 AM25 L10 CH501H-40PT L-F *76.8/F
GND_79 (6) PEG_TXN_C11 PEX_RX11# VDD33_9
L7

2
PEG_TXP_C12 VDD33_10
(6) PEG_TXP_C12 AK25 PEX_RX12 VDD33_11 L8 180mA
U_GPU_G3 PEG_TXN_C12 AK26 M10
(6) PEG_TXN_C12 PEX_RX12# VDD33_12 L12 10nH
15mil VGA1.2V
PEG_TXP_C13 AL26
(6) PEG_TXP_C13 PEX_RX13
(6) PEG_TXN_C13
PEG_TXN_C13 AL27 PEX_RX13# PEX_PLLAVDD AF15 PEX_PLLAVDD C144 1U 0.1U C163
PEX_PLLDVDD AE15 PEX_PLLDVDD C152 0.01U
PEG_TXP_C14 AM27 AE16 C132 0.1U
(6) PEG_TXP_C14
PEG_TXN_C14 PEX_RX14 PEX_PLLGND 15mil C190 4.7U
(6) PEG_TXN_C14 AM28 PEX_RX14# 20mA
PEG_TXP_C15 AL28 L11 10nH PLACE NEAR GPU
(6) PEG_TXP_C15 PEX_RX15 VGA1.2V
PEG_TXN_C15 AL29 C164 1U
(6) PEG_TXN_C15 PEX_RX15# C136 0.01U 0.1U C186
C122 0.1U
CLK_PCIE_VGA AH14 15mil C165 4.7U
(2) CLK_PCIE_VGA PEX_REFCLK
CLK_PCIE_VGA# AJ14 T13 NV_PLLAVDD
(2) CLK_PCIE_VGA# PEX_REFCLK# NV_PLLAVDD R58 *0/F
VGA1.2V
R460 100
PLT_RST-R# VGA_RST# AH15 R54 0/F
(6,21) PLT_RST-R# PEX_RST# VGACORE
NC_0 AM8
NC_1 AM9
VGA_RFU0 AG12 B32 G73M: R58 10/24 modify
T51 RFU0 NC_2
R459 VGA_RFU1 AH13
T56 RFU1
*10K NB8X: R54
PEX_TSTCK AM12
A T180 PEX_TSTCLK_OUT A
PEX_TSTCK# AM11 J6 SPDIF_VGA
T177 PEX_TSTCLK_OUT# SPDIF

U_GPU_G3

Quanta Computer Inc.


PROJECT : PB2
Size Document Number Rev
A
VGA
Date: Friday, March 23, 2007 Sheet 19 of 46
5 4 3 2 1
5 4 3 2 1

Place near to Mini-door CKL:C1/C2: 18pF -> CL:12.5pF


RTC VCCRTC

20
C814 C1/C: 10pF -> CL Value =
1U/16V 8.5pF
VCCRTC
3VPCU
D24
CH500H-40 R558
20K C806 CLK_32KX1
VCCRTC_2 18P VCC3 VCC3

2
1
D23

1
R550 CH500H-40 C813 G1 Y6 R536
1K 1U/16V *SHORT_ PAD1 10M
R549 32.768KHZ R338 R567
D 1M/F U41A 10K 10K D

3
4
AG25 RTCX1 FWH0/LAD0 E5 LAD0 (31,38)
C807 CLK_32KX2 AF24 F5 RCIN#
RTCX2 FWH1/LAD1 LAD1 (31,38) VCCP
18P G8 GATEA20
FWH2/LAD2 LAD2 (31,38)
RTCRST# AF23 F6
RTCRST# FWH3/LAD3 LAD3 (31,38)
1

BT1 SM_INTRUDER# AD22 C4 VCCP


INTRUDER# FWH4/LFRAME# LFRAME# (31,38)
BAT_CONN

RTC
LPC
ICH_INTVRMEN AF25 G9 LDRQ#0
T110
2

DFHS02FS561 LAN100_SLP INTVRMEN LDRQ0# LDRQ#1 R294 R530


CNN P/N:DFHS02FS561 AD21 LAN100_SLP LDRQ1#/GPIO23 E6 T100
*56/F *56/F
LAN_JCLK B24 AF13 GATEA20
GLAN_CLK A20GATE GATEA20 (38)
BAT P/N:AHL03014003 T207 AG26 R300
A20M# H_A20M# (3)
LAN_RSTSYNC D22 56/F
T95 LAN_RSTSYNC H_DPRSTP#_R R531 0
DPRSTP# AF26 H_DPRSTP# (3,6)
LAN_RXD0 C21 AE26 H_DPSLP#_R R293 0
LAN_RXD0 DPSLP# H_DPSLP# (3)
T98 LAN_RXD1 B21
T204 LAN_RXD2 LAN_RXD1
C22 LAN_RXD2 FERR# AD24 H_FERR# (3)

LAN / GLAN
5VPCU T209
20MIL 20MIL LAN_TXD0 D21 AG29 R532 0
H_PWRGD (3)
Q17 T92 LAN_TXD1 LAN_TXD0 CPUPWRGD/GPIO49
E20 LAN_TXD1
R289 1.2K VCCRTC_1 R288 1K VCCRTC_3 3 1 T103 LAN_TXD2 C20 AF27
LAN_TXD2 IGNNE# H_IGNNE# (3)
T93
MMBT3904 AH21 AE24
GLAN_DOCK#/GPIO13 INIT# H_INIT# (3)
R277 T132 AC20 H_INTR (3)
2

INTR

CPU
+1.5V_PCIE R256 24.9/F GLAN_COMP_SB D25 AH14 RCIN#
GLAN_COMPI RCIN# RCIN# (38)
4.7K/F C25 GLAN_COMPO
NMI AD23 H_NMI (3)
ACZ_BCLK AJ16 AG28 H_SMI#_R R534 0
HDA_BIT_CLK SMI# H_SMI# (3)
ACZ_SYNC AJ15 HDA_SYNC
STPCLK# AA24 H_STPCLK# (3)
R262 ACZ_RST# AE14
C HDA_RST# H_THERMTRIP_R R283 24.9/F C
THRMTRIP# AE27 PM_THRMTRIP# (3,6)
15K ACZ_SDIN0 AJ17
(34) ACZ_SDIN0 HDA_SDIN0
ACZ_SDIN1 AH17 AA23
HDA_SDIN1 TP8 T118 PDD[15:0] (33)
T127 ACZ_SDIN2 AH15
T238 ACZ_SDIN3 HDA_SDIN2 PDD0

IHDA
AD13 HDA_SDIN3 DD0 V1
T124 U2 PDD1 Should be 2" close ICH7
ACZ_SDOUT DD1 PDD2
AE13 HDA_SDOUT DD2 V3
T1 PDD3 C537
DD3 PDD4
AE10 HDA_DOCK_EN#/GPIO33 DD4 V4
AG14 T5 PDD5 *SFI0603-050E101NP
VCC3 R551 10K T133 HDA_DOCK_RST#/GPIO34 DD5 PDD6
DD6 AB2
SATA_LED# AF10 T6 PDD7
(33) SATA_LED# SATALED# DD7
T3 PDD8
DD8 PDD9
(33) SATA_RXN0 AF6 SATA0RXN DD9 R2
AF5 T4 PDD10
(33) SATA_RXP0 SATA0RXP DD10
CKL:1n ~ 20nF C810 3900P/25V SATA_TXN0_C AH5 V6 PDD11 ACZ_SDOUT R328 33
(33) SATA_TXN0 SATA0TXN DD11 ACZ_SDOUT_AUDIO (34)
C811 3900P/25V SATA_TXP0_C AH6 V5 PDD12
(33) SATA_TXP0 SATA0TXP DD12
U1 PDD13
SATA_RXN2_C DD13 PDD14 C572
AG3 SATA1RXN DD14 V2
T224 SATA_RXP2_C AG4 U6 PDD15 *10P/50V
SATA_TXN2_C SATA1RXP DD15

IDE
CKL:1n ~ 20nF T227 AJ4 SATA1TXN PDA[2:0] (33)
T243 SATA_TXP2_C AJ3 AA4 PDA0
T228 SATA1TXP DA0 PDA1
DA1 AA1

SATA
AF2 AB3 PDA2
T223 SATA2RXN DA2 ACZ_SYNC R560 33
AF1 SATA2RXP ACZ_SYNC_AUDIO (34)
T222 AE4 Y6
SATA2TXN DCS1# PDCS1# (33)
T130 AE3 Y5
SATA2TXP DCS3# PDCS3# (33)
T220 C816
AB7 W4 *10P/50V
(2) CLK_PCIE_SATA# SATA_CLKN DIOR# PDIOR# (33)
(2) CLK_PCIE_SATA AC6 SATA_CLKP DIOW# W3 PDIOW# (33)
DDACK# Y2 PDDACK# (33)
AG1 Y3 IRQ14
B SATARBIAS# IDEIRQ IRQ14 (33) B
R535 24.9/F SATA_BIAS AG2 Y1
SATARBIAS IORDY PIORDY (33)
Place within DDREQ W5 PDDREQ (33)
25mils/15mils
500 mils of ICH8M REV 1.0
ICH7 ACZ_BCLK R561 33
BIT_CLK_AUDIO (34)
ICH8M P/N:AJ0QM740T40 C815
C812 R571 *10P/50V
*10P/50V *0/F
XOR Chain Entrance Strap
ICH8-M Internal VR Enable SB Strap
strap ICH_RSV0 HDA_SDOUT Description
(Internal VR for ICH8-M LAN100_SLP Strap C824
*10P/50V
Vccsus1_05,VccSus1_5 and (Internal VR for VccLAN1_05 and 0 0 RSVD
VccCL1_5) VccCL1.05)
Low = Internal VR disable 0 1 Enter XOR Chain
Low = Internal VR disable LAN100_SLP High = Internal VR
INTVRMEN High = Internal VR enable(Default)
enable(Default) 1 0 Normal opration(Default)
ACZ_RST# R559 33
ACZ_RST#_AUDIO (34)
1 1 Set PCIE port config bit 1

VCCRTC VCCRTC VCC3

A A
R324 R321 R540
332K/F 332K/F *1K

ICH_INTVRMEN LAN100_SLP ACZ_SDOUT


ICH_TP3 (22)

R316
*0
R301
*0
Quanta Computer Inc.
R319
*1K PROJECT : PB2
Size Document Number Rev
A
ICH8_M
Date: Friday, March 23, 2007 Sheet 20 of 46
5 4 3 2 1
5 4 3 2 1

VCC3

MINI CARD PCI-E


(31)
(31)
(31)
(31)
PCIE_RXN0
PCIE_RXP0
PCIE_TXN0
PCIE_TXP0
C507
C513
.1U/10V
.1U/10V
PCIE_TXN0_C
PCIE_TXP0_C
P27
P26
N29
N28
U41D
PERN1
PERP1
PETN1
DMI0RXN
DMI0RXP
DMI0TXN
V27
V26
U29
U28
DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0
(6)
(6)
(6)
(6)
REQ2#
STOP#
FRAME#
6
7
8
RP54
5
4
3
REQ1#
INTG#
21

Direct Media Interface


PETP1 DMI0TXP DEVSEL# REQ3#
9 2
M27 Y27 VCC3 10 1 INTD#
(28) PCIE_RXN1 PERN2 DMI1RXN DMI_RXN1 (6)
(28) PCIE_RXP1 M26 PERP2 DMI1RXP Y26 DMI_RXP1 (6)
C503 .1U/10V PCIE_TXN1_C 8.2KX8
EXPRESS CARD(NEW CARD) (28) PCIE_TXN1
C495 .1U/10V PCIE_TXP1_C
L29
L28
PETN2 DMI1TXN W29
W28
DMI_TXN1 (6)
VCC3
(28) PCIE_TXP1 PETP2 DMI1TXP DMI_TXP1 (6)
RP53

PCI-Express
PCIE_RXN5 K27 AB26
(33) PCIE_RXN5 PERN3 DMI2RXN DMI_RXN2 (6)
PCIE_RXP5 K26 AB25 TRDY# 6 5
D (33) PCIE_RXP5 PERP3 DMI2RXP DMI_RXP2 (6) D
PCIE_TXN5 C490 .1U/10VPCIE_TXN5_C IRDY#
E-SATA (33) PCIE_TXN5
PCIE_TXP5 C484 .1U/10VPCIE_TXP5_C
J29
J28
PETN3 DMI2TXN AA29
AA28
DMI_TXN2 (6)
INTE#
7
8
4
3 SERR#
(33) PCIE_TXP5 PETP3 DMI2TXP DMI_TXP2 (6)
INTA# 9 2 LOCK#
PCIE_RXN3 H27 AD27 VCC3 10 1 PERR#
(31) PCIE_RXN3 PERN4 DMI3RXN DMI_RXN3 (6)
PCIE_RXP3 H26 AD26 VCC1.5
(31) PCIE_RXP3 PERP4 DMI3RXP DMI_RXP3 (6)
PCIE_TXN3 C479 .1U/10VPCIE_TXN3_C 8.2KX8
TV CARD (31) PCIE_TXN3
PCIE_TXP3 C473 .1U/10VPCIE_TXP3_C
G29
G28
PETN4 DMI3TXN AC29
AC28
DMI_TXN3 (6)
VCC3
(31) PCIE_TXP3 PETP4 DMI3TXP DMI_TXP3 (6)
RP52
T106 PCIE_RXN4 F27 T26 Place within 500
PERN5 DMI_CLKN CLK_PCIE_ICH# (2)
T107 PCIE_RXP4 F26 T25 R279 mils of ICH7 INTF# 6 5
PERP5 DMI_CLKP CLK_PCIE_ICH (2)
T211 PCIE_TXN4 E29 24.9/F 7 4 INTB#
T212 PCIE_TXP4 PETN5 INTC#
E28 PETP5 DMI_ZCOMP Y23 15/15mils 8 3
Y24 DRI_IRCOMP_R 0.1U C516 9 2 REQ0#
DMI_IRCOMP INTH#
(32) PCIE_RXN2_LAN D27 PERN6/GLAN_RXN VCC3 10 1
(32) PCIE_RXP2_LAN D26 PERP6/GLAN_RXP USBP0N G3 USBP0- (29)
C463 .1U/10V PCIE_TXN2_C C29 G2 USB Connector 8.2KX8
(32) PCIE_TXN2_LAN PETN6/GLAN_TXN USBP0P USBP0+ (29)
C464 .1U/10V PCIE_TXP2_C
PCIE-LAN (32) PCIE_TXP2_LAN C28 PETP6/GLAN_TXP USBP1N H5
H4
USBP1- (29)
USB Connector
USBP1P USBP1+ (29)
T96 C23 H2
SPI_CLK USBP2N USBP2- (29)
T205 B23 H1 USB Connector
SPI_CS0# USBP2P USBP2+ (29) RP49
T102 SPI_CS1# E22 J3
SPI_CS1# USBP3N USBP3- (29)

SPI
J2 USB Connector USBOC#2 6 5
USBP3P USBP3+ (29)
T105 D23 K5 USBOC#4 7 4 USBOC#1
SPI_MOSI USBP4N USBP4- (30)
F21 K4 BLUETOOTH USBOC#6 8 3 USBOC#7
SPI_MISO USBP4P USBP4+ (30)
T108 K2 USBP5- T213 USBOC#3 9 2 USBOC#0
T237 USBOC#0 USBP5N USBP5+ T214 USBOC#5
AJ19 OC0# USBP5P K1 Fingerprint 3VSUS 10 1
T236 USBOC#1 AG16 L3
OC1#/GPIO40 USBP6N USBP6- (25)
T235 USBOC#2 Carama USB
T125 USBOC#3
AG15
AE15
OC2#/GPIO41 USB USBP6P L2
M5
USBP6+ (25) 10P8R-10K
OC3#/GPIO42 USBP7N USBP7- (31)
C T129 USBOC#4 AF15 M4 WLAN C
OC4#/GPIO43 USBP7P USBP7+ (31)
T136 USBOC#5 AG17 M2 USBOC#8 R546 10K 3VSUS
OC5#/GPIO29 USBP8N USBP8- (31)
T126 USBOC#6 AD12 M1 TV
OC6#/GPIO30 USBP8P USBP8+ (31)
T231 USBOC#7 AJ18 N3 USBOC#9 R315 10K 3VSUS
OC7#/GPIO31 USBP9N USBP9- (28)
T120 USBOC#8 AD14 N2 NEW CARD
OC8# USBP9P USBP9+ (28)
T244 USBOC#9 AH18 OC9#
USBRBIAS# F2
F3 USB_RBIAS_PN CHECK LIST suggest pull up 10k
USBRBIAS
ICH8M REV 1.0 25mils/15mils
Place within 500 R515 A16 SWAP Override strap
mils of ICH7 22.6/F

PCI_GNT#3 Low = A16 swap override enabled


High = Default

GNT3# R252 *1K


U41B
(26) AD[0..31]
AD0 D20 A4 REQ0#
AD0 REQ0# REQ0# (26)
AD1 GNT0# ICH8 Boot BIOS select
AD2
E19
D19
AD1 PCI GNT0# D7
E18 REQ1# T142
GNT0# (26)
AD3 AD2 REQ1#/GPIO50 GNT1# T143
A20 AD3 GNT1#/GPIO51 C18
AD4 D17 B19 REQ2# T210 PCI_GNT#0 SPI_CS#1 Boot BIOS Location
AD5 AD4 REQ2#/GPIO52 GNT2# T104
A21 AD5 GNT2#/GPIO53 F18
AD6 A19 A11 REQ3# T208
AD7 AD6 REQ3#/GPIO54 GNT3# T97 0 1 SPI(Default)
C19 AD7 GNT3#/GPIO55 C10
AD8 A18
AD9 AD8
B
B16 AD9 C/BE0# C17 C/BE0# (26) B
AD10 A12 E15 1 0 PCI
AD10 C/BE1# C/BE1# (26)
AD11 E16 F16
AD11 C/BE2# C/BE2# (26)
AD12 A14 E17
AD12 C/BE3# C/BE3# (26)
AD13 G16 1 1 LPC
AD14 AD13 IRDY#
A15 AD14 IRDY# C8 IRDY# (26)
AD15 B6 D9
AD15 PAR PAR (26)
AD16 C11 G6 SPI_CS1# R257 *1K
AD16 PCIRST# PCIRST# (26,38)
AD17 A9 D16 DEVSEL#
AD17 DEVSEL# DEVSEL# (26)
AD18 D11 A7 PERR# GNT0# R251 *1K
AD18 PERR# PERR# (26)
AD19 B12 B7 LOCK#
AD20 AD19 PLOCK# SERR#
C12 AD20 SERR# F10 SERR# (26)
AD21 D10 C16 STOP#
AD21 STOP# STOP# (26)
AD22 C7 C9 TRDY#
AD22 TRDY# TRDY# (26)
AD23 F13 A17 FRAME#
AD23 FRAME# FRAME# (26)
AD24 E11
AD25 AD24 PLT_RST-R#
E13 AD25 PLTRST# AG24 PLT_RST-R# (6,19)
AD26 E12 B10 PCLK_ICH
AD26 PCICLK PCLK_ICH (2)
AD27 D8 G7 VCC3
AD27 PME# PCI_PME# (26)
AD28 A6
AD29 AD28
E8 AD29
AD30 D6
AD31 AD30
A3 AD31 C587

INTA# F9
Interrupt I/F F8 INTE# 0.1U/16V
(26) INTA# PIRQA# PIRQE#/GPIO2
INTB# B5 G11 INTF# U18
(26) INTB# PIRQB# PIRQF#/GPIO3
5

INTC# C5 F12 INTG# T94


INTC# PIRQC# PIRQG#/GPIO4
INTD# A10 B3 INTH# T206 PLT_RST-R# 2
INTD# PIRQD# PIRQH#/GPIO5
4 PLTRST# (22,28,31,32,33)
A ICH8M REV 1.0 1 A

TC7SH08FU Don't connect to PCI device / Express card


3

PCLK_ICH R249 *0 C468 *33P/50V


Quanta Computer Inc.
PROJECT : PB2
for EMI request Size Document Number Rev
A
ICH8_M
Date: Friday, March 23, 2007 Sheet 21 of 46
5 4 3 2 1
5 4 3 2 1

RVCC3 VCC3

(40) VR_PWRGD_CK410#
1
2
U16
5
VCC3

C568 0.1U PCLK_SMB


PDAT_SMB
R325
R332
2.2K
2.2K
RVCC3

SMB_LINK_ALERT# R341 10K


RVCC3
RI#
DNBSWON#
SYS_RST#-1
SMB_ALERT#
KBSMI#_R
R556
R509
R562
R568
R563
8.2K
10K
10K
10K
10K
CLKRUN#
SERIRQ
SCI#_R
PM_RSMRST#_R
R317
R566
R330
R580
8.2K
8.2K
10K
10K
22
3 4 VR_PWRGD_CK410 PCIE_WAKE# R297 1K SMLINK0 R339 10K
SMLINK1 R340 10K
NL17SZ14DFT2G SWI#_R R557 10K RVCC3

D these pin if unused require 8.2k to D


10k pull-up to +3v 3/19 Modify:
U41C
PCLK_SMB AJ26 AJ12 BOARD_ID1 R519 *10K
High(R545): Enable CIR
(2,28,31) PCLK_SMB SMBCLK SATA0GP/GPIO21
PDAT_SMB BOARD_ID0
(2,28,31) PDAT_SMB
SMB_LINK_ALERT#
AD19 SMBDATA SATA1GP/GPIO19 AJ10
R545 8.2K VCC3
Low(R519): Disable CIR

SATA
AG21 AF11

GPIO
T141 LINKALERT# SATA2GP/GPIO36

SMB
SMLINK0 AC17 AG11 R565 8.2K VCC3
T139 SMLINK1 SMLINK0 SATA3GP/GPIO37
T140 AE19 SMLINK1
AG9 14M_ICH
CLK14 14M_ICH (2)
RI# CLKUSB_48

Clocks
T138 AF17 RI# CLK48 G5 CLKUSB_48 (2)
T101 F4 D3 T99
SYS_RST# R543 0 SYS_RST#-1 SUS_STAT#/LPCPD# SUSCLK
(3) SYS_RST# AD15 SYS_RESET#
AG23 R333 100/F
SLP_S3# SUSB# (38)
R544 0 AG12 AF21 R334 100/F
(6) PM_BMBUSY# BMBUSY#/GPIO0 SLP_S4# SUSC# (38)
SLP_S5# AD18
SMB_ALERT# AG22 T117
T245 SMBALERT#/GPIO11
S4_STATE#/GPIO26 AH27 check list -- 100k
R312 0 PM_STPPCI_ICH# T225

GPIO
(2) PM_STPPCI# AE20 STP_PCI#/GPIO15 pull-down to gnd

SYS
R311 0 PM_STPCPU_ICH# AG18 AE23 ICH_PWROK R555 *100K
(2) PM_STPCPU# STP_CPU#/GPIO25 PWROK
CLKRUN# AH11 AJ14 DPRSLPVR-ICH R508 100/F DPRSLPVR
(26) CLKRUN# CLKRUN#/GPIO32 DPRSLPVR/GPIO16 DPRSLPVR (6,40)

Power MGT
close to ICH PCIE_WAKE# AE17 AE21 PM_BATLOW#_R R548 0 LAN_RST pin : 1.if used pci
(28,31,32) PCIE_WAKE# WAKE# BATLOW# PM_BATLOW# (38)
SERIRQ AF12 DNBSWON#
(26,38) SERIRQ SERIRQ DNBSWON# (38) LAN please tie to PLTRST#
AC13 C2 C826 *0.1U
THRM# PWRBTN# R584 *100/F
(15,30) THERM_ALERT# 1 2 LAN_REST (38) 2.if used PHY LAN please tie
C R290 0 VR_PWRGD_CK410 AJ20 AH20 PLTRST_LAN# R587 100/F C
VRMPWRGD LAN_RST# PLTRST# (21,28,31,32,33) to RSMRST#
VCC3 R282 8.2K
AJ22 AG27 PM_RSMRST#_R R586 100/F RSMRST#
T233 TP7 RSMRST# RSMRST# (38)
AJ8 E1 R513 0
T241 TACH1/GPIO1 CK_PWRGD CK_PWG (2)
KBSMI# R539 0 KBSMI#_R AJ9
(38) KBSMI# TACH2/GPIO6
SCI# R327 0 SCI#_R AH9 E3 R511 0
(38) SCI# TACH3/GPIO7 CLPWROK ECPWROK (6,15,38)
SWI# R547 0 SWI#_R AE16
(38) SWI# GPIO8
AC19 AJ25 SUSM# RVCC3 VCC3
T119 GPIO12 SLP_M#
AG8 T232
T230 TACH0/GPIO17
T137 AH12 GPIO18 CL_CLK0 F23 CL_CLK0 (6)
(25) LCD_ON AE11 GPIO20 CL_CLK1 AE18 ICH_CL_CLK1 (31)

GPIO
Controller Link
T239 AG10 SCLOCK/GPIO22
AH25 F22 R554 R226
T240 QRT_STATE0/GPIO27 CL_DATA0 CL_DATA0 (6)
AD16 AF19 3.24K/F 3.24K/F
T114 QRT_STATE1/GPIO28 CL_DATA1 ICH_CL_DATA1 (31)
T128 AG13 SATACLKREQ#/GPIO35
AF9 D24 CL_VREF0_SB
T134 SLOAD/GPIO38 CL_VREF0
AJ11 AH23 CL_VREF1_SB
T234 SDATAOUT0/GPIO39 CL_VREF1
T123 AD10 SDATAOUT1/GPIO48
CL_RST# AJ23 CL_RST#0 (6,31)
AD9 C459
(34) ACZ_SPKR SPKR
AJ27 C809 R230
MEM_LED/GPIO24

MISC
R329 0 MCH_ICH_SYNC#_R AJ13 AJ24 T229 R541 453/F 0.1U
(6) MCH_ICH_SYNC# MCH_SYNC# ME_EC_ALERT/GPIO10
AF22 T242 453/F 0.1U
EC_ME_ALERT/GPIO14 T131
(20) ICH_TP3 AJ21 TP3 WOL_EN/GPIO9 AG19
VCC3 R320 *10K T135
ICH8M REV 1.0
Controller Link 0
B
Controller Link 1 VREF for IAMT B
3VSUS
VREF for IAMT support only
CRB STUFF support only
No Reboot strap 2K%1 C825 .047U/10V

Low = Default VCC3 R574 2K/F


HDA_SPKR High = No
5

Reboot U44
(6,40) DELAY_VR_PWRGOOD 2
4 ICH_PWROK
(6,15,38) ECPWROK 1
VCC3
TC7SH08FU R573
3

R585 100K
ACZ_SPKR R292 10K 10K

VCC3 VCC3

PB2 PB2A
R553 R552
PM+NB8M PM+NB8P
*10K *10K Board ID (0:0) (0:1)
A A
BOARD_ID0 BOARD_ID1 R564 R564
ID0 Stuff Stuff
R323
R564 10K
10K
R323 R552 Quanta Computer Inc.
ID1 Stuff Stuff
PROJECT : PB2
Size Document Number Rev
A
ICH8_M
Date: Friday, March 23, 2007 Sheet 22 of 46
5 4 3 2 1
5 4 3 2 1

3VPCU VCC3
VCCRTC
C556 C575 C576 VCCP
23

2
D8 D11
1U 0.1U 0.1U U41F
AD25 A13 +1.05V_SB R504 0
PDZ5.6B PDZ5.6B VCCRTC VCC1_05[01]
VCC1_05[02] B13
A16 C13

1
U41E R263 10 VCC5 R278 100/F +5VREF_SB V5REF[1] VCC1_05[03] C487 C492
5VPCU T7 V5REF[2] VCC1_05[04] C14
A23 VSS[001] VSS[099] K7 VCC1_05[05] D14
A5 L1 C478 C514 +5VREF_SUS_SB G4 E14 .047U/10V .022U
VSS[002] VSS[100] V5REF_SUS VCC1_05[06]
AA2 VSS[003] VSS[101] L13 VCC1_05[07] F14
AA7 L15 0.1U 0.1U AA25 G14
VSS[004] VSS[102] VCC1_5_B[01] VCC1_05[08]
A25 VSS[005] VSS[103] L26 AA26 VCC1_5_B[02] VCC1_05[09] L11
AB1 L27 AA27 L12 VCC1.5
VSS[006] VSS[104] VCC1_5_B[03] VCC1_05[10]
D AB24 VSS[007] VSS[105] L4 AB27 VCC1_5_B[04] VCC1_05[11] L14 D
AC11 L5 AB28 L16 VCCDMIPLL_ICH R287 0
VSS[008] VSS[106] +1.5V_PCIE VCC1_5_B[05] VCC1_05[12]
AC14 VSS[009] VSS[107] M12 AB29 VCC1_5_B[06] VCC1_05[13] L17
AC25
AC26
VSS[010] VSS[108] M13
M14 L26
80 mils D28
D29
VCC1_5_B[07] VCC1_05[14] L18
M11 C517 C524
VSS[011] VSS[109] VCC1_5_B[08] VCC1_05[15]

CORE
AC27 VSS[012] VSS[110] M15 VCC1.5 E25 VCC1_5_B[09] VCC1_05[16] M18
AD17 M16 E26 P11 0.01U 10U
VSS[013] VSS[111] MNB-201209-0030 VCC1_5_B[10] VCC1_05[17]
AD20 VSS[014] VSS[112] M17 E27 VCC1_5_B[11] VCC1_05[18] P18
AD28 M23 C447 + C522 C456 C505 F24 T11
VSS[015] VSS[113] 220U/2.5V VCC1_5_B[12] VCC1_05[19] VCC1.25
AD29 VSS[016] VSS[114] M28 F25 VCC1_5_B[13] VCC1_05[20] T18
AD3 M29 22U/6.3V 22U/6.3V 2.2U G24 U11
VSS[017] VSS[115] CC3528 VCC1_5_B[14] VCC1_05[21]
AD4 VSS[018] VSS[116] M3 H23 VCC1_5_B[15] VCC1_05[22] U18
AD6 N1 VCC1.5 H24 V11 +1.25V_DMI R286 0 VCCP
VSS[019] VSS[117] VCC1_5_B[16] VCC1_05[23]
AE1 VSS[020] VSS[118] N11 J23 VCC1_5_B[17] VCC1_05[24] V12
AE12 VSS[021] VSS[119] N12 J24 VCC1_5_B[18] VCC1_05[25] V14
AE2 N13 K24 V16 C531 R298 0
VSS[022] VSS[120] VCC1_5_B[19] VCC1_05[26]
AE22
AD1
VSS[023] VSS[121] N14
N15
60 mils K25
L23
VCC1_5_B[20] VCC1_05[27] V17
V18 22U/6.3V
VSS[024] VSS[122] VCC1_5_B[21] VCC1_05[28]
AE25 VSS[025] VSS[123] N16 100mA L24 VCC1_5_B[22]
C546 C549

VCCA3GP
AE5 N17 R322 0 +1.5V_SATA L25 R29 C539
VSS[026] VSS[124] VCC1_5_B[23] VCCDMIPLL 0.1U 0.1U 4.7U
AE6 VSS[027] VSS[125] N18 M24 VCC1_5_B[24]
AE9 N26 C540 C542 M25 AE28
VSS[028] VSS[126] VCC1_5_B[25] VCC_DMI[1] +1.05V_V_CPU_IO
AF14 VSS[029] VSS[127] N27 N23 VCC1_5_B[26] VCC_DMI[2] AE29
AF16 N4 10U 1U N24 VCC3
VSS[030] VSS[128] VCC1_5_B[27]
AF18 VSS[031] VSS[129] N5 N25 VCC1_5_B[28] V_CPU_IO[1] AC23
AF3 VSS[032] VSS[130] N6 P24 VCC1_5_B[29] V_CPU_IO[2] AC24
AF4
AG5
VSS[033] VSS[131] P12
P13
P25
R24
VCC1_5_B[30]
AF29 +V3.3_DMI_ICH
40 mils R291 0
VSS[034] VSS[132] VCC1_5_B[31] VCC3_3[01]
AG6 VSS[035] VSS[133] P14 R25 VCC1_5_B[32]
AH10 VSS[036] VSS[134] P15 R26 VCC1_5_B[33] VCC3_3[02] AD2
AH13 VSS[037] VSS[135] P16 R27 VCC1_5_B[34]
AH16 VSS[038] VSS[136] P17 T23 VCC1_5_B[35] VCC3_3[03] AC8
AH19 P23 T24 AD8

VCCP_CORE
VSS[039] VSS[137] VCC1_5_B[36] VCC3_3[04] C799 C541
AH2 VSS[040] VSS[138] P28 T27 VCC1_5_B[37] VCC3_3[05] AE8
C
AF28 VSS[041] VSS[139] P29 T28 VCC1_5_B[38] VCC3_3[06] AF8 C
AH22 R11 T29 0.1U 0.1U
VSS[042] VSS[140] C536 VCC1_5_B[39]
AH24 VSS[043] VSS[141] R12 U24 VCC1_5_B[40] VCC3_3[07] AA3
AH26 VSS[044] VSS[142] R13 U25 VCC1_5_B[41] VCC3_3[08] U7
AH3 R14 1U V23 V7 C797
VSS[045] VSS[143] VCC1_5_B[42] VCC3_3[09]
AH4 VSS[046] VSS[144] R15 V24 VCC1_5_B[43] VCC3_3[10] W1
AH8 R16 V25 W6 0.1U

IDE
VSS[047] VSS[145] VCC1_5_B[44] VCC3_3[11]
AJ5 VSS[048] VSS[146] R17 W25 VCC1_5_B[45] VCC3_3[12] W7
B11 VSS[049] VSS[147] R18 Y25 VCC1_5_B[46] VCC3_3[13] Y7
B14 VSS[050] VSS[148] R28
B17 VSS[051] VSS[149] R4 AJ6 VCCSATAPLL VCC3_3[14] A8
B2 VSS[052] VSS[150] T12 VCC3_3[15] B15
B20 VSS[053] VSS[151] T13 AE7 VCC1_5_A[01] VCC3_3[16] B18
B22 T14 C496 AF7 B4
VSS[054] VSS[152] VCC1_5_A[02] VCC3_3[17]

ARX
B8 VSS[055] VSS[153] T15 AG7 VCC1_5_A[03] VCC3_3[18] B9
C24 T16 1U AH7 C15 C469 C472 C486
VSS[056] VSS[154] VCC1_5_A[04] VCC3_3[19]
C26 T17 AJ7 D13

PCI
VSS[057] VSS[155] VCC1_5_A[05] VCC3_3[20] 0.1U 0.1U 0.1U
C27 VSS[058] VSS[156] T2 VCC3_3[21] D5
C6 VSS[059] VSS[157] U12 AC1 VCC1_5_A[06] VCC3_3[22] E10
D12 VSS[060] VSS[158] U13 AC2 VCC1_5_A[07] VCC3_3[23] E7

ATX
D15 VSS[061] VSS[159] U14 AC3 VCC1_5_A[08] VCC3_3[24] F11
D18 VSS[062] VSS[160] U15 AC4 VCC1_5_A[09]
D2 U16 AC5 AC12 +3V_1.5V_HDA_IO_ICH R295 0 VCC3
VSS[063] VSS[161] VCC1_5_A[10] VCCHDA
D4 VSS[064] VSS[162] U17
E21 U23 AC10 AD11 +VCCSUSHDA R296 0 RVCC3 C547
VSS[065] VSS[163] VCC1_5_A[11] VCCSUSHDA
E24 VSS[066] VSS[164] U26 AC9 VCC1_5_A[12]
E4 U27 J6 TP_VCCSUS1_05_ICH_1 C543 Can be connect to 0.1U Can be connect to
VSS[067] VSS[165] VCCSUS1_05[1] TP_VCCSUS1_05_ICH_2 +3V_S5 or +3V or +1.5V
E9 VSS[068] VSS[166] U3 AA5 VCC1_5_A[13] VCCSUS1_05[2] AF20
F15 U5 AA6 0.1U +1.5V_S5
VSS[069] VSS[167] VCC1_5_A[14] TP_VCCSUS1_5_ICH_1
E23 VSS[070] VSS[168] V13 VCCSUS1_5[1] AC16
F28 VSS[071] VSS[169] V15 G12 VCC1_5_A[15]
F29 V28 C784 G17 J7 TP_VCCSUS1_5_ICH_2 RVCC3
VSS[072] VSS[170] VCC1_5_A[16] VCCSUS1_5[2]
F7 VSS[073] VSS[171] V29 H7 VCC1_5_A[17]
G1 W2 0.1U C3 +V3.3A_ICH R523 0
VSS[074] VSS[172] VCCSUS3_3[01]
E2 VSS[075] VSS[173] W26 AC7 VCC1_5_A[18]
B G10 VSS[076] VSS[174] W27 AD7 VCC1_5_A[19] VCCSUS3_3[02] AC18 B
G13 Y28 AC21 C548 C545
VSS[077] VSS[175] VCCSUS3_3[03]
G19 Y29 D1 AC22

VCCPSUS
VSS[078] VSS[176] VCCUSBPLL VCCSUS3_3[04] 0.1U .022U
G23 VSS[079] VSS[177] Y4 VCCSUS3_3[05] AG20
G25 VSS[080] VSS[178] AB4 F1 VCC1_5_A[20] VCCSUS3_3[06] AH28

USB CORE
G26 VSS[081] VSS[179] AB23 L6 VCC1_5_A[21]
G27 AB5 C786 L7 P6
VSS[082] VSS[180] VCC1_5_A[22] VCCSUS3_3[07]
H25 VSS[083] VSS[181] AB6 M6 VCC1_5_A[23] VCCSUS3_3[08] P7
H28 AD5 0.1U M7 C1
VSS[084] VSS[182] VCC1_5_A[24] VCCSUS3_3[09]
H29 VSS[085] VSS[183] U4 VCCSUS3_3[10] N7
H3 VSS[086] VSS[184] W24 W23 VCC1_5_A[25] VCCSUS3_3[11] P1
H6 VSS[087] VCCSUS3_3[12] P2
J1 A1 TP_VCCLAN1_05_ICH_1 F17 P3

VCCPUSB
VSS[088] VSS_NCTF[01] TP_VCCLAN1_05_ICH_2 VCCLAN1_05[1] VCCSUS3_3[13] C792
J25 VSS[089] VSS_NCTF[02] A2 G18 VCCLAN1_05[2] VCCSUS3_3[14] P4
J26 A28 P5 4.7U TP_VCCLAN1_05_ICH_1 C493 0.1U/16V
VSS[090] VSS_NCTF[03] VCC3 R269 0 +3V_VCCLAN VCCSUS3_3[15] TP_VCCLAN1_05_ICH_2 C494 0.1U/16V
J27 VSS[091] VSS_NCTF[04] A29 F19 VCCLAN3_3[1] VCCSUS3_3[16] R1
J4 VSS[092] VSS_NCTF[05] AH1 G20 VCCLAN3_3[2] VCCSUS3_3[17] R3
J5 AH29 C491 R5 TP_VCCSUS1_05_ICH_1 C497 0.1U/16V
VSS[093] VSS_NCTF[06] +1.5V_VCCGLANPLL VCCSUS3_3[18] TP_VCCSUS1_05_ICH_2 C569 0.1U/16V
K23 VSS[094] VSS_NCTF[07] AJ1 A24 VCCGLANPLL VCCSUS3_3[19] R6
K28 AJ2 0.1U
VSS[095] VSS_NCTF[08]

GLAN POWER
K29 AJ28 A26 G22 TP_VCCCL1_05_ICH TP_VCCSUS1_5_ICH_1 T113
VSS[096] VSS_NCTF[09] VCCGLAN1_5[1] VCCCL1_05 TP_VCCSUS1_5_ICH_2 T121
K3 VSS[097] VSS_NCTF[10] AJ29 A27 VCCGLAN1_5[2]
K6 B1 B26 A22 VCCCL1_5_INT_ICH TP_VCCCL1_05_ICH T112
VSS[098] VSS_NCTF[11] R503 0 VCCGLAN1_5[3] VCCCL1_5
VSS_NCTF[12] B29 VCC1.5 B27 VCCGLAN1_5[4]
B28 F20 +V3.3M_ICH C467 C460
ICH8M REV 1.0 C773 C774 VCCGLAN1_5[5] VCCCL3_3[1]
10/19 Modify Del L40 B25
VCCCL3_3[2] G21
1U 0.1U
10U 2.2U VCCGLAN3_3
ICH8M REV 1.0

+1.5V_PCIE R266 0 VCC3

C515 VCC3 R267 0 +3V_GLAN


A A
4.7U

Quanta Computer Inc.


PROJECT : PB2
Size Document Number Rev
A
ICH8_M
Date: Friday, March 23, 2007 Sheet 23 of 46
5 4 3 2 1
5 4 3 2 1

VCC3 VCC5
For EMI
DVI-I 24
Modify 11/28
R46 R52
2.2K
CN7

2
10K R73 10
D (14) DVI_TX2- 1 1 D
DVIDAT 1 3 DVI_DDCDATA 2
(6,14) DVIDAT (14) DVI_TX2+ 2
3 C1 CRT_R1
3 C1
4 4
2N7002E-T1-E3 5 C2 CRT_G1
VCC3 DVI_DDCCLK 5 C2
Q4 6 6
VCC5 DVI_DDCDATA 7 C3 CRT_B1
VSYNC1 7 C3
8 8
(14) DVI_TX1- 9 9
R50 10
(14) DVI_TX1+ 10
2.2K R55 R74 10 11 11
12 12

2
10K 13 C4 HSYNC1
CRT_VCC 13 C4
14 14
DVICLK 1 3 DVI_DDCCLK 15
(6,14) DVICLK 15
DVI_DET R44 10K 16 C5
16 C5
(14) DVI_TX0- 17 17
2N7002E-T1-E3 18
(14) DVI_TX0+ 18
Q5 R63 10 19 19
20 20
21 21
R51 10 22 22
(14) DVI_CLK+ 23 23
(14) DVI_CLK- 24 24

25
26
27
28
29
30
DVI-I_CNN dvi-070939fr029s237pr-c-30p-v

25
26
27
28
29
30
DVI_DET P/N:DFDS29FR019
(15) DVI_DET
C C

Activate: H 1/3 Modify


R47

*100K

VCC5
5

C160 .1U/10V
U5

2 4 VSYNC1
(6,14) VSYNC_COM
AHCT1G125DCH PTC:DK100TPU028
5

VCC3 VCC3 VCC3 CRT_VCC


U4 AHCT1G125DCH
DKZ00TFU101
D6

1
2 4 HSYNC1 F1
(6,14) HSYNC_COM
UMT_213-3-1_3 D4 D3 D5 1 2 1 2 VCC5
3 DA204U 3 DA204U 3 DA204U
POLY_SWITCH RC1206
CH501H
B B
C107

2
0.1U

CN6

16
*CRT_CONN

6
L7 MLB-160808-0070B-N3 CRT_R1 1 11
(6,14) CRT_R
7
L6 MLB-160808-0070B-N3 CRT_G1 2 12 DVI_DDCDATA
(6,14) CRT_G
8
L9 MLB-160808-0070B-N3 CRT_B1 3 13 HSYNC1
(6,14) CRT_B
9
C39 C28 C43 4 14 VSYNC1
R31 R27 R36 10
C61 C27 C41 5 15 DVI_DDCCLK
150/F 150/F 150/F
5.6P 5.6P 5.6P 5.6P 5.6P 5.6P P/N:DFDS15FR084

17
A A

Quanta Computer Inc.


PROJECT : PB2
Size Document Number Rev
A
DVI/CRT
Date: Friday, March 23, 2007 Sheet 24 of 46
5 4 3 2 1
1 2 3 4 5 6 7 8

25
PANEL VCC CONTROL
VCC3 LID LCD CONNECTOR L15
2A LCDVCC 1 2 VIN
Q12 ACB2012L-120
A C266 A
CON4 C246
6 1 3 1 LID# C254 C250
IN OUT 3 1 LID# (38)
4 2 10U/25V/X5R/1206 C260 10U/25V/X5R/1206
4 2 C565 CH61004M291 0.1U/25V/X7R/0603 CH61004M291
0.1U 4 IN GND 2 0.1U/25V/X7R/0603
C294 85204-0200 CC0603
3 5 85204-0200-2P-L 0.1U CC0603
(6,15) DIGON ON/OFF GND VCC3 VCC3
10U
LCDVCC
AAT4280IGU-3-T1/G5241
R108 R109 87222-40XX_LVDS C295
G5241T1U:AL005241008 2.2K 2.2K
40 39 0.1U
38 37
36 35 VADJ-1
Modify 1/24 (6,15) EDIDDATA 34 33 DISPON
(6,15) EDIDCLK 32 31
30 29 VCC3
28 27
26 25 C270
24 23
(14) TXLOUT0- 22 21 TXLOUT1- (14)
0.1U
(14) TXLOUT0+ 20 19 TXLOUT1+ (14)
18 17

BACKLIGHT CONTROL (14)


(14)
TXLOUT2-
TXLOUT2+
16
14
12
15
13
11
TXLCLKOUT- (14)
TXLCLKOUT+ (14)

(21) USBP6- 10 9
C271 0.1U
VCC3 (21) USBP6+ 8 7 INT_MIC (34)
6 5
4 3

5
B B
VCC5 2 1
(22) LCD_ON 2
4 DISPON
1 CON12
(6,15) BLON
U8
TC7SH08FU C263 C264 87222-4000-40P-LDV L17 0 VADJ-1
(38) VADJ
3

C267
R102 QCIPN:AL07SH08C26
EMI *47P *47P C291
*0.1U
EMI EMI
100K
P/N:DFHD40MR465 *0.1U

Modify 10/26
1.VCC5
2.D-
3.D+
4.MIC
5.GND

C C

L30 *WCM2012-90
DB "short" and reserve common mode
choke pads for EMI final tune TX2_HDMI+ 1 2
(14) TX2_HDMI+
(14) TX2_HDMI- TX2_HDMI- 4 3

HDMI PORT
HDMI-CD012C1AA-19P-H

L31 CN4
(14) TX1_HDMI+ TX1_HDMI+ 4 3 21
TX1_HDMI- TX2_HDMI+ GND2
(14) TX1_HDMI- 1 2 1 D2+ GND4 23
2 D2 Shield
*WCM2012-90 TX2_HDMI- 3
L2 0 HDMISCL TX1_HDMI+ D2- HDMIC_5V
4 D1+
(14) HDMI_SCL L3 0 HDMISDA TX0_HDMI+ 1 2 *WCM2012-90 5
(14) HDMI_SDA (14) TX0_HDMI+ D1 Shield
(14) TX0_HDMI- TX0_HDMI- 4 3 TX1_HDMI- 6
C613 C612 TX0_HDMI+ D1-
7 D0+
L1 8
*10P/50V *10P/50V TX0_HDMI- D0 Shield C610
9 D0-
L4 TXC_HDMI+ 0.1U
10 CK+
(14) TXC_HDMI+ TXC_HDMI+ 4 3 11
TXC_HDMI- TXC_HDMI- CK_G
(14) TXC_HDMI- 1 2 12 CK-
13 CE Remote
For HDMI Nvidia's PUN issue *WCM2012-90 14
HDMISCL NC
15 DDC CLK for EMI request
HDMISDA 16
DKZ00TFU101 F2 POLY_SWITCH DDC DATA
D 17 GND
D
VCC5 2 1 HDMIC_5V 18
HDMI_DET R1 HDMIDET_R +5V
(15) HDMI_DET 19 HP DET
GND3 22
1K RC1206 20
GND1
R2 C12806-11904-L

15K
P/N:DFHD19MS135 All Quanta Computer Inc.
P/N:DFHD19MS127 PROJECT : PB2
Size Document Number Rev
A
LCD / HDMI
Date: Friday, March 23, 2007 Sheet 25 of 46
1 2 3 4 5 6 7 8
A B C D E

3VSUS
3VSUS

VCC3
R512

R261
0

*0
26
U11B 3VSUS

C481 C776 C782 C471 C785 C787 C791 10 67


10U VCC_PCI1 VCC_3V
20 VCC_PCI2
0.01U 0.1U 0.01U 10U 0.1U 0.1U 27
4 VCC_PCI3 C777 C779 4
32 VCC_PCI4
41 VCC_PCI5
128 0.01U 10U
VCC_PCI6
61 VCC_RIN
VCC_ROUT_832 16 VCC_ROUT1
34 VCC_ROUT2
64 VCC_ROUT3
C451 C488 C790 C498 114 VCC_ROUT4
120 VCC_ROUT5
0.01U 0.01U 0.47U 0.47U
VCC_MD 86

GND1 4
(21) AD[0..31] GND2 13
AD31 125 22
AD30 AD31 GND3
126 AD30 GND4 28
AD29 127 54
AD28 AD29 GND5
1 AD28 GND6 62
AD27 2 63
3VSUS AD26 AD27 GND7 3VSUS
3 AD26 GND8 68
AD25 5 118 3VSUS
AD24 AD25 GND9
6 AD24 GND10 122 When HWSPND# is

1
AD23 9 controlled by system,
AD22 AD23 R510
11 AD22 the pull-up
AD21 12 99 * NOT Use EEPROM :
R209 AD20 14
AD21 AGND1
102 R208 resistor(R321) dose not 100K R510 : installed
10K AD19 AD20 AGND2 10K need to apply.
3 15 103 R250,U40,C453 : NOT installed 3

2
AD18 AD19 AGND3
17 AD18 AGND4 107
AD17 18 111
AD17 AGND5

1
AD16 19 AD16
2

AD15 36 3VSUS 3VSUS 3VSUS R250


AD14 AD15
37 AD14
3 1 PCI_PME_C# AD13 38 *100K
(21) PCI_PME# AD13
AD12 39

2
AD11 AD12

PCI / OTHER
40 AD11
2N7002E-T1-E3 AD10 42 69 HWSPND# R245 R506 R254 R240
AD9 AD10 HWSPND# 10K 10K 10K 10K
Q13 43 AD9
AD8 44
AD7 AD8
46 AD7
AD6 47 58 3VSUS
AD5 AD6 MSEN
48 AD5
AD4 49 55 Serial EEPROM
AD3 AD4 XDEN C453 *0.1U
50 AD3
AD2 51
AD1 AD2 U40
52 AD1 UDIO5 57
AD0 53 8 1
PAR AD0 VCC A0
(21) PAR 33 PAR 7 NC A1 2
C/BE3# 7 65 SCL 6 3
(21) C/BE3# C/BE3# UDIO3 SCL A3
C/BE2# 21 59 SDA 5 4
(21) C/BE2# C/BE2# UDIO4 SDA GND
C/BE1# 35
(21) C/BE1# C/BE1#
C/BE0# 45 56 UDIO2 R505 *10K
(21) C/BE0# C/BE0# UDIO2
AD17 R517 0 8 3VSUS *24C02
(21) AD17 IDSEL
60 UDIO1 R228 *10K
REQ0# UDIO1 3VSUS
(21) REQ0# 124 REQ#
Modify 11/08 GNT0# 123 72 SERIRQ
(21) GNT0# GNT# UDIO0/SRIRQ# SERIRQ (22,38)
FRAME# 23
2 (21) FRAME# FRAME# 2
IRDY# 24
(21) IRDY# IRDY#
TRDY# 25
(21) TRDY# TRDY#
DEVSEL# 26
(21) DEVSEL# DEVSEL#
STOP# 29 115 INTA#
(21) STOP# STOP# INTA# INTA# (21)
PERR# 30
(21) PERR# PERR#
SERR# 31 116 INTB#
(21) SERR# SERR# INTB# INTB# (21)
RPCICGRST-L# 71
PCIRST# GBRST#
(21,38) PCIRST# 119 PCIRST#
PCLK_R5C832 121
(2) PCLK_R5C832 PCICLK
PCI_PME_C# 70 66
PME# TEST
CLKRUN# 117
(22) CLKRUN# CLKRUN#

R5C832T_V00
P/N:AJ5C8320H26
3VSUS
CLKRUN# PCLK_R5C832 GBRST#
1

CoreLogic CLOCKRUN# R210


R268 10K
When CLKRUN# is controlled R258 *22
1 by system, the pull-down *100K 1
2

resistor(R14) dose not need PCIRST# R211 *0 RPCICGRST-L#


to apply. C499
Modify 12/26
2

*22P
*0.1U
C446
Quanta Computer Inc.
1

PROJECT : PB2
Size Document Number Rev
A
R5C832
Date: Friday, March 23, 2007 Sheet 26 of 46
A B C D E
A B C D E

AS CLOSE AS POSSIBLE TO
27
80 mils 3VSUS
1394 CONNECTOR.
1394_AVDD L41 BLM18PG181SN1D_6

4 4
C778 C781
U11A C783 C780 COM-CHOKE-WCM3216-4P
10U 0.1U 0.1U 0.01U CHOKE-WCM3216-4P CN3 1394A
LP1 6
TPA0P 1 2 L1394_TPA0+ 4
TPA0N 4 3 L1394_TPA0- 3
98 TPB0P 1 2 L1394_TPB0+ 2
AVCC_PHY1 TPB0N L1394_TPB0-
AVCC_PHY2 106 4 3 1
110 LP2 5
AVCC_PHY3 COM-CHOKE-WCM3216-4P
AVCC_PHY4 112
CHOKE-WCM3216-4P
FCE P/N:BG624576929 1394-020204FR004SX05ZX-4P-H

BG624576929 113 TPBIAS0 C477 0.33U P/N:DFHS04FRE04


TPBIAS0
XTL-5_3X3_2-3_8-1_2H

C444 22P 1394_XOUT 94 R253 R248 C476 0.01U


XI
56.2/F 56.2/F
24.576MHz 50ppm 10pF Y1
104 TPB0N Vendor ID Device ID
TPBN0
C448 22P 1394_XIN 95 105 TPB0P
XO TPBP0
1394 1180 0832
IEEE1394/SD

108 TPA0N
3
TPAN0 SD 1180 0822 3
C775 0.01U FIL0_PWR 96 109 TPA0P
FIL0 TPAP0

MMC 1180 0843


R507 10K REXT 101 REXT R244 R238 C461 270P

56.2/F 56.2/F MS 1180 0592


C455 0.01U VREF_PWR 100 VREF R231 5.11K/F
xD 1180 0852

MDIO17 87

MDIO16 92

MDIO15 89

MDIO14 91

90 R206 0 MDIO13
MDIO13 MDIO13 (28)
R207 0 MDIO12
MDIO12 93 MDIO12 (28) For EMI
81 R212 0 MDIO11
MDIO11 MDIO11 (28)
2 2
82 R213 0 MDIO10
MDIO10 MDIO10 (28)

MDIO05 75

88 MDIO08
MDIO08 MDIO08 (28)

MDIO19 83

MDIO18 85

MDIO02 78

77 MDIO03
MDIO03 MDIO03 (28)
80 MDIO00
MDIO00 MDIO00 (28)

79 MDIO01
MDIO01 MDIO01 (28)

R205 0 MDIO09
MDIO09 84 MDIO09 (28) For EMI
76 MDIO04
MDIO04 MDIO04 (28)

MDIO06 74

1 97 RSV
1

MDIO07 73

R5C832T_V00

Quanta Computer Inc.


PROJECT : PB2
Size Document Number Rev
A
R5C832
Date: Friday, March 23, 2007 Sheet 27 of 46
A B C D E
A B C D E

PERST_C# 0 R433 PERST#


3V_NEWCARD

CN1 130805-1 C676


*WCM2012-90 1 3VSUS
USBP9- GND_1 *4700P/25V
(21) USBP9- 3 4 2 USB- U30
USBP9+ 2 1 3
(21) USBP9+ CPUSB# USB+ 2231_SHDN# R429 10K
4 CPUSB#
LP3 5 3VSUS 17 15 3VAUX_NEW
RSV_0 AUXIN AUXOUT 2231_STBY# R439 10K
6 RSV_1 VCC3 2 3.3VIN_0 3.3VOUT_0 3 3V_NEWCARD
(2,22,31) PCLK_SMB 7 SMBCLK 4 3.3VIN_1 3.3VOUT_1 5
4 8 12 11 CPUSB# R431 10K 4
(2,22,31) PDAT_SMB SMBDATA VCC1.5 1.5VIN_0 1.5VOUT_0 1.5V_NEWCARD
9 +1.5V 14 1.5VIN_1 1.5VOUT_1 13
10 CPPE# R427 10K
1.5V_NEWCARD +1.5V
(22,31,32) PCIE_WAKE# 11 WAKE#
3VAUX_NEW 12 +3.3VAUX ExpressSwitch
PERST_C# 13 PERST# 2231_SHDN# PERST#
14 +3.3V_1 20 SHDN# PERST# 8
15 2231_STBY# 1 10 CPPE#
PCIE_REQ3# +3.3V_2 STBY# CPPE# CPUSB#
(2) PCIE_REQ3# 16 CLKREQ# (21,22,31,32,33) PLTRST# 6 SYSRST# CPUSB# 9
CPPE# 17 19 3V_NEWCARD 3VAUX_NEW 1.5V_NEWCARD
CLK_PCIE_NEW_C# CPPE# OC#
(2) CLK_PCIE_NEW_C# 18 REFCLK- 16 NC
CLK_PCIE_NEW_C 19 7 18
(2) CLK_PCIE_NEW_C REFCLK+ GND0 RCLKEN
20 GND_2
PCIE_RXN1 R602 0 C191 0.1U 21 C187 C677 C671 C670 C673 C672
(21) PCIE_RXN1 PERn0
PCIE_RXP1 R603 0 C192 0.1U 22 R5538D001-TR-F
(21) PCIE_RXP1 PERp0
23 AL005538001 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
PCIE_TXN1 GND_3
(21) PCIE_TXN1 24 PETn0
PCIE_TXP1
Modify 3/22 25 RICOH P/N:AL005538001

NC1
NC2
NC3
NC4
(21) PCIE_TXP1 PETp0
26 GND_4
*10P *10P
GMT P/N:AL000577000

27
28
29
30
C420 C421

NCARD-131851-A-26P-L

P/N:DFHD26MR000

3 SD/MS_3V SD/MS_3V 3

VCC3 R380 *10K CON9

1 11 XD_D3
MDIO08 R383 33 XD_WE# MS-GND1 SD-CD/DAT3 XD_WE#
(27) MDIO08 2 MS-BS SD-CMD 12
MDIO11 R388 33 XD_D1 3 13
(27) MDIO11 MS-D1 SD-GND1
MDIO10 R386 33 XD_D0 4 14
(27) MDIO10 MS-SDIO(D0) SD-VDD
MDIO12 R381 33 XD_D2 5 15 MDIO09_1 R385 *22 C643 *22P
(27) MDIO12 MS-D2 SD-CLK
MDIO01 6 16
(27) MDIO01 MS-INS SD-GND2
MDIO13 R387 33 XD_D3 7 17 XD_D0
(27) MDIO13 MS-D3 SD-DAT0
MDIO09 R384 33 MDIO09_1 8 18 XD_D1
(27) MDIO09 MS-SCLK SD-DAT1
9 19 XD_D2
MS-VCC SD-DAT2
10 MS-GND2

VCC3 R378 *10K MDIO00 20 22 XD_RB# 33 R390 MDIO03


SD-SW(RSV) SD-SW(WP) MDIO03 (27)
21 SD-SW(GND) SD-SW(WP-GND) 23
(27) MDIO00

Molex47265-0001-CARD-READER

SD/MS_3V SD/MS_3V
SD/MS_3V SD/MS_3V
Supporting MMC/SD/MS Cards
Molex P/N:DFHD23MS0B6
R469 TTN P/N:DDFHD23MS0A8 R389 R382
C642 C644 10K 10K
2 150K 2
0.1U 0.1U XD_RB# XD_WE#

11/16 Modify
U33

VCC3 5 IN OUT 1 SD/MS_3V


3 NC
MDIO04 4 2
(27) MDIO04 EN GND C641 C681
C680 G5240B1T1U 0.1U 10U

0.1U AL005240010

1 1

Quanta Computer Inc.


PROJECT : PB2
Size Document Number Rev
A
R5C832
Date: Friday, March 23, 2007 Sheet 28 of 46
A B C D E
A B C D E

5VSUS
PTC:DK100TPU028

DKZ00TFU101

1
F3
2
40 mils
USBVCC0
USB Back
USBVCC0
USB Right 29
POLY_SWITCH RC1206 5VSUS DFHS24FR536
+ C265 87153-2401-24P-LDV
C257 100U/6.3V-3528
120 mils 87153-2401-24P-LDV
0.1U 24 24
23 23
M/B USB/B

1
4 22 22 4
C593 C590
10U 0.1U
21 21
20 20
TOP VIEW TOP VIEW
(21) USBP1-

2
CON13 19 19 25 1 2
(21) USBP1+
LP5 USBVCC0 40 mils 4 (21) USBP2-
18 18
17 17
USBP0- 1 GND
(21) USBP0- 1 2 2 (21) USBP2+ 16 16
4 3 USBP0+ 5 15 15
(21) USBP0+ 3 GND
(21) USBP3- 14 14

1
*WCM2012-90 C269 C272 6 13 13
USBVCC0 USBVCC0 GND (21) USBP3+
*47P/50V *47P/50V 12 12
11 11

2
USB 10 10
(34) HP-JD

1
9 9
D28 D27 VERTICAL (35) HPOUT_L
AGND
8 8
3 *DA204U 3 *DA204U DFHS04FRH14 AGND 7 7
6 6
P/N:DFHS04FRH14
(35) HPOUT_R
5 5
2 1 25
INT KeyBoard (34) EXT_MIC_L
AGND
4 4

2
AGND 3 3
(34) EXT_MIC_R 2 2
1 1
1/3 Modify (34) MIC1-JD
220Px4 CP1
7 8 MX2
5 6 MX4 CON18
CON5 MX1
3 4
MY15 1 1 2 MX7

3
(38)
(38)
(38)
MY15
MY13
MY12
MY13
MY12
MY0
2
3
1
2
3 220Px4 CP2
SWITCH BOARD 3

(38) MY0 4 4
MY2 MX5 3VPCU CON2
(38) MY2
MY11
5
6
5 7
5
8
6 MX6
30 mils 1
(38) MY11 6 3VPCU
MY14 7 3 4 MX0 RP50 5VPCU 2
(38) MY14 7
MY10 8 1 2 MX3 10 1 MY5 3
(38)
(38)
MY10
MY9
MY9 9
8
9
MY9 9 2 MY3 11/06 Modify VCC5
4
MY8 10 MY8 8 3 MY1 5
(38) MY8 10 (38) NBSWON#
MY7 11 220Px4 CP4 MY7 7 4 MY4 6
(38) MY7 11 (38) ECO
MY6 12 7 8 MY4 MY6 6 5 7
(38) MY6 12 (38) RF_SW
MY5 13 5 6 MY1 8
(38) MY5 13 (38) MODE_ON#
MY3 14 3 4 MY3 10KX8 9
(38) MY3 14 (38) NUMLED#
MY1 15 1 2 MY5 10
(38) MY1 15 (38) SUSLED#
MY4 16 RP51 11 Bot contact
(38) MY4 16 (38) ECO_LED#
MX5 17 10 1 MY2 12
(38) MX5 17 (38) RF_LED#
MX6 18 220Px4 CP3 MY0 9 2 MY11 13
(38) MX6 18 3VPCU VCC5 5VPCU (38) MODE_LED#
MX0 19 7 8 MY9 MY12 8 3 MY14 14
(38) MX0 19 (38) CAPSLED#
MX3 20 5 6 MY8 MY13 7 4 MY10 15
(38) MX3 20 (38) BATLED0#
MX7 21 3 4 MY7 MY15 6 5 16
(38) MX7 21 (38) BATLED1#
MX1 22 1 2 MY6 17
(38) MX1 22 (33) ODD_LED#
MX4 23 10KX8 18
(38) MX4 23 1
MX2 24 C684 C218 C719 19 20
(38) MX2 24 220Px4 CP5 RP48 0.1U 0.1U 0.1U 20
7 8 MY2 10 1 MX3 P/N:DFFC20FR255
AFN240-A2G1T-24P-L 5 6 MY14 MX7 9 2 MX0 SW
AFN240-A2G1T-24P-L-kw3 3 4 MY11 MX2 8 3 MX6 AF720L-A2G1T-20P-L
1 2 MY10 MX4 7 4 MX5
P/N:DFFC24FR181 MX1 6 5
2 220Px4 CP6 2
Bot contact 10KX8
7 8 MY0
MY12
5
3
6
4 MY13 SW/B Blue: B Amber:A
1 2 MY15

WIFI Power ECO FUNC NUM LED CAP LED BAT LED ODD LED
24 1
5VPCU
3/19 Modify
5VPCU B B B/A B
B B B B
CIR
2

R468
*10K U45
2 VCC
1

20 mlis
0 R583 1
(38) CIR_IN
IR_DATA
OUT TOP
3 GND
4 GND 1 2 3

IR-IRM-V538-TR1
5VPCU
1 1

IR-IRM-V538-TR1-3P-pb2
4
1

BEBK0076Z00
C829 C828
10U 0.1U
1/3 Modify Quanta Computer Inc.
2

PROJECT : PB2
Size Document Number Rev
A
K/B / USB
Date: Friday, March 23, 2007 Sheet 29 of 46
A B C D E
5 4 3 2 1

FAN CONN 30
VCC5
FANPWR = 1.6*VSET
ANT. CONNECTOR ANT_GND U34 CON11
C683 0.1U 2 3 +5V_FAN
D VIN VO 3 D
GND 5 2
THERM_ALERT# 1 6
(15,22) THERM_ALERT# FON# GND 1

1
CN5 7 C688 C691
GND 85205-0300L
GND 2 (38) VFAN 4 VSET GND 8
GND 10U 0.01U

2
1 ANT 1 G995
SIG SIG
GND 3
Z = 75 OHM GND DFHS01FS000
AL000995004 3VPCU VCC5
MMCX-25-10904-T-3P
DFHD01MS381 25-501A0-L

2
ANT_GND CN2

2
R463
100K R461
ANT_GND 10K
R416 0 FANSIG
(38) FANSIG

1
3
ANT_GND
Q22
DTC144EUA 2

UMT_213-3-1_3

1
BA144EUAZ04 C690
BT Connector 4700P/25V

C
TOP Side CON7 C
1 GND1
(21) USBP4+ 2 USB_D+
(21) USBP4- 3 USB_D-
HW_RADIO_DIS#
6

4
VCC3
0 R344
T146
BT_VCC 5
6
HW_RADIO_DIS#
+3.3V
GND2
Thermal Senser
BLUETOOTH VCC3
1

0.1U 87212-0600-6P-L
C221 C219
C589 DFHD06MS839
THERM_VCC R88 0

Activate: L 0.1U 0.1U


VCC3
U7
(3) H_THERMDA
1 8 THMCLK
VCC SMCLK THMCLK (16)
C223
R350 2200P H_THERMDA 2 7 THMDAT
DXP SMDATA THMDAT (16)
4.7K
H_THERMDC 3 6 THERM_ALERT#
DXN -ALT THERM_ALERT# (15,22)
(3) H_THERMDC
HW_RADIO_DIS# -SYS_SHDN-1 4 5
(15) -SYS_SHDN-1 -OVT GND
3
G781/MAX6648
Q19 MSOP8-4_9-65
(38) BT_ON# 2 DTC144EUA
B
P/N:AL000781012 B
1

UMT_213-3-1_3

TOUCH PAD BA144EUAZ04

VCC5
C504 4.7U
20 mils
C509 0.1U L27 BLM21PG600SN1D(60,3A) VCC5
T20W-TPVCC
VCC5
R526 *0 R94
200K/F
CON3
6 R93
6 SYS_SHDN# (41)
5 R91 10K THMDAT 1 3 MBDATA MBDATA (38,46) 10K
5

3
(38) TPDATA 4 4
(38) TPCLK 3 3
2 Q11
(38) TP_LED#
2

2 2N7002E-T1-E3 -SYS_SHDN-1
1 1 VCC3 2 2
DFHS06FS178
2

T/P_Board Q8 Q10 C226


2N7002E-T1-E3 Q9
AFNXX0-N2G1V-6P-R-kw3 R90 10K THMCLK 1 3 MBCLK 2N7002E-T1-E3 0.01U 2N7002E-T1-E3

1
MBCLK (38,46)
Bot contact
A 6 1 R572 *0 A

Quanta Computer Inc.


PROJECT : PB2
Size Document Number Rev
A
FAN/BT/FG
Date: Friday, March 23, 2007 Sheet 30 of 46
5 4 3 2 1
A B C D E

VCC3 VCC1.5
Mini PCI-E Card
WLAN
3VSUS
C557
0.1U
C512
10U
C520

0.01U
C553
0.1U
C521
10U VCC3
31
VCC3 VCC1.5 3VSUS

CN11 R518
51 Reserved +3.3V 52 10K Activate: L
C532 C528 R514 1 2 *0 49 50
(6,22) CL_RST#0 Reserved GND
D 0.1U 1U R313 1 2 *0 47 48 D
(22) ICH_CL_DATA1 Reserved +1.5V
R309 1 2 *0 45 46
(22) ICH_CL_CLK1 Reserved LED_WPAN#
43 44 WLAN_LED#
Reserved LED_WLAN# LP6 *WCM2012-90
41 Reserved LED_WWAN# 42
39 Reserved GND 40
PCLK_DEBUG 37 38 USBP7+ 1 2
Reserved USB_D+ USBP7+ (21)
35 36 USBP7- 4 3
GND USB_D- USBP7- (21)
PCIE_TXP0 33 34
(21) PCIE_TXP0 PETp0 GND
PCIE_TXN0 31 32 PDAT_SMB
R285 (21) PCIE_TXN0 PETn0 SMB_DATA PDAT_SMB (2,22,28)
29 30 PCLK_SMB
GND SMB_CLK PCLK_SMB (2,22,28)
*22 27 28
PCIE_RXP0 C523 0.1U GND +1.5V
(21) PCIE_RXP0 25 PERp0 GND 26
PCIE_RXN0 C527 0.1U 23 24 R284 10K VCC3
(21) PCIE_RXN0 PERn0 +3.3Vaux
21 22 PLTRST#
GND PERST# PLTRST# (21,22,28,32,33)
C534 PCLK_DEBUG 19 20
(2) PCLK_DEBUG Reserved Reserved WLSW (38)
*22P PLTRST# 17 18 D10 1SS355
(21,22,28,32,33) PLTRST# Reserved GND
EMI 3VSUS 15 GND Reserved 16 LAD0
LAD0 (20,38)
CLK_PCIE_MINI_WLAN 13 14 LAD1
(2) CLK_PCIE_MINI_WLAN REFCLK+ Reserved LAD1 (20,38)
CLK_PCIE_MINI_WLAN# 11 12 LAD2
(2) CLK_PCIE_MINI_WLAN#
9
REFCLK- Reserved
10 LAD3 LAD2 (20,38) Activate: H
CLK_MINI_OE# GND Reserved LFRAME# LAD3 (20,38)
T221 7 CLKREQ# Reserved 8
2

5 6 LFRAME# (20,38)
Reserved +1.5V
3 Reserved GND 4
(22,28,32) PCIE_WAKE# 3 1 1 WAKE# +3.3V 2 VCC3
67910-0002
*2N7002E-T1-E3 67910-0002
Activate: L
C
Q18 C
ALLTOP P/N:DFHD52MS146
ACES P/N:DFHD52MS049
P/N:DFHD52MS227

Mini PCI-E Card TV

3VSUS VCC3
VCC3_TV VCC1.5 3VSUS

CN8
51 Reserved +3.3V 52
C215 C188 C167 C169 49 50
0.1U 1U 0.1U 10U Reserved GND
47 Reserved +1.5V 48
45 Reserved LED_WPAN# 46
43 44 LP4 *WCM2012-90
Reserved LED_WLAN#
41 Reserved LED_WWAN# 42
39 Reserved GND 40
37 Reserved USB_D+ 38 4 3 USBP8+ (21)
B 35 GND USB_D- 36 1 2 USBP8- (21) B
VCC1.5 PCIE_TXP3 33 34
(21) PCIE_TXP3 PETp0 GND
PCIE_TXN3 31 32 PDAT_SMB
(21) PCIE_TXN3 PETn0 SMB_DATA PDAT_SMB (2,22,28)
29 30 PCLK_SMB
GND SMB_CLK PCLK_SMB (2,22,28)
27 GND +1.5V 28
C214 PCIE_RXP3 C217 0.1U 25 26
(21) PCIE_RXP3 PERp0 GND
C212 C213 PCIE_RXN3 C216 0.1U 23 24
(21) PCIE_RXN3 PERn0 +3.3Vaux
0.01U 0.1U 10U 21 22 PLTRST#
GND PERST# PLTRST# (21,22,28,32,33)
19 20 R593 10K VCC3
Reserved Reserved
17 Reserved GND 18

15 GND Reserved 16
CLK_PCIE_MINI_TV 13 14
(2) CLK_PCIE_MINI_TV REFCLK+ Reserved
3VSUS CLK_PCIE_MINI_TV# 11 12
(2) CLK_PCIE_MINI_TV# REFCLK- Reserved VCC3
9 10 R337 0 VCC3_TV
GND Reserved
T185 7 CLKREQ# Reserved 8
2

5 6 Q6
Reserved +1.5V *AO3403
3 Reserved GND 4
(22,28,32) PCIE_WAKE# 3 1 1 WAKE# +3.3V 2 VCC3_TV 1 3

67910-0002
*2N7002E-T1-E3 67910-0002

2
Q7 DFHD52MS146 C193 C210
10U 0.1U

ALLTOP P/N:DFHD52MS146 (38) TV_POWERON#

ACES P/N:DFHD52MS049 Activate: L


A A
P/N:DFHD52MS227

Quanta Computer Inc.


PROJECT : PB2
Size Document Number Rev
A
WIRELESS/ TV
Date: Friday, March 23, 2007 Sheet 31 of 46
A B C D E
5 4 3 2 1

C328 C292 C304 C315 C301 C326


RVCC3

C351
RVCC3
32
0.1U 0.1U 0.1U 1000P 1000P 1000P *4.7U
(4mA) RVCC3

R140 4.7K
D D

61

45

40

65

36
37
35
34

66
67
68
69
70
71
72
73
74
U37

1
R133 4.7K
R139

VDDO_TTL_MAIN

SPI_CLK

SPI_DO
EPAD

GND
GND
GND
VDDO_TTL

VDDO_TTL

VDDO_TTL

VDDO_TTL

SPI_CS

GND
GND
GND
GND
GND
GND
SPI_DI
10K
U9 C736 0.1U PCIE_RXP2_R 49
(21) PCIE_RXP2_LAN TX_P
LAN_VPDCLK 6 1 10 LOM_DISABLE#
LAN_VPDDATA SCL A0 C737 0.1U PCIE_RXN2_R LOM_DISABLEn
5 SDA A1 2 (21) PCIE_RXN2_LAN 50 TX_N
A2 3 VAUX_AVLBL 12 RVCC3
(21) PCIE_TXP2_LAN 54 RX_P
7 8 11 C723
WP VCC RVCC3 SWITCH_VCC
GND 4 (21) PCIE_TXN2_LAN 53 RX_N *0.1U
VMAIN_AVAL 47 RVCC3
24LC08BT-I 6
(22,28,31) PCIE_WAKE# WAKEn
C308 9
0.1U SWITCH_VAUX
(2) CLK_PCIE_LAN 55 REFCLKP
24 R481 2K/F
HSDACP
(2) CLK_PCIE_LAN# 56 REFCLKN
Install for 8039
HSDACN 25
5 R117 *4.87K/F NI for 8039
(21,22,28,31,33) PLTRST# PERSTn
16 LAN_RTSET
R465 49.9 MDI0+ RSET
17 MDIP[0]
4 CTRL_25
C687 1000P R462 49.9 MDI0- CTRL25
18 MDIN[0]
3 CTRL_12

C689 1000P
R467

R466
49.9

49.9
MDI1+

MDI1-
20 MDIP[1] 88E8039/88E8055 CTRL12

21 MDIN[1]
TSTPT 29
26 MDIP[2] FOR 8039
C
TESTMODE 46 C
27 MDIN[2]
R481 2K
30 59 T66
MDIP[3] LED_ACTn
31 60 T197 R117 4.87K
MDIN[3] LED_LINK10/100n

LED_LINK1000n 62 T199
LAN_VPDCLK 38 VPD_CLK
LED_LINKn 63 T196
LAN_VPDDATA 41 VPD_DATA
LAN_SMB_CLK 42 15 CLK_LAN_X1 C720 22P
T193 SMCLK XTALI

1
LAN_SMB_DATA 43 14

AVDDL

AVDDL

AVDDL

AVDDL

AVDDL

AVDDL

AVDDL

VDD25
T192 SMDATA XTALO

AVDD
Y5

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDD
L21 0 25MHz/20pF/25ppm
RVCC3

2
CLK_LAN_X2 C728 22P

13

33

39

44

48

58

19

22

28

32

51

52

57

23

64
C378 C377 C363 R171 88E8039
10U 0.1U 4.7K BG625000486
4.7U
VDD AVDD25
3

XTL-5_3X3_2-3_8-1_2H
CTRL_25 Q23 (426mA) (218mA)
1
BCP69T1
Giga: P/N: AJ080550002
10/100M: P/N: AJ080390005 FCE P/N:BG625000F21
4
2

AVDD25 P/N:BG625000486

B B

C277 C327 C279 C274 C321 C730 C280 C278 C323 C322 C733 C273
1000P 1000P 1000P 1000P 1000P 4.7U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U AVDD25
U35
NS681686

MDI1+ 1 16 RJ45_MX1+ CON10


RD+ RX+
L22 0 MDI1- MCT1 8
RVCC3 2 RD- CT 14 7 10
RJ45_MX1-
C225 RJ45_MX1- 6 9
3 CT RX- 15 5
C390 C405 0.1U
4.7U R181 MDI0+ RJ45_MX0- RJ45_MX1+ 4
7 TD+ TX- 9 3
0.1U 4.7K RJ45_MX0-
MDI0- MCT0 RJ45_MX0+ 2
8 TD- CMT 11 1
3

C224 6 10 RJ45_MX0+
CTRL_12 Q24 CT TX+ RJ45-C100F8-100B-8P-L
1
BCP69T1 0.1U
4
2

VDD R89 R92


75/F 75/F
C211
RJ45_TER

C287 C729 C318 C392 C276 C312 C391 C286 C293 C731
DB0VC1LAN07 (NS681686) 1000P/3KV_1808
0.1U 0.1U 0.1U 0.1U 0.1U 1000P 10U 1000P 1000P 1000P

A A
Modify 3/22

Quanta Computer Inc.


PROJECT : PB2
Size Document Number Rev
A
Marvell 8039/55
Date: Friday, March 23, 2007 Sheet 32 of 46
5 4 3 2 1
1 2 3 4 5 6 7 8

CD-ROM CONNECTOR
SMT TYPE CNN SATA HDD
10/19 Modify H=4.5mm
P/N:DFHS22FR448 REF: ZC3
33
CN12
CON14 1
GND1 SATA_TXP0
1 2 TXP 2 SATA_TXP0 (20)
3 SATA_TXN0
3 4 TXN SATA_TXN0 (20)
R525 0 PLTRST#_ODD PDD8 4
(21,22,28,31,32) PLTRST# 5 6 GND2
PDD7 PDD9 5 SATA_RXN0_C C835 3900P/25V SATA_RXN0 (20)
PDD6 7 8 PDD10 RXN SATA_RXP0_C C837 3900P/25V
A
9 10 RXP 6 SATA_RXP0 (20) A
PDD5 PDD11 7
PDD[0..15] VCC3 PDD4 11 12 PDD12 GND3
(20) PDD[0..15] 13 14
PDD3 PDD13 8 +3.3VSATA R353 VCC3
PDDREQ PDD2 15 16 PDD14 3.3V 0
(20) PDDREQ 17 18 3.3V 9
PDIOW# PDD1 PDD15 10
(20) PDIOW# 19 20 3.3V
PDIOR# PDD0 PDDREQ 11
(20) PDIOR# 21 22 GND
PIORDY PDIOR#
(20) PIORDY
PDDACK# PDIOW# 23 24 GND 12
13
40 mils
(20) PDDACK# 25 26 GND
IRQ14 R591 4.7K PIORDY PDDACK# 14 HDD_5V R352 0 VCC5
(20) IRQ14 27 28 ODD_5V 5V
PDA1 VCC3 R589 8.2K IRQ14 15
(20) PDA1 29 30 5V
PDA0 PDA1 DIAG# R592 *10K VCC5 16
(20) PDA0 31 32 5V
PDCS1# PDA0 PDA2 17 C597 C595
(20) PDCS1# ODD_5V 33 34 GND
PDA2 PDCS1# PDCS3# 18 0.1U 10U
(20) PDA2 35 36 RSVD
PDCS3# ODDLED# 19
(20) PDCS3# 37 38 GND 0.1U
39 40 80 mils 12V 20
21 C598 +3.3VSATA
41 42 12V
43 44 12V 22

R590 470_0603 45 46 C596 C599


47 48 VCC5 VCC5
49 50 0.1U
C839 C836 C838 C840 C16654-122A4-L_Serial_ATA 10U
0.1U 1000P 0.1U 10U DFHS22FR448
51 SATA-C16654-122A4-L-RVS-22P
52 VCC5
10K 10K
DFHS50FR245 R354 R355
IN for Master
NC for Slave RES-TYPE

5
CDR-800194MR050S117ZL-50P
80 mils 2 ODDLED#
B P/N:DFHD50MR000 ODD_5V R588 0 VCC5 4 B
(29) ODD_LED#
1 SATA_LED#
SATA_LED# (20)
TC7SH08FU

3
VCC1.8_362_DVDD1.8 U19

E-SATA CNN
E-SATA VCC3_362

R365
CON8
1
Bottom Side
GND1 SATA_TXP3 C4 3900P/25V C_SATA_TXP3
*0 TXP 2 7
3 SATA_TXN3 C3 3900P/25V C_SATA_TXN3
TXN
8 GND GND2 4
SATA_RXN3_C C2 3900P/25V SATA_RXN3
16

32
44

33
41
13

U20 9 GND RXN 5


1

10 6 SATA_RXP3_C C1 3900P/25V SATA_RXP3


GND RXP
11 7
ASV33

DV33
DV33

DV18
DV18
DV18
DG18/NC

GND GND3

ASV18/NC 27 VCC1.8_362_AVDD18 CLOSED CNN


R368 12K/F PREXT 6 21 E-SATA
APREXT ASV18 ESATA-CD013C0EA-7P-L-H
APVDD 9 1
4 P/N:DFHD07MSA24 AllTOP
APVDD VCC1.8_362_APLLVDD
P/N:DFHD07MSA16 10/20 modify
APCLKP 3 CLK_PCIE_JMB360 (2)
APCLKN 2 CLK_PCIE_JMB360# (2)
C636 0.1U PCIE_RXP5_C 12 VCC3_362
(21) PCIE_RXP5
C635 0.1U PCIE_RXN5_C 11 APTXP JMB360/2 18 SREXT R360 12K/F R361 0
(21) PCIE_RXN5 APTXN ASREXT
VCC3
(21) PCIE_TXP5 7 APRXP
C C
(21) PCIE_TXN5 8 APRXN
30 C609 C603 C611 C608
ASTXP1/NC 10U 0.1U 0.1U 0.1U
ASTXN1/NC 29

ASRXP1/NC 25
ASRXN1/NC 26
XPCLK_SMB 45
XPDAT_SMB XSMBCLK C_SATA_TXP3 VCC1.8_362_AVDD18
46 ZSMBDAT ASTXP0 24
23 C_SATA_TXN3 R359 0
ASTXN0
VCC1.8
47 20 SATA_RXN3
(21,22,28,31,32) PLTRST# XRSTn ASRXN0
19 SATA_RXP3
360_XI ASRXP0 C604 C607 C606 C600 C605 C601
14 ASXIN 10U 0.1U 10U 0.1U 0.1U 1U
R363 10M 360_XO 15 ASXOUT

Y4 YHDLEDn 40
39 T148 VCC1.8_362_APLLVDD
XTEST R369 0
1 2 36 ZGPIO2
37 35 R356 10K
ZGPIO3 ZGPIO1 VCC3_362
25MHz/20pF/25ppm 34 R357 10K
ZGPIO0 VCC3_362
ASG18/NC

BG625000486
C615 C614 C637 C634 C633
APG18
APG18

ASG33

ASG18

DG33
DG33

DG18
DG18
DG18

27P 27P 10U 0.1U 0.1U

FCE P/N:BG625000F21
1/26 modify
5
10

17

22
28

31
43

38
42
48

P/N:BG625000486 JMB360
VCC1.8_362_DVDD1.8
P/N:AL000360B03 R370 0
R362 4.7K XPCLK_SMB *0
D VCC3_362 D

R364 4.7K XPDAT_SMB C638 C629 C632 C630 C602


VCC3_362
10U 0.1U 0.1U 0.1U 0.1U

R358

Quanta Computer Inc.


PROJECT : PB2
Size Document Number Rev
A
ODD/SATA
Date: Friday, March 23, 2007 Sheet 33 of 46
1 2 3 4 5 6 7 8
A B C D E

3VSUS

1
L28
2
BLM18PG181SN1D
C550 C538 C530
3V_DVDD

C500 C551 C533


3.3VA

C554
34
10U 0.1U 0.1U 0.1U 0.1U 0.1U 10U

AGND

45

20
31
37
3

8
U13

VDDIO

DVDDM
DVDD

AVDD_20
AVDD_31
AVDDHP
(20) ACZ_RST#_AUDIO 10 RESET# MIC_BIAS_L 29 MIC2-VREFO
30 2.2K R264 MIC2-VREFO
MIC_BIAS_R C501 1U
(20) BIT_CLK_AUDIO 5 BIT_CLK MIC_L 21
9 22 C502 1U
(20) ACZ_SYNC_AUDIO SYNC MIC_R INT_MIC (25)
(20) ACZ_SDIN0 7 SDI
(20) ACZ_SDOUT_AUDIO 4 SDO LINEOUT_L 35 AMPL (35,36)
LINEOUT_R 36 AMPR (35,36)

PORT-A_BIAS_L 33 T122
DIBP_HS R307 0 DIB_P 44 34
(37) DIBP_HS DIBP PORT-A_BIAS_R T116
PORT-A_L 38 HP-L (35)
39 C482 *4.7U AGND
DIBN_HS R308 0 DIB_N PORT-A_R HP-R (35)
(37) DIBN_HS 43 DIBN
14 MIC1-VREFO-L R275 2.2K
PORT-B_BIAS_L MIC1-VREFO-R R276 2.2K
PORT-B_BIAS_R 15
23 MICIN1_L C480 1U
BEEP PORT-B_L MICIN1_R C485 1U EXT_MIC_L (29)
11 PCBEEP PORT-B_R 24
EXT_MIC_R (29)
17 C483 *4.7U AGND
CD_L T111
CD_GND 18 T109 FOR EMI SOLUTION
(19) SPDIF 48 SPDIF CD_R 19 T215 11/20 Modify
13 SENSE R272 5.11K/F 3.3VA R343 0
SENSE
(35,38) EAPD 47 EAPD R274 10K/F MIC1-JD R299 *0
MIC1-JD (29)
1 R271 5.11K/F HP-JD R255 *0
NC_1 HP-JD (29)
2 26 VREF_HI
NC_2 VREF_HI VREF_LO C508 1U C535 *0.1U
16 NC_16 VREF_LO 27
28 VC_REFA
VC_REFA
VSSIO_42
VSSIO_46

R310 RCOSC 41 C489 *0.1U


AVSS_12
AVSS_25
AVSS_32

3V_DVDD RCOSC
AVSSHP

237K/F
DVSS

1 RC0805 C525 1

1U AGND
CX20549-12Z
42
46

12
25
32
40

AGND

DIGITAL ANALOG
AGND

PC BEEP Q16
2N7002E-T1-E3
modify 1/18

ACZ_SPKR 3 1 PC_BEEP R281 C526 BEEP


(22) ACZ_SPKR
1K
0.47U
2

ENBEEP R280
(38) ENBEEP
*4.7K

Quanta Computer Inc.


PROJECT : PB2
Size Document Number Rev
A
AUDIO
Date: Friday, March 23, 2007 Sheet 34 of 46
A B C D E
1 2 3 4 5 6 7 8

(34,36) AMPL
C571 1U AMPL-L R474 20K/F
AUDIO AMPLIFIER
LIN- 3
U17

SPKR_INL OUTL+ 6 AUD_SPK_L+


+5V_SPK_AMP

L29
2 1
VCC5

BLM21PG600SN1D(60,3A)
35
C567 1U AMPR-R R473 20K/F RIN- 2 7 AUD_SPK_L-
(34,36) AMPR SPKR_INR OUTL-

1
FB_60ohm+-25%_100MHz
HP-L C559 1U R346 1 2 22K/F HP_INL 27 20 AUD_SPK_R+ C582 C584
(34)
(34)
HP-L
HP-R
HP-R C558 1U R570 1 2 22K/F HP_INR 26
HP_INL MAX9789A OUTR+ 19 AUD_SPK_R- 1U 10U _3A_0.05ohm DC

2
C570 1U HP_INR OUTR-
A A
TQFN 32PIN HPL

1
C555 C561 C564 C574 AGND 1 2 24 16 HPOUT_L Layout Note:
BIAS HPOUT_L (29)
*47P/50V *47P/50V *47P/50V *47P/50V AUD_SPK_ENABLE# 23 15 HPOUT_R
2/9 Modify HP_EN 22
SPKR_EN# HPR HPOUT_R (29) Place close to

2
AUD_AMP_MUTE# HP_EN REGEN AGND pin 8.
25 MUTE# REGEN 4
AUD_AMP_GAIN1 31 1 SET
AUD_AMP_GAIN2 GAIN1 SET
32 GAIN2
AGND 29 3.3VA
AGND VOUT
+5V_SPK_AMP 17 HPVDD L35 +5V_SPK_AMP
9 30 +5V_SPK_AMP
+5V_SPK_AMP CPVDD VDD
8 FB_600ohm+-25%_100MHz
PVDD_8 +5V_SPK_AMP

1
C580 C577 C583 1U 10 C1P PVDD_18 18 +5V_SPK_AMP _200mA_0.6ohm DC
10U 1U 12 C1N +5V_SPK_AMP
AGND 11 28

2
CPGND GND_28
2 PGND_5 5
14 PVSS PGND_21 21

1
R336 AGND AGND 13 C581 C579 C578
100K CPVSS 1U 1U 0.1U
C588 Layout Note:
1

2
D12 1U MAX9789A
EAPD 1SS355 AGND Place close
(34,38) EAPD
U22.
D13 AGND
VOLMUTE# 1SS355 AUD_AMP_MUTE# +5V_SPK_AMP AGND
(38) VOLMUTE# AUD_AMP_MUTE# (36) 3.3VA

1
3.3VA
AUD_SPK_ENABLE# R331 +5V_SPK_AMP
VCC5 0 R318

2
R1

1
B 2K/F 0.1U B

2
R326 REGEN C552 C544 C560

1
R335 10K 1U 1U

2
1

1
10K SET
C573 C562 C585
0.01U 1U 10U

2
HP_EN R303 Layout Note:
AGND AGND
R2 1K/F Place close to
AGND Layout Note: pin 18.
AGND
Place close chip.
+5V_SPK_AMP AGND

V_LDO_OUT=Vset(1+R1/R2)
2

FOR EMI SOLUTION


R306 R305
100K *100K
Vset=1.21V
Int. Stereo Speakers 53048-0410
AUD_SPK_L+ R348 0/F
1

AUD_AMP_GAIN1 AUD_SPK_L- 1
AUD_AMP_GAIN2 AUD_SPK_R- 2 R347 0/F
AUD_SPK_R+ 3
4
1

R342 0/F
GAIN1 GAIN2 GAIN
2

2
R302 R304 0 0 6dB CON6
*100K 100K C831 C832 C833 C834
0 1 10dB 100P/50V 100P/50V 100P/50V 100P/50V 53398-0410-4P-L AGND
2

1
C 1 0 15.6dB C
AGND 1 1 21.6dB AGND AGND AGND AGND ACS P/N:DFHD04MR779
EIC P/N:DFWF04MS427
2/9 Modify

D D

Quanta Computer Inc.


PROJECT : PB2
Size Document Number Rev
A
AUDIO
Date: Friday, March 23, 2007 Sheet 35 of 46
1 2 3 4 5 6 7 8
5 4 3 2 1

E
Mixer & 1nd order low pass filter(338HZ)
2nd order low pass filter(338HZ)
C649

0.1U
36 E
0.1U C647

R400 6.2K 5VAMP


C653
1 2
AGND

0.1U

8
C651 1U 1 2
(34,35) AMPL
R401 12K 2 -
1 FIL2_OUT
C654 1U 1 2 3 +
(34,35) AMPR R379 R393
R404 12K 6 - U26A
7 1 2 1 2 LMV358MM

4
5VAMP R395 1K 5 +
U26B
CS21003J906 LMV358MM 6.2K 620K C646
R375 1000P
1K C645 AGND
D 1U D
AGND

Cutoff:770Hz
AGND C655 4700P/25V 0 R349
WF_CF

0 R398
R405 R417
1 2WF_GAIN 1 2

22K/F 22K/F AGND


Cutoff:8.8Hz U28
R406 12K
FIL2_OUT C648 1U 1 2 2 4 SPK_WF+ CON1
5VAMP IN OUT+
1 3
5VAMP 10K R414
SPK_WF-
2
1
2
3
4 4
AGND
5V 2A
OUT- 12
C663 WF_SHDN# 10 85204-0200 5VAMP
AGND SHDN# 85204-0200-2P-L
C 10K 0.1U 8 WF_VDD L32 C
VDD VCC5
R419 R601 1 2 *0 5 BLM21PG600SN1D(60,3A)
(35) AUD_AMP_MUTE# PVDD1

1
PVDD2 11
9 C666 C664 C668 C656 C662 C661
MUTE 0.1U 0.1U 0.1U 10U 10U 22U/10V

2
3

PGND1
PGND2
Q21 7
GND
WF_BIAS

AUD_AMP_MUTE# 2 DTC144EUA C667 BIAS


(35) AUD_AMP_MUTE#
*1U AGND
C665 MAX9711
6

1
1U 3
1

UMT_213-3-1_3
BA144EUAZ04
AGND AGND AGND AGND AGND

B B

A A

Quanta Computer Inc.


PROJECT : PB2
Size Document Number Rev
A
AUDIO
Date: Friday, March 23, 2007 Sheet 36 of 46
5 4 3 2 1
5 4 3 2 1

37
D D

5335R13-005_0603

RAC1_RING RING_1
MU1 MBR1
CX20548-S MMBD3004S MFB2
MJ2
WIRE-TO-BOARD
MR3 6.81M_0805
4 RAC1 2
RAC AGND_LSD 1 2 1

THYRISTOR
12 CNXT-0805
TEST MBR2 4 3

MRV1
MMBD3004S ML1
MR1 6.81M_0805 2 MJ1
5 TAC1 *600_1206 1
TAC
CNXT-0805 *127214FS002G200ZO

TAC1_TIP 5335R13-005_0603 TIP_1


DIBN_HS 2 MJ3
(34) DIBN_HS MFB1
DIBP_HS DIBN 16 11 EIC MC11 0.1U 1
(34) DIBP_HS DIBN EIC CNXT-0402 MC8 MC9
470P 470P *127214FS002G200ZO
C MC10 0.01U_0603 C
AGND_LSD
CNXT-0603
PWR+ 15 R810 and C810 must be placed near pin 6 (RXI) MC7
PWR and there should be no vias on the(RXI)net. AGND_LSD *470P
GND

MC5 AVdd
0.1U MR2
CNXT-0402 2 6 RXI RX1_1 MC1 0.047UF_1206 BRIDGE_CC
MC12 AVDD RXI 100.0V
GND MC3 237K_0805
150P 0.1U CNXT-0805 MR9 MR5 MR6 MR10
MJ4 CNXT-0402 MT1 CNXT-0402 301_1206 301_1206 301_1206 301_1206
2 DIBN_HS 2 3 CNXT-1206 CNXT-1206 CNXT-1206 CNXT-1206
1 DIBP_HS MC6
47P
*127214FS002G200ZO CNXT-0402 AGND_LSD BRIDGE_CC2
1 4
MODEM-SMAR DIBP 14 10 MR13 100/F MQ1 QBASE
DIBP EIO MMBTA42
MJ6 MC13 CNXT-0402
1 MQ4
2 150P 9 EIF MQ3 MMBTA42
CNXT-0402 EIF MMBTA42
3
4 MR8
DVdd 1 8 TXO MQ2 *47_1206 MR11 MR12
*127214FS004G200ZO DVDD TXO MMBTA42 5% 3.01 3.01
GND
CNXT-0603 CNXT-0402 CNXT-0402
MC4 7 TXF
B
0.1U TXF B

MJ5 CNXT-0402 13
MTH1 GPIO MR4
1
VC 110_0603

EP
2
AGND_LSD 5% MR7
*127214FS002G200ZO CNXT-0603 9.1_1206
3

17
CNXT-1206

GND GND
VC_LSD

AGND_LSD

MC2
0.1U

AGND_LSD

A A

Quanta Computer Inc.


PROJECT : PB2
Size Document Number Rev
A
MOM
Date: Friday, March 23, 2007 Sheet 37 of 46
5 4 3 2 1
5 4 3 2 1

VCCRTC
VCCRTC

R581
Layout Note:
Place all capacitors close to IT8512.
C804 C803 L44
C818
L43 BK1608HS121-T

BK1608HS121-T
3VPCU

3VPCU
3VPCU
3VPCU
38
0 1000P/16V_4 0.1U (For PLL Power) MBCLK R579 10K
3VPCU 0.1U MBDATA R578 10K
C820 RTC_VCC (29) NBSWON# NBSWON# R516 10K
T226
MID1 (29) ECO ECO R522 10K
MID1
0.1U MID2 MY16 R528 *10K (22) PM_BATLOW# PM_BATLOW# R351 10K
MID2
MY17 R527 *10K HWPG_1 HWPG_1 R529 10K
D T219 D
C819 C510 C529 C808 C827 C795 C511
T218
HWPG_1 1SS355 D16 HWPG (40,44) (29) RF_SW RF_SW R345 10K
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U (30) TP_LED# TP_LED# R582 *10K
VOLMUTE# (35)
SUSC#
SUSC# (22)
MODE_ON# R594 10K

RTC_VCC
ECPWROK (6,15,22) (29) MODE_ON#
RSMRST# (22)
LID# R595 10K
VRON (40) (25) LID#
Layout Note: VCC3 3VPCU
LAN_REST (22)
net "3VPCU" and "RTC_VCC" MAINON (41,42,43,44) Modify 10/26

VOLMUTE#

ECPWROK
minimum trace width 12mils. SUSON (41,42)

LAN_REST

RVCC_ON
RSMRST#
RVCC_ON (41)

MAINON
SCLK

MY16
MY17

SUSON
CHG# (45)

VRON

CHG#
C563 R314 C566
PCI_CLK_8512
0.1U VCC5

114
121

127

107
*22P *22

11
26
50
92

74

84
83
82

56
57
33
19
20

99
98
97
96
95
94
93
3
LAD0 10 110 MBCLK

VSTBY
VSTBY
VSTBY
VSTBY
VSTBY

VSTBY

GPE3/ISCLK
GPE2/ISAS
VBAT

GPH0/ID0/SHBM
KSO16/GPC3
KSO17/GPC5

GPG1/ID7
GPH6/ID6
GPH5/ID5
GPH4/ID4
GPH3/ID3
VCC

AVCC

GPE1/ISAD

GINT/GPD5
L80HLAT/GPE0
L80LLAT/GPE7

GPH2/ID2/BADDR1
GPH1/ID1/BADDR0
(20,31) LAD0 LAD0 SMCLK0/GPB3 MBCLK (30,46)
LAD1 9 111 MBDATA
(20,31) LAD1 LAD1 SMDAT0/GPB4 MBDATA (30,46)

SM BUS
LAD2 8 115 DNBSWON#_1 D21 1SS355
(20,31) LAD2 LAD2 SMCLK1/GPC1 DNBSWON# (22)
LAD3 7 116 R537 R538
(20,31) LAD3 LAD3 SMDAT1/GPC2
LID# 22 117 CAPSLED# 10K 10K
(25) LID# LPCRST#/WUI4/GPD2 SMCLK2/GPF6 CAPSLED# (29)
PCI_CLK_8512 13 118
(2) PCI_CLK_8512 LPCCLK SMDAT2/GPF7 BATT-TYPE (45)
LFRAME# 6 Layout Note:
(20,31) LFRAME# LFRAME#
85 RF_LED# Place R471,R498,R534 within 500 mils from SPI
PS2CLK0/GPF0 RF_LED# (29)
17 86 ECOLED#
LPCPD#/WUI6/GPE6 PS2DAT0/GPF1 ECO_LED# (29) Flash.Place R567 within 500mils from R534;
87 ECO
PS2CLK1/GPF2 ECO (29)

PS/2
GATE 20 1SS355 D25 126 GPIO 88 R520 within 500mils from R498 and R570 within
(20) GATEA20 GA20/GPB5 PS2DAT1/GPF3 PCIRST# (21,26)
SERIRQ 5 89 TPCLK 500mils from R471.
(22,26) SERIRQ SERIRQ PS2CLK2/GPF4 TPCLK (30)
KBSMI# 1SS355 D19 KBSMI#_1 15 90 TPDATA
(22) KBSMI# ECSMI#/GPD4 PS2DAT2/GPF5 TPDATA (30)
SCI# 1SS355 D18SCI#_1 23 LPC
(22) SCI# ECSCI#/GPD3
WRST_8512# 14
WRST_8512# WRST#
(20) RCIN# RCIN# 1SS355 D26 4
1SS355 D15 BATLOW#_1 KBRST#/GPB6
(22) PM_BATLOW# 16 PWUREQ#/GPC7
C
PWM0/GPA0 24 NUMLED#
NUMLED# (29)
16Mbit (1M Byte), SPI C
25 SUSLED#

(29) CIR_IN
T246
119
123
GPC0/CRX
GPB2/CTX CIR
IT8512 PWM1/GPA1
PWM2/GPA2
PWM3/GPA3
PWM4/GPA4
28
29
30
SUSLED# (29)
ENBEEP (34)
REFON
WLSW
(46)
(31)
3VPCU

31 SWI#_1 D14 1SS355


PWM5/GPA5 SWI# (22)
PWM6/GPA6 32 MODE_LED# (29)
3VPCU Note 1 : Since all GPIO belong to VSTBY power domain, and PWM 34 R260
PWM7/GPA7 BT_ON# (30)
there are some special considerations below: 10K R273
47 FANSIG 10K
(1) If it is output to external VCC derived power domain TACH0/GPD6 FANSIG (30)
48 BAT/AC#
TACH1/GPD7 BAT/AC# (45)
R575 circuit, this signal should be isolated by a diode such as U12
470K KBRST# and GA20. 120 8512_SCE# 1 8
TMR0/WUI2/GPC4 TV_POWERON# (31) CE# VDD
124 8512_SCK R265 47 6
WRST_8512#
(2) If it is input from external VCC derived power domain TMR1/WUI3/GPC6 MODE_ON# (29)
8512_SI R259 47 SCK C506
5 SI
circuit, this external circuit must consider not to float the 8512_SO R270 15 2 7
C817 GPIO input. SO HOLD# 0.1U
125 NBSWON# 3 4
PWRSW/GPE4 NBSWON# (29) WP# VSS
0.1U 18 SUSB#
RI1#/WUI0/GPD0 SUSB# (22)
WAKE UP 21 ACIN Winbond
RI2#/WUI1/GPD1 ACIN (15,45)
Note 2 :
35 RF_SW
(1) Each input pin should be driven or pulled. WUI5/GPE5 RF_SW (29)
112
(2) Each output-drain output pin should be pulled. RING#/PWRFAIL#/LPCRST#/GPB7

109 BATLED0#
TXD/GPB1 BATLED0# (29)
UART 108 BATLED1#
RXD/GPB0 BATLED1# (29)
8M Winbond P/N:AKE3GFP0N08
66 TEMP_MBAT
ADC0/GPI0 TEMP_MBAT (45,46)
R576 10K 106 67 MBAT_V MBATV (46)
8512_SCK FLRST#/WUI7/GPG0/TM ADC1/GPI1 -PCUHOLD
105 FLCLK/SCK ADC2/GPI2 68 -PCUHOLD
104 69 MID3 R600 100K 3VPCU TEMP_MBAT
8512_SO FLAD3/GPG6 ADC3/GPI3 MBATV
103 FLAD2/SO FLASH ADC4/GPI4 70 EAPD (34,35) MID3
8512_SI 102 71 HWPG
8512_SCE# FLAD1/SI ADC5/GPI5 SUSC#
101 FLAD0/SCE# ADC6/GPI6 72 Hi: PB2 FAN TABLE
T247 100 FLFRAME#/GPG2 A/D D/A ADC7/GPI7 73
C518 C594 C793 C794
B
MY0 36
Low: PB3 FAN TABLE B
MY1 KSO0/PD0 39P/50V_4 39P/50V_4 39P/50V_4 39P/50V_4
37 KSO1/PD1
R577 MY2 38
*100K MY3 KSO2/PD2 CC-SET
39 76
MY4 40
KSO3/PD3
KSO4/PD4 KBMX
DAC0/GPJ0
DAC1/GPJ1 77 VFAN
CC-SET
VFAN
(45)
(30)
Modify 1/12
MY5 41 78 TP_LED# CC-SET
KSO5/PD5 DAC2/GPJ2 TP_LED# (30)
MY6 42 79 VADJ BAT/AC#
KSO6/PD6 DAC3/GPJ3 VADJ (25)
MY7 43 80 3VPCU DNBSWON#
MY8 KSO7/PD7 DAC4/GPJ4
44 KSO8/ACK# DAC5/GPJ5 81
MY9 45
MY10 KSO9/BUSY
46
MY11 51
KSO10/PE
KSO11/ERR# 2 PMUX1
PMUX1
KB/OS ID C788 C830 C805
KSI3/SLIN#

CK32KE
KSI1/AFD#
KSI0/STB#

KSI2/INIT#

MY12 52 CLOCK 128 PMUX2


KSO12/SLCT CK32K PMUX2
MY13 53 R521 R524 39P/50V_4 39P/50V_4 39P/50V_4
KSO13
AVSS

MY14 54 P/N:DHDFHDS0207
KSI4
KSI5
KSI6
KSI7

VSS
VSS
VSS
VSS
VSS
VSS
VSS

MY15 KSO14 100K 100K


55 KSO15 SW1
P/N:DHDHDS40204
IT8512 U14 MID1

ON
1 3

3
(29) MY[0..15]
58
59
60
61
62
63
64
65

1
12
27
49
91
113
122

75

Y3
AJ085120F01 P/N:BG332768909 MID2

2
2 4

4
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

R533 1 4
0 2 3
DIP2X2
(29) MX[0..7] VER:DX
1

C591 32.768KHZ C592 SW-8-1_27-4P


P/N:AJ085120F01 10P 10P 2 1 Please reserve this connector
2

for serial debug port & KBS download usage.


3VPCU 3VPCU 0 X: Free DOS
10/24 modify
1 X: Vista BATLED0#
T115
Layout Note: X 0: BENQ K/B BATLED1#
T216
1

Q25 Q26
32.768kHz clock lines:
a. If possible, please avoid using any through-hole.
X 1: PB2/PB3 KB
NBSWON# 2 MODE_ON# 2
(29) NBSWON# DTA124EU *DTA124EU b. Please make the trace length short, and the trace width wide enough.
A c. The spacing to the closest neighbor should be wide enough. A
3

-PCUHOLD
(15,45) ACIN
1SS355
D22
(22) SUSB#
1SS355 R520
D20
100K

Quanta Computer Inc.


PROJECT : PB2
Size Document Number Rev
A
EC ITE8512
Date: Friday, March 23, 2007 Sheet 38 of 46
5 4 3 2 1
5 4 3 2 1

D
CPU h-tc276be276x276d118p2 PCI_E
39 D
h-tc276be276x276d118p2 h-tc276be276x276d118p2
H13 H19 H20 H16 H9 H8 H4 H5 H24 H21
h-c236d150p2 h-c236d150p2 h-c236d150p2 h-c236d150p2

For EMI
1

1
h-c276d197p2
h-c276d197p2 h-c276d197p2 VCC5 VCC5 VCC5 VCC5
H3 H2 H14 H15 H18 H27 H28 H22 H7 H10
h-c315d118p2 h-c315d118p2 h-c315d118p2 h-c315d118p2 h-c315d118p2 h-c315d118p2 h-c315d118p2 h-c315d118p2 h-tc276be276x276d118p2 h-c236d150p2
C5 C616 C622 C621
0.1U 0.1U 0.1U 0.1U

FAN
1

1
VCC1.8 VCC1.8 VCC1.8 VCC1.8

H11 H6 H25 H26 H29 H1 H23 H12


C C
h-c315d118p2 h-c315d118p2 h-c315d118p2 h-c315d118p2 h-c315d118p2 h-c118d118n h-c118d118n h-c315d118p2
VIN VIN VIN VCC5

C443 C586 C789 C309


1

1
0.1U

VCC5 VCC5 RVCC3


0.1U/25V/X7R/0603 0.1U/25V/X7R/0603 RVCC3
0.1U/25V/X7R/0603

PAD2 PAD15 PAD6 PAD14 PAD12 PAD1 PAD5 PAD8 PAD11 PAD3 PAD16

B *EMIPAD142X91 *EMIPAD142X91 *EMIPAD142X91 *EMIPAD142X91 *EMIPAD142X91 *EMIPAD142X91 *EMIPAD142X91 *EMIPAD142X91 *EMIPAD142X91 *EMIPAD142X91 *EMIPAD142X91 B
1

1
PAD4 PAD7 PAD13 PAD9 PAD17 PAD18 PAD19 PAD20 PAD21 PAD22 PAD23 PAD24

*EMIPAD142X91 *EMIPAD142X91 *EMIPAD142X91 *EMIPAD142X91 *EMIPAD142X91 *EMIPAD142X91 *EMIPAD142X91 *EMIPAD142X91 *EMIPAD142X91 *EMIPAD142X91 *EMIPAD142X91 *EMIPAD142X91
1

1
A A

Quanta Computer Inc.


PROJECT : PB2
Size Document Number Rev
A
EMI/SCREW
Date: Friday, March 23, 2007 Sheet 39 of 46
5 4 3 2 1
5 4 3 2 1

CPU CORE 40
dV_Target/dt=12.5mV/us*71.5kohm/R_TIME
8736VCC 5VSUS
R_ILIM(PK)=8V*R_TRC/I(PK)LIMIT*Rsense
VIN_8736 VIN

PC30 2.2U/10V/X5R/0805 PR32 PL14


8736VCC 8736VDD
10R PD17 FBMJ3216HS480NT/1206

2200P/50V/X7R/0603
PC28

0.1U/25V/X7R/0603

10U/25V/X5R/1206
RB500V-40/UMD2
2.2U/10V/X5R/0805

21

30
D D
PQ17 PQ46 + PC21
fsw=300KHz*143Kohm/Rosc NTMFS4707NT1G
PC136
NTMFS4707NT1G

VCC

VDD
27U/25V

PC137
10U/25V/X5R/1206

PC24
PC138
5

5
PR37 143K/0603/F 8736OSC 8736BST1
14 OSC BST1 25
PR137 1.5R/0603
PR142 39K/0603/F 8736TIME 15 4 4
TIME

1
2
3

1
2
3
PC34 680P/50V/X7R/0603 8736CCV 8736DH1
17 CCV DH1 27

PR140 560K/0603/F
8736ILIM 16 PC143 VCC_CORE
ILIM CHOKE-ETQP4LR36WFC-4P
PC33 0.22U/16V/X7R/0805 PL11
8736REF 19 0.45_25A_20%_PCMB104T-R45MN
REF 8736LX1 VCC_CORE
LX1 26 1 2 VCC_CORE (4)
0.22U/16V/X7R/0805

5
8736TRC 18 3 4
TRC
PR138 2K/0603/F PR133

0.01U/50V/X7R/0603

330U/2V/7343/ESR=9
PR34 0 VID0 34 32 8736DL1 4 4 2.2R/0603
(4) CPU_VID0 D0 DL1

2200P/50V/X7R/0603
PR139 0 VID1 35 PD2 + + PC125
(4) CPU_VID1 PR124

1
2
3

1
2
3
D1
VID2 1000U/2.5V/ESR=8

PC120
PR36 0 SSM24PT 4.99K/0603/F

PC14
(4) CPU_VID2 36 D2
PR141 0 VID3 37 PR129 PR123
(4) CPU_VID3 D3

PC135
PR38 0 VID4 38 10K/0603/F 10K/0603/NTC
(4) CPU_VID4 D4
PGND 31 PQ14 PQ44
PR145 0 VID5 39
(4) CPU_VID5 D5
PR41 0 VID6
NTMFS4119NT1G NTMFS4119NT1G
(4) CPU_VID6 40 D6 PC40
6 8736CSP1 0.1U/25V/X7R/0603
CSP1 8736CSN1
CSN1 5 VIN_8736_2 VIN
C PR150 0 8736EN 4 C
(38) VRON SHDN PL2
PC42 PC153
PC148 5VSUS
*22P/50V/NPO/0603 *22P/50V/NPO/0603 PD16
*1U/10V/X5R/0603 8552VCC FBMJ3216HS480NT/1206

2200P/50V/X7R/0603

0.1U/25V/X7R/0603

10U/25V/X5R/1206
RB500V-40/UMD2
DRSKP# 33 PC142 PQ45 PQ16
DRSKP

1
28 8736PWM2 + PC134 PC133
PWM2 2.2U/10V/X5R/0805
NTMFS4707NT1G NTMFS4707NT1G

VCC
10U/25V/X5R/1206

PC140
27U/25V

PC139

PC23
PR136

5
4 GND BST 10 8552BST
PR45 0 8 8736CSP2
CSP2 8736CSN2 1.5R/0603
(6,22) DPRSLPVR 3 DPRSLPVR CSN2 7
9 8552DH 4 4
DH
PC41 PC152 PR143
5

1
2
3

1
2
3
DLY
*22P/50V/NPO/0603 *22P/50V/NPO/0603 PC32
4.99K/0603/F CHOKE-ETQP4LR36WFC-4P
PR46 0
2 0.22U/16V/X7R/0805 PL12
(3) PM_PSI# PSI
29 PR35 0.45_25A_20%_PCMB104T-R45MN
PWM3 DRSKP# 8552EN 8552LX VCC_CORE
7 EN LX 8 1 2
41 CGND1

5
0
42 CGND2 3 4
43 CGND3 CSP3 10 8736VCC PR144 PR33
VCC3

0.01U/50V/X7R/0603
8552PWM 6

330U/2V/7343/ESR=9
44 CGND4 CSN3 9 PWM
45 2 8552DL 4 4 2.2R/0603
CGND5 0 DL

PGND
46 PR126 + + PC126
CGND6
47 4.99K/0603/F

1
2
3

1
2
3
CGND7 PD1
48 1000U/2.5V/ESR=8

PC121
CGND8

PC15
49 SSM24PT

3
CGND9 PR130
50 PR42 10R PQ13 PR127
PR135 PR44 PR134 CGND10
11
PU8
GNDS PQ42 PC31
4.7K/F 4.7K/F 4.7K/F MAX8552EUB+ NTMFS4119NT1G 10K/0603/F 10K/0603/NTC
PC37 PR43 NTMFS4119NT1G 2200P/50V/X7R/0603
(6,22) DELAY_VR_PWRGOOD 24 IMVPOK
(22) VR_PWRGD_CK410# 1 CLKEN 1000P/50V/X7R/0603 *0 PC39
H_PROCHOT# 22 VR_HOT GND 20 0.1U/25V/X7R/0603
B B

PR147
13 8736VPS
VPS VSSSENSE (4)
10.5K/0603/F PR146
8736THRM 23 12 8736FBS
THRM FBS VCCSENSE (4)
10R
Parellel
PU2
PC36 PR148
PR29 MAX8736AGTL+
0 1000P/50V/X7R/0603 *0

PR30
MCHPG HWPG
(43) MCHPG HWPG (38,44)
*0

A PC26 A
*1000P/50V/X7R/0603

Quanta Computer Inc.


PROJECT : PB2
Size Document Number Rev
A
CPU CORE
Date: Friday, March 23, 2007 Sheet 40 of 46
5 4 3 2 1
1 2 3 4 5

3VPCU& 5VPCU& VCC2.5& Discharge


PR122 10R
VIN_8734_3V PL13
FBMJ3216HS480NT/1206
VIN 41
PD1.2
PD13

1U/25V/X7R/0805
0.1U/25V/X7R/0603

10U/25V/X5R/1206

10U/25V/X5R/1206

10U/25V/X5R/1206

10U/25V/X5R/1206
UDZS5.6B TE17

10U/25V/X5R/1206
0.1U/25V/X7R/0603
PR17
8734VCC 10K/0603/F

PC2

PC7

5
6
7
8

PC13

PC18
PC123

PC122

PC129

PC131
A A
8734_SHDN# 4
PR1 PQ6
*0
AO4414 PL10 PQ7 ME4416
PR16 3VPCU
8734_SKIP# 5.2UH/CHOKE-MSCDRI-104R
240 mils 8 1

3
2
1
100K 7
6
2
3
VCC3 100 mils

5
6
7
8

0.01U/50V/X7R/0603
5

1U/10V/X5R/0603
PR2 PR20
PR21

4
0 4 *0 + PC119
8734LDO3 *2.2R/0603 MAIND
PQ8 FB3 330U/6.3V

PC12
PC11
PU7 FDS6680AS PQ5 AO6402L
MAX8734AEEI+ PC17 PR12
PR120 6

3
2
1
PR15 0 *2200P/50V/X7R/0603 0
100K 1 28 8734BST3
5
2
4 3VSUS 80 mils
N.C BST3
PR121 0 1
8734PG 2 27 8734LX3
(42,43,44) 8734_PG PGOOD LX3
VIN

3
PR119 0 ON3 3 26 8734DH3
ON3 DH3 VIN_8734_5V PL1 SUSD
PR14 0 PC117
8734LDO5 ON5 4 25 8734LDO3 FBMJ3216HS480NT/1206
ON5 LDO3
1U/10V/X5R/0603 PC10 PQ40 AO6402L
ILIM3 5 24 8734DL3
ILIM3 DL3 0.22U/16V/X7R/0805
PR118 0 8734LDO5 6

10U/25V/X5R/1206
10U/25V/X5R/1206
6 23 1 5 4 60 mils

0.1U/25V/X7R/0603
(30) SYS_SHDN# SHDN GND RVCC3
PD12 2
FB3 7 22 3VPCU 3 1
FB3 OUT3 DAP202UT106
PC6 1U/10V/X5R/0603
8734REF 8 21 5VPCU 2

PC9

3
PC118
REF OUT5

PC8
5
6
7
8
B FB5 9 20 8734V+ PC114 RVCCD B
FB5 V+ PC3
PR7 100K 0.22U/16V/X7R/0805
10 19 8734DL5 4.7U/16V/X5R/1206
PRO DL5
4
ILIM5 11 18 8734LDO5
ILIM5 LDO5
PR6 47R/0603
8734_SKIP# 12 SKIP VCC 17 8734VCC PQ4
PR3 0 5VPCU PQ2 ME4416
8734VCC 8734TON 13 16 8734DH5 AO4414 PL9
TON DH5 3.8UH/CHOKE-MSCDRI-104R
240 mils 8 1

3
2
1
8734BST5 8734LX5
14 BST5 LX5 15 7
6
2
3
VCC5 160 mils

5
6
7
8
PC1 5

0.01U/50V/X7R/0603
PR5
1U/10V/X5R/0603 PR117

1U/10V/X5R/0603

4
4 *0
PR10

1
short *2.2R/0603 PC116 MAIND
PQ3 FB5

PC4

PC5
2
PR116 0 FDS6680AS 390U/6.3V/8R/22m PQ1 ME4416
PC115 PR9
0 8 1

3
2
1
*2200P/50V/X7R/0603 7
6
2
3
5VSUS 160 mils
5

4
PR125 0
8734REF 8734DL3 SUSD

(15,20,23,29,30,38,46) 3VPCU
PC128 PC130
PR11 PR8 (20,23,29,42) 5VPCU
150K/0603/F 150K/0603/F 0.01U/50V/X7R/0603 0.01U/50V/X7R/0603
PR113 *0 (2,3,6,8,9,11,13,14,15,16,19,20,21,22,23,24,25,26,28,30,31,33,38,40) VCC3
VCC2.5
(42,43,44) 8734_PG PU6 For LAN (14,23,24,25,29,30,33,35,36,38,39) VCC5
3

(22,23,32,39) RVCC3
C ILIM3 ILIM5 *G966-25ADJF1UF (21,22,26,27,28,31,34) 3VSUS C
PD15 PD14
PR114 *0 1 5 1.5A 80 mils (29,40,43,44) 5VSUS
BAT54S BAT54S POK NC
(38,42,43,44) MAINON 2 VEN VO 6 VCC2.5 (14)
PR13
2

PR4
5VSUS 4 VPP PR112 *25.5K/F/0603

PGND
75K/0603/F 75K/0603/F 7

GND
15VPCU 5VPCU ADJ
3VSUS 3 VIN

PC124 PC127
R1 PC102

9
8
1
PC109 *10U PR111 *0.1U/25V/X7R/0603

1
0.1U/25V/X7R/0603 0.1U/25V/X7R/0603 PC110 *10U
*0.1U/25V/X7R/0603 R2 *12K/F/0603 PC100

2
5VPCU RVCC3 15VPCU

Vo=0.8*(1+R1/R2) PR128 PR132 PR131


100K 22R/0603 1M/F

RVCCG RVCCD
5VPCU VCC5 VCC3 VCC1.5 15VPCU

3
3
(38) RVCC_ON 2 2 2 PC132
PR18 PR25 PR22 PR23 PR19 5VPCU 5VSUS 3VSUS 1.8VSUS 15VPCU
100K 22R/0603 22R/0603 *22R/0603 1M/F *0.01U/50V/X7R/0603

1
MAING MAIND
MAIND (42)

1
PR54 PR40 PR39 PR50 PR55
3

3
3

100K 22R/0603 22R/0603 *22R/0603 1M/F PQ47 PQ43 PQ41


PC16
MAINON 2 2 2 2 2 SUSG SUSD DTC144EUEUA-7-F 2N7002E-T1-E3 2N7002E-T1-E3
D (38,42,43,44) MAINON D
*0.01U/50V/X7R/0603
3

3
3
1

(38,42) SUSON 2 2 2 2 2 PC47


PQ10 PQ15 PQ12 PQ11 PQ9 *0.01U/50V/X7R/0603
1

DTC144EUEUA-7-F 2N7002E-T1-E3 2N7002E-T1-E3 *2N7002E-T1-E3 2N7002E-T1-E3


1

1
Quanta Computer Inc.
PQ19 PQ22 PQ21 PQ25 PQ26
DTC144EUEUA-7-F 2N7002E-T1-E3 2N7002E-T1-E3 *2N7002E-T1-E3 2N7002E-T1-E3 PROJECT : PB2
Size Document Number Rev
A
3V / 5V
Date: Friday, March 23, 2007 Sheet 41 of 46
1 2 3 4 5
5 4 3 2 1

1.8VSUS & VCC1.8 & SMDDR_VTERM


42
D D

5VPCU
VIN

PL6

FBMJ3216HS480NT/1206

*10U/25V/X5R/1206
10U/25V/X5R/1206

0.1U/25V/X7R/0603
10U/25V/X5R/1206

0.1U/25V/X7R/0603

2200P/50V/X7R/0603

RB500V-40/UMD2

1
10U PR105 PC89
PC88
11K/F/0603 0.01U/50V/X7R/0603

PC95
PC87

PC97

PC96
PC98

2
PC101

PD11
51116CS

PR103

14

15
8
7
6
5
0
51116BST 20

CS
V5IN
VBST
PQ38 4 51116DH 19 13 PR104 0
DRVH PGOOD 8734_PG (41,43,44)
12 51116S5 PR102 0
AO4414 S5 SUSON (38,41)
11 51116S3 PR101 0 MAINON
1.8VSUS S3 MAINON (38,41,43,44)
PC90
VLDOIN 1 1.8VSUS
1.5UH 0.1U/25V/X7R/0603
1.8V / 8A 400 mils

1
PL8 10U

1
2
3
51116LX 18 PC83
LL

2
8
7
6
5
*2200P/50V/X7R/0603
PR110 2 SMDDR_VTERM
330U/2.5V/R=15m

VTT
330U/2.5V/R=15m

0.1U/25V/X7R/0603
C 4 51116DL 17 PR88 C
*2.2R/0603 DRVL
VTTSNS 4
+ + PR95 16 6
PGND MODE 0

0.1U/25V/X7R/0603
PC93
*2K/F 21
PC108
PC106

GND1

1
PC104

PQ37 PR86 PR89 10U 10U


PC76 PC73

1
2
3
FDS6680AS 3 0 *0

PC71
2

2
VTTGND

9 VDDQSNS VTTREF 7
51116FB 10 VDDQSET

GND2
GND3
GND4
GND5
GND6
GND7
GND
8 COMP
VDDQSET PR99 0 PR93 0
GND = 2.5V PR92 0

22
23
24
25
26
27
5
5V = 1.8V SMDDR_VREF
PU4
R = 1.5~3V
PR100 TPS51116
PC75
*0
0.033U/25V/X7R

PR96 short

VCC1.8
PQ39 1.8VSUS (6,8,9,13,41) 1.8VSUS
AO4704
B 4A 1 8
(14,16,17,18,33,39) VCC1.8 B

2 7
3 6 (12) SMDDR_VTERM
5
1

PC113
(6,13) SMDDR_VREF
4

0.1U/16V/X7R/0603
2

PR115
(41) MAIND
0
PC112
*0.1U/16V/X7R/0603

A A

Quanta Computer Inc.


PROJECT : PB2
Size Document Number Rev
A
1.8VSUS /SMDDR_VTERM
Date: Friday, March 23, 2007 Sheet 42 of 46
5 4 3 2 1
5 4 3 2 1

VCCP&VCC1.5V&VCC1.25&VGA1.2 43
VIN_51124 VIN_51124 VIN
D D
PL19

FBMJ3216HS480NT/1206

0.1U/25V/X7R/0603

0.1U/25V/X7R/0603
0.1U/25V/X7R/0603
0.1U/25V/X7R/0603

2200P/50V/X7R/0603
2200P/50V/X7R/0603
2200P/50V/X7R/0603

2200P/50V/X7R/0603
PC35
10U/25V/X5R/1206 PC172 PC171

PC62

PC61
PC174
PC63
10U/25V/X5R/1206 10U/25V/X5R/1206
PC147

PC144

8
7
6
5
PC145
PC146 VCCP VCC1.5

5
6
7
8
PQ20 4

25
26
27
28
29
PU10

4
3

1
AO4414
PR52 PR69 4

VO2

GND1
GND2
GND3
GND4
GND5

VO1
TON
GND
51124BST2 9 22 51124BST1 PQ49
VCCP @ 4.5A 0
BST2 BST1
0 AO4414
51124DH2 10 21 51124DH1 PC56

1
2
3
DH2 DH1 VCC1.5
VCCP PL15 PC45 0.1U/25V/X7R/0603 0.1U/25V/X7R/0603 PL18 6A
1.5UH 4.7UH/CHOKE-MSCDRI-104R

3
2
1
51124LL2 11 20 51124LL1 VCC1.5 (4,9,21,23,28,31,41)
LL2 LL1
PC44

PC51
8
7
6
5

5
6
7
8
51124DL2 12 19 51124DL1 PR74
PR161 DL2 DL1 PR166

330U/2.5V/R=15m
PR31
*2200P/50V/X7R/0603

*2.2R/0603
330U/2.5V/R=15m
0.1U/25V/X7R/0603

C 8.06K/F 20K/F C
*100P 50V(+-5%,NPO,0603)EP

FB2 FB1

*2200P/50V/X7R/0603

*100P 50V(+-5%,NPO,0603)EP
*2.2R/0603

+ 4 5 2 4 +
FB2 FB1 PC58
FDS6690AS_NL 0.1U/25V/X7R/0603
PC141

PC27

PC173
PC29

8 EN2 EN1 23
PQ18 PC64
PQ33
14 17

*1U/10V/X5R/0603
PR162 PR164

PGOOD2

PGOOD1
1
2
3

3
2
1
TRIP2 TRIP1

PGND2

PGND1
V5FILT
20K/F FDS6690AS_NL 20K/F

V5IN

2
PR168

PC43
PR51

13

15

16

24

18
TPS51124 11K
*1SS355/UMD2 6.49K/F Vo=0.75Vx(1+R1/R2)
Vo=0.75Vx(1+R1/R2) PD6

1
PR172 0
MAINON (38,41,42,44)

2
PR154 0
PC155
(38,41,42,44) MAINON PC158
10U

1
10U
PR48 0 0

10R
PR63 (2,3,4,5,6,8,9,20,23) VCCP
(40) MCHPG 8734_PG (41,42,44)

2
(4,9,21,23,28,31,41) VCC1.5

PR58
PR60 0 PR156 PR169
100K *100K 5VSUS
1 (6,9,23) VCC1.25

1
B B

(14,16,19) VGA1.2V

PR106 *0
PR27 *0 PU1 (41,42,44) 8734_PG PU5
(41,42,44) 8734_PG VCC1.25 VGA1.2V
G966-25ADJF1UF G966-25ADJF1UF
PR28 0 1 5 2.5A 100 mils PR107 0 1 5 2A 80 mils
POK NC POK NC
(38,41,42,44) MAINON 2 VEN VO 6 (38,41,42,44) MAINON 2 VEN VO 6

5VSUS 4 VPP PR26 6.81K/F/0603 5VSUS 4 VPP PR98 6.04K/F/0603


PGND

PGND
7 7
GND

GND
ADJ ADJ
VCC1.5 3 VIN VCC1.5 3 VIN
R1 PC19
R1 PC77
9
8

9
8
1

1
PC22 10U PR24 0.1U/25V/X7R/0603 PC91 10U PR97 0.1U/25V/X7R/0603
1

1
PC25 10U PC92 10U
0.1U/25V/X7R/0603 R2 12K/F/0603 PC20 0.1U/25V/X7R/0603 R2 12K/F/0603 PC81
2

2
2

2
A
Vo=0.8*(1+R1/R2) Vo=0.8*(1+R1/R2) A

Quanta Computer Inc.


PROJECT : PB2
Size Document Number Rev
A
VCCP(1.05V)/VCC1.5
Date: Friday, March 23, 2007 Sheet 43 of 46
5 4 3 2 1
5 4 3 2 1

VGACORE PL4

VIN
FBMJ3216HS480NT/1206

PL5
FBMJ3216HS480NT/1206
VIN_1993 5VSUS
PR84
1993VCC
44
22R/0603

2200P/50V/X7R/0603
0.1U/25V/X7R/0603
10U/25V/X5R/1206

10U/25V/X5R/1206
E E

10U/25V/X5R/1206

10U/25V/X5R/1206
PC78 PC72
1U/10V/X5R/0603
1U/10V/X5R/0603

PC86

PC84

PC80
PC99

PC85

PC79

19 1993VDD
PD10
RB500V-40/UMD2

1993_BST

24

22
VDD

OVP/UVP

VCC
5
VGACORE PR94 14 1993V+ VIN_1993
1993BST V+
17
PQ35 BST
4 1993PG PR77 0
0 POK 8734_PG (41,42,43)
NTMFS4707NT1G 1993DH PR78 PC67 *1U/10V/X5R/0603
1.1V / 20A 1000 mils 4 15 DH
3 *0
CHOKE-ETQP4LR36WFC-4P LSAT
VGACORE (19) PC82

3
2
1
PL7 23 PR82 0 MAINON
0.45_25A_20%_PCMB104T-R45MN 0.22U/16V/X7R/0805 SHDN PR91 *0 MAINON (38,41,42,43)
VGACORE 1993LX PR90 10K/0603/F V_PWRCNTL (15)
1 2 16 LX GATE 21

3 4 7 1993REFIN PR83 75K/0603/F 1993_P_REF


REFIN

8
7
6
5

8
7
6
5
D PR109 D
0.1U/25V/X7R/0603

*2.2R/0603 1993DL
220U/2.5V

220U/2.5V

220U/2.5V
18 DL PR87 PC70
+ + + 4 4
75K/0603/F 470P/50V/X7R/0603

*2200P/50V/X7R/0603
20 GND
PR85
PC103

PC111

PC105
PC107

PR108 OD 8
1993_CSP 11 PR85
4.02K/0603/F CSP 37.4K/0603/F
37.4K : 1.2 V

PC94
27K : 1.15V For NB8M

1
2
3

1
2
3
PQ36 PQ34 1993_CSN 12
CSN P/N:CS32703F912
1 PR79 *0
FDS6676AS FDS6676AS TON
PC74 10 OUT

FBLANK
6 1993_P_REF
REF
9

SKIP

GND
ILIM
FB
0.1U/25V/X7R/0603
PR80 PC69

13

29
Close to output Cap! 56K/0603/F 0.1U/25V/X7R/0603
PU3
PR76 short
MAX1993ETG
PR81
C C
8.2K/F
PC68

470P/50V/X7R/0603

PR75 0
HWPG
(41,42,43) 8734_PG HWPG (38,40)

PC66
*1000P/50V/X7R/0603

B B

A A

Quanta Computer Inc.


PROJECT : PB2
Size Document Number Rev
A
VGA_CORE
Date: Friday, March 23, 2007 Sheet 44 of 46
5 4 3 2 1
5 4 3 2 1

Battery Charger 45
E AC ADAPTOR IN CONN PL3
E

FBMJ3216HS480NT/1206 PD19 PQ48 AO4427


VA SSM34PT PR173 PQ50 AO4427 VIN
PJ1 PF2 1 8
RES 0.01R 2W +-2%/7520
PL20 1 8 2 7
1 PJ1.1 PF1.1 CS_IN 2 1 CS_OUT 2 7 3 6 MBAT+ (46)
2 PD9 3 6 5

1000P/50V/X7R/0603
0.1U/25V/X7R/0603
3 FBMJ3216HS480NT/1206 FUSE 10A 0453010.MR 2P 1P 5

0.1U/25V/X7R/0603
SSM34PT

0.1U/25V/X7R/0603
4

4
PR151

220K/0603/F

4
PC60 33K/0603/F

PR73
PR70
87502-0400-4P-L

8724CSSN
8724CSSP
10K/0603/F

PC59
PC175

PC170
PC65
87502-0400-4P-L 0.1U/25V/X7R/0603

PD7
DFHS04FR741 PR149
1SS355
2.2K/0603/F

220K/0603/F

3
PR71 PR49

PR72
1 6
0 0
2 5 2
PQ23
PD5 3 4 2N7002E-T1-E3
UDZS15B-7-F

1
PC160 PC163 PQ32
D PR56 4.7K/F IMD2AT108 D
*0.1U/25V/X7R/0603 *0.1U/25V/X7R/0603
(15,38) ACIN BAT/AC# (38)

1U/25V/X7R/0805
PR59 PR68
4.7K/F

PC168
470K/0603

VIN
CELLS PR152 *0 REFIN
PL16

DCIN
VIN
FBMJ3216HS480NT/1206
REFIN
Vout 5.4V
PR165 33R/0603
8724_LDO PC38 PC150 PC149
PR57 PR159
8724_LDO 0.1U/25V/X7R/0603 10U/25V/X5R/1206 0.1U/25V/X7R/0603

27
26
PC166 PC48
1.33K/F/0603 825/F/0603

CSSP
CSSN
CELLS 17 1U/10V/X5R/0603 1U/10V/X5R/0603
PR153 1 DCIN
LDO 2
0
10 ACIN DLOV 22 8724_DLOV

1
2
PR157 2.2R/0603
24 PD4
C VCTL BST C
15 VCTL RB500V-40/UMD2
PR158 1K PQ28
ICTL 13 PC156 FDS6900AS PR170
(38) CC-SET ICTL
DHI 25 CHG_DH 8 RES 0.015R 1W +-2%/3720
3

REFIN PL17
12 REFIN 0.22U/16V/X7R/0805
PR47 0 23 CHG_LX 7 Ichg+ 1 2 MBAT+ MBAT+
LX
(38) CHG# 2 6 5.2UH/CHOKE-MSCDRI-104R
PC157 11 21 CHG_DL 5 1P 2P
ACOK DLO
PQ27 0.1U/16V/X7R/0603 8724ICHG 9 20
1

DTC144EUEUA-7-F ICHG PGND PR155


PC151 PC57 PC169
8724IINP 28 19 8724CSIP 3 *2.2R/0603
IINP CSIP
0.1U/25V/X7R/0603 10U/25V/X5R/1206 10U/25V/X5R/1206
(38,46) TEMP_MBAT 8 SHDN CSIN 18 8724CSIN
PR61 220R/0603 PC154
8724CCV 7 16 MBAT+

4
CCV BATT 8724_REF *2200P/50V/X7R/0603
Vref = 4.096V
8724CCI 6 4 8724_REF
CCI REF
PR65 PR64
5 CCS CLS 3 8724CLS
1K
8724CCS
GND

GND

22K/F
0.01U/50V/X7R/0603

0.01U/50V/X7R/0603

14

29

PC55 PU9 PR67 PC167


MAX8724ETI+ 1U/10V/X5R/0603
PC165
PC164

0.1U/25V/X7R/0603 22K/F
B B

ILIM=[22/(22+22)]*75mV/10mR = 3.75A. (71.25W)

8724ICHG 8724IINP REFIN CELLS


BATT-TYPE
1 6

2 5 BATT-TYPE (38) High Low


PR167 PC162 PR171 PC53 3 4
Li-ion 4S2P
20K/F *1000P/50V/X7R/0603 10K/0603/F *1000P/50V/X7R/0603 Li-ion 4S1P Li-ion 3S2P
PQ24 Ni-MH 8S1P
IMD2AT108
A A

Quanta Computer Inc.


PROJECT : PB2
Size Document Number Rev
A
BATTERY CHARGER
Date: Friday, March 23, 2007 Sheet 45 of 46
5 4 3 2 1
5 4 3 2 1

Battery Connector
PQ29 Battery Connector 46
IMD2AT108 Modify:1023
1 6 REFP BAT-200275MR007G125ZL-7P-L-V
3VPCU (15,20,23,29,30,38,41) VIN
E MBAT+ E
SUY=BAT-200275MR007G125ZL-7P-L-V

IMD2A
2 5
PF1 FUSE 10A 0453010.MR
PJP1
MBAT+ (45) 3 4
PC50 7 7
6 P_MBAT
0.1U/25V/X7R/0603 6
5 5 TEMP_MBAT (38,45)
4 P_CLK PR163 330R/0603
4

0.1U/25V/X7R/0603
0.01U/50V/X7R/0603
P_DATA PR160 330R/0603

0.1U/25V/X7R/0603
3 3
(38) REFON 2 2
1 1 PR66

9
8

PC159
PC54

PC161
200K/F

9
8

47P/50V/NPO/0603
47P/50V/NPO/0603
MBDATA (30,38)

MBCLK (30,38)

UDZS5.6B TE17

UDZS5.6B TE17
MBATV voltage :

PC49

3
PC46
16.8V*40.2/(200+40.2)= 2.812V PQ31

PD3

PD18
REFP
Li-ion 4S*P 2
12.0V*40.2/(200+40.2)= 2.008V 2N7002E-T1-E3

D Ni-MH 8S1P 8.0V*40.2/(200+40.2)= 1.34V D

1
MBATV MBATV (38)
REFP

TEMP_MBAT voltage : PC52 PR62

2
0.01U/50V/X7R/0603 40.2K/0603/F
PR53 10K/0603/F
System Off System On 3VPCU 3 1
3VPCU

Battery 0V 1.6V
PQ30
2N7002E-T1-E3
Adapter 3.3V 3.3V
Battery+Adapter 1.6V 1.6V

ACIN POWER ON TIMING Power Sequencing and Reset Signal Timings


C ACIN C

5VPCU/3VPCU Hub interface "CPU


Reset Complete"
NBSWON# message

STPCLK#,CPUSLP#,
DNBSWON# STP_CPU#,STP_PCI#
To ICH8 SLP_S1#,C3_STAT#

Frequency Strap Values Normal


Straps Operation]
RVCC_ON
2~3RTC
To ICH8 PCIRST#
RSMRST#
32~38RTC
SUS_STAT#
SUSB#,SUSC#
PWROK 99ms
From ICH8
SUSON
VCC3.3, VCC1.5, 0ms
From 8512 VCCHI, V_CPU_IO
MAINON
10ms
From 8512
B
VSUS,VCC B
VccLAN3_3, 0ms
VccLAN1_5
VCCP
1~2RTC
From 8734_PG SLP_S3#
HWPG
1~2RTC
From 8512 SLP_S4#
VR_ON
110ms
SLP_S5#

VCORE_CPU 110ms
SUSCLK
CK_PWG
To clock generator 10ms
RSMRST#

99ms < t 214 VccSus3_3, 0ms


PWROK ICH_PWROK VccSus1_5
To GMCH/other
PLTRST#\PCIRST# PCI device 0ms
V5RefSus

From ICH8 to CPU 5ms


H_PWRGD RTCRST#

A 2ms VccRTC
A

H_CPURST# Form GMCH to CPU

Quanta Computer Inc.


PROJECT : PB2
Size Document Number Rev
A
BATTERY CNN
Date: Friday, March 23, 2007 Sheet 46 of 46
5 4 3 2 1

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