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Datasheets
August 1986
Revised February 2000
DM7402
Quad 2-Input NOR Gates
General Description
This device contains four independent gates each of which
performs the logic NOR function.
Ordering Code:
Order Number Package Number Package Description
DM7402N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs Output
A B Y
L L H
L H L
H L L
H H L
H = HIGH Logic Level
L = LOW Logic Level
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Typ
Symbol Parameter Conditions Min Max Units
(Note 2)
VI Input Clamp Voltage VCC = Min, II = −12 mA −1.5 V
VOH HIGH Level VCC = Min, IOH = Max
2.4 3.4 V
Output Voltage VIL = Max
VOL LOW Level VCC = Min, IOL = Max
0.2 0.4 V
Output Voltage VIH = Min
II Input Current @ Max Input Voltage VCC = Max, VI = 5.5V 1 mA
IIH HIGH Level Input Current VCC = Max, VI = 2.4V 40 µA
IIL LOW Level Input Current VCC = Max, VI = 0.4V −1.6 mA
IOS Short Circuit VCC = Max
mA
Output Current (Note 3) −18 −55
ICCH Supply Current with Outputs HIGH VCC = Max 8 16 mA
ICCL Supply Current with Outputs Low VCC = Max 14 27 mA
Note 2: All typicals are at VCC = 5V, TA = 25°C.
Note 3: Not more than one output should be shorted at a time.
Switching Characteristics
at VCC = 5V and TA = 25°C
Symbol Parameter Conditions Min Max Units
www.fairchildsemi.com 2
DM7402 Quad 2-Input NOR Gates
Physical Dimensions inches (millimeters) unless otherwise noted
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems 2. A critical component in any component of a life support
which, (a) are intended for surgical implant into the device or system whose failure to perform can be rea-
body, or (b) support or sustain life, and (c) whose failure sonably expected to cause the failure of the life support
to perform when properly used in accordance with device or system, or to affect its safety or effectiveness.
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the www.fairchildsemi.com
user.
3 www.fairchildsemi.com
DM7408 Quad 2-Input AND Gates
August 1986
Revised July 2001
DM7408
Quad 2-Input AND Gates
General Description
This device contains four independent gates each of which
performs the logic AND function.
Ordering Code:
Order Number Package Number Package Description
DM7408N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Typ
Symbol Parameter Conditions Min Max Units
(Note 2)
VI Input Clamp Voltage VCC = Min, II = −12 mA −1.5 V
VOH HIGH Level VCC = Min, IOH = Max
2.4 3.4 V
Output Voltage VIL = Max
VOL LOW Level VCC = Min, IOL = Max
0.2 0.4 V
Output Voltage VIH = Min
II Input Current @ Max Input Voltage VCC = Max, VI = 5.5V 1 mA
IIH HIGH Level Input Current VCC = Max, VI = 2.4V 40 µA
IIL LOW Level Input Current VCC = Max, VI = 0.4V −1.6 mA
IOS Short Circuit Output Current VCC = Max (Note 3) −18 −55 mA
ICCH Supply Current with Outputs HIGH VCC = Max 11 21 mA
ICCL Supply Current with Outputs LOW VCC = Max 20 33 mA
Note 2: All typicals are at VCC = 5V, TA = 25°C.
Note 3: Not more than one output should be shorted at a time.
Switching Characteristics
at VCC = 5V and TA = 25°C
Symbol Parameter Conditions Min Max Units
tPLH Propagation Delay Time CL = 15 pF
27 ns
LOW-to-HIGH Level Output RL = 400Ω
tPHL Propagation Delay Time
19 ns
HIGH-to-LOW Level Output
www.fairchildsemi.com 2
DM7408 Quad 2-Input AND Gates
Physical Dimensions inches (millimeters) unless otherwise noted
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems 2. A critical component in any component of a life support
which, (a) are intended for surgical implant into the device or system whose failure to perform can be rea-
body, or (b) support or sustain life, and (c) whose failure sonably expected to cause the failure of the life support
to perform when properly used in accordance with device or system, or to affect its safety or effectiveness.
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the www.fairchildsemi.com
user.
3 www.fairchildsemi.com
DM74LS32 Quad 2-Input OR Gates
March 1998
DM74LS32
Quad 2-Input OR Gates
General Description
This device contains four independent gates each of which
performs the logic OR function.
Features
n Alternate Military/Aerospace device (54LS32) is
available. Contact a Fairchild Semiconductor Sales
Office/Distributor for specifications.
Connection Diagram
Dual-In-Line-Package
DS006361-1
Function Table
Y=A+B
Inputs Output
A B Y
L L L
L H H
H L H
H H H
H = High Logic Level
L = Low Logic Level
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units
(Note 2)
VI Input Clamp Voltage VCC = Min, II = −18 mA −1.5 V
VOH High Level Output VCC = Min, IOH = Max DM54 2.5 3.4 V
Voltage VIH = Min DM74 2.7 3.4
VOL Low Level Output VCC = Min, IOL = Max DM54 0.25 0.4
Voltage VIL = Max DM74 0.35 0.5 V
IOL = 4 mA, VCC = Min DM74 0.25 0.4
II Input Current @ Max VCC = Max, VI = 7V 0.1 mA
Input Voltage
IIH High Level Input Current VCC = Max, VI = 2.7V 20 µA
IIL Low Level Input Current VCC = Max, VI = 0.4V −0.36 mA
IOS Short Circuit VCC = Max DM54 −20 −100 mA
Output Current (Note 3) DM74 −20 −100
ICCH Supply Current with VCC = Max 3.1 6.2 mA
Outputs High
ICCL Supply Current with VCC = Max 4.9 9.8 mA
Outputs Low
Switching Characteristics
at VCC = 5V and TA = 25˚C
RL = 2 kΩ
Symbol Parameter CL = 15 pF CL = 50 pF Units
Min Max Min Max
tPLH Propagation Delay Time 3 11 4 15 ns
Low to High Level Output
tPHL Propagation Delay Time 3 11 4 15 ns
High to Low Level Output
Note 2: All typicals are at VCC = 5V, TA = 25˚C.
Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second.
www.fairchildsemi.com 2
3
Physical Dimensions inches (millimeters) unless otherwise noted
www.fairchildsemi.com 4
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
5 www.fairchildsemi.com
DM74LS32 Quad 2-Input OR Gates
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
DM7404 Hex Inverting Gates
August 1986
Revised February 2000
DM7404
Hex Inverting Gates
General Description
This device contains six independent gates each of which
performs the logic INVERT function.
Ordering Code:
Order Number Package Number Package Description
DM7404M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
DM7404N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Typ
Symbol Parameter Conditions Min Max Units
(Note 2)
VI Input Clamp Voltage VCC = Min, II = −12 mA −1.5 V
VOH HIGH Level VCC = Min, IOH = Max
2.4 3.4 V
Output Voltage VIL = Max
VOL LOW Level VCC = Min, IOL = Max
0.2 0.4 V
Output Voltage VIH = Min
II Input Current @ Max Input Voltage VCC = Max, VI = 5.5V 1 mA
IIH HIGH Level Input Current VCC = Max, VI = 2.4V 40 µA
IIL LOW Level Input Current VCC = Max, VI = 0.4V −1.6 mA
IOS Short Circuit Output Current VCC = Max (Note 3) −18 −55 mA
ICCH Supply Current with Outputs HIGH VCC = Max 6 12 mA
ICCL Supply Current with Outputs LOW VCC = Max 18 33 mA
Note 2: All typicals are at VCC = 5V, TA = 25°C.
Note 3: Not more than one output should be shorted at a time.
Switching Characteristics
at VCC = 5V and TA = 25°C
Symbol Parameter Conditions Min Max Units
www.fairchildsemi.com 2
DM7404
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M14A
3 www.fairchildsemi.com
DM7404 Hex Inverting Gates
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems 2. A critical component in any component of a life support
which, (a) are intended for surgical implant into the device or system whose failure to perform can be rea-
body, or (b) support or sustain life, and (c) whose failure sonably expected to cause the failure of the life support
to perform when properly used in accordance with device or system, or to affect its safety or effectiveness.
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the www.fairchildsemi.com
user.
www.fairchildsemi.com 4
This datasheet has been downloaded from:
www.DatasheetCatalog.com
DM7486
Quad 2-Input Exclusive-OR Gate
General Description
This device contains four independent gates each of which
performs the logic exclusive-OR function.
Ordering Code:
Order Number Package Number Package Description
DM7486N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Typ
Symbol Parameter Conditions Min Max Units
(Note 2)
VI Input Clamp Voltage VCC = Min, II = −12 mA −1.5 V
VOH HIGH Level VCC = Min, IOH = Max 2.4 3.4
V
Output Voltage VIL = Max, VIH = Min
VOL LOW Level VCC = Min, IOL = Max
0.2 0.4 V
Output Voltage VIH = Min, VIL = Max
II Input Current @ Max Input Voltage VCC = Max, VI = 5.5V 1 mA
IIH HIGH Level Input Current VCC = Max, VI = 2.4V 40 µA
IIL LOW Level Input Current VCC = Max, VI = 0.4V −1.6 mA
IOS Short Circuit Output Current VCC = Max (Note 3) −18 −55 mA
ICCH Supply Current with Outputs HIGH VCC = Max (Note 4) 30 50 mA
ICCL Supply Current with Outputs LOW VCC = Max (Note 3)(Note 5) 36 57 mA
Note 2: All typicals are at VCC = 5V, TA = 25°C.
Note 3: Not more than one output should be shorted at a time.
Note 4: ICCH is measured with all outputs open, one input of each gate at 4.5V, and the other inputs grounded.
Note 5: ICCL is measured with all outputs open, and all inputs at ground.
Switching Characteristics
at VCC = 5V and TA = 25°C
CL = 15 pF, RL = 400Ω
Symbol Parameter Conditions Units
Min Max
tPLH Propagation Delay Time
23 ns
LOW-to-HIGH Level Output
Other Input LOW
tPHL Propagation Delay Time
17 ns
HIGH-to-LOW Level Output
tPLH Propagation Delay Time
30 ns
LOW-to-HIGH Level Output
Other Input HIGH
tPHL Propagation Delay Time
22 ns
HIGH-to-LOW Level Output
www.fairchildsemi.com 2
DM7486 Quad 2-Input Exclusive-OR Gate
Physical Dimensions inches (millimeters) unless otherwise noted
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems 2. A critical component in any component of a life support
which, (a) are intended for surgical implant into the device or system whose failure to perform can be rea-
body, or (b) support or sustain life, and (c) whose failure sonably expected to cause the failure of the life support
to perform when properly used in accordance with device or system, or to affect its safety or effectiveness.
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the www.fairchildsemi.com
user.
3 www.fairchildsemi.com
This datasheet has been download from:
www.datasheetcatalog.com
DM7400
Quad 2-Input NAND Gates
General Description
This device contains four independent gates each of which
performs the logic NAND function.
Ordering Code:
Order Number Package Number Package Description
DM7400M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
DM7400N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Typ
Symbol Parameter Conditions Min Max Units
(Note 2)
VI Input Clamp Voltage VCC = Min, II = −12 mA −1.5 V
VOH HIGH Level VCC = Min, IOH = Max
2.4 3.4 V
Output Voltage VIL = Max
VOL LOW Level VCC = Min, IOL = Max
0.2 0.4 V
Output Voltage VIH = Min
II Input Current @ Maximum Input Voltage VCC = Max, VI = 5.5V 1 mA
IIH HIGH Level Input Current VCC = Max, VI = 2.4V 40 µA
IIL LOW Level Input Current VCC = Max, VI = 0.4V −1.6 mA
IOS Short Circuit Output Current VCC = Max (Note 3) −18 −55 mA
ICCH Supply Current with Outputs HIGH VCC = Max 4 8 mA
ICCL Supply Current with Outputs LOW VCC = Max 12 22 mA
Note 2: All typicals are at VCC = 5V, TA = 25°C.
Note 3: Not more than one output should be shorted at a time.
Switching Characteristics
at VCC = 5V and TA = 25°C
Symbol Parameter Conditions Min Max Units
tPLH Propagation Delay Time CL = 15 pF
22 ns
LOW-to-HIGH Level Output RL = 400Ω
tPHL Propagation Delay Time
15 ns
HIGH-to-LOW Level Output
www.fairchildsemi.com 2
DM7400
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M14A
3 www.fairchildsemi.com
DM7400 Quad 2-Input NAND Gates
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems 2. A critical component in any component of a life support
which, (a) are intended for surgical implant into the device or system whose failure to perform can be rea-
body, or (b) support or sustain life, and (c) whose failure sonably expected to cause the failure of the life support
to perform when properly used in accordance with device or system, or to affect its safety or effectiveness.
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the www.fairchildsemi.com
user.
www.fairchildsemi.com 4