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CK
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. APPD
REV ECN DESCRIPTION OF REVISION
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. DATE
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
4 0011669799 ENGINEERING RELEASED 2018-03-16

D33 MLB Bottom Ice : EVT


LAST_MODIFICATION=Fri Mar 16 10:21:05 2018
D D
PAGE CSA CONTENTS SYNC DATE PAGE CSA CONTENTS SYNC DATE
1 1
TABLE OF CONTENTS
TABLE OF CONTENTS 07/29/2016 46 1 NFC: TABLE OF CONTENTS
2 2 SYSTEM:BOM Tables 47 75 NFC
3 4 SYSTEM: Mechanical Components 06/06/2017
4 6 BOOTSTRAPPING 08/08/2017
5 7 SYSTEM: Testpoints (Bottom) 11/01/2017
6 34 SYSTEM POWER: Iktara 11/01/2017
7 56 CG: Power Supplies - Touch & Display 11/01/2017
8 66 Interposer: B2B Symbol 11/01/2017
9 77 B2B: Interposer Loft 06/07/2017
10 80 RADIOS 03/31/2017
11 81 Interposer: Pins 1-144 11/02/2017
12 82 Interposer: Pins 145-285 11/02/2017
13 83 Hall 11/02/2017
14 84 Interposer: Top Aliases 11/01/2017
15 85 Interposer: Pins 286-359 11/02/2017
16 1 RADIO: TABLE OF CONTENTS
C 17 2 BOM TABLES C
18 3 ANTENNA DIAGRAM
19 4 ANTENNA: B2BS
20 5 ANTENNA: N-PLEX SHARED
21 6 BBPMU: CONTROL
22 7 BBPMU: RAILS
23 8 BB: INTERFACE
24 9 BB: DDR PWR & JTAG
25 10 BB: DIGITAL PWR
26 11 XCVR: TX & GNSS
27 12 XCVR: INTERFACE & PWR
28 13 XCVR: PRX DRX
29 14 HW CONFIG OPTIONS
30 15 ET
31 16 LB SPAD
32 17 HB SPAD
33 18 UHB LMB SPAD
34 19 LB DIVERSITY RECEIVE LNA
B B
35 20 HB DIVERSITY RECEIVE LNA
36 21 MIMO RECEIVE LNAS
37 22 COUPLER + LOWER ANTENNA
38 23 UPPER ANTENNA FEEDS
39 24 SIM: ESIM
40 25 SIM: PSIM
41 26 TEST POINTS
42 27 SYMBOL: WIFI
43 1 WIFI: TABLE OF CONTENTS
44 2 DIETCOKE
45 3 FEM MODULES

MCO:056-04080
SS ROW:639-04880
SS JP:639-04881
A
SS NA:639-05085
SSV ROW:639-05086
Sub Designs TABLE_HIERARCHY_CONFIG_HEAD
TABLE OF CONTENTS SYNC_DATE=07/29/2016 A
HARD/ DRAWING TITLE
SOURCE PROJECT SUB-DESIGN NAME VERSION SYNC_DATE/TIME
SSV JP:639-05496 D32 HIER_NFC 0.43.2
SOFT

S 2018_03_12_10:49:29
TABLE_HIERARCHY_CONFIG_ITEM

SCH,MLB,BOT,ICE,D33
SSV NA:639-05497 D33 HIER_RADIO_ICE 0.46.17 S 2018_03_12_16:55:29
TABLE_HIERARCHY_CONFIG_ITEM

Apple Inc.
DRAWING NUMBER

051-02695
SIZE

DS ROW:639-05640 TABLE_5_HEAD

NOTICE OF PROPRIETARY PROPERTY:


REVISION

BRANCH
4.0.0
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
TABLE_5_ITEM

051-02695 1 SCH,MLB_BOT_ICE,D33 SCH CRITICAL ? THE POSESSOR AGREES TO THE FOLLOWING: PAGE

820-01063 1 PCB,MLB_BOT_ICE,D33 PCB CRITICAL ?


TABLE_5_ITEM I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
1 OF 85
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 1 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

EEEE Codes TABLE_5_HEAD

PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION


TABLE_5_ITEM

825-7691 1 EEEE (MLB_BOT_ICE,SS,ROW,639-04880) EEEE_J90J CRITICAL SSROW


TABLE_5_ITEM

825-7691 1 EEEE (MLB_BOT_ICE,SS,JP,639-04881) EEEE_J90K CRITICAL SSJP


TABLE_5_ITEM

825-7691 1 EEEE (MLB_BOT_ICE,SS,NA,639-05085) EEEE_JG58 CRITICAL SSNA


TABLE_5_ITEM

825-7691 1 EEEE (MLB_BOT_ICE,SSV,ROW,639-05086) EEEE_JG59 CRITICAL SSVROW


TABLE_5_ITEM

825-7691 1 EEEE (MLB_BOT_ICE,SSV,JP,639-05496) EEEE_JM18 CRITICAL SSVJP

D 825-7691 1 EEEE (MLB_BOT_ICE,SSV,NA,639-05497) EEEE_JM19 CRITICAL SSVNA


TABLE_5_ITEM

D
TABLE_5_ITEM

825-7691 1 EEEE (MLB_BOT_ICE,DS,ROW,639-05640) EEEE_JN5M CRITICAL DSROW

Global Capacitors TABLE_ALT_HEAD TABLE_CRITICAL_HEAD

PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:


TABLE_ALT_HEAD

PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: CRITICAL PART# COMMENT
PART NUMBER
PART NUMBER
TABLE_CRITICAL_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

138S00149 0402-3T,10.5uF@1V 685-00243 685-00182 BOM_TABLE_ALTS SUBBOM_DS SUBBOM,MLB,BOT,DIODES,ONSEMI,X891


138S00148 138S00149 BOM_TABLE_ALTS ALL 0402-3T,10.5uF@1V, Kyocera
TABLE_ALT_ITEM

138S00150 138S00149 BOM_TABLE_ALTS ALL 0402-3T,10.5uF@1V, SEMCO


TABLE_5_HEAD

PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION


TABLE_ALT_ITEM

138S00151 138S00149 BOM_TABLE_ALTS ALL 0402-3T,10.5uF@1V, TY


TABLE_5_ITEM

685-00242 1 SUBBOM,MLB,BOT,DIODES,DIODES,X891 SUBBOM_DS CRITICAL COMMON


TABLE_ALT_HEAD TABLE_CRITICAL_HEAD TABLE_5_ITEM

PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: CRITICAL PART# COMMENT 371S00133 4 DIODES,SHOTTKY DIODE,30V,2A,0603 D3400,D3401,D3402,D3403 CRITICAL DIODES_DS
PART NUMBER
TABLE_CRITICAL_ITEM TABLE_5_ITEM

TABLE_ALT_ITEM

138S00144 0402,16uF@1V 371S00189 4 ONSEMI,SHOTTKY DIODE,30V,2A,0603 D3400,D3401,D3402,D3403 CRITICAL ONSEMI_DS


138S00143 138S00144 BOM_TABLE_ALTS ALL 0402,16uF@1V, Kyocera
TABLE_ALT_ITEM

138S00163 138S00144 BOM_TABLE_ALTS ALL 0402,16uF@1V, Taiyo

TABLE_ALT_HEAD TABLE_CRITICAL_HEAD

Hall Effect Alts


PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: CRITICAL PART# COMMENT
PART NUMBER
TABLE_CRITICAL_ITEM

TABLE_ALT_ITEM

138S00139 0201,3uF@1V
138S00138 138S00139 BOM_TABLE_ALTS ALL 0201,3uF@1V, Kyocera
TABLE_ALT_ITEM

138S00164 138S00139 BOM_TABLE_ALTS ALL 0201,3uF@1V, Taiyo


TABLE_ALT_HEAD

PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:


PART NUMBER
TABLE_ALT_HEAD TABLE_CRITICAL_HEAD TABLE_ALT_ITEM

PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: CRITICAL PART# COMMENT 353S01327 353S3697 BOM_TABLE_ALTS ALL ROHM HES

C PART NUMBER
TABLE_ALT_ITEM

138S00146 0402,5.1uF@3V
TABLE_CRITICAL_ITEM

C
138S00221 138S00146 BOM_TABLE_ALTS ALL 0402,5.1uF@3V, Kyocera

PART NUMBER

138S00140
ALTERNATE FOR
PART NUMBER

138S00141
BOM OPTION

BOM_TABLE_ALTS
REF DES

ALL
COMMENTS:

0201,1.1uF@3V, Kyocera
TABLE_ALT_HEAD

TABLE_ALT_ITEM
CRITICAL PART#

138S00141
COMMENT

0201,1.1uF@3V
TABLE_CRITICAL_HEAD

TABLE_CRITICAL_ITEM IKTARA
TABLE_ALT_ITEM

138S00142 138S00141 BOM_TABLE_ALTS ALL 0201,1.1uF@3V, SEMCO


TABLE_5_HEAD

PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION


TABLE_ALT_ITEM

138S00166 138S00141 BOM_TABLE_ALTS ALL 0201,1.1uF@3V, Taiyo


TABLE_5_ITEM

116S00002 6 RES, High Current 0 Ohm C3461,C3462,C3463,C3464,C3465,C3466 CRITICAL UNBALNACED CAPS

Global Ferrites
TABLE_5_ITEM

132S00186 1 CAP, 0.033uF, 10%, 100V, X6S C3451 CRITICAL UNBALNACED CAPS
TABLE_5_ITEM

132S00187 3 CAP, 0.047uF. 10%, 100V, X6S C3452,C3453,C3456 CRITICAL UNBALNACED CAPS
TABLE_ALT_HEAD

PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:


TABLE_CRITICAL_HEAD

PART NUMBER CRITICAL PART# COMMENT


TABLE_ALT_ITEM TABLE_CRITICAL_ITEM

152S00558 152S00557 BOM_TABLE_ALTS ALL IND,MLD,0.47UH,20%,2.5A,80MO,1608 152S00557 IND,MLD,0.47UH,20%,2.5A,80MO,1608


TABLE_ALT_ITEM TABLE_CRITICAL_ITEM

155S00194 155S0610 BOM_TABLE_ALTS ALL FERR BD,150 OHM,25%,200MA,0.7 DCR,01005 155S0610 FERR BD,150 OHM,25%,200MA,0.7 DCR,01005
TABLE_ALT_ITEM

155S00200 155S0610 BOM_TABLE_ALTS ALL FERR BD,150 OHM,25%,200MA,0.7 DCR,01005

TABLE_ALT_ITEM TABLE_CRITICAL_ITEM

155S00338 155S0661 BOM_TABLE_ALTS ALL FERR BD,33 OHM,25%,1.5A,55MOHM DCR,0201 155S0661 FERR BD,33 OHM,25%,1.5A,55MOHM DCR,0201

B Global R/C Alternates


PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD

TABLE_CRITICAL_HEAD
B
PART NUMBER CRITICAL PART# COMMENT
TABLE_ALT_ITEM TABLE_CRITICAL_ITEM

138S0648 138S0652 BOM_TABLE_ALTS ALL CAP,X5R,4.7UF,6.3V,0.65MM,0402,TAIYO 138S0652 CAP,X5R,4.7UF,6.3V,0.65MM,0402,TAIYO


TABLE_ALT_ITEM TABLE_CRITICAL_ITEM

138S00024 138S0986 BOM_TABLE_ALTS ALL CAP,CER,3-TERM,7.5UF,20%,4V,0402,TAIYO/TDK 138S0986 CAP,CER,3-TERM,7.5UF,20%,4V,0402,TAIYO/TDK


TABLE_ALT_ITEM TABLE_CRITICAL_ITEM

138S0706 138S0739 BOM_TABLE_ALTS ALL CAP,CER,1UF,20%,10V,X5R,0201,MURATA 138S0739 CAP,CER,1UF,20%,10V,X5R,0201,MURATA


TABLE_ALT_ITEM

138S0945 138S0739 BOM_TABLE_ALTS ALL CAP,CER,1UF,20%,10V,X5R,0201,KYOCERA

TABLE_ALT_ITEM TABLE_CRITICAL_ITEM

138S0739 138S0706 BOM_TABLE_ALTS ALL CAP,CER,X5R,0.22UF,20%,6.3V,20% 138S0706 CAP,CER,X5R,0.22UF,20%,6.3V,20%


TABLE_ALT_ITEM TABLE_CRITICAL_ITEM

138S00049 138S0831 BOM_TABLE_ALTS ALL CAP,CER,X5R,2.2UF,20%,6.3V,0201 132S0400 CAP,CER,X5R,0.22UF,20%,6.3V,01005


TABLE_ALT_ITEM TABLE_CRITICAL_ITEM

138S00133 138S00128 BOM_TABLE_ALTS ALL CAP,X5R,0.47UF,20%,6.3V,MUR,01005 138S0831 CAP,CER,X5R,2.2UF,20%,6.3V,0201


TABLE_ALT_ITEM TABLE_CRITICAL_ITEM

138S00116 138S00071 BOM_TABLE_ALTS ALL CAP,X5R,4UF,20%,6.3V,0201,T=0.55MM 138S00128 CAP,X5R,0.47UF,20%,6.3V,KYO,01005

138S00117

138S00048
138S00071

138S00003
BOM_TABLE_ALTS

BOM_TABLE_ALTS
ALL

ALL
CAP,X5R,4UF,20%,6.3V,0201,T=0.55MM

CAP,X5R,15UF,20%,6.3V,0.65MM,HRZTL,0402
TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM
138S00071 CAP,X5R,4UF,20%,6.3V,0201,T=0.55MM
TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM
Multi-Vendor Criticals TABLE_CRITICAL_HEAD TABLE_CRITICAL_HEAD

CRITICAL PART# COMMENT CRITICAL PART# COMMENT


131S00172 131S00164 BOM_TABLE_ALTS ALL CAP,CER,C0G,220PF,5%,16V,01005 138S00003 CAP,X5R,15UF,20%,6.3V,0.65MM,HRZTL,0402
TABLE_CRITICAL_ITEM TABLE_CRITICAL_ITEM

TABLE_ALT_ITEM TABLE_CRITICAL_ITEM

131S00173 131S00164 BOM_TABLE_ALTS ALL CAP,CER,C0G,220PF,5%,16V,01005 131S00164 CAP,CER,C0G,220PF,5%,16V,01005 138S0979 CAP,CER,X5R,10UF,20%,10V,0402,H=0.65MM 132S00008 CAP,CER,0.1UF,10%,50V,X7R,0402
TABLE_CRITICAL_ITEM TABLE_CRITICAL_ITEM

TABLE_ALT_ITEM

131S00185 131S0316 BOM_TABLE_ALTS ALL CAP,CER,X5R,0.1uF,20%,6.3V,01005


138S0683 CAP,CER,X5R,1UF,10%,25V,0402 131S0804 CAP,CER,27PF,5%,C0G,25V,0201
TABLE_CRITICAL_ITEM TABLE_CRITICAL_ITEM

TABLE_ALT_ITEM

138S00048 138S00003 BOM_TABLE_ALTS ALL CAP,CER,X5R,15uF,20%,6.3V,0402


132S0663 CAP,CER,X5R,1UF,10%,25V,0402 131S0307 CAP,CER,NP0/C0G,100PF,5%,16V,01005
TABLE_CRITICAL_ITEM TABLE_CRITICAL_ITEM

TABLE_ALT_ITEM

132S00185 132S0316 BOM_TABLE_ALTS ALL CAP,CER,X5R,15uF,20%,6.3V,0402


132S0288 CAP,CER,X5R,0.1UF,10%,16V,0201 131S00053 CAP,CER,C0G,220PF,5%,10V,01005
TABLE_CRITICAL_ITEM TABLE_CRITICAL_ITEM

132S0275 117S0055
A CAP,CER,X5R,470PF,10%,10V,01005
TABLE_CRITICAL_ITEM
RES,MF,1/20W,2M OHM,5,0201,SMD
TABLE_CRITICAL_ITEM
A
132S0245 CAP,CER,X5R,0.01UF,10%,6.3V,01005 107S0257 THERMISTOR,NTC,10K OHM,1%,B=3435,01005 PAGE TITLE

SYSTEM:BOM Tables
Global Inductors
TABLE_CRITICAL_ITEM TABLE_CRITICAL_ITEM

138S0692 CAP,CER,X5R,1UF,20%,6.3V,0201 131S00170 CAP,CER,C0G,220PF,5%,25V,01005


DRAWING NUMBER SIZE
TABLE_CRITICAL_ITEM

131S0643 CAP,CER,NP0/C0G,56PF,5%,25V,01005
051-02695 D
PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD

TABLE_CRITICAL_HEAD 131S0316 CAP,CER,X5R,0.1UF,20%,6.3V,01005


TABLE_CRITICAL_ITEM

Apple Inc. REVISION


PART NUMBER
TABLE_ALT_ITEM
CRITICAL PART# COMMENT
TABLE_CRITICAL_ITEM
4.0.0
152S00653 152S00651 BOM_TABLE_ALTS ALL IND,1.2UH,3A,2016,0.65Z 152S00651 IND,1.2UH,3A,2016,0.65Z NOTICE OF PROPRIETARY PROPERTY: BRANCH

TABLE_ALT_ITEM TABLE_CRITICAL_ITEM THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
152S00654 152S00652 BOM_TABLE_ALTS ALL IND,1.2UH,3A,2016,0.8Z 152S00652 IND,1.2UH,3A,2016,0.8Z THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
2 OF 85
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 2 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

ST0403
STIFFENER-UAT-D32 FIDUCIALS FIDUCIALS
D 1
SM D

FD0401
FID
0P5SQ-CROSS-NSP
1
ROOM=ASSEMBLY

FD0402
FID
0P5SQ-CROSS-NSP
1
ROOM=ASSEMBLY

FD0403
FID
0P5SQ-CROSS-NSP
1
ROOM=ASSEMBLY

FD0404
Crosses FID
0P5SQ-CROSS-NSP
1
ROOM=ASSEMBLY

FD0405
FID
0P5SQ-CROSS-NSP
1
ROOM=ASSEMBLY

FD0410
FID
0P5SQ-SMP3SQ-NSP
1
C ROOM=ASSEMBLY
C
ZT401 FD0411
HOL-3.0OD2.45ID-2.2NP FID
NFC_ANT 1 0P5SQ-SMP3SQ-NSP
10
1
ROOM=ASSEMBLY

FD0412
FID
0P5SQ-SMP3SQ-NSP
1
ROOM=ASSEMBLY

B B
SB0403
STDOFF-2.6OD1.087H-TH-0.311-1.6
1

ST0402
STIFFENER-UNIBODY-D33
SM
1

SB0402
STDOFF-2.6OD1.087H-TH-0.311-1.6
1

A SYNC_DATE=06/06/2017 A
PAGE TITLE

SYSTEM: Mechanical Components


DRAWING NUMBER SIZE

051-02695 D
Apple Inc. REVISION

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
4 OF 85
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III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 3 OF 47
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D D

BOOTSTRAPPING:BOARD ID[3]

C C

SELECTED-->

B B
11 OUT
BOARD_ID2
CKPLUS_WAIVE=SINGLE_NODENET

A SYNC_DATE=08/08/2017 A
SYNC_MASTER
PAGE TITLE

BOOTSTRAPPING
DRAWING NUMBER SIZE

051-02695 D
Apple Inc. REVISION

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
6 OF 85
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III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 4 OF 47
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8 7 6 5 4 3 2 1

Test Points Probe Points


TP0700
14 10 7 6 5 PP_VDD_MAIN 1
TP-P55
ROOM=TEST
A VDD_MAIN Iktara Debug
PP0700
P2MM-NSM
D TP0701
1 15 6 IN
PMU_TO_IKTARA_EN_EXT_1V8 1
SM
PP ROOM=TEST
D
A
TP-P55
ROOM=TEST
PP0701
P2MM-NSM
SM
TP0702 6 IN
IKTARA_ANA1 1
PP ROOM=TEST
1
A
TP-P55
ROOM=TEST PP0702
P2MM-NSM
SM
IKTARA_GPIO3 1
TP0703
1
6 IN PP ROOM=TEST
A
TP-P55
ROOM=TEST PP0703
P2MM-NSM
SM
6 IN
IKTARA_GPIO4 1
PP ROOM=TEST

PP_BATT_VCC TP0515
1 VBATT
14 A
TP-P55
ROOM=TEST
PP0704
P2MM-NSM
SM
TP0522 15 6 IN
IKTARA_TO_SMC_INT 1 ROOM=TEST
1 PP
A
TP-P55
ROOM=TEST

TP0705
1 TP0707
1 TP0709
1
A A A
TP-P55 TP-P55 TP-P55
ROOM=TEST ROOM=TEST ROOM=TEST

TP0706 TP0708 TP0710 TOUCH_TO_MANY_FORCE_PWM TP0757


1
1 1 1 12 10 9 A
A A A TP-P55
TP-P55 TP-P55 TP-P55
C ROOM=TEST ROOM=TEST ROOM=TEST
ROOM=TEST
C
PMU_TO_TOUCH_CLK32K TP0758
1
12 9 A
TP-P55
ROOM=TEST

AMUX 11 9
AP_TO_TOUCH_SCAN_CLK TP0759
1
A
PMU_AMUX_AY TP0713
1
TP-P55
11
TP-P55
ROOM=TEST
A ANALOG MUX A OUTPUT ROOM=TEST

REL BIAS
PMU_TO_SYSTEM_COLD_RESET_L
TP0772
1
TP0715 11 A
11 PMU_AMUX_BY 1
A ANALOG MUX B OUTPUT AP_TO_RACER_RESET_L TP0761
1
TP-P55
ROOM=TEST
TP-P55
11 9 A
ROOM=TEST TP-P55
ROOM=TEST

REL_BIAS_VBUS_EN
TP0773
1
12 A
UART_RACER_TO_AOP_RXD TP0762
1 TP-P55
12 9 A ROOM=TEST

DFU TP-P55
ROOM=TEST
TP0774
1 VDD_MAIN TRADEOFF CAPS
HYDRA_TO_AP_FORCE_DFU TP0714
1 TP0763
11 AP_TO_CAMPMU_RESET_L
TP-P55
A
11 A 15 9
RACER_TO_AOP_INT_L 1
A
TP-P55 ROOM=TEST PP_VDD_MAIN
ROOM=TEST FORCE DFU TP-P55
10 7 6 5
14
ROOM=TEST

UART_AOP_TO_RACER_TXD TP0764
1 1 C0701 1 C0702
B 12 9 A 15UF B
LVCC TP-P55
ROOM=TEST
15UF
20%
2 6.3V
X5R
0402-0.1MM-1
20%
2 6.3V
X5R
0402-0.1MM-1
PP_VBUS2_IKTARA TP0765
1
PP_GPU_LVCC TP0720
1
14 6
TP-P55
A
12 A
TP-P55 ROOM=TEST
ROOM=TEST

PP_CPU_PCORE_LVCC TP0721
1
12 A
TP-P55
ROOM=TEST

COIL
IKTARA_COIL1 TP0730
1
14 6 A
TP-P55
ROOM=TEST

IKTARA_COIL2 TP0731
1
14 6 A
TP-P55
ROOM=TEST

A OV COMP SYNC_DATE=11/01/2017 A
PAGE TITLE

TP0741 SYSTEM: Testpoints (Bottom)


PP_VDD_MAIN_OV_R 1 DRAWING NUMBER SIZE
11 A
TP-P55 051-02695 D
ROOM=TEST
Apple Inc. REVISION

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
7 OF 85
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 5 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

Iktara

D D

6 I2C0_SMC_SDA I2C0_SMC_SDA 15

6 I2C0_SMC_SCL MAKE_BASE=TRUE
I2C0_SMC_SCL 15

PP_IKTARA_VRECT MAKE_BASE=TRUE

C3445 1 C3411 1 C3412 1


220PF 2.2UF 2.2UF
5% 20% 20%
25V 2 25V 25V
COG X5R 2 X5R 2
01005 0402-4 0402-4
ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA

R3401
1
0.02 2 PP_IKTARA_VMID
C3440 1 C3441 1
1%
2.2UF
20%
2.2UF
20%
1/6W
MF
1 C3413 1 C3442 1 C3443
25V
X5R 2
25V
X5R 2 0402 2.2UF 2.2UF 220PF
2 ROOM=IKTARA 2 20% 20% 5%
0402-4 0402-4 2 25V 2 25V 2 25V
ROOM=IKTARA ROOM=IKTARA X5R X5R COG
XW3401 XW3400 0402-4 0402-4 01005
ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA
SHORT-10L-0.05MM-SM
SHORT-10L-0.05MM-SM
1 ROOM=IKTARA
ROOM=IKTARA
1
PP_IKTARA_VMID_SENSE

PP_IKTARA_VRECT_SENSE

D1
D2
D3
D4
D5
D6
D7

H1
NO_XNET_CONNECTION=1

E1

E4

K1
F1

L1
J1
NO_XNET_CONNECTION=1

VRECT_VDD
VRECT_VDD
VRECT_VDD
VRECT_VDD
VRECT_VDD
VRECT_VDD
VRECT_VDD

VRECT_S

VMID_S

VMID_R_VDD

VMID_VDD
VMID_VDD
VMID_VDD
VMID_VDD
C K OMIT_TABLE K OMIT_TABLE K OMIT_TABLE K OMIT_TABLE
C
D3400
DSN2
D3401
DSN2
D3402
DSN2
D3403
DSN2
NSR20F30NX NSR20F30NX NSR20F30NX NSR20F30NX
ROOM=IKTARA ROOM=IKTARA
A A ROOM=IKTARA A A ROOM=IKTARA
CRITICAL
B5 CLAMP1 HV_GPO1 H4 PP_VBUS2_IKTARA
U3400 HV_GPO2 H5
NC 5 14

IKTARA_COMM1 C3415 C3444


C5 COMM1 BC59355A2
WLCSP BOOTB_VDD H2
NC 1
2.2UF
1
220PF
Pull-Ups
1 C3406 ROOM=IKTARA
NC 20%
2 25V
5%
2 25V
0.033UF SW J2 X5R
0402-4
COG 14 10 7 6 5
PP_VDD_MAIN
10% 01005
K2
2 50V
X7R C3404 SW OMIT ROOM=IKTARA ROOM=IKTARA

R3406 1
To Coil 0402
ROOM=IKTARA
0.1UF
IKTARA_BOOT1
SW L2 XW3402
SHORT-20L-0.05MM-SM 2M
1 2 C7 BOOT1_VDD 5%
14 5
IKTARA_COIL1 VOUT G1 IKTARA_VOUT_SNS 1 2 1/20W
NOSTUFF MF
10% ROOM=IKTARA
201 2
1
R3450 1 C3451 1 C3452 1 C3453 1 C3454 1 C3455 1 C3456 16V
X5R-CERM
B6 AC1 VMID_AUX_SW_VDD E6 NO_XNET_CONNECTION=1 ROOM=IKTARA

100K 100NF 68NF 68NF 68NF 47NF 0.047UF 0201 B7 AC1 VMID_AUX_VDD E5 PP5V0_VMID_AUX_IKTARA
10% 10% 10% 10% 10% 10% ROOM=IKTARA
1%
2 50V 2 50V 2 50V 2 50V 2 50V 2 100V
IKTARA_AC1 C6 AC1
1/20W
MF X7S X7S X7S X7S X7S X6S VDD5V E3 PP5V0_VDD_IKTARA
0402 0402 0402 0402 0402 0402
2 201 ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA
ROOM=IKTARA
VDIG_CORE_VDD F7 PP1V5_VDIG_CORE_IKTARA 6
PP1V8_IKTARA
H7 PP1V8_IKTARA
VDDO 6 R34071
C3402 1 1 C3403 VAUX_1P8_VDD G7 1 C3419 1 C3418 1 C3417 1 C3416 10K
5%
330PF 2200PF 1/32W
20% 10% 1.0UF 1.0UF 4UF 2.2UF MF
To Coil 50V
X7R 2 2 50V
X5R
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
01005 2
ROOM=IKTARA
0201 0201 X5R X5R CERM-X5R X5R-CERM
14 5
IKTARA_COIL2 ROOM=IKTARA ROOM=IKTARA 0201-1 0201-1 0201 0201
ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA
NOSTUFF
1
R3460 1 C3461 1 C3462 1 C3463 1 C3464 1 C3465 1 C3466 IKTARA_AC2 B1 AC2 L4 I2C0_SMC_SDA 6
B 1%
100K 100NF
10%
68NF
10% 10%
68NF 68NF
10% 10%
47NF 0.047UF
10%
B2 AC2
SDA
L5 I2C0_SMC_SCL 6 B
1/20W
MF 2 50V
X7S 2 50V
X7S 2 50V
X7S 2 50V
X7S 2 50V
X7S 2 100V
X6S
C3405 C2 AC2
SCL
K4 IKTARA_TO_SMC_INT OUT R3420
2 201 0402 0402 0402 0402 0402 0402 0.1UF INT 5 15
100
ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA 1 2 IKTARA_BOOT2 C1 BOOT2_VDD RESET* J4 PMU_TO_IKTARA_RESET_R_L 1 2 PMU_TO_IKTARA_RESET_L 12
IN
5%
1 C3407 10%
16V GPIO1 H6
1/32W
MF
0.033UF X5R-CERM NC 01005
10% 0201 GPIO2 L6 ROOM=IKTARA
2 50V NC
X7R
0402
ROOM=IKTARA
GPIO3/SWDIO J6 IKTARA_GPIO3 OUT 5
ROOM=IKTARA
IKTARA_COMM2 GPIO4/SWCLK K5 IKTARA_GPIO4 5
C3 COMM2
OUT
GPIO5 J5
NC
B3 CLAMP2 GPIO6 K7 IKTARA_DEVICE_ID1
GPIO7 K6 IKTARA_DEVICE_ID2
IKTARA_ANA1 E2
R3422
5 OUT
F2
ANA1 R3421
NC ANA2 E7 PMU_TO_IKTARA_EN_EXT_1P8V_R 100 PMU_TO_IKTARA_EN_EXT_1V8
PP_VDD_MAIN 1
0.00 2 PP_VDD_MAIN_IKTARA G3 EN_EXT_1P8 1 2 IN 5 15
14 10 7 6 5 ANA3
5%
0% G2 ANA4 VSYS_ANA_VDD F3 PP_VDD_MAIN 5 6 7 10 14 1/32W
1/32W NC MF
MF 01005
01005 VSYS_1P8_VDD F6 PP1V8_S2 10 13 14
ROOM=IKTARA
ROOM=IKTARA G6 REFBP
NC
OTP_WREN J7
G5 1 1
DIGTEST R3408 R3410
RGND PGND AVSS 1.00K 1.00K
5% 5%
1/32W 1/32W
MF MF
A1
A2
A3
A4
A5
A6
A7
B4

J3
K3
L3

C4
G4
H3
L7
F5
F4
2 01005 ROOM=IKTARA
2 01005
ROOM=IKTARA

A SYNC_DATE=11/01/2017
A
PAGE TITLE

SYSTEM POWER: Iktara


DRAWING NUMBER SIZE

051-02695 D
Apple Inc. REVISION

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
34 OF 85
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 6 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

Acorn PMU

D D

U5600 Charge Pump 1 Caps


LM3373A2YKA
14
PP1V1_RACER_S2 A1 VJ DSBGA VC B1 PP1V1_RACER 9
ROOM=ACORN 1 C5611
LOAD SWITCH
C 1 C5691
4UF
1 C5692
0.1UF
A2 VK LDO1 VA C1 PP3V5_RACER 9
0.22UF
20% C
20% 20% 7 ACORN_CP1_CAP1_POS 2 6.3V
X5R
2 6.3V 2 6.3V PP_CP1_OUT_ACORN A4 VL CP1 C1+ B2 ACORN_CP1_CAP1_POS 7
1 C5642 7 ACORN_CP1_CAP1_NEG 01005-1
CERM-X5R X5R-CERM ROOM=ACORN
0201 01005 C1- B3 ACORN_CP1_CAP1_NEG 7
4UF
ROOM=ACORN ROOM=ACORN 1 C5650 1 C5651 20%
220PF 4UF 2 6.3V
CERM-X5R 7
ACORN_CP1_CAP2_POS
5% 20% C2+ A3 ACORN_CP1_CAP2_POS 7
0201 7 ACORN_CP1_CAP2_NEG
2 25V 2 6.3V ROOM=ACORN 1 C5612
COG
01005
CERM-X5R
0201 C2- C3 ACORN_CP1_CAP2_NEG 7
0.22UF
ROOM=ACORN ROOM=ACORN 20%
H4 VG 2 6.3V
PP5V45_BOOST2_ACORN LDO2 VH H2 PP5V25_TOUCH_VDDH 9
X5R
01005-1
ROOM=ACORN
1 C5652 1 C5653 VN D4 PN6V7_RACER
220PF 10UF 9
5%
2 25V
COG
20%
2 10V
X5R CP2 C3+ C2 ACORN_CP2_CAP_POS 7
Charge Pump 2 Caps
01005
ROOM=ACORN
0402
ROOM=ACORN C3- C4 ACORN_CP2_CAP_NEG 7
1 C5621
1UF
PP_BOOST1_ACORN F4 VB VP E4 PP10V0_RACER 9
20%
7 ACORN_CP2_CAP_POS 2 16V
CER-X5R
1 C5654 1 C5655 C4+ D2 ACORN_CP3_CAP1_POS 7
1 C5640 1 C5641 1 C5645 7
ACORN_CP2_CAP_NEG 0201
ROOM=ACORN
220PF 10UF CP3 C4- D3 ACORN_CP3_CAP1_NEG 7
4.7UF 10UF 4UF
5% 20% 20% 20% 20%
2 25V
COG
01005
2 10V
X5R
0402 C5+ E2 ACORN_CP3_CAP2_POS 7
16V
2 X5R
0402
2 10V
X5R
0402
2 6.3V
CERM-X5R
0201
Charge Pump 3 Caps
ROOM=ACORN ROOM=ACORN ROOM=ACORN ROOM=ACORN ROOM=ACORN
C5- E3 ACORN_CP3_CAP2_NEG 7
1
XW5601 C5631
SHORT-10L-0.05MM-SM 0.22UF
14 10 6 5
PP_VDD_MAIN B4 IN HWEN H1 ACORN_HWEN 1 2 PP1V8_TOUCH_RACER_S2 9 14
20%
ROOM=ACORN 7
ACORN_CP3_CAP1_POS 2 6.3V
X5R
1 C5690 EN1 F2 RACER_TO_ACORN_ORB_SCAN
IN 9
OMIT 7
ACORN_CP3_CAP1_NEG 01005-1
ROOM=ACORN
4.7UF L5600
20% 1.5UH-20%-1.6A-0.18OHM EN2 F3 TOUCH_TO_ACORN_PP5V25_EN 9
IN
2 6.3V ACORN_LX G4 SW 7 ACORN_CP3_CAP2_POS
CER 2 1 SCL G2 I2C3_AP_SCL
B 0402 IN 9 12
ACORN_CP3_CAP2_NEG B
E1 CP23_GND

H3 SIDO_GND

7
SDA G3 1
D1 CP1_GND

ROOM=ACORN PIWA2012FE-SM I2C3_AP_SDA 9 12 C5632


ROOM=ACORN BI
0.22UF
F1 AGND

AMUX G1 ACORN_GECKO_ANSEL_TO_PMU_ADC 15
20%
2 6.3V
OUT
X5R
01005-1
ROOM=ACORN

A SYNC_DATE=11/01/2017
A
PAGE TITLE

CG: Power Supplies - Touch & Display


DRAWING NUMBER SIZE

051-02695 D
Apple Inc. REVISION

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
56 OF 85
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 7 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
Top Board Interposer APN:998-12513
Bot Board Interposer APN:998-12514 <--- Stuffed
J_INT_TOP J_INT_TOP
SMT-PAD SMT-PAD
SYM 1 OF 2 SYM 2 OF 2
1 95 189 282

INTERPOSER-MLB-TOP-V3-D32
GND IO1 IO95 AP_TO_NFC_FW_DWLD_REQ GND GND

INTERPOSER-MLB-TOP-V3-D32
11 11 12 IO189 IO282 12

GND 2 IO96 96 GND GND 190 283 GND


11 IO2 11 12 IO190 IO283 12

GND 3 IO3 IO97 97 PMU_TO_NFC_VDD_MAIN_EN GND 191 284 GND


11 11 12 IO191 IO284 12

GND 4 IO4 IO98 98 UART_AOP_TO_BB_TXD GND 192 285 GND


11 11 12 IO192 IO285 12

GND 5 IO5 IO99 99 GND GND 193 286 GND


11 11 12 IO193 IO286 15

D 11 GND
PMU_TO_SYSTEM_COLD_RESET_L 7
6 IO6 IO100 100
101
UART_AP_TO_GNSS_TXD
GND
11 12 GND
GND
194
195
IO194 IO287 287
ACORN_GECKO_ANSEL_TO_PMU_ADC
288 GND
15 D
11 IO7 IO101 11 12 IO195 IO288 15

GND 8 IO8 IO102 102 AP_TO_BB_COREDUMP_TRIG PP1V8_NFC_S2 196 289 RACER_TO_AOP_INT_L


11 11 12 IO196 IO289 15

AP_TO_CAMPMU_RESET_L 9 IO9 IO103 103 UART_AP_TO_NFC_TXD PMU_TO_GNSS_EN 197 290 GND


11 11 12 IO197 IO290 15

GND 10 IO10 IO104 104 UART_NFC_TO_AP_RXD PMU_TO_BT_REG_ON 198 291 HALL_CASE_TO_AOP_SOUTH_L


11 11 12 IO198 IO291 15

BB_TO_MANY_GSM_BURST_IND 11 IO11 IO105 105 BB_TO_AP_RESET_DETECT_L GND 199 292 GND


11 11 12 IO199 IO292 15

GND 12 IO12 IO106 106 GND 90_PCIE_AP_TO_WLAN_REFCLK_N200 IO293 293 PMU_TO_IKTARA_EN_EXT_1V8


11 11 12 IO200 15

HALL_CASE_TO_AOP_NORTH_L 13 IO13 IO107 107 BOARD_ID2 90_PCIE_AP_TO_WLAN_REFCLK_P201 IO294 294 GND


11 11 12 IO201 15

GND 14 IO14 IO108 108 AP_TO_GNSS_TIME_MARK GND 202 IO295 295 IKTARA_TO_SMC_INT
11 11 12 IO202 15

AP_TO_TOUCH_SCAN_CLK 15 IO15 IO109 109 PCIE_BB_BI_AP_CLKREQ_L 90_PCIE_AP_TO_WLAN_TXD_P 203 IO296 296 GND
11 11 12 IO203 15

GND 16 IO16 IO110 110


AP_TO_BB_PEAK_POWER_INDICATOR 90_PCIE_AP_TO_WLAN_TXD_N 204 297 I2C0_SMC_SCL
11 11 12 IO204 IO297 15

I2S_BB_TO_AP_BCLK 17 IO17 IO111 111 AP_TO_BBPMU_RADIO_ON_L GND 205 298 I2C0_SMC_SDA


11 11 12 IO205 IO298 15

GND 18 IO18 IO112 112 PP_VDD_MAIN 90_PCIE_WLAN_TO_AP_RXD_N 206 299 GND


11 11 12 IO206 IO299 15

I2S_BB_TO_AP_DIN 19 IO19 IO113 113 PP_VDD_MAIN 90_PCIE_WLAN_TO_AP_RXD_P 207 300 IKTARA_COIL2


11 11 12 IO207 IO300 15

GND 20 IO20 IO114 114 PP_VDD_MAIN GND 208 301 IKTARA_COIL2


11 11 12 IO208 IO301 15

I2S_AP_TO_BB_DOUT 21 IO21 IO115 115 GND PP3V0_S2 209 302 IKTARA_COIL2


11 11 12 IO209 IO302 15

GND 22 IO22 IO116 116 GND PP1V8_TOUCH_RACER_S2 210 303 IKTARA_COIL2


11 11 12 IO210 IO303 15

I2S_BB_TO_AP_LRCLK 23 IO23 IO117 117 GND PP1V8_TOUCH_RACER_S2 211 304 IKTARA_COIL1


11 11 12 IO211 IO304 15

GND 24 IO24 IO118 118 90_PCIE_BB_TO_AP_RXD_N PMU_TO_WLAN_REG_ON 212 IO305 305 IKTARA_COIL1
11 11 12 IO212 15

PP1V8_ALWAYS 25 IO25 IO119 119 90_PCIE_BB_TO_AP_RXD_P RADIO_PA_NTC 213 IO306 306 IKTARA_COIL1
11 11 12 IO213 15

GND 26 IO26 IO120 120 GND BT_TO_AP_TIME_SYNC 214 IO307 307 IKTARA_COIL1
11 11 12 IO214 15

GND 27 IO27 IO121 121 90_PCIE_AP_TO_BB_TXD_N UART_BT_TO_AP_RXD 215 IO308 308 GND
11 11 12 IO215 15

GND 28 IO28 IO122 122 90_PCIE_AP_TO_BB_TXD_P GND 216 IO309 309 GND
11 11 12 IO216 15

GND 29 IO29 IO123 123 GND GND 217 IO310 310 GND
11 11 12 IO217 15

GND 30 IO30 IO124 124 90_PCIE_AP_TO_BB_REFCLK_P UART_BT_TO_AP_CTS_L 218 IO311 311 GND
11 11 12 IO218 15

GND 31 IO31 IO125 125 90_PCIE_AP_TO_BB_REFCLK_N GND 219 IO312 312 GND
11 11 12 IO219 15

GND 32 IO32 IO126 126 GND GND 220 IO313 313 GND
11 11 12 IO220 15

C 11 GND 33 IO33 IO127 127 UART_BB_TO_AOP_RXD 11 12 GND 221 IO221 IO314 314 GND 15 C
GND 34 IO34 IO128 128 UART_GNSS_TO_AP_RXD GND 222 IO315 315 GND
11 11 12 IO222 15

GND 35 IO35 IO129 129 PCIE_AP_TO_BB_PERST_L GND 223 IO316 316 GND
11 11 12 IO223 15

GND 36 IO36 IO130 130 GND GND 224 IO317 317 GND
11 11 12 IO224 15

GND 37 IO37 IO131 131 PMU_AMUX_BY GND 225 IO318 318 GND
11 11 12 IO225 15

GND 38 IO38 IO132 132 PMU_AMUX_AY GND 226 IO319 319 GND
11 11 12 IO226 15

GND 39 IO39 IO133 133 GND GND 227 IO320 320 GND
11 11 12 IO227 15

GND 40 IO40 IO134 134 UART_NFC_TO_AP_CTS_L GND 228 IO321 321 GND
11 11 12 IO228 15

GND 41 IO41 IO135 135 UART_AP_TO_NFC_RTS_L REL_BIAS_VBUS_EN 229 IO322 322 GND
11 11 12 IO229 15

GND 42 IO42 IO136 136


BB_TO_AP_PEAK_POWER_INDICATOR GND 230 IO323 323 GND
11 11 12 IO230 15

GND 43 IO43 IO137 137 GND PP_GPU_LVCC 231 IO324 324 GND
11 11 12 IO231 15

GND 44 IO44 IO138 138 PP_VDD_MAIN GND 232 IO325 325 GND
11 11 12 IO232 15

GND 45 IO45 IO139 139 PP_VDD_MAIN PP_CPU_PCORE_LVCC 233 IO326 326 GND
11 11 12 IO233 15

GND 46 IO46 IO140 140 PP_VDD_MAIN GND 234 IO327 327 GND
11 11 12 IO234 15

GND 47 IO47 IO141 141 GND PP_BATT_VCC 235 IO328 328 GND
11 11 12 IO235 15

GND 48 IO48 IO142 142 GND PP_BATT_VCC 236 IO329 329 GND
11 11 12 IO236 15

GND 49 IO49 IO143 143 GND GND 237 IO330 330 GND
11 11 12 IO237 15

NFC_TO_ARC_RESET_L 50 IO50 IO144 144 GND AP_TO_BT_DEVICE_WAKE 238 IO331 331 GND
11 11 12 IO238 15

GND 51 IO51 IO145 145 GND AOP_TO_WLAN_CONTEXT_A 239 IO332 332 GND
11 12 12 IO239 15

NFC_TO_ARC_TRIG 52 IO52 IO146 146 GND UART_AOP_TO_RACER_TXD 240 IO333 333 GND
11 12 12 IO240 15

GND 53 IO53 IO147 147 GND SWD_AOP_TO_MANY_SWCLK 241 IO334 334 GND
11 12 12 IO241 15

GND 54 IO54 IO148 148 GND SPI_AP_TO_RACER_MOSI 242 IO335 335 GND
11 12 12 IO242 15

GND 55 IO55 IO149 149 GND SPI_AP_TO_RACER_SCLK 243 IO336 336 GND
11 12 12 IO243 15

GND 56 IO56 IO150 150 GND PP1V1_RACER_S2 244 IO337 337 GND
11 12 12 IO244 15

GND 57 IO57 IO151 151 GND PP1V1_RACER_S2 245 IO338 338 GND
11 12 12 IO245 15

GND 58 IO58 IO152 152 GND PP1V1_RACER_S2 246 IO339 339 GND
11 12 12 IO246 15

B 11 GND 59
60
IO59 IO153 153
154
GND 12 12 AP_TO_RACER_REF_CLK 247
248
IO247 IO340 340
341
GND 15 B
11 GND IO60 IO154 PP_VDD_MAIN 12 12 GND IO248 IO341 GND 15

GND 61 IO61 IO155 155 PP_VDD_MAIN AOP_TO_BBPMU_COEX 249 IO342 342 GND
11 12 12 IO249 15

GND 62 IO62 IO156 156 GND PP_VBUS2_IKTARA 250 IO343 343 GND
11 12 12 IO250 15

GND 63 IO63 IO157 157 PP_VDD_MAIN PP_VBUS2_IKTARA 251 IO344 344 GND
11 12 12 IO251 15

GND 64 IO64 IO158 158 PP_VDD_MAIN PP_VBUS2_IKTARA 252 IO345 345 GND
11 12 12 IO252 15

AP_TO_BB_RESET_L 65 IO65 IO159 159 GND PP_VBUS2_IKTARA 253 IO346 346 GND
11 12 12 IO253 15

GND 66 IO66 IO160 160 PMU_TO_NFC_EN GND 254 IO347 347 GND
11 12 12 IO254 15

SWD_AOP_BI_BB_SWDIO 67 IO67 IO161 161 GND AOP_TO_WLAN_CONTEXT_B 255 IO348 348 GND
11 12 12 IO255 15

GND 68 IO68 IO162 162 PMU_TO_BBPMU_RESET_L GND 256 IO349 349 GND
11 12 12 IO256 15

UART_GNSS_TO_AP_CTS_L 69 IO69 IO163 163 GND UART_RACER_TO_AOP_RXD 257 IO350 350 GND
11 12 12 IO257 15

GND 70 IO70 IO164 164 PMU_TO_TOUCH_CLK32K GND 258 IO351 351 GND
11 12 12 IO258 15

UART_AP_TO_GNSS_RTS_L 71 IO71 IO165 165 GND SPI_RACER_TO_AP_MISO 259 IO352 352 GND
11 12 12 IO259 15

GND 72 IO72 IO166 166 PCIE_WLAN_BI_AP_CLKREQ_L GND 260 IO353 353 GND
11 12 12 IO260 15

PCIE_AP_TO_WLAN_PERST_L 73 IO73 IO167 167 GND SPI_AP_TO_RACER_CS_L 261 IO354 354 GND
11 12 12 IO261 15

GND 74 IO74 IO168 168 GND GND 262 IO355 355 GND
11 12 12 IO262 15

AP_TO_RACER_RESET_L 75 IO75 IO169 169 BB_TO_PMU_PCIE_HOST_WAKE_L PMU_TO_IKTARA_RESET_L 263 IO356 356 GND
11 12 12 IO263 15

GND 76 IO76 IO170 170 GND GND 264 IO357 357 GND
11 12 12 IO264 15

AP_TO_WLAN_TIME_SYNC 77 IO77 IO171 171 GND SWD_AOP_BI_RACER_SWDIO 265 IO358 358 GND
11 12 12 IO265 15

GND 78 IO78 IO172 172 WLAN_TO_PMU_HOST_WAKE GND 266


11 12 12 IO266
GNSS_TO_AP_LOW_PWR_IND 79 IO79 IO173 173 GND I2C3_AP_SDA 267
11 12 12 IO267
GND 80 IO80 IO174 174 PMU_TO_WLAN_CLK32K GND 268
11 12 12 IO268
HYDRA_TO_AP_FORCE_DFU 81 IO81 IO175 175 GND I2C3_AP_SCL 269
11 12 12 IO269
GND 82 IO82 IO176 176 NFC_TO_AOP_HOST_WAKE GND 270
11 12 12 IO270
PP1V8_S2 83 IO83 IO177 177 GND GND 271
11 12 12 IO271
PP1V8_S2 84 IO84 IO178 178 TOUCH_TO_MANY_FORCE_PWM GND 272
11 12 12 IO272
A 11 GND 85
86
IO85 IO179 179
180
GND 12 12 GND 273
274
IO273 SYNC_DATE=11/01/2017
A
11 GND IO86 IO180 UART_AP_TO_BT_TXD 12 12 GND IO274 PAGE TITLE
87
11

11
GND
GND 88
IO87
IO88
IO181
IO182
181
182
GND
UART_AP_TO_BT_RTS_L
12

12
12

12
GND
GND
275
276
IO275
IO276
?
DRAWING NUMBER SIZE
GND 89 IO183 183 GND GND 277
11 IO89 12 12 IO277 051-02695 D
11 PP_VDD_MAIN_OV_R 90 IO90 IO184 184 GND 12 12 GND 278 IO278 Apple Inc. REVISION
AP_TO_BB_COEX 91 IO185 185 GND GND 279
11
92
IO91
186
12 12
280
IO279 4.0.0
11 BB_TO_AP_COEX IO92 IO186 GND 12 12 GND IO280 NOTICE OF PROPRIETARY PROPERTY: BRANCH
GND 93 IO93 IO187 187 GND GND 281
11 12 12 IO281 THE INFORMATION CONTAINED HEREIN IS THE
11 AP_TO_NFC_DEV_WAKE 94 IO94 IO188 188 GND 12
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
66 OF 85
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 8 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

D
LOFT INTERPOSER 10
PP_1V2_VDD_LNA 146
147
148
IO146
IO147
IO148
J_LFT_TOP
INTERPOSER-RF-MLB-TOP-D33
SMT-PAD
SYM 2 OF 2
D
149
SELECTED --> 998-10998 ON MLB_LOFT_INT
998-10900 ON MLB_BOT BOT INTERPOSER 150
151
152
IO149
IO150
IO151
IO152
153 IO153
154 IO154
J_LFT_TOP 155 IO155
INTERPOSER-RF-MLB-TOP-D33 156 IO156
1 SMT-PAD 75 157
IO1 IO75 IO157
2 SYM 1 OF 2
10 50_PRX_LB_PAD_LB2_SDR_IN_XCVR IO2 IO76 76 158 IO158
3 IO3 IO77 77 PP1V8_TOUCH_RACER_S2 7 9 14
159 IO159
4 IO4 IO78 78 160 IO160
5 IO5 IO79 79 161 IO161
10 50_PRX_MB2_PAD_MB_B_SDR_IN_XCVR 6 IO6 IO80 80 PP1V8_TOUCH_RACER_S2 7 9 14
162 IO162
7 IO7 IO81 81 163 IO163
8 IO8 IO82 82 PP10V0_RACER 7
164 IO164
9 IO9 IO83 83 165 IO165
10 50_PRX_MB1_PAD_MB_A_SDR_IN_XCVR 10 IO10 IO84 84 PN6V7_RACER 7
166 IO166
11 IO11 IO85 85 167 IO167
12 IO12 IO86 86 168 IO168
13 IO13 IO87 87
10 50_PRX_HB2_PAD_LHB_SDR_IN_XCVR 14 IO14 IO88 88 PP3V5_RACER 7
15 IO15 IO89 89 LOFT_CANARY_2 10
16 IO16 IO90 90 AP_TO_RACER_REF_CLK 12

C 17
18
IO17 IO91 91
92
C
10 50_PRX_HB1_PAD_HB_SDR_IN_XCVR IO18 IO92
19 IO19 IO93 93 AP_TO_RACER_RESET_L 5 11
20 IO20 IO94 94 RACER_TO_ACORN_ORB_SCAN 7
21 IO21 IO95 95 AP_TO_TOUCH_SCAN_CLK 5 11
22 IO22 IO96 96 UART_RACER_TO_AOP_RXD 5 12
23 IO23 IO97 97
24 IO24 IO98 98 UART_AOP_TO_RACER_TXD 5 12
25 IO25 IO99 99 SWD_AOP_TO_MANY_SWCLK 10 12
26 IO26 IO100 100 SWD_AOP_BI_RACER_SWDIO 9 12

10 LOFT_CANARY_1 27 IO27 IO101 101 SPI_AP_TO_RACER_MOSI 12


28 IO28 IO102 102
29 IO29 IO103 103 RACER_TO_AOP_INT_L 5 15

10 SHIELD_RFFE_RX_SDATA
30 IO30 IO104 104 SPI_AP_TO_RACER_SCLK 12
31 IO31 IO105 105
10 SHIELD_RFFE_RX_SCLK 32 IO32 IO106 106 SPI_RACER_TO_AP_MISO 12
33 IO33 IO107 107 TOUCH_TO_ACORN_PP5V25_EN 7
34 IO34 IO108 108 SPI_AP_TO_RACER_CS_L 12
35 IO35 IO109 109 TOUCH_TO_MANY_FORCE_PWM 5 10 12
36 IO36 IO110 110
10 PP_1V8_VIO 37 IO37 IO111 111 I2C3_AP_SDA 7 12
38 IO38 IO112 112 CKPLUS_WAIVE=I2C_PULLUP

10 SHIELD_RFFE_TX_SDATA 39 IO39 IO113 113


40 IO40 IO114 114
10 SHIELD_RFFE_TX_SCLK 41 IO41 IO115 115
42 IO42 IO116 116
43 117 PP5V25_TOUCH_VDDH
B 44
IO43
IO44
IO117
IO118 118 I2C3_AP_SCL
7

7 12
B
45 IO45 IO119 119 PMU_TO_TOUCH_CLK32K 5 12
46 IO46 IO120 120 CKPLUS_WAIVE=I2C_PULLUP
47 IO47 IO121 121 PP1V1_RACER 7 9
48 IO48 IO122 122 PP1V1_RACER 7 9
49 IO49 IO123 123
50 IO50 IO124 124 50_LBPAD_2G_OUT_CPL2_IN_JPN 10 SWD_AOP_BI_RACER_SWDIO 9 12
51 IO51 IO125 125
10 9 PP_ET_PA 52 IO52 IO126 126 50_HBPAD_2G_OUT_CPL2_IN_JPN 10
1
10 9 PP_ET_PA
53 IO53 IO127 127 R7701
54 128 50_PAD_ANT_HB_CPL2_IN 100K
10 9 PP_ET_PA IO54 IO128 10 5%
55 129 1/32W
10 9 PP_ET_PA IO55 IO129 MF
10 9 PP_ET_PA
56 IO56 IO130 130 50_PAD_ANT_LB_CPL2_IN 10
2 01005 Moved here from Loft
57 IO57 IO131 131
58 IO58 IO132 132 50_TDD_PAD_ANT_HB_CPL2_IN 10
59 IO59 IO133 133
60 IO60 IO134 134 PP_VBATT_PA 10
61 IO61 IO135 135
10 PP_1V8_VBIAS_LNA 62 IO62 IO136 136
63 IO63 IO137 137
64 IO64 IO138 138 50_TX_2G_HB_IN 10
65 IO65 IO139 139
66 IO66 IO140 140 50_TX_MB1_IN 10
67 IO67 IO141 141
68 IO68 IO142 142 50_TX_HB_PA_IN 10

A 69
70
IO69 IO143 143
144 SYNC_DATE=06/07/2017 A
IO70 IO144 PAGE TITLE
50_TX_LB_PA_IN 71 145
10
72
IO71
IO72
IO145
B2B: Interposer Loft
73 DRAWING NUMBER SIZE
IO73
74 051-02695 D
IO74 Apple Inc. REVISION

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
77 OF 85
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 9 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

I120

POWER
47 22 14 10 7 6 5 PP_VDD_MAIN PP_VDD_MAIN
19 14 13 6
PP1V8_S2 PP1V8_APPMU_S2_TO_RADIO
19 12 PP3V0_S2 PP3V0_APPMU_S2_TO_RADIO

CELLULAR WLAN D
D
PCIE PCIE
23 11 90_PCIE_AP_TO_BB_TXD_P 90_PCIE_AP_TO_WLAN_TXD_P
90_PCIE_AP_TO_BB_TX_P
hier_radio_ice 90_PCIE_AP_TO_WLAN_TX_P 12 42

23 11 90_PCIE_AP_TO_BB_TXD_N 90_PCIE_AP_TO_BB_TX_N 90_PCIE_AP_TO_WLAN_TX_N 90_PCIE_AP_TO_WLAN_TXD_N 12 42 I124

POWER
23 11 90_PCIE_BB_TO_AP_RXD_P 90_PCIE_BB_TO_AP_TX_P CELL + WLAN 90_PCIE_WLAN_TO_AP_TX_P
90_PCIE_WLAN_TO_AP_RXD_P
90_PCIE_WLAN_TO_AP_RXD_N
12 42
47 22 14 10 7 6 5
PP_VDD_MAIN PP_VDD_MAIN
23 11 90_PCIE_BB_TO_AP_RXD_N 90_PCIE_BB_TO_AP_TX_N 90_PCIE_WLAN_TO_AP_TX_N
12 42
47 12
PP1V8_NFC_S2 PP1V8_SDRAM

23 11 90_PCIE_AP_TO_BB_REFCLK_P 90_PCIE_AP_TO_WLAN_REFCLK_P HIER_NFC


90_PCIE_AP_TO_BB_REFCLK_P 90_PCIE_AP_TO_WLAN_REFCLK_P 12 42

23 11 90_PCIE_AP_TO_BB_REFCLK_N 90_PCIE_AP_TO_BB_REFCLK_N 90_PCIE_AP_TO_WLAN_REFCLK_N 90_PCIE_AP_TO_WLAN_REFCLK_N 12 42


CONTROL
47 12
PMU_TO_NFC_EN PMU_TO_NFC_EN
AP_TO_NFC_FW_DWLD_REQ AP_TO_NFC_FW_DWLD
23 11 PCIE_BB_BI_AP_CLKREQ_L PCIE_AP_BI_BB_CLKREQ_L PCIE_AP_BI_WLAN_CLKREQ_L PCIE_WLAN_BI_AP_CLKREQ_L 12 42 47 11

PCIE_AP_TO_WLAN_PERST_L 11 42 47 11
AP_TO_NFC_DEV_WAKE AP_TO_NFC_DEV_WAKE
23 11 PCIE_AP_TO_BB_PERST_L PCIE_AP_TO_BB_PERST_L PCIE_AP_TO_WLAN_PERST_L NFC_TO_AOP_HOST_WAKE
47 12 NFC_TO_PMU_HOST_WAKE
23 12 BB_TO_PMU_PCIE_HOST_WAKE_L PCIE_BB_TO_APPMU_WAKE_L PCIE_BTWLAN_TO_APPMU_WAKE WLAN_TO_PMU_HOST_WAKE 12 42

BB USB
DOTARA COEX
NC 90_USB_BB_P
NC 90_USB_BB_N
NC PP_1V8_BB_USB_VBUS 11 PP1V8_ALWAYS NFC UART
47 11
UART_AP_TO_NFC_TXD UART_AP_TO_NFC_TXD
BB I2S 47 11
UART_NFC_TO_AP_RXD UART_NFC_TO_AP_RXD
23 11 I2S_AP_TO_BB_DOUT I2S_AP_TO_BB_DOUT R8000 1 47 11
UART_AP_TO_NFC_RTS_L UART_AP_TO_NFC_RTS_L
I2S_BB_TO_AP_DIN
BTWLAN UART 10K UART_NFC_TO_AP_CTS_L
23 11 I2S_BB_TO_AP_DOUT 5% 47 11 UART_NFC_TO_AP_CTS_L
UART_AP_TO_BTWLAN_TXD UART_AP_TO_BT_TXD 12 42 1/20W
23 11 I2S_BB_TO_AP_LRCLK I2S_BB_TO_AP_LRCLK_WS MF MISC
UART_BTWLAN_TO_AP_TXD UART_BT_TO_AP_RXD 12 42 201 2
23 11 I2S_BB_TO_AP_BCLK I2S_BB_TO_AP_SCLK AP_TO_NFC_BUTTON
C AOP BB UART
UART_AP_TO_BTWLAN_RTS_L
UART_BTWLAN_TO_AP_RTS_L
UART_AP_TO_BT_RTS_L
UART_BT_TO_AP_CTS_L
12 42

12 42
47 11 PMU_TO_NFC_VDD_MAIN_EN
NC
PMU_TO_NFC_VDD_MAIN_EN C
47 11 NFC_TO_ARC_RESET_L NFC_TO_ARC_RESET_L
23 11 UART_AOP_TO_BB_TXD UART_AOP_TO_BB_TXD
UART_BB_TO_AOP_RXD
CONTEXT 47 11 NFC_TO_ARC_TRIG NFC_TO_ARC_TRIG
23 11 UART_BB_TO_AOP_TXD AOP_TO_WLAN_CONTEXT_B 12 42
AOP_TO_WLAN_CONTEXT_B
AOP_TO_WLAN_CONTEXT_A 12 42 47 3 NFC_ANT NFC_ANT
AOP_TO_WLAN_CONTEXT_A
POWER KEEPING
41 12 PMU_TO_BBPMU_RESET_L APPMU_TO_BBPMU_ON CONTROL
41 11 AP_TO_BBPMU_RADIO_ON_L AP_TO_BBPMU_SDWN_L APPMU_TO_WLAN_REG_ON PMU_TO_WLAN_REG_ON 12 42

23 11 AP_TO_BB_RESET_L AP_TO_BB_RESET_L APPMU_TO_BT_REG_ON PMU_TO_BT_REG_ON 12 42

23 11 AP_TO_BB_COREDUMP_TRIG AP_TO_BB_COREDUMP_TRIG
23 11 BB_TO_AP_RESET_DETECT_L BB_TO_AP_RESET_DETECT_L CLK_APPMU_TO_WLAN_32K PMU_TO_WLAN_CLK32K 12 42

AP_TO_BTWLAN_DEV_WAKE AP_TO_BT_DEVICE_WAKE 12 42
COEXISTENCE AP_TO_WLAN_TIME_SYNC 11 42
AP_TO_WLAN_TIME_SYNC
41 12 AOP_TO_BBPMU_COEX AP_TO_BBPMU_FORCE_PWM
BT_TO_AP_TIME_SYNC BT_TO_AP_TIME_SYNC 12 42
22 12 9 5 TOUCH_TO_MANY_FORCE_PWM TOUCH_TO_MANY_SCAN_STATE
23 11 AP_TO_BB_COEX AP_TO_BB_COEX_GPIO1
23 11 BB_TO_AP_COEX BB_TO_AP_COEX_GPIO1
GNSS
CONTROL
PEAK POWER MGMT PMU_TO_GNSS_EN
APPMU_TO_GNSS_EN 12 26
24 11 BB_TO_MANY_GSM_BURST_IND BB_TO_AP_GSM_TXBURST
GNSS_TO_AP_LOW_PWR_IND GNSS_TO_AP_LOW_PWR_IND 11 26
23 11 AP_TO_BB_PEAK_POWER_INDICATOR AP_TO_BB_PEAK_PWR_IND
AP_TO_GNSS_TIME_MARK AP_TO_GNSS_TIME_MARK 11 26

SWD
24 11 SWD_AOP_BI_BB_SWDIO SWD_JTAG_BB_TMS_SWDIO GNSS UART
29 12 9 SWD_AOP_TO_MANY_SWCLK SWD_JTAG_TCK_SWDCLK UART_AP_TO_GNSS_TXD UART_AP_TO_GNSS_TXD 11 26

UART_GNSS_TO_AP_TXD UART_GNSS_TO_AP_RXD 11 26
DOTARA UART_AP_TO_GNSS_RTS_L
UART_AP_TO_GNSS_RTS_L 11 27

B UART_GNSS_TO_AP_RTS_L UART_GNSS_TO_AP_CTS_L 11 26
B

RADIO PA NTC

LB PAD LOFT 1
I71 OMIT
C3043 1 R3043 RADIO_PA_NTC XW3043
LB XCVR PRX 100PF 10KOHM-1% SHORT-20L-0.05MM-SM PATH=I72
28 9 50_PRX_LB_PAD_LB2_SDR_IN_XCVR 50_LBPAD_PRX_LB_TO_XCVR 5%
16V
PA_NTC_RETURN 1 2
01005
NP0-C0G 2 ROOM=PMU
ROOM=PMU
01005 2
ROOM=PMU
LB XCVR TX
26 9 50_TX_LB_PA_IN 50_XCVR_TO_LBPAD_TX_LB1
POWER
VDD_LOFT_1V2 PP_1V2_VDD_LNA 9 22
LB CPLR
VDD_LOFT_1V8 PP_1V8_VBIAS_LNA 9 22
37 9 50_LBPAD_2G_OUT_CPL2_IN_JPN 50_LBPAD_TO_CPL2_2GLB_JPN
VDD_LOFT_3V0 PP_VBATT_PA 9 22
37 9 50_PAD_ANT_LB_CPL2_IN 50_TRX_LBPAD_TO_CPL2_LB
VDD_LOFT_ET PP_ET_PA 9 30

HB PAD
HB XCVR PRX
28 9 50_PRX_MB1_PAD_MB_A_SDR_IN_XCVR 50_HB_PRX_MB1_TO_XCVR
28 9 50_PRX_MB2_PAD_MB_B_SDR_IN_XCVR 50_HB_PRX_MB2_TO_XCVR RFFE
28 9 50_PRX_HB1_PAD_HB_SDR_IN_XCVR 50_HB_PRX_HB1_TO_XCVR
28 9 50_PRX_HB2_PAD_LHB_SDR_IN_XCVR 50_HB_PRX_HB2_TO_XCVR RFFE_RX_CLK SHIELD_RFFE_RX_SCLK 9 27

RFFE_RX_DATA SHIELD_RFFE_RX_SDATA 9 27

A 26 9 50_TX_HB_PA_IN
HB XCVR TX
50_XCVR_TO_HBPAD_TX_HB
RFFE_TX_CLK SHIELD_RFFE_TX_SCLK
SHIELD_RFFE_TX_SDATA
9 27
SYNC_DATE=03/31/2017 A
RFFE_TX_DATA 9 27 PAGE TITLE
26 9 50_TX_MB1_IN 50_XCVR_TO_HBPAD_TX_MB1
26 9 50_TX_2G_HB_IN 50_XCVR_TO_HBPAD_TX_2G_HB
RFFE_VIO_1V8 PP_1V8_VIO 9 27
RADIOS
DRAWING NUMBER SIZE
HB CPLR 051-02695 D
37 9 50_HBPAD_2G_OUT_CPL2_IN_JPN 50_HBPAD_TO_CPL2_2GHB_JPN
CANARY Apple Inc. REVISION
37 9 50_PAD_ANT_HB_CPL2_IN 50_TRX_HBPAD_TO_CPL2 4.0.0
37 9 50_TDD_PAD_ANT_HB_CPL2_IN 50_TRX_HBPAD_TDD_TO_CPL2_HPUE LOFT_CANARY1 LOFT_CANARY_1 9 23
NOTICE OF PROPRIETARY PROPERTY: BRANCH
LOFT_CANARY2 LOFT_CANARY_2 9 23
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
80 OF 85
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 10 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

Interposer Aliases: Pins 1-144


D D
THIS SIDE HAS ATTRIBUTE
MAKE_BASE=TRUE THIS SIDE HAS ATTRIBUTE
MAKE_BASE=TRUE
8 GND MAKE_BASE=TRUE GND 11 12 14 15

8 GND MAKE_BASE=TRUE GND 11 12 14 15 8 PCIE_AP_TO_WLAN_PERST_L MAKE_BASE=TRUE PCIE_AP_TO_WLAN_PERST_L 10

8 GND MAKE_BASE=TRUE GND 11 12 14 15 8 GND MAKE_BASE=TRUE GND 11 14

8 GND MAKE_BASE=TRUE GND 11 12 14 15 8 AP_TO_RACER_RESET_L MAKE_BASE=TRUE AP_TO_RACER_RESET_L 5 9

8 GND MAKE_BASE=TRUE GND 11 12 14 15 8 GND MAKE_BASE=TRUE GND 11 14

8 GND MAKE_BASE=TRUE GND 11 12 14 15 8 AP_TO_WLAN_TIME_SYNC MAKE_BASE=TRUE AP_TO_WLAN_TIME_SYNC 10

8 PMU_TO_SYSTEM_COLD_RESET_L MAKE_BASE=TRUE PMU_TO_SYSTEM_COLD_RESET_L 5 8 GND MAKE_BASE=TRUE GND 11 14

8 GND MAKE_BASE=TRUE GND 11 12 14 15 8 GNSS_TO_AP_LOW_PWR_IND MAKE_BASE=TRUE GNSS_TO_AP_LOW_PWR_IND 10

8 AP_TO_CAMPMU_RESET_L MAKE_BASE=TRUE AP_TO_CAMPMU_RESET_L 5 8 GND MAKE_BASE=TRUE GND 11 14

8 GND MAKE_BASE=TRUE GND 11 12 14 15 8 HYDRA_TO_AP_FORCE_DFU MAKE_BASE=TRUE HYDRA_TO_AP_FORCE_DFU 5

8 BB_TO_MANY_GSM_BURST_IND MAKE_BASE=TRUE BB_TO_MANY_GSM_BURST_IND 10 8 GND MAKE_BASE=TRUE GND 11 14

8 GND MAKE_BASE=TRUE GND 11 12 14 15 8 PP1V8_S2 MAKE_BASE=TRUE PP1V8_S2 14

8 HALL_CASE_TO_AOP_NORTH_L MAKE_BASE=TRUE HALL_CASE_TO_AOP_NORTH_L 13 8 PP1V8_S2 MAKE_BASE=TRUE PP1V8_S2 14

8 GND MAKE_BASE=TRUE GND 11 12 14 15 8 GND MAKE_BASE=TRUE GND 11 14

8 AP_TO_TOUCH_SCAN_CLK MAKE_BASE=TRUE AP_TO_TOUCH_SCAN_CLK 5 9 8 GND MAKE_BASE=TRUE GND 14

8 GND MAKE_BASE=TRUE GND 11 12 14 15 8 GND MAKE_BASE=TRUE GND 14

8 I2S_BB_TO_AP_BCLK MAKE_BASE=TRUE I2S_BB_TO_AP_BCLK 10 8 GND MAKE_BASE=TRUE GND 14

8 GND MAKE_BASE=TRUE GND 11 12 14 15 8 GND MAKE_BASE=TRUE GND 11 12 14

8 I2S_BB_TO_AP_DIN MAKE_BASE=TRUE I2S_BB_TO_AP_DIN 10 8 PP_VDD_MAIN_OV_R MAKE_BASE=TRUE PP_VDD_MAIN_OV_R 5


8 GND MAKE_BASE=TRUE GND 11 12 14 15 8 AP_TO_BB_COEX MAKE_BASE=TRUE AP_TO_BB_COEX 10
8 I2S_AP_TO_BB_DOUT MAKE_BASE=TRUE I2S_AP_TO_BB_DOUT 10 8 BB_TO_AP_COEX MAKE_BASE=TRUE BB_TO_AP_COEX 10
8 GND MAKE_BASE=TRUE GND 11 12 14 15 8 GND MAKE_BASE=TRUE GND 14

C 8

8
I2S_BB_TO_AP_LRCLK
GND
MAKE_BASE=TRUE

MAKE_BASE=TRUE GND 11 12 14 15
I2S_BB_TO_AP_LRCLK 10 8

8
AP_TO_NFC_DEV_WAKE
AP_TO_NFC_FW_DWLD_REQ
MAKE_BASE=TRUE

MAKE_BASE=TRUE
AP_TO_NFC_DEV_WAKE
AP_TO_NFC_FW_DWLD_REQ
10

10
C
8 PP1V8_ALWAYS MAKE_BASE=TRUE PP1V8_ALWAYS 10 8 GND MAKE_BASE=TRUE GND 14

8 GND MAKE_BASE=TRUE GND 11 12 14 15 8 PMU_TO_NFC_VDD_MAIN_EN MAKE_BASE=TRUE PMU_TO_NFC_VDD_MAIN_EN 10

8 GND MAKE_BASE=TRUE GND 11 12 14 15 8 UART_AOP_TO_BB_TXD MAKE_BASE=TRUE UART_AOP_TO_BB_TXD 10

8 GND MAKE_BASE=TRUE GND 14 8 GND MAKE_BASE=TRUE GND 14

8 GND MAKE_BASE=TRUE GND 14 8 UART_AP_TO_GNSS_TXD MAKE_BASE=TRUE UART_AP_TO_GNSS_TXD 10

8 GND MAKE_BASE=TRUE GND 14 8 GND MAKE_BASE=TRUE GND 14

8 GND MAKE_BASE=TRUE GND 11 14 8 AP_TO_BB_COREDUMP_TRIG MAKE_BASE=TRUE AP_TO_BB_COREDUMP_TRIG 10

8 GND MAKE_BASE=TRUE GND 11 14 8 UART_AP_TO_NFC_TXD MAKE_BASE=TRUE UART_AP_TO_NFC_TXD 10

8 GND MAKE_BASE=TRUE GND 11 14 8 UART_NFC_TO_AP_RXD MAKE_BASE=TRUE UART_NFC_TO_AP_RXD 10

8 GND MAKE_BASE=TRUE GND 11 14 8 BB_TO_AP_RESET_DETECT_L MAKE_BASE=TRUE BB_TO_AP_RESET_DETECT_L 10

8 GND MAKE_BASE=TRUE GND 11 14 8 GND MAKE_BASE=TRUE GND 14

8 GND MAKE_BASE=TRUE GND 11 14 8 BOARD_ID2 MAKE_BASE=TRUE BOARD_ID2 4

8 GND MAKE_BASE=TRUE GND 11 14 8 AP_TO_GNSS_TIME_MARK MAKE_BASE=TRUE AP_TO_GNSS_TIME_MARK 10

8 GND MAKE_BASE=TRUE GND 11 14 8 PCIE_BB_BI_AP_CLKREQ_L MAKE_BASE=TRUE PCIE_BB_BI_AP_CLKREQ_L 10

8 GND MAKE_BASE=TRUE GND 11 14 AP_TO_BB_PEAK_POWER_INDICATOR


8 MAKE_BASE=TRUE AP_TO_BB_PEAK_POWER_INDICATOR 10

8 GND MAKE_BASE=TRUE GND 11 14 8 AP_TO_BBPMU_RADIO_ON_L MAKE_BASE=TRUE AP_TO_BBPMU_RADIO_ON_L 10

8 GND MAKE_BASE=TRUE GND 11 14 8 PP_VDD_MAIN MAKE_BASE=TRUE PP_VDD_MAIN 14

8 GND MAKE_BASE=TRUE GND 11 14 8 PP_VDD_MAIN MAKE_BASE=TRUE PP_VDD_MAIN 14

8 GND MAKE_BASE=TRUE GND 11 14 8 PP_VDD_MAIN MAKE_BASE=TRUE PP_VDD_MAIN 14

8 GND MAKE_BASE=TRUE GND 11 14 8 GND MAKE_BASE=TRUE GND 11 12 14

8 GND MAKE_BASE=TRUE GND 11 14 8 GND MAKE_BASE=TRUE GND 11 14

8 GND MAKE_BASE=TRUE GND 11 14 8 GND MAKE_BASE=TRUE GND 11 14

8 GND MAKE_BASE=TRUE GND 11 14 8 90_PCIE_BB_TO_AP_RXD_N MAKE_BASE=TRUE 90_PCIE_BB_TO_AP_RXD_N 10

8 GND MAKE_BASE=TRUE GND 11 14 8 90_PCIE_BB_TO_AP_RXD_P MAKE_BASE=TRUE 90_PCIE_BB_TO_AP_RXD_P 10

GND GND GND GND


B 8

8 NFC_TO_ARC_RESET_L
MAKE_BASE=TRUE

MAKE_BASE=TRUE
11 14

NFC_TO_ARC_RESET_L 10
8

8 90_PCIE_AP_TO_BB_TXD_N
MAKE_BASE=TRUE

MAKE_BASE=TRUE
11 14

90_PCIE_AP_TO_BB_TXD_N 10
B
8 GND MAKE_BASE=TRUE GND 11 14 8 90_PCIE_AP_TO_BB_TXD_P MAKE_BASE=TRUE 90_PCIE_AP_TO_BB_TXD_P 10

8 NFC_TO_ARC_TRIG MAKE_BASE=TRUE NFC_TO_ARC_TRIG 10 8 GND MAKE_BASE=TRUE GND 11 14

8 GND MAKE_BASE=TRUE GND 11 14 890_PCIE_AP_TO_BB_REFCLK_P MAKE_BASE=TRUE 90_PCIE_AP_TO_BB_REFCLK_P 10

8 GND MAKE_BASE=TRUE GND 11 14 890_PCIE_AP_TO_BB_REFCLK_N MAKE_BASE=TRUE 90_PCIE_AP_TO_BB_REFCLK_N 10

8 GND MAKE_BASE=TRUE GND 11 14 8 GND MAKE_BASE=TRUE GND 11 14

8 GND MAKE_BASE=TRUE GND 11 14 8 UART_BB_TO_AOP_RXD MAKE_BASE=TRUE UART_BB_TO_AOP_RXD 10

8 GND MAKE_BASE=TRUE GND 11 14 8 UART_GNSS_TO_AP_RXD MAKE_BASE=TRUE UART_GNSS_TO_AP_RXD 10

8 GND MAKE_BASE=TRUE GND 11 14 8 PCIE_AP_TO_BB_PERST_L MAKE_BASE=TRUE PCIE_AP_TO_BB_PERST_L 10

8 GND MAKE_BASE=TRUE GND 11 14 8 GND MAKE_BASE=TRUE GND 11 14

8 GND MAKE_BASE=TRUE GND 11 14 8 PMU_AMUX_BY MAKE_BASE=TRUE PMU_AMUX_BY 5

8 GND MAKE_BASE=TRUE GND 11 14 8 PMU_AMUX_AY MAKE_BASE=TRUE PMU_AMUX_AY 5

8 GND MAKE_BASE=TRUE GND 11 14 8 GND MAKE_BASE=TRUE GND 11 14

8 GND MAKE_BASE=TRUE GND 11 14 8 UART_NFC_TO_AP_CTS_L MAKE_BASE=TRUE UART_NFC_TO_AP_CTS_L 10

8 GND MAKE_BASE=TRUE GND 14 8 UART_AP_TO_NFC_RTS_L MAKE_BASE=TRUE UART_AP_TO_NFC_RTS_L 10

8 AP_TO_BB_RESET_L MAKE_BASE=TRUE AP_TO_BB_RESET_L 10 BB_TO_AP_PEAK_POWER_INDICATOR


8 MAKE_BASE=TRUE BB_TO_AP_PEAK_POWER_INDICATOR
8 GND MAKE_BASE=TRUE GND 11 14 8 GND MAKE_BASE=TRUE GND 11 14

8 SWD_AOP_BI_BB_SWDIO MAKE_BASE=TRUE SWD_AOP_BI_BB_SWDIO 10 8 PP_VDD_MAIN MAKE_BASE=TRUE PP_VDD_MAIN 14

8 GND MAKE_BASE=TRUE GND 11 14 8 PP_VDD_MAIN MAKE_BASE=TRUE PP_VDD_MAIN 14

8 UART_GNSS_TO_AP_CTS_L MAKE_BASE=TRUE UART_GNSS_TO_AP_CTS_L 10 8 PP_VDD_MAIN MAKE_BASE=TRUE SIG_NAME=PP_VDD_MAIN 14

8 GND MAKE_BASE=TRUE GND 11 14 8 GND MAKE_BASE=TRUE GND 11 12 14

8 UART_AP_TO_GNSS_RTS_L MAKE_BASE=TRUE UART_AP_TO_GNSS_RTS_L 10 8 GND MAKE_BASE=TRUE GND 11 12 14

8 GND MAKE_BASE=TRUE GND 11 14 8 GND MAKE_BASE=TRUE GND 11 12 14

8 GND MAKE_BASE=TRUE GND 11 12 14

A SYNC_DATE=11/02/2017 A
PAGE TITLE

Interposer: Pins 1-144


DRAWING NUMBER SIZE

051-02695 D
Apple Inc. REVISION

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
81 OF 85
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 11 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

Interposer Aliases: Pins 145-285

D D
THIS SIDE HAS ATTRIBUTE
THIS SIDE HAS ATTRIBUTE
MAKE_BASE=TRUE MAKE_BASE=TRUE
8 GND MAKE_BASE=TRUE GND 11 12 14
8 GND MAKE_BASE=TRUE GND 12 14
8 GND MAKE_BASE=TRUE GND 11 12 14
8 GND MAKE_BASE=TRUE GND 12 14
8 GND MAKE_BASE=TRUE GND 11 14 15
8 UART_BT_TO_AP_CTS_L MAKE_BASE=TRUE UART_BT_TO_AP_CTS_L 10
8 GND MAKE_BASE=TRUE GND 11 12 14
8 GND MAKE_BASE=TRUE GND 12 14
8 GND MAKE_BASE=TRUE GND 11 12 14
8 GND MAKE_BASE=TRUE GND 12 14
8 GND MAKE_BASE=TRUE GND 11 12 14
8 GND MAKE_BASE=TRUE GND 12 14
8 GND MAKE_BASE=TRUE GND 11 12 14
8 GND MAKE_BASE=TRUE GND 12 14
8 GND MAKE_BASE=TRUE GND 11 12 14
8 GND MAKE_BASE=TRUE GND 12 14
8 GND MAKE_BASE=TRUE GND 11 12 14
8 GND MAKE_BASE=TRUE GND 12 14
8 PP_VDD_MAIN MAKE_BASE=TRUE PP_VDD_MAIN 14
8 GND MAKE_BASE=TRUE GND 12 14
8 PP_VDD_MAIN MAKE_BASE=TRUE PP_VDD_MAIN 14
8 GND MAKE_BASE=TRUE GND 12 14
8 GND MAKE_BASE=TRUE GND 11 12 14
8 GND MAKE_BASE=TRUE GND 14
8 PP_VDD_MAIN MAKE_BASE=TRUE PP_VDD_MAIN 14
8 GND MAKE_BASE=TRUE GND 14
8 PP_VDD_MAIN MAKE_BASE=TRUE PP_VDD_MAIN 14
8 REL_BIAS_VBUS_EN MAKE_BASE=TRUE REL_BIAS_VBUS_EN 5
8 GND MAKE_BASE=TRUE GND 11 12 14
8 GND MAKE_BASE=TRUE GND 12 14
8 PMU_TO_NFC_EN MAKE_BASE=TRUE PMU_TO_NFC_EN 10
8 PP_GPU_LVCC MAKE_BASE=TRUE PP_GPU_LVCC 5
8 GND MAKE_BASE=TRUE GND 11 12 14
8 GND MAKE_BASE=TRUE GND 12 14
8 PMU_TO_BBPMU_RESET_L MAKE_BASE=TRUE PMU_TO_BBPMU_RESET_L 10
8 PP_CPU_PCORE_LVCC MAKE_BASE=TRUE PP_CPU_PCORE_LVCC 5
8 GND MAKE_BASE=TRUE GND 11 12 14
8 GND MAKE_BASE=TRUE GND 12 14
8 PMU_TO_TOUCH_CLK32K MAKE_BASE=TRUE PMU_TO_TOUCH_CLK32K 5 9
8 PP_BATT_VCC MAKE_BASE=TRUE PP_BATT_VCC 14
8 GND MAKE_BASE=TRUE GND 11 12 14
8 PP_BATT_VCC PP_BATT_VCC 14
C
MAKE_BASE=TRUE

C 8

8
PCIE_WLAN_BI_AP_CLKREQ_L
GND
MAKE_BASE=TRUE

MAKE_BASE=TRUE GND 11 12 14
PCIE_WLAN_BI_AP_CLKREQ_L 10
8 GND MAKE_BASE=TRUE GND 14

8 AP_TO_BT_DEVICE_WAKE MAKE_BASE=TRUE AP_TO_BT_DEVICE_WAKE 10


8 GND MAKE_BASE=TRUE GND 11 12 14
8 AOP_TO_WLAN_CONTEXT_A MAKE_BASE=TRUE AOP_TO_WLAN_CONTEXT_A 10
BB_TO_PMU_PCIE_HOST_WAKE_L
8 MAKE_BASE=TRUE BB_TO_PMU_PCIE_HOST_WAKE_L 10
8 UART_AOP_TO_RACER_TXD MAKE_BASE=TRUE UART_AOP_TO_RACER_TXD 5 9
8 GND MAKE_BASE=TRUE GND 11 12 14
8 SWD_AOP_TO_MANY_SWCLK MAKE_BASE=TRUE SWD_AOP_TO_MANY_SWCLK 9 10
8 GND MAKE_BASE=TRUE GND 11 12 14
8 SPI_AP_TO_RACER_MOSI MAKE_BASE=TRUE SPI_AP_TO_RACER_MOSI 9
8 WLAN_TO_PMU_HOST_WAKE MAKE_BASE=TRUE WLAN_TO_PMU_HOST_WAKE 10
8 SPI_AP_TO_RACER_SCLK MAKE_BASE=TRUE SPI_AP_TO_RACER_SCLK 9
8 GND MAKE_BASE=TRUE GND 11 12 14
8 PP1V1_RACER_S2 MAKE_BASE=TRUE PP1V1_RACER_S2 14
8 PMU_TO_WLAN_CLK32K MAKE_BASE=TRUE PMU_TO_WLAN_CLK32K 10
8 PP1V1_RACER_S2 MAKE_BASE=TRUE PP1V1_RACER_S2 14
8 GND MAKE_BASE=TRUE GND 11 12 14
8 PP1V1_RACER_S2 MAKE_BASE=TRUE PP1V1_RACER_S2 14
8 NFC_TO_AOP_HOST_WAKE MAKE_BASE=TRUE NFC_TO_AOP_HOST_WAKE 10
8 AP_TO_RACER_REF_CLK MAKE_BASE=TRUE AP_TO_RACER_REF_CLK 9
8 GND MAKE_BASE=TRUE GND 11 12 14
8 GND MAKE_BASE=TRUE GND 14
8 TOUCH_TO_MANY_FORCE_PWM MAKE_BASE=TRUE TOUCH_TO_MANY_FORCE_PWM 5 9 10
8 AOP_TO_BBPMU_COEX MAKE_BASE=TRUE AOP_TO_BBPMU_COEX 10
8 GND MAKE_BASE=TRUE GND 11 12 14
8 PP_VBUS2_IKTARA MAKE_BASE=TRUE PP_VBUS2_IKTARA 14
8 UART_AP_TO_BT_TXD MAKE_BASE=TRUE UART_AP_TO_BT_TXD 10
8 PP_VBUS2_IKTARA MAKE_BASE=TRUE PP_VBUS2_IKTARA 14
8 GND MAKE_BASE=TRUE GND 11 12 14
8 PP_VBUS2_IKTARA MAKE_BASE=TRUE PP_VBUS2_IKTARA 14
8 UART_AP_TO_BT_RTS_L MAKE_BASE=TRUE UART_AP_TO_BT_RTS_L 10
8 PP_VBUS2_IKTARA MAKE_BASE=TRUE PP_VBUS2_IKTARA 14
8 GND MAKE_BASE=TRUE GND 11 12 14
8 GND MAKE_BASE=TRUE GND 12 14
8 GND MAKE_BASE=TRUE GND 11 12 14
8 AOP_TO_WLAN_CONTEXT_B MAKE_BASE=TRUE AOP_TO_WLAN_CONTEXT_B 10
8 GND MAKE_BASE=TRUE GND 11 12 14
8 GND MAKE_BASE=TRUE GND 12 14
8 GND MAKE_BASE=TRUE GND 11 12 14
8 UART_RACER_TO_AOP_RXD MAKE_BASE=TRUE UART_RACER_TO_AOP_RXD 5 9
8 GND MAKE_BASE=TRUE GND 11 12 14
8 GND MAKE_BASE=TRUE GND 12 14
8 GND MAKE_BASE=TRUE GND 11 12 14
8 SPI_RACER_TO_AP_MISO MAKE_BASE=TRUE SPI_RACER_TO_AP_MISO 9
8 GND MAKE_BASE=TRUE GND 11 12 14
8 GND MAKE_BASE=TRUE GND 12 14
8 GND MAKE_BASE=TRUE GND 14
8 SPI_AP_TO_RACER_CS_L MAKE_BASE=TRUE SPI_AP_TO_RACER_CS_L 9
8 GND MAKE_BASE=TRUE GND 14
8 GND MAKE_BASE=TRUE GND 12 14
GND GND
B 8

8 GND
MAKE_BASE=TRUE

MAKE_BASE=TRUE GND
14

14
8 PMU_TO_IKTARA_RESET_L MAKE_BASE=TRUE PMU_TO_IKTARA_RESET_L 6 B
8 GND MAKE_BASE=TRUE GND 12 14
8 GND MAKE_BASE=TRUE GND 14
8 SWD_AOP_BI_RACER_SWDIO MAKE_BASE=TRUE SWD_AOP_BI_RACER_SWDIO 9
8 GND MAKE_BASE=TRUE GND 12 14
8 GND MAKE_BASE=TRUE GND 12 14
8 PP1V8_NFC_S2 MAKE_BASE=TRUE PP1V8_NFC_S2 10 CKPLUS_WAIVE=I2C_PULLUP
8 I2C3_AP_SDA MAKE_BASE=TRUE I2C3_AP_SDA 7 9
8 PMU_TO_GNSS_EN MAKE_BASE=TRUE PMU_TO_GNSS_EN 10
8 GND MAKE_BASE=TRUE GND 12 14
8 PMU_TO_BT_REG_ON MAKE_BASE=TRUE PMU_TO_BT_REG_ON 10 CKPLUS_WAIVE=I2C_PULLUP
8 I2C3_AP_SCL MAKE_BASE=TRUE I2C3_AP_SCL 7 9
8 GND MAKE_BASE=TRUE GND 12 14
8 GND MAKE_BASE=TRUE GND 12 14
90_PCIE_AP_TO_WLAN_REFCLK_N
8 MAKE_BASE=TRUE 90_PCIE_AP_TO_WLAN_REFCLK_N 10
8 GND MAKE_BASE=TRUE GND 12 14
90_PCIE_AP_TO_WLAN_REFCLK_P
8 MAKE_BASE=TRUE 90_PCIE_AP_TO_WLAN_REFCLK_P 10
8 GND MAKE_BASE=TRUE GND 12 14
8 GND MAKE_BASE=TRUE GND 12 14
8 GND MAKE_BASE=TRUE GND 12 14
8 90_PCIE_AP_TO_WLAN_TXD_P MAKE_BASE=TRUE 90_PCIE_AP_TO_WLAN_TXD_P 10
8 GND MAKE_BASE=TRUE GND 12 14
8 90_PCIE_AP_TO_WLAN_TXD_N MAKE_BASE=TRUE 90_PCIE_AP_TO_WLAN_TXD_N 10
8 GND MAKE_BASE=TRUE GND 12 14
8 GND MAKE_BASE=TRUE GND 12 14
8 GND MAKE_BASE=TRUE GND 12 14
8 90_PCIE_WLAN_TO_AP_RXD_N MAKE_BASE=TRUE 90_PCIE_WLAN_TO_AP_RXD_N 10
8 GND MAKE_BASE=TRUE GND 12 14
8 90_PCIE_WLAN_TO_AP_RXD_P MAKE_BASE=TRUE 90_PCIE_WLAN_TO_AP_RXD_P 10
8 GND MAKE_BASE=TRUE GND 12 14
8 GND MAKE_BASE=TRUE GND 12 14
8 GND MAKE_BASE=TRUE GND 12 14
8 PP3V0_S2 MAKE_BASE=TRUE PP3V0_S2 10
8 GND MAKE_BASE=TRUE GND 12 14
8 PP1V8_TOUCH_RACER_S2 MAKE_BASE=TRUE PP1V8_TOUCH_RACER_S2 14
8 GND MAKE_BASE=TRUE GND 12 14
8 PP1V8_TOUCH_RACER_S2 MAKE_BASE=TRUE PP1V8_TOUCH_RACER_S2 14
8 GND MAKE_BASE=TRUE GND 12 14
8 PMU_TO_WLAN_REG_ON MAKE_BASE=TRUE PMU_TO_WLAN_REG_ON 10
8 GND MAKE_BASE=TRUE GND 12 14
8 RADIO_PA_NTC MAKE_BASE=TRUE RADIO_PA_NTC 10
8 GND MAKE_BASE=TRUE GND 12 14
8 BT_TO_AP_TIME_SYNC MAKE_BASE=TRUE BT_TO_AP_TIME_SYNC 10
8 GND MAKE_BASE=TRUE GND 12 14
8 UART_BT_TO_AP_RXD MAKE_BASE=TRUE UART_BT_TO_AP_RXD 10

A SYNC_DATE=11/02/2017 A
PAGE TITLE

Interposer: Pins 145-285


DRAWING NUMBER SIZE

051-02695 D
Apple Inc. REVISION

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
82 OF 85
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 12 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

D D

C C

14 10 6 PP1V8_S2

1 C8301
0.1UF
20%
2 6.3V
X5R-CERM
01005

1
VDD
U8301
AK8789
DFN
OUT1 4 HALL_CASE_TO_AOP_SOUTH_L 15
OUT2 3 HALL_CASE_TO_AOP_NORTH_L 11

THRM
VSS PAD

5
B B

A SYNC_DATE=11/02/2017 A
PAGE TITLE

Hall
DRAWING NUMBER SIZE

051-02695 D
Apple Inc. REVISION

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
83 OF 85
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 13 OF 47
8 7 6 5 4 3 2 CDS_LIB=apple
1
8 7 6 5 4 3 2 1

Interposer Top Level Aliases


D D

Power Aliases
11 PP_VDD_MAIN PP_VDD_MAIN 5 6 7 10 15 IKTARA_COIL1 IKTARA_COIL1 5 6
MAKE_BASE=TRUE MAKE_BASE=TRUE
11 PP_VDD_MAIN 15 IKTARA_COIL1
11 PP_VDD_MAIN 15 IKTARA_COIL1
11 PP_VDD_MAIN 15 IKTARA_COIL1
12 PP_VDD_MAIN
12 PP_VDD_MAIN
15 IKTARA_COIL2 IKTARA_COIL2 5 6
12 PP_VDD_MAIN MAKE_BASE=TRUE
15 IKTARA_COIL2
12 PP_VDD_MAIN
15 IKTARA_COIL2
11 PP_VDD_MAIN
15 IKTARA_COIL2
PP_VDD_MAIN
11 PP_VDD_MAIN
12 PP_VBUS2_IKTARA PP_VBUS2_IKTARA 5 6
12 PP_BATT_VCC PP_BATT_VCC 5 MAKE_BASE=TRUE
MAKE_BASE=TRUE 12 PP_VBUS2_IKTARA
12 PP_BATT_VCC
12 PP_VBUS2_IKTARA
12 PP_VBUS2_IKTARA
12 PP1V1_RACER_S2 PP1V1_RACER_S2 7
MAKE_BASE=TRUE
12 PP1V1_RACER_S2
12 PP1V1_RACER_S2

C 11 PP1V8_S2 PP1V8_S2 6 10 13
12 PP1V8_TOUCH_RACER_S2 PP1V8_TOUCH_RACER_S2
MAKE_BASE=TRUE
7 9 C
MAKE_BASE=TRUE 12 PP1V8_TOUCH_RACER_S2
11 PP1V8_S2

Ground Aliases
11

11
GND
GND
MAKE_BASE=TRUE

11 GND
12 GND
15 GND

12 11 GND
MAKE_BASE=TRUE
11 GND

15 12 11 GND

12 GND

12 GND

B B
11 GND
MAKE_BASE=TRUE
11 GND

11 GND

11 GND

11 GND

11 GND

11 GND

11 GND

11 GND

11 GND

11 GND

12 GND

12 GND

12 GND

12 GND

12 GND

12 GND

12 GND

15 GND

15 GND

11 GND

15 GND

15 GND

15 GND

15 GND

A 15 GND
SYNC_DATE=11/01/2017 A
15 GND PAGE TITLE
15 GND
Interposer: Top Aliases
12 GND
DRAWING NUMBER SIZE
15 GND
051-02695 D
12 GND Apple Inc. REVISION

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
84 OF 85
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 14 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

D D
THIS SIDE HAS ATTRIBUTE
THIS SIDE HAS ATTRIBUTE
MAKE_BASE=TRUE MAKE_BASE=TRUE
8 GND MAKE_BASE=TRUE GND 14 15
8 GND MAKE_BASE=TRUE GND 11 12 14 15
ACORN_GECKO_ANSEL_TO_PMU_ADC
8 MAKE_BASE=TRUE ACORN_GECKO_ANSEL_TO_PMU_ADC 7
8 GND MAKE_BASE=TRUE GND 11 12 14 15
8 GND MAKE_BASE=TRUE GND 14 15

8 RACER_TO_AOP_INT_L MAKE_BASE=TRUE RACER_TO_AOP_INT_L 5 9

8 GND MAKE_BASE=TRUE GND 14 15

8HALL_CASE_TO_AOP_SOUTH_L MAKE_BASE=TRUE HALL_CASE_TO_AOP_SOUTH_L 13

8 GND MAKE_BASE=TRUE GND 14 15

8PMU_TO_IKTARA_EN_EXT_1V8 MAKE_BASE=TRUE PMU_TO_IKTARA_EN_EXT_1V8 5 6

8 GND MAKE_BASE=TRUE GND 14 15

8 IKTARA_TO_SMC_INT MAKE_BASE=TRUE IKTARA_TO_SMC_INT 5 6

8 GND MAKE_BASE=TRUE GND 14

8 I2C0_SMC_SCL MAKE_BASE=TRUE I2C0_SMC_SCL CKPLUS_WAIVE=I2C_PULLUP

8 I2C0_SMC_SDA MAKE_BASE=TRUE I2C0_SMC_SDA CKPLUS_WAIVE=I2C_PULLUP

8 GND MAKE_BASE=TRUE GND 14

8 IKTARA_COIL2 MAKE_BASE=TRUE IKTARA_COIL2 14

8 IKTARA_COIL2 MAKE_BASE=TRUE IKTARA_COIL2 14

8 IKTARA_COIL2 MAKE_BASE=TRUE IKTARA_COIL2 14

8 IKTARA_COIL2 MAKE_BASE=TRUE IKTARA_COIL2 14

8 IKTARA_COIL1 MAKE_BASE=TRUE IKTARA_COIL1 14

8 IKTARA_COIL1 MAKE_BASE=TRUE IKTARA_COIL1 14

C 8

8
IKTARA_COIL1
IKTARA_COIL1
MAKE_BASE=TRUE

MAKE_BASE=TRUE
IKTARA_COIL1
IKTARA_COIL1
14

14
C
8 GND MAKE_BASE=TRUE GND 14 15

8 GND MAKE_BASE=TRUE GND


8 GND MAKE_BASE=TRUE GND 14 15

8 GND MAKE_BASE=TRUE GND


8 GND MAKE_BASE=TRUE GND 14 15

8 GND MAKE_BASE=TRUE GND 14

8 GND MAKE_BASE=TRUE GND 14 15

8 GND MAKE_BASE=TRUE GND 14 15

8 GND MAKE_BASE=TRUE GND 14 15

8 GND MAKE_BASE=TRUE GND 14 15

8 GND MAKE_BASE=TRUE GND 14 15

8 GND MAKE_BASE=TRUE GND 14 15

8 GND MAKE_BASE=TRUE GND 14 15

8 GND MAKE_BASE=TRUE GND 14 15

8 GND MAKE_BASE=TRUE GND 14 15

8 GND MAKE_BASE=TRUE GND 14 15

8 GND MAKE_BASE=TRUE GND 14 15

8 GND MAKE_BASE=TRUE GND 14 15

8 GND MAKE_BASE=TRUE GND 14 15

8 GND MAKE_BASE=TRUE GND 14 15

8 GND MAKE_BASE=TRUE GND 14 15

8 GND MAKE_BASE=TRUE GND 14

8 GND MAKE_BASE=TRUE GND 14

8 GND MAKE_BASE=TRUE GND 11 12 14 15

GND GND
B 8

8 GND
MAKE_BASE=TRUE

MAKE_BASE=TRUE GND
11 12 14 15

11 12 14 15
B
8 GND MAKE_BASE=TRUE GND 11 12 14 15

8 GND MAKE_BASE=TRUE GND 11 12 14 15

8 GND MAKE_BASE=TRUE GND 11 12 14 15

8 GND MAKE_BASE=TRUE GND 11 12 14 15

8 GND MAKE_BASE=TRUE GND 11 12 14 15

8 GND MAKE_BASE=TRUE GND 14

8 GND MAKE_BASE=TRUE GND 14

8 GND MAKE_BASE=TRUE GND 14

8 GND MAKE_BASE=TRUE GND 11 12 14 15

8 GND MAKE_BASE=TRUE GND 11 12 14 15

8 GND MAKE_BASE=TRUE GND 11 12 14 15

8 GND MAKE_BASE=TRUE GND 11 12 14 15

8 GND MAKE_BASE=TRUE GND 11 12 14 15

8 GND MAKE_BASE=TRUE GND 11 12 14 15

8 GND MAKE_BASE=TRUE GND 11 12 14 15

8 GND MAKE_BASE=TRUE GND 11 12 14 15

8 GND MAKE_BASE=TRUE GND 11 12 14 15

8 GND MAKE_BASE=TRUE GND 11 12 14 15

8 GND MAKE_BASE=TRUE GND 11 12 14 15

8 GND MAKE_BASE=TRUE GND 14

8 GND MAKE_BASE=TRUE GND 14

8 GND MAKE_BASE=TRUE GND 11 12 14 15

8 GND MAKE_BASE=TRUE GND 11 12 14 15

A SYNC_DATE=11/02/2017 A
PAGE TITLE

Interposer: Pins 286-359


DRAWING NUMBER SIZE

051-02695 D
Apple Inc. REVISION

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
85 OF 85
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 15 OF 47
8 7 6 5 4 3 2 CDS_LIB=apple
1
8 7 6 5 4 3 2 1
CK
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. APPD
REV ECN DESCRIPTION OF REVISION
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. DATE
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
4 0011669799 ENGINEERING RELEASED 2018-03-16

D
D33 HIER_RADIO_ICE - EVT 30 22 10
42 41
SYSTEM POWER
IO
POWER
PP_VDD_MAIN
CELLULAR INTERPOSER
41 21 10
POWER-KEEPING
IO
PMU_TO_BBPMU_RESET_L
AP_TO_BB_RESET_L D
LAST_MODIFICATION=Fri Mar 16 10:21:01 2018 41 19 10
42 IO
PP1V8_S2
41 23 10

41 21 10
IO

IO
AP_TO_BBPMU_RADIO_ON_L
PP3V0_S2 AP_TO_BB_COREDUMP_TRIG
41 19 10 IO 41 23 10 IO

PAGE CSA CONTENTS SYNC DATE 41 23 10 IO


BB_TO_AP_RESET_DETECT_L

16 1 RADIO: TABLE OF CONTENTS


17 2 BOM TABLES PCIEBB_TO_PMU_PCIE_HOST_WAKE_L
41 23 10 IO

18 3 ANTENNA DIAGRAM WLAN INTERPOSER 41 29 23 10 IO


PCIE_AP_TO_BB_PERST_L
41 23 10 PCIE_BB_BI_AP_CLKREQ_L
19 4 ANTENNA: B2BS IO
90_PCIE_BB_TO_AP_RXD_P
20 5 ANTENNA: N-PLEX SHARED CONTROL 23 10

23 10
IO

IO
90_PCIE_BB_TO_AP_RXD_N
42 10 PMU_TO_WLAN_REG_ON
IO
41 23 10
90_PCIE_AP_TO_BB_TXD_P
21 6 BBPMU: CONTROL 42 10 IO
PMU_TO_BT_REG_ON
41 23 10
IO
90_PCIE_AP_TO_BB_TXD_N
IO
42 10 AP_TO_BT_DEVICE_WAKE
22 7 BBPMU: RAILS IO
41 23 10 IO
90_PCIE_AP_TO_BB_REFCLK_P
90_PCIE_AP_TO_BB_REFCLK_N
23 8 BB: INTERFACE CLOCKS 41 23 10 IO

42 10 PMU_TO_WLAN_CLK32K
24 9 BB: DDR PWR & JTAG IO
AP_TO_WLAN_TIME_SYNC
25 10 BB: DIGITAL PWR
42 10

42 10
IO
BT_TO_AP_TIME_SYNC
I2S
IO
41 23 10
I2S_BB_TO_AP_BCLK
IO

26 11 XCVR: TX & GNSS WLAN PCIE 41 23 10 IO


I2S_BB_TO_AP_LRCLK

27
28
12
13
XCVR: INTERFACE & PWR
XCVR: PRX DRX
LOFT ALIASES 42 10

42 10

42 10
IO

IO

IO
90_PCIE_AP_TO_WLAN_REFCLK_P
90_PCIE_AP_TO_WLAN_REFCLK_N
90_PCIE_AP_TO_WLAN_TXD_P
41 23 10

41 23 10
IO

IO
I2S_AP_TO_BB_DOUT
I2S_BB_TO_AP_DIN

90_PCIE_AP_TO_WLAN_TXD_N
29 14 HW CONFIG OPTIONS 22 PP_1V2_VDD_LNA-10[I120] PP_1V2_VDD_LNA PP_1V2_VDD_LNA 16
42 10

42 10
IO

IO
90_PCIE_WLAN_TO_AP_RXD_P
AOP UART
MAKE_BASE=TRUE 41 23 10
UART_BB_TO_AOP_RXD
30 15 ET PP_1V8_VBIAS_LNA PP_1V8_VBIAS_LNA
42 10 IO
90_PCIE_WLAN_TO_AP_RXD_N IO
UART_AOP_TO_BB_TXD
C 31 16 LB SPAD 33
MAKE_BASE=TRUE
16
42 10 IO
PCIE_AP_TO_WLAN_PERST_L
41 23 10 IO
C
PP_VBATT_PA-10[I120] PP_VBATT_PA PP_VBATT_PA 16 42 10 IO
PCIE_WLAN_BI_AP_CLKREQ_L
22 MAKE_BASE=TRUE
32 17 HB SPAD 37
30 PP_ET_PA-10[I120] PP_ET_PA PP_ET_PA 16
42 10 IO
WLAN_TO_PMU_HOST_WAKE JTAG-SWD
33 MAKE_BASE=TRUE 29 10 SWD_AOP_TO_MANY_SWCLK
33 18 UHB LMB SPAD BLWLAN UART 41 24 10
IO
SWD_AOP_BI_BB_SWDIO
IO

34 19 LB DIVERSITY RECEIVE LNA 42 10 IO


UART_AP_TO_BT_TXD
42
PP_1V8_VIO PP_1V8_VIO UART_BT_TO_AP_RXD
35 20 HB DIVERSITY RECEIVE LNA 33 30 27 PP_1V8_VIO-10[I120]
41 36 35 34 MAKE_BASE=TRUE
16 42 10

42 10
IO

IO
UART_AP_TO_BT_RTS_L
DEBUG USB
41 37 33 30 27 SHIELD_RFFE_TX_SCLK-10[I120] SHIELD_RFFE_TX_SCLK SHIELD_RFFE_TX_SCLK 16 41 23 90_USB_BB_P
36 21 MIMO RECEIVE LNAS MAKE_BASE=TRUE 42 10 IO
UART_BT_TO_AP_CTS_L
41 23
IO
90_USB_BB_N
IO
41 37 33 30 27 SHIELD_RFFE_TX_SDATA-10[I120] SHIELD_RFFE_TX_SDATA SHIELD_RFFE_TX_SDATA 16
37 22 COUPLER + LOWER ANTENNA MAKE_BASE=TRUE
AOP 41 23 IO
PP_1V8_BB_USB_VBUS
27 SHIELD_RFFE_RX_SDATA-10[I120] SHIELD_RFFE_RX_SDATA SHIELD_RFFE_RX_SDATA 16
38 23 UPPER ANTENNA FEEDS MAKE_BASE=TRUE 42 10 IO
AOP_TO_WLAN_CONTEXT_A

39 24 SIM: ESIM 27 SHIELD_RFFE_RX_SCLK-10[I120] SHIELD_RFFE_RX_SCLK


MAKE_BASE=TRUE
SHIELD_RFFE_RX_SCLK 16 42 10 IO
AOP_TO_WLAN_CONTEXT_B SYSTEM COEX
41 22 10 IO
TOUCH_TO_MANY_FORCE_PWM
40 25 SIM: PSIM 41 21 10 IO
AOP_TO_BBPMU_COEX
41 23 10
AP_TO_BB_COEX
41 26 TEST POINTS 41 23 10
IO
BB_TO_AP_COEX
IO

42 27 SYMBOL: WIFI
43 1 WIFI: TABLE OF CONTENTS PEAK POWER MANAGEMENT
44
45
2
3
DIETCOKE
FEM MODULES
LOFT 41 24 10

41 23 10
IO

IO
BB_TO_MANY_GSM_BURST_IND
AP_TO_BB_PEAK_POWER_INDICATOR

PMIC:POWER & I/O GNSS


41 26 10 IO
UART_AP_TO_GNSS_TXD
16 IN
PP_1V2_VDD_LNA
41 26 10 IO
UART_GNSS_TO_AP_RXD
16 PP_1V8_VBIAS_LNA
B
IN
B 16 IN
PP_VBATT_PA
41 27 10

41 26 10
IO

IO
UART_AP_TO_GNSS_RTS_L
UART_GNSS_TO_AP_CTS_L
16 IN
PP_ET_PA
41 26 21 10 IO
PMU_TO_GNSS_EN
41 26 10 IO
AP_TO_GNSS_TIME_MARK
BB:RFFE 41 26 10 IO
GNSS_TO_AP_LOW_PWR_IND
16 IN
PP_1V8_VIO

16 IN
SHIELD_RFFE_TX_SCLK
16 IN
SHIELD_RFFE_TX_SDATA

16 IN
SHIELD_RFFE_RX_SDATA
16 IN
SHIELD_RFFE_RX_SCLK

26 10 IN
LB50_TX_LB_PA_IN
PAD
XCVR 10
28 IN
50_PRX_LB_PAD_LB2_SDR_IN_XCVR

37 10 IN
50_LBPAD_2G_OUT_CPL2_IN_JPN
CPLR 10
37 IN
50_PAD_ANT_LB_CPL2_IN

HB PAD
26 10 IN
50_TX_HB_PA_IN
26 10 IN
50_TX_MB1_IN
26 10 IN
50_TX_2G_HB_IN
50_PRX_MB1_PAD_MB_A_SDR_IN_XCVR
XCVR 10
28
28 10
IN

IN
50_PRX_MB2_PAD_MB_B_SDR_IN_XCVR
28 10 IN
50_PRX_HB1_PAD_HB_SDR_IN_XCVR
TABLE_HIERARCHY_CONFIG_HEAD 28 10 IN
50_PRX_HB2_PAD_LHB_SDR_IN_XCVR
HARD/

A SOURCE PROJECT SUB-DESIGN NAME VERSION SOFT


SYNC_DATE/TIME
TABLE_HIERARCHY_CONFIG_ITEM
RADIO: TABLE OF CONTENTS A
37 10 IN
50_HBPAD_2G_OUT_CPL2_IN_JPN
D32 HIER_WIFI 0.52.0 S 2018_03_07_13:05:02
CPLR 10
37 IN
50_PAD_ANT_HB_CPL2_IN DRAWING TITLE

37 10 IN
50_TDD_PAD_ANT_HB_CPL2_IN SCH,MLB,BOT,ICE,D33
DRAWING NUMBER SIZE

CNRY
41
10 IN
LOFT_CANARY_1 051-02695 D
23
Apple Inc.
SCH:951-04720 41 23 10 IN
LOFT_CANARY_2

NOTICE OF PROPRIETARY PROPERTY:


THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
REVISION

BRANCH
4.0.0

PCB:920-03588 THE POSESSOR AGREES TO THE FOLLOWING:


I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE

SHEET
1 OF 27
16 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

BOM TABLES RULER_RULE_SET=MSAP_2017

1
MULTIPLES

1.65,2,2D,3.2D,4D
MANUFACTURING CONFIGURATION
DIELECTRIC BASED SPACING RULES
SMDPIN MAX(UM) MVIA MAX(UM)

120
SMDPIN2SMDPIN MAX(UM)

120 100
DEFAULT SPACING
MULTIPLES

2
TABLE_REV_NUMBER=6
VOID SPACE
RATIO

LAYERS MINIMUM CU WIDTH RATIO MINIMUM CU SPACING RATIO MINIMUM TO DEFAULT RATIO

RF SKU TOP,BOTTOM,ISL4,ISL5

ISL2,ISL3,ISL6,ISL7
1.0

1.0
1.0

1.0
1.0

1.0

ROW SKU
D PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION
TABLE_5_HEAD

D
TABLE_5_ITEM

118S0724 1 RES,MF,0.0 OHM,1/20W,0201,HIGH FREQ R2003_K ROW


TABLE_5_ITEM

118S0724 1 RES,MF,0.0 OHM,1/20W,0201,HIGH,FREQ R2015_K ROW POWER RULE DEFINITIONS


TABLE_5_ITEM

118S00072 1 RES,MF,8.2K OHM,1/32W,01005 R312_K ROW LOAD CURRENT(MA) CURRENT DENSITY(A/SQMM) MIN NECK WIDTH(MM) MAX NECK LENGTH(MM)
TABLE_5_ITEM

197S00155 1 XTL,THERM,38.4MHZ,12PPM,6PF,1612 Y301_K ROW 50 50 0.08 10


TABLE_5_ITEM

353S01647 1 2GPA, SKYWORKS, 78208, REV13 PA_UHB_K ROW 100 50 0.08 10


TABLE_5_ITEM

353S01301 1 SKYWORKS, LB DSM, 13765, REV16 DSM_LB_K ROW 200 50 0.08 10

300 50 0.08 10

JP SKU TABLE_5_HEAD
500

1000
50

50
0.08

0.08
10

10
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION
TABLE_5_ITEM

3000 50 0.08 10
118S0724 1 RES,MF,0.0 OHM,1/20W,0201,HIGH FREQ R2002_K JP
TABLE_5_ITEM

118S0724 1 RES,MF,0.0 OHM,1/20W,0201,HIGH,FREQ R1403_K JP


TABLE_5_ITEM

118S00120 1 RES,MF,6.8K OHM,1/32W,01005 R312_K JP TABLE_IMPEDANCE_HYBRID=50_HYBRID


TABLE_5_ITEM

197S00179 1 XTL,THERM,38.4MHZ,12PPM,6PF,1612 Y301_K JP LAYERS IMPEDANCE RULE


TABLE_5_ITEM

353S01662 1 SKYWORKS, UHB PA, REV13 PA_UHB_K JP TOP 50_OHM_SE


TABLE_5_ITEM

353S01301 1 SKYWORKS, LB DSM, 13765, REV16 DSM_LB_K JP ISL3 50_OHM_SE

ISL6 50_OHM_SE_6R4R8

C NA SKU
ISL7 50_OHM_SE
C
TABLE_5_HEAD
ISL5 50_OHM_SE
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION
TABLE_5_ITEM

118S0724 1 RES,MF,0.0 OHM,1/20W,0201,HIGH FREQ R2003_K NA


TABLE_5_ITEM
TABLE_IMPEDANCE_HYBRID=50_HYBRID_WIDE
118S0724 1 RES,MF,0.0 OHM,1/20W,0201,HIGH,FREQ R2015_K NA
TABLE_5_ITEM
LAYERS IMPEDANCE RULE
118S00073 1 RES,MF,56K OHM,1/32W,01005 R312_K NA
TABLE_5_ITEM
TOP 50_OHM_SE_1R3
197S00156 1 XTL,THERM,38.4MHZ,12PPM,6PF,1612 Y301_K NA
TABLE_5_ITEM
ISL3 50_OHM_SE
353S01647 1 2GPA, SKYWORKS, 78208, REV13 PA_UHB_K NA
ISL6 50_OHM_SE_6R4R8
353S01472 1 SKYWORKS, LB DSM, 13785, REV13 DSM_LB_K NA
TABLE_5_ITEM

FERRITE ALTERNATES ISL7 50_OHM_SE


TABLE_ALT_HEAD

ISL5 50_OHM_SE
PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:
PART NUMBER
TABLE_ALT_ITEM

155S00131 155S00341 BOM_TABLE_ALTS FL900_K FERR BD, 240OHM


TABLE_ALT_ITEM

155S00414 155S0876 BOM_TABLE_ALTS ALL FERR BD, 10OHM


TABLE_ALT_ITEM

155S00200 155S00400 BOM_TABLE_ALTS ALL FERR BD, 150OHM


TABLE_ALT_ITEM

SIM SKU 155S00194 155S00400 BOM_TABLE_ALTS ALL FERR BD, 150OHM

SINGLE 4FF SKU TABLE_5_HEAD


ETIC CAP ALTERNATES
B PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION
TABLE_5_ITEM

PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:


TABLE_ALT_HEAD
B
512S00038 1 SIM,TALL,PTH,4X3,D33 J_SIM SINGLE PART NUMBER
TABLE_5_ITEM TABLE_ALT_ITEM

117S0158 1 RES,MF,100K OHM,1/32W,01005 R11_SIM SINGLE 138S00237 138S00167 BOM_TABLE_ALTS C1204_K CAP,2.2UF
TABLE_ALT_ITEM

138S00237 138S00167 BOM_TABLE_ALTS C1205_K CAP,2.2UF


TABLE_ALT_ITEM

138S00237 138S00167 BOM_TABLE_ALTS C1206_K CAP,2.2UF

DUAL 4FF SKU


PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION
TABLE_5_HEAD

CAP ALTERNATES TABLE_ALT_HEAD

PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:


TABLE_5_ITEM

512S00039 1 SIM,DUAL,BUNK,PTH,4X3,D33 J_SIM DUAL PART NUMBER


TABLE_5_ITEM TABLE_ALT_ITEM

117S0161 1 RES,MF,0.0 OHM,1/32W,01005 R31_SIM DUAL 138S00086 138S0884 BOM_TABLE_ALTS ALL CAP,20UF
TABLE_5_ITEM TABLE_ALT_ITEM

117S0166 1 RES,MF,100 OHM,1/32W,01005 R27_SIM DUAL 138S0719 138S1103 BOM_TABLE_ALTS ALL CAP,4.7UF
TABLE_5_ITEM TABLE_ALT_ITEM

117S0185 1 RES,MF,47 OHM,1/32W,01005 R26_SIM DUAL 138S00128 138S00133 BOM_TABLE_ALTS ALL CAP,0.47UF
TABLE_5_ITEM

117S0166 1 RES,MF,100 OHM,1/32W,01005 R29_SIM DUAL

SINGLE 4FF + VINYL SKU VARISTOR ALTERNATES TABLE_ALT_HEAD

PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:


PART NUMBER
TABLE_5_HEAD

PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION


TABLE_ALT_ITEM

TABLE_5_ITEM

377S00130 377S0106 BOM_TABLE_ALTS ALL VARISTOR,12V,33PF


512S00038 1 SIM,TALL,PTH,4X3,D33 J_SIM VINYL
A TABLE_5_ITEM
A
998-12938 1 VINYL,NI0,BIRCH 4.0 U_SIM VINYL PAGE TITLE
TABLE_5_ITEM

BOM TABLES
117S0158

118S0636
1

1
RES,MF,100K OHM,1/32W,01005

RES,MF,4.7K OHM,1/32W,01005
R10_SIM

R12_SIM
VINYL

VINYL
TABLE_5_ITEM

EEPROM ALTERNATES TABLE_ALT_HEAD


DRAWING NUMBER

051-02695
SIZE

D
PART NUMBER ALTERNATE FOR
PART NUMBER
BOM OPTION REF DES COMMENTS: Apple Inc. REVISION

335S00013 335S0894 BOM_TABLE_ALTS EEPROM_K EEPROM,8KBIT,I2C


TABLE_ALT_ITEM

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
2 OF 27
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 17 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

D D

RADIO ANTENNAS

C
ANT2
CELL: LB
LMB
MBHB
ANT4
WIFI:
CELL:
2.4GHZ
UHB
MBHB
ANT6
WIFI:
CELL:
5GHZ
UHB
UAT C
(GNSS)

B B

CELL ONLY:
ANT1
LB
MLB
MBHB
ANT3
WIFI:
CELL:
2.4GHZ
UHB
MBHB
ANT5
WIFI ONLY: 5GHZ
LAT
UHB

A A
PAGE TITLE

ANTENNA DIAGRAM
DRAWING NUMBER SIZE

051-02695 D
Apple Inc. REVISION

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
3 OF 27
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 18 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

ANTENNA B2BS UAT UAT B2BS


RCPT ON MLB_BOT (518S00167)
PLUG ON FLEX (518S00166)
FL300_A
FERR-150OHM-25%-200MA
GPO FILTERS
FL301_A
FERR-150OHM-25%-200MA
UAT_GPO1 1 2 UAT_GPO1_B2B LAT_GPO1 1 2 LAT_GPO1_B2B
J_UAT1 19 19 19 19
01005 01005
MM3531-2700A14
F-ST-SM 1 C300_A 1 C301_A
19
BB_TO_UAT_RFFE_CLK_R 1 8 56PF 56PF
5% 5%
2 9 2 25V 2 25V
D
23 BB_TO_UAT_RFFE_CLK_R
MAKE_BASE=TRUE
BB_TO_UAT_RFFE_CLK_R 19 19

19
BB_TO_UAT_RFFE_DATA_R
PP1V8_APPMU_S2_TO_UAT 3 10 50_LB_GNSS_LMB_MBHB_ANT2 19 38
NP0-C0G-CERM
01005
NP0-C0G-CERM
01005 D
23 BB_TO_UAT_RFFE_DATA_R BB_TO_UAT_RFFE_DATA_R 19
MAKE_BASE=TRUE 19 UAT_GPO2_B2B 4 11
5 12 FL302_A FL303_A
19 UAT_GPO1_B2B PP3V0_APPMU_S2_TO_UAT 19 FERR-150OHM-25%-200MA FERR-150OHM-25%-200MA
UAT_GPO4_B2B 6 13
FL304_A
19
UAT_GPO2 1 2 UAT_GPO2_B2B LAT_GPO2 1 2 LAT_GPO2_B2B
19 19 19 19
UAT_GPO3_B2B 7 14 50_UHB_5GHZ_ANT6
10-OHM-1.1A 19 19 20
01005 01005
1 C302_A
PP1V8_S2 1 2 PP_TUNER_1V8_UAT 15 21 1 C303_A
42 41 19 16 10
56PF
01005 16 22 56PF 5%
UAT_GPO 17 23
5% 2 25V
2 25V
NP0-C0G-CERM
NP0-C0G-CERM
01005
C304_A 1 C305_A 1 18 24 01005
0.47UF 33PF 19 25
20% 5%
UAT_GPO 16V
6.3V 2 20 26 FL400_A FL306_A
X5R NP0-C0G 2
01005-1 01005-1 FERR-150OHM-25%-200MA FERR-150OHM-25%-200MA
UAT_GPO USID=0X8 19 UAT_GPO3 1 2 UAT_GPO3_B2B 19 19 LAT_GPO3 1 2 LAT_GPO3_B2B 19
01005 01005
UATGPO_A RCPT ON MLB_BOT (516S00434) 1 1
QM18099 C400_A C307_A
WLCSP PLUG ON FLEX (516S00435) 56PF
5%
56PF
5%
A3 VIO LAT_GPO GPO1 A4 UAT_GPO1 2 25V 2 25V
B1
19
J_UAT2 NP0-C0G-CERM
01005
NP0-C0G-CERM
01005
BB_TO_UAT_RFFE_CLK A1 GPO2 UAT_GPO2 19 MLF06
41 23 SCLK B4 F-ST-SM
GPO3 UAT_GPO3 19
A2 C1 16 FL401_A FL308_A
SDATA GPO4 UAT_GPO4 19 FERR-150OHM-25%-200MA FERR-150OHM-25%-200MA
C308_A 1 GPO5 C2 UAT_GPO5 12 8
B2 USID1
19
UAT_GPO4 1 2 UAT_GPO4_B2B LAT_GPO4 1 2 LAT_GPO4_B2B
33PF GPO6 C4 UAT_GPO6 19
13 9 19 19 19 19
5% 01005 01005
16V 2 GPO7 C3
NP0-C0G NC 1 C401_A 1 C309_A
01005-1 50_2G4_UHB_MBHB_ANT4 4 1 UAT_GPO5_B2B
GND 20 19 19
56PF 56PF
UAT_GPO 5 2 5% 5%
PP3V0_APPMU_S2_TO_UAT 19
2 25V 2 25V

B3
6 3 UAT_GPO6_B2B NP0-C0G-CERM NP0-C0G-CERM
C BB_TO_UAT_RFFE_DATA
7
19 01005 01005
C
41 23
14 10 FL309_A FL310_A
C311_A 1
15 11 FERR-150OHM-25%-200MA FERR-150OHM-25%-200MA
33PF UAT_GPO5
5% 17 19
1 2 UAT_GPO5_B2B 19 19
LAT_GPO5 1 2 LAT_GPO5_B2B 19
16V 2
NP0-C0G 01005 01005
01005-1
UAT_GPO 1 C312_A 1 C313_A
56PF 56PF
5% 5%
2 25V
NP0-C0G-CERM 2 25V
NP0-C0G-CERM
FL311_A 01005 01005
FERR-150OHM-25%-200MA FL312_A
FERR-150OHM-25%-200MA
41 19 16 10 PP3V0_S2 1 2 PP3V0_APPMU_S2_TO_UAT 19 FL313_A FL314_A
PP1V8_S2 1 2 PP1V8_APPMU_S2_TO_UAT
01005 42 41 19 16 10 19 FERR-150OHM-25%-200MA FERR-150OHM-25%-200MA
1 C314_A 01005
1 UAT_GPO6 1 2 UAT_GPO6_B2B 1 2 LAT_GPO6_B2B
220PF C315_A 19 19 19 LAT_GPO6 19
5% 220PF 01005 01005
2 16V
C0G
5%
01005 2 16V
C0G 1 1
01005 C316_A C317_A
56PF 56PF
5% 5%
2 25V
NP0-C0G-CERM 2 25V
NP0-C0G-CERM
01005 01005

BB_TO_LAT_RFFE_CLK_R BB_TO_LAT_RFFE_CLK_R
23
MAKE_BASE=TRUE
19

LAT B2B
B 41 19 16 10
42
23 BB_TO_LAT_RFFE_DATA_R
MAKE_BASE=TRUE

PP1V8_S2 1
FL315_A
10-OHM-1.1A

01005
LAT_GPO
2
BB_TO_LAT_RFFE_DATA_R

PP_TUNER_1V8_LAT
19

LAT RCPT ON MLB_BOT (518S00149)


PLUG ON FLEX (518S00150)
JLAT_A
MM3531-2700A20
F-ST-SM
RFFE FILTERS
B

C318_A 1 C319_A 1 1 11
0.47UF 33PF 19 LAT_GPO6_B2B 2 12
20% 5% BB_TO_UAT_RFFE_CLK_R BB_TO_LAT_RFFE_CLK_R
6.3V 2 16V 2 LAT_GPO1_B2B 3 13
X5R
01005-1
NP0-C0G
01005-1 USID=0X8 19

19 LAT_GPO2_B2B 4 14
LAT_GPO4_B2B
LAT_GPO5_B2B
19

19
1
19

1
19

LAT_GPO LAT_GPO 5 15 C320_A C321_A


19 LAT_GPO3_B2B 33PF 33PF
LATGPO_A 6 16 50_LB_MLB_MB_HB_UHB_ANT1 19 37
5% 5%
QM18099 7 17 2 16V
NP0-C0G 2 16V
NP0-C0G
19 PP1V8_APPMU_S2_TO_LAT 01005-1 01005-1
WLCSP 8 18
A3 19 BB_TO_LAT_RFFE_DATA_R 50_WLAN_5GHZ_ANT5 19 20 NOSTUFF NOSTUFF
VIO LAT_GPO GPO1 A4 LAT_GPO1 19
BB_TO_LAT_RFFE_CLK_R 9 19
GPO2 B1 LAT_GPO2
19
BB_TO_LAT_RFFE_CLK A1 SCLK
19
PP3V0_APPMU_S2_TO_LAT 10 20 50_2G4_UHB_MBHB_ANT3
41 23
GPO3 B4 LAT_GPO3 19
19 19 20

A2 C1 BB_TO_LAT_RFFE_DATA_R
SDATA GPO4 LAT_GPO4 19 SHLD BB_TO_UAT_RFFE_DATA_R 19 19
C324_A 1
GPO5 C2 LAT_GPO5 21 27
33PF B2 USID1
19
1 C322_A 1 C323_A
5% GPO6 C4 LAT_GPO6 22 28
16V 19
33PF 33PF
NP0-C0G 2 GPO7 C3 23 29 5% 5%
01005-1 NC 2 16V 2 16V
LAT_GPO 24 30 NP0-C0G NP0-C0G
GND 01005-1 01005-1
25 31 NOSTUFF NOSTUFF
B3

26 32

41 23 BB_TO_LAT_RFFE_DATA

C325_A 1
33PF
A 5%
A
16V
NP0-C0G 2
01005-1 ANTENNA CONNECTIONS PAGE TITLE
LAT_GPO
50_LB_MLB_MB_HB_UHB_ANT1 50_LB_MLB_MB_HB_UHB_ANT1 19 37
ANTENNA: B2BS
FL317_A FL316_A MAKE_BASE=TRUE DRAWING NUMBER SIZE
FERR-150OHM-25%-200MA FERR-150OHM-25%-200MA 50_LB_GNSS_LMB_MBHB_ANT2 50_LB_GNSS_LMB_MBHB_ANT2 19 38 051-02695 D
41 19 16 10 PP3V0_S2 1 2 PP3V0_APPMU_S2_TO_LAT 19 42 41 19 16 10 PP1V8_S2 1 2 PP1V8_APPMU_S2_TO_LAT 19
MAKE_BASE=TRUE Apple Inc. REVISION
VOLTAGE=3.0 50_2G4_UHB_MBHB_ANT3 50_2G4_UHB_MBHB_ANT3 19 20
01005
1 C327_A
01005
1 C326_A
MAKE_BASE=TRUE 4.0.0
50_2G4_UHB_MBHB_ANT4 50_2G4_UHB_MBHB_ANT4 NOTICE OF PROPRIETARY PROPERTY: BRANCH
220PF 220PF MAKE_BASE=TRUE
19 20
5% 5% THE INFORMATION CONTAINED HEREIN IS THE
2 16V
C0G 2 16V
C0G
50_WLAN_5GHZ_ANT5 50_WLAN_5GHZ_ANT5 19 20 PROPRIETARY PROPERTY OF APPLE INC.
01005 01005 MAKE_BASE=TRUE THE POSESSOR AGREES TO THE FOLLOWING: PAGE
50_UHB_5GHZ_ANT6
MAKE_BASE=TRUE
50_UHB_5GHZ_ANT6 19 20
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
4 OF 27
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 19 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

SHARED N-PLEXERS
D UAT 36 50_DSM_MIMO2_UHB_MATCH
R417_A
5.0PF
1 2 50_DSM_HB_IN_TRX_UHB_DIPLXR_MATCH
D

ANT4 TO CELL: MIMO2 RDM


EVT CHANGE
+/-0.05PF
25V
C0G-CERM
0201
ANT6
1

L402_A
ANT6
R400_W 10NH-+/-3%-0.25A
01005
50_WLAN_G_TRX0_VOID_UAT
42
1 2 50_WLAN_G_TRX0_VOID_UAT_PLEXER ANT6
TO WLAN: 2.4G UAT 1.4NH-+/-0.1NH-0.70A 2
01005 1 C400_W
ANT4 0.3PF
+/-0.05PF
2 16V TPLX2U_A NOTE: LAA UAT = XCVR DIVERSITY RX DPLX3U_A
C0G-CERM DPX205850DT
01005 ACFM-W223-AP1 R401_A
NOSTUFF LGA L400_A TO ANTENNA: 4 R402_W 6 LB LGA 0.00 2
ANT4 0.00 2 50_WLAN_LAA_FEM_TRX_VOID_UAT 0.00 2 50_WLAN_LAA_FEM_TRX_VOID_UAT_DPLX COMMON 2 50_UHB_5G_ANT_MATCH 1 50_UHB_5GHZ_ANT6 19
7 WI-FI ANT4 ANT 1 50_2G4_UHB_MBHB_MATCH 1 50_2G4_UHB_MBHB_ANT4
19 42 1 4 HB
1% TO ANTENNA: 6
1% TO WLAN: LAA FEM UAT 0% 1/20W
50_HB_DSM_HB_IN4_TRIPL2 5 MB/HB 1/20W 1/32W MF
35
1 MF ANT4 1 1 MF 1 GND 1 0201 1
TO CELL: HB DSM R420_A 0201 R421_A R403_W 01005 R404_W R405_A ANT6 R406_A
3 UHB 0.00 0.00 0.00 ANT6 0.00 0.00 0.00

1
3
5
GND 0% 0% 0% 0% 1% 0%
1/32W 1/32W 1/32W 1/32W 1/20W 1/32W
MF MF MF MF MF MF
01005 2 2 01005 01005 2 2 01005 0201 2 2 01005

2
4
6
8
9
NOSTUFF
ANT4 ANT4 ANT6 ANT6 ANT6
35 50_DSM_MM2_UHB_TRIPL2 ANT6
NOSTUFF NOSTUFF NOSTUFF
NOSTUFF NOSTUFF
FROM CELL: HB DSM
EVT CHANGE

C UHB-5G WLAN DIPLEXER3 C


MHB-UHB/2.4G WLAN TRIPLEXER2

ANT3
B 50_WLAN_G_TRX1_VOID_LAT
42

TO WLAN: LAA LAT


1
R407_W
2

0.5NH-+/-0.1NH-1.0A-0.04OHM
50_WLAN_G_TRX1_VOID_LAT_PLEXER
LAT ANT5 B
01005
ANT3 1 C401_W
1PF
+/-0.1PF
2 16V
NP0-C0G
01005
BPF5G_A
TPLX2L_A 5GHZ
ANT3 ACFM-W223-AP1 R408_W LFB185G50CTBE599 R409_A
NOSTUFF R410_A NOTE: LAA LAT = XCVR PRIMARY RX
LGA 50_WLAN_LAA_FEM_TRX_VOID_LAT
1
0.00 2 50_WLAN_LAA_FEM_TRX_VOID_LAT_BPF 3 1 50_WLAN_5GHZ_ANT_MATCH 1
0.00 2 50_WLAN_5GHZ_ANT5 19
7 WI-FI 0.00 2 42
C402_A ANT3 ANT 1 50_2G4_UHB_MBHB_ANT_MATCH 1 50_2G4_UHB_MBHB_ANT3 19 ANT5
TO WLAN: LAA FEM LAT 1% 1% TO ANTENNA: 5
0.00 2 MHB 1% TO ANTENNA: 3 1 1/20W 1 1 1/20W 1
R411_W R412_W R413_A R414_A

2
37 50_CPL2_HB_ANT3 1 50_CPL2_HB_ANT3_MATCH 5 MB/HB 1/20W MF MF
MF 1 0.00 0201 0.00 0.00 0201 0.00
1% 1 0201 R416_A 0% ANT5 0% 0% ANT5 0%
TO CELL: COUPLER2 (TRX_HB_ANT2) 1/20W 3 UHB R415_A ANT3 0.00 1/32W 1/32W 1/32W 1/32W
MF 1 0.00 1% MF MF MF MF
0201 GND
0% 1/20W 01005 2 2 01005 01005 2 2 01005
ANT5 1/32W MF NOSTUFF NOSTUFF
MF 2 0201 NOSTUFF ANT5 NOSTUFF ANT5
2
4
6
8
9

01005 2 ANT3 ANT5


ANT3 NOSTUFF ANT5
L401_A NOSTUFF
4.7NH-3%-0.35A-0.35OHM
01005
ANT3
NOSTUFF 2
5GHZ WLAN BPF
33 50_UHB_TRPL2
MHB-UHB/2.4G WLAN TRIPLEXER2
TO CELL: UHB 1

A A
PAGE TITLE
L403_A
4.7NH-3%-0.35A-0.35OHM ANTENNA: N-PLEX SHARED
01005 DRAWING NUMBER SIZE
ANT3
NOSTUFF 2 051-02695 D
Apple Inc. REVISION

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
5 OF 27
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 20 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

BBPMU: CONTROL 39 29 27 25 23 22 21 PP_1V85_SMPS6_IO


1

5%
R303_K
2.2K
1/32W
MF
2 01005
1

5%
R304_K
2.2K
1/32W
MF
2 01005
POR: 32K CLK GENERATED INTERNALLY
BBPMU (14/14)
U_PMIC_K
PMB6829-C1
BBPMU BBPMU OPTIONAL PINS FOR EXTERNAL OSC UFWLB
BBPMU (8/14) 41 23 21 BB_TO_BBPMU_RP_SCL
A3
SYM 14 OF 14
BBPMU
41 23 21 BB_TO_BBPMU_RP_SDA XTALIN
NC

D
U_PMIC_K
PMB6829-C1 B3 XTALOUT
D
UFWLB NC
SYM 8 OF 14
BBPMU
41 26 23 21 CLK_BBPMU_32KHZ D9 CLK_32K VPMICREF G1 VPMICREF BBPMU (12/14)
VPMIC E6 VPMIC
R300_K 41 23 BBPMU_TO_BB_RESET_L B5 XG_RESET* VOTP F6 VOTP U_PMIC_K XO TEMP MEASUREMENT
560 2 D8 1 1 PMB6829-C1
41 16 10 AP_TO_BBPMU_RADIO_ON_L 1 41 23 BB_TO_BBPMU_SDWN_L SDWN* C301_K C302_K 1 NTC THERMISTOR CONNECTED TO
1% BBPMU_TO_BB_PWRGOOD D6 1UF 2.2UF C303_K UFWLB MEASURING INTERFACE 2
41 23 XG_PWRGOOD 20% 20% 0.22UF SYM 12 OF 14
1/32W
MF 41 23 BB_TO_BBPMU_STBY C5 STDBY I2CSCL G8 BB_TO_BBPMU_RP_SCL 21 23 41 2 10V 2 6.3V 10% BBPMU
01005 X5R X5R-CERM 2 6.3V MI2 J8 NTC_SENSE 21
16 10 PMU_TO_BBPMU_RESET_L F8 PMIC_ON I2CSDA F7 BB_TO_BBPMU_RP_SDA 21 23 41
0201 0201 CER-X5R
BBPMU 41 BBPMU BBPMU 01005 MI3 H7 SKU_ID
BBPMU
MI4 J7 HW_REV_ID
XG_RESET_SD* D7 BBPMU_TO_BB_RESET_SD_L 23 41
G7
MEAS_RDY BBPMU_TO_BB_MEAS_RDY 23 41
41 23 BBPMU_TO_BB_ALERT_L C6 ALERT*
41 23 BB_TO_BBPMU_VCLK B6 VCLK GPIO2 D5 PMU_1PIN_BOOT_STRAP 21 41 CLEAN GND @ VPMICREF
41 23 BB_TO_BBPMU_VDIO B2 VDIO GPIO4 H8 TP_TO_BBPMU_SMARTI2_CLK_EN 41

GPIO5 J2 AOP_TO_BBPMU_COEX 10 16 41

41 26 16 10 PMU_TO_GNSS_EN B4 GNSS_EN
41 26 GNSS_TO_BBPMU_LNA_EN C3 EXT_LNA_EN GNSS_UART A4 UART_BBPMU_TO_GNSS_1W 26 41
REVISION ID--> R311_K
1 1
R312_K <-- SKU ID
6.8K 6.8K
1% 1%
1/32W 1/32W
MF MF
1 01005 2 2 01005
R315_K BBPMU BBPMU
OMIT_TABLE
10K
1%
1/32W
MF
2 01005
BBPMU

C CAN BE REMOVED BBPMU (11/14) REVISION SKU/CATEGORY C


WITH XPMU C0 REVISION
U_PMIC_K R311_K MLB RF DEV R312_K HW REVISION X-CODE
39 29 27 25 23 22 21 PP_1V85_SMPS6_IO PMB6829-C1
UFWLB 0.0 T/POC/PRE-PROTO0 1.0 0.0 RFDEV JP
SYM 11 OF 14
1
R320_K BBPMU 1.2K P0 1.1 1.2K ICE 18.0 JP X1344
10K 41 23 BB_TO_BBPMU_CLK_EN F5 CELL_CLK_EN CELL_CLK J4 CLK_BBPMU_TO_BB_38MHZ 23 41
1%
1/32W
2.2K P1 2.0 2.2K ICE 18.0 ROW (ICE 18.0)
MF H6
2 01005 FSYS_32K CLK_BBPMU_32KHZ 21 23 26 41 3.3K P2 2.1 3.3K ICE 18.1 JP X1049
BBPMU 41 TP_TO_BBPMU_EXT_CLK_EN K3 FSYS_EXT_EN
41 21 PMU_1PIN_BOOT_STRAP NOSTUFF
FSYS_EXT K5 CLK_BBPMU_TO_TP_EXT_38MHZ 41
4.7K 3.0 4.7K ICE 18.1 ROW (ICE 18.1)
41 26 GNSS_TO_BBPMU_CLK_EN C4 FSYS_GNSS_EN 6.8K EVT 6.8K ICE 18.2 JP
FSYS_SMARTI2 J5 CLK_BBPMU_TO_TP_SMARTI2_38MHZ 41
X1210
1 1 8.2K EVT 1.5 4.0 8.2K ICE 18.2 ROW (ICE 18.2)
R314_K R322_K
10K 10K FSYS_SMARTI K4 CLK_BBPMU_TO_XCVR_38MHZ 27 41 10K CARRIER 10K RFDEV ROW
1% 1%
1/32W 1/32W
MF
01005 2
MF
01005 2 VSS_FSYS J3 12K DVT 5.0 12K ICE 18.5 JP X1170
BBPMU BBPMU
CLEAN GND @ VSS_FSYS
15K PVT 5.1 15K ICE 18.6 JP X1176
18K 18K
22K 22K ICE 18.5 US X1170
27K 6.0 27K ICE 18.6 US X1176
33K 6.0 33K ICE 18.0 NA X1344
39K 39K RFDEV NA
B 47K 47K ICE 18.1 NA X1049
B
(RESISTANCE DECREASES AS TEMPERATURE INCREASES)
56K DARWIN 56K ICE 18.2 NA X1210
BBPMU (7/14) NTC TS-XO
NEGATIVE TEMPERATURE COEFFICIENT
68K
82K
JP_SKWS 68K
82K KAROO INTERNAL
THERMAL SENSING CRYSTAL OSCILLATOR
U_PMIC_K 100K P1 DOE2, TXC 100K KAROO INTERNAL
PMB6829-C1
UFWLB 120K P1 DOE1, S7 B1 120K KAROO INTERNAL
SYM 7 OF 14

F9
BBPMU
E5
150K 150K
41
BBPMU_TESTENTRY_PD
BBPMU_ANAMON G6
TESTENTRY
ANAMON
VSS_PMU
VSS_PMU E7
BBPMU (9/14)
VSS_PMU H9
1 XO APN: 197S00155 U_PMIC_K HWID TABLE RDAR://32880011
R403_K CLEAN GND PMB6829-C1
10K VSSA C2 UFWLB ADC TABLE RDAR://27081897
1% @VSSA STAR ROUTING SYM 9 OF 14
1/32W
MF
2 01005
BBPMU
VSS_ISO12
VSS_ISO36
C9
J9
Y301_K
XO

38.4MHZ-12PPM-6PF
1.6X1.2-SM-1
K2 VSS_XOX
BBPMU
BBPMU ADC TABLES
XO GND 3 1 XO HOT
VSS_XO XO_38M4 K1 XO
HOT3 HOT1
SEE NOTE2 J1 VSS_XO
NTC_GND 2 4 NTC_SENSE 21
GND SENS
NTC GND NTC SENSE SEE NOTE1
2
2 NTC THERMISTOR
OMIT_TABLE XW302_K
XW408_K SHORT-20L-0.05MM-SM
SHORT-20L-0.05MM-SM BBPMU
A NTC_GND CONNECT TO
1
BBPMU 1
VSS_XO CONNECT TO A
CLEAN GND @ VSS_PMU PAGE TITLE
CLEAN GND @ VSS_PMU
BBPMU: CONTROL
DRAWING NUMBER SIZE

NOTE1: ROUTE NTC_GND AND NTC_SENSE AS SHIELDED DIFF PAIR 051-02695 D


NOTE2: VSS_XO AND NTC_GND SHOULD CONNECT TOGETHER WITH LOW IMPEDANCE ON CLEAN GND Apple Inc. REVISION

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
6 OF 27
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 21 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

BBPMU: RAILS SWITCHERS


BBPMU (1/14) APN:152S00539 XW410_K
U_PMIC_K
Z=0.8MM SHORT-20L-0.05MM-SM
1 2
VDD_SMPS1_0V9_COEX
41
PMB6829-C1
UFWLB L401_K
0.47UH-20%-3.8A-0.037OHM
D PP_VDD_MAIN A7
SYM

VDD_VMOD1
1 OF 14
BBPMU
VMOD1LX B7 VMOD1LX 1 2 PP_0V9_SMPS1_BB_SRAM
D
PROGRAMMABLE LDOS 41 30 22 16 10
42
A8 VDD_VMOD1 VMOD1LX B8 0805 BBPMU
1 C400_K 1 C401_K 1 C480_K
25

1 C471_K 1 C402_K XW401_K


A6 20UF 20UF 220PF
BBPMU (10/14) 2.2UF
20%
15UF
20%
22 VMOD1_FB
C7
VMOD1SENSE
VSS_VMOD1 22 VMOD1_FB
SHORT-20L-0.05MM-SM
1 2 2 6.3V
20%
2 6.3V
20%
2 25V
5%
2 6.3V
X5R-CERM 2 6.3V
X5R C8
CERM-X5R
0402
CERM-X5R
0402
COG
01005
0201 0402-1 VSS_VMOD1
PP_VDD_SIM1 25 40 41 BBPMU BBPMU
U_PMIC_K BBPMU
PP_VDD_SIM2 25 39 40 41
PMB6829-C1
UFWLB BBPMU 1 1
C427_K C428_K
SYM 10 OF 14 0.47UF 0.47UF
39 29 27 25 23 22 21 PP_1V85_SMPS6_IO G2 VIN_1V8_EXT VSIM1 F2 2 X5R
20%
6.3V 2 X5R
20%
6.3V BBPMU (2/14) APN:152S00436 XW416_K
F1 01005-1 01005-1 SHORT-20L-0.05MM-SM VDD_SMPS2_0V8_COEX
VSIM2
BBPMU BBPMU U_PMIC_K Z=0.8MM 1 2 41

H4 V1V8_XO PMB6829-C1
VREFCP_GPIO3 A5 TOUCH_TO_MANY_FORCE_PWM 10 16 41 PMU-C0: GPIO3 IS MUXABLE WITH FORCE_PWM1 UFWLB L402_K
SYM 2 OF 14 1UH-20%-3.6A-0.035OHM
A10 BBPMU B9 1 2
22 PP_3V3_CHP F4 VIN_3V3 VPROG1 G5 PP_VBATT_PA 42 41 30 22 16 10 PP_VDD_MAIN VDD_VMOD2 VMOD2LX VMOD2LX PP_0V8_SMPS2_BB_DIG 24 25

VPROG2 G3 PP_1V8_VBIAS_LNA PP_1V8_VBIAS_LNA-10[I120] 16 22 33 34 35 36 VMOD2LX B10 2016 BBPMU


VPROG3_GPIO1 H5 FOR USB OR FORCE_PWM PMU B0 ONLY PP_3V3_LDO3_USB_HS 22 25 22 VMOD2_FB A9 VMOD2SENSE 1 C481_K 1 C404_K
PP_VDD_MAIN H3 VSYS 1 C473_K XW403_K
42 41 30 22 16 10
VPROG4 H2 VMOD 6 SWITCH PP_1V8_LDO4_BB_MEM C10 VSS_VMOD2 SHORT-20L-0.05MM-SM
220PF 20UF
22 24
2.2UF 5% 20%
VPROG5 H1 PP_1V24_LDO5_USB_SS 22 25
20% 22 VMOD2_FB 1 2 2 25V 6.3V
2 CERM-X5R
2 6.3V
X5R-CERM
COG
01005 0402
27 22 PP_1V3_SMPS3_XCVR_ANA J6 VIN_1V1 VPROG6 K7 PP_1V1_LDO6_BB_IO 22 24 25 0201 BBPMU
VPROG7 K6 NOT USED PP_1V1_LDO7_NO_LOAD 22

39 29 27 25 23 22 21 PP_1V85_SMPS6_IO F3 VIN_ANA
VPROG8 E3 PP_1V2_VDD_LNA PP_1V2_VDD_LNA-10[I120]
22
16 BBPMU (3/14) APN:152S00666 XW412_K
VPROG9 G4 PP_1V8_LDO9_GNSS 22 38 SHORT-20L-0.05MM-SM
VPROG10 E4 PP_1V8_LDO10_XCVR_HI 22 27 U_PMIC_K Z=0.7MM 1 2 VDD_SMPS3_1V3_COEX 41

39 29 27 25 23 22 21 PP_1V85_SMPS6_IO D4 VDD_IO PMB6829-C1


L403_K
C UFWLB
SYM 3 OF 14 2.2UH-20%-1.4A-0.21OHM C
H10 BBPMU G10 1 2
42 41 30 22 16 10 PP_VDD_MAIN VDD_VMOD3 VMOD3LX VMOD3LX PP_1V3_SMPS3_XCVR_ANA 22 27
1 C411_K 1 C407_K 1 C408_K 1 C409_K 1 C410_K 0805 BBPMU
4UF 4UF 1UF 1UF 10UF
20% 20% 20% 20% 20% 22 VMOD3_FB G9 VMOD3SENSE 1 C482_K 1 C406_K
6.3V 2 6.3V 2 10V 2 10V 2 6.3V
2 CERM-X5R CERM-X5R X5R X5R CERM-X5R F10 XW405_K 220PF 20UF
0201 0201 0201 0201 0402-0.1MM VSS_VMOD3 SHORT-20L-0.05MM-SM 5% 20%
BBPMU BBPMU BBPMU BBPMU 22 VMOD3_FB 1 2 2 25V
COG 2 6.3V
CERM-X5R
42 41 30 22 16 10 PP_VDD_MAIN 01005 0402
1 1 1 BBPMU
C405_K C425_K C426_K
15UF 100PF 27PF 1 C412_K
20%
6.3V
2 X5R
5%
2 25V
5%
2 16V 10UF
1 C414_K 1 C415_K 1 C416_K BBPMU (4/14) APN:152S00630 XW413_K
C0G-CERM NP0-C0G 20% 4UF 4UF 4.7UF SHORT-20L-0.05MM-SM
0402-1 01005 01005-1 2 6.3V 20% 20% 20%
BBPMU BBPMU BBPMU CERM-X5R
0402-0.1MM 2 6.3V
CERM-X5R
6.3V
2 CERM-X5R 2 10V
X5R U_PMIC_K Z=0.65MM 1 2 VDD_SMPS4_0V77_COEX 41
0201 0201 0402-1 PMB6829-C1
BBPMU BBPMU BBPMU UFWLB L404_K
SYM 4 OF 14 1UH-20%-2.4A-0.06OHM
A1 BBPMU B1 1 2
42 41 30 22 16 10 PP_VDD_MAIN VDD_VMOD4 VMOD4LX VMOD4LX PP_0V77_SMPS4_BB_CORE 25
PIWA2016FE-SM BBPMU
1 C474_K 1 C417_K 22 VMOD4_FB A2 VMOD4SENSE 1 C483_K 1 C418_K
2.2UF 15UF C1 XW407_K 220PF 20UF
20% 20% VSS_VMOD4 SHORT-20L-0.05MM-SM 5% 20%
2 6.3V
X5R-CERM 2 6.3V
X5R 22 VMOD4_FB 1 2 2 25V
COG 2 6.3V
CERM-X5R
0201 0402-1 01005 0402
BBPMU BBPMU

PP400_K
BBPMU (5/14) APN:152S00630 XW414_K
P2MM-NSM SHORT-20L-0.05MM-SM VDD_SMPS5_1V0_COEX
OMIT SM
PP
1 PP_VBATT_PA PP_VBATT_PA-10[I120] 16 22 33 37 U_PMIC_K Z=0.65MM 1 2 41
PMB6829-C1
PP401_K UFWLB L405_K
B P2MM-NSM
OMIT SM
1 PP_1V8_VBIAS_LNA PP_1V8_VBIAS_LNA-10[I120] 16 22 33
SYM 5 OF 14
BBPMU
1UH-20%-2.4A-0.06OHM B
PP 34 35 36 42 41 30 22 16 10 PP_VDD_MAIN E10 VDD_VMOD5 VMOD5LX E9 VMOD5LX 1 2 PP_1V0_SMPS5_XCVR_CORE 25 27

PP2480_K PIWA2016FE-SM BBPMU


P2MM-NSM 1 D10 1 1
OMIT SM
1 1 C419_K 22 VMOD5_FB VMOD5SENSE C484_K C420_K
PP
PP_3V3_LDO3_USB_HS 22 25 C472_K 15UF E8 XW409_K 220PF 20UF
2.2UF 20% VSS_VMOD5 SHORT-20L-0.05MM-SM 5% 20%
20% 6.3V
2 X5R VMOD5_FB 1 2 2 25V 2 6.3V
CHARGE PUMP OMIT
PP2481_K
P2MM-NSM
SM
1 PP_1V8_LDO4_BB_MEM 22 24
2 6.3V
X5R-CERM
0201
0402-1
BBPMU
22 COG
01005
CERM-X5R
0402
BBPMU
PP

PP2482_K
P2MM-NSM
OMIT SM
BBPMU (6/14) PP
1 PP_1V24_LDO5_USB_SS 22 25 BBPMU (13/14) APN:152S00630 XW415_K
SHORT-20L-0.05MM-SM
VDD_SMPS6_1V85_COEX
PP2490_K
P2MM-NSM
U_PMIC_K Z=0.65MM 1 2 41

OMIT SM PMB6829-C1
U_PMIC_K 1 PP_1V1_LDO6_BB_IO 22 24 25 UFWLB L406_K
PP
PMB6829-C1 SYM 13 OF 14 1UH-20%-2.4A-0.06OHM
UFWLB PP403_K K10 BBPMU K9 1 2
SYM 6 OF 14
P2MM-NSM 42 41 30 22 16 10 PP_VDD_MAIN VDD_VMOD6 VMOD6LX VMOD6LX PP_1V85_SMPS6_IO 21 22 23 25 27 29 39
OMIT SM
BBPMU 1 PP_1V1_LDO7_NO_LOAD 22 PIWA2016FE-SM BBPMU
39 29 27 25 23 22 21 PP_1V85_SMPS6_IO D3 VDD_CHP VCHP D1 PP_3V3_CHP 22
PP
1 C423_K 22 VMOD6_FB J10 VMOD6SENSE 1 C485_K 1 C424_K
E1 PP404_K 15UF K8 XW411_K 220PF 20UF
VCHP_BSTP VDD_CHP_BST_E1 P2MM-NSM 20% VSS_VMOD6 SHORT-20L-0.05MM-SM 5% 20%
OMIT SM
D2 VSS_CHP VCHP_BSTN E2 1 PP_1V2_VDD_LNA 2 6.3V VMOD6_FB 1 2
CDS_LIB=misc 2 25V 2 6.3V
C421_K 1 C422_K PP PP_1V2_VDD_LNA-10[I120] 16 22 X5R 22 COG CERM-X5R
1UF 0402-1 01005 0402
4.7UF BBPMU BBPMU
VDD_CHP_BST_E2 1 2 20%
2 10V
X5R PP405_K
BBPMU 20% 0402-1 P2MM-NSM
OMIT SM
10V BBPMU 1 PP_1V8_LDO9_GNSS 22 38
X5R PP
0201

A PP406_K
P2MM-NSM
SM
A
OMIT 1 PAGE TITLE
PP
PP_1V8_LDO10_XCVR_HI 22 27

BBPMU: RAILS
DRAWING NUMBER SIZE

051-02695 D
Apple Inc. REVISION

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
7 OF 27
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 22 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

BB: INTERFACE XG756 (7/7)


U_BB_K
XG756 (5/7) PMB9955-DEV-C2
UF2BGA
SYM 7 OF 7
BASEBAND
D U_BB_K 41 27 90_DIGRF_HI_TX_P A30 TXDAT_1_1+ DIGRF 1 DIGRF 0
TXDAT_0_1+ B33
D
NC
PMB9955-DEV-C2 41 27 90_DIGRF_HI_TX_N B31 TXDAT_1_1- TXDAT_0_1- C34 NC
39 29 27 25 23 22 21 PP_1V85_SMPS6_IO UF2BGA
SYM 5 OF 7 41 27 90_DIGRF_HI_RX1_P A28 RXDAT_1_1+ RXDAT_0_1+ A32
BASEBAND NC
41 27 90_DIGRF_HI_RX1_N B29 RXDAT_1_1- RXDAT_0_1- C32
1 NC
R514_K 41 21 BB_TO_BBPMU_CLK_EN AB29 CELL_CLK_EN RP_I2C_SCL B7 BB_TO_BBPMU_RP_SCL 21 41
100K 41 27 90_DIGRF_HI_RX2_P A26 RXDAT_1_2+
1% 41 21 CLK_BBPMU_TO_BB_38MHZ AG14 CELL_CLK RP_I2C_SDA A8 BB_TO_BBPMU_RP_SDA 21 41 DIGRF 2
1/32W 41 27 90_DIGRF_HI_RX2_N B27 RXDAT_1_2-
MF AD29 CLK_32K
01005 41 26 21 CLK_BBPMU_32KHZ VDIO A4 BB_TO_BBPMU_VDIO 21 41
A24 RXDAT_1_3+
BASEBAND2 41 27 90_DIGRF_HI_RX3_P TXDAT_2_1+ A20 90_DIGRF_LO_TX_P 27 41

41 16 10 BB_TO_AP_RESET_DETECT_L AC30 CP_RESET_OUT* VCLK D5 BB_TO_BBPMU_VCLK 21 41 41 27 90_DIGRF_HI_RX3_N B25 RXDAT_1_3- TXDAT_2_1- B21 90_DIGRF_LO_TX_N 27 41
X-PMU
41 16 10 AP_TO_BB_RESET_L AC28 CP_RESET_BB* EINT0 E2 BBPMU_TO_BB_ALERT_L 21 41 41 27 90_DIGRF_HI_RX4_P A22 RXDAT_1_4+ RXDAT_2_1+ A18 90_DIGRF_LO_RX_P 27 41

41 27 90_DIGRF_HI_RX4_N B23 RXDAT_1_4- RXDAT_2_1- B19 90_DIGRF_LO_RX_N 27 41


Y27 RESET2* MODEM_STDBY B5 BB_TO_BBPMU_STBY 21 41

G26 RST_TRX1* RF TRX RESETS RST_TRX0* G28 BB_TO_XCVR_RESET_L 27 41


CLOCKS & CONTROL XG_RESET_SD* F3 BBPMU_TO_BB_RESET_SD_L 21 41
NC
XG_RESET* Y25 BBPMU_TO_BB_RESET_L 21 41
G34 PHY_M_RFFE1_SCLK
41 27 BB_TO_XCVR_RFFE_CLK PHY_S_RFFE1_SCLK F33 XCVR_TO_BB_RFFE_CLK 27 41

SDWN_REQ* H3 BB_TO_BBPMU_SDWN_L 21 41 41 27 BB_TO_XCVR_RFFE_DATA J34 PHY_M_RFFE1_SDATA PHY_S_RFFE1_SDATA E34 XCVR_TO_BB_RFFE_DATA 27 41

PWRGOOD AE34 BBPMU_TO_BB_PWRGOOD 21 41 41 23 19 BB_TO_UAT_RFFE_CLK K33 PHY_M_RFFE2_SCLK PHY_S_RFFE2_SCLK H29 NC


41 23 19 BB_TO_UAT_RFFE_DATA K31 PHY_M_RFFE2_SDATA PHY_S_RFFE2_SDATA H31
RPCU_TRIG C6 BBPMU_TO_BB_MEAS_RDY 21 41
NC
41 23 19 BB_TO_LAT_RFFE_CLK L28 PHY_M_RFFE3_SCLK PHY_DWB_SCLK N32 BB_TO_XCVR_DWB_CLK 27 41

41 23 19 BB_TO_LAT_RFFE_DATA M27 PHY_M_RFFE3_SDATA PHY_DWB_SDATA L34 BB_TO_XCVR_DWB_DATA 27 41

41 BB_RESET2_L_TEST 41 27 PP_1V8_BB_MASTER_IO E30 PHY_VIO


RFFE

39 29 27 25 23 22 21 PP_1V85_SMPS6_IO G32 VDD_RFFE_1V8 PHY_RFEC_GPO0 F31


NC
J32 VDD_RFFE_1V8 F27
C XG756 (1/7) L32 VDD_RFFE_1V8
PHY_RFEC_GPO1
PHY_RFEC_GPO2 E26
NC
NC
C
PHY_RFEC_GPO3 G24
D29 VDD_VIO_1V8 NC
U_BB_K
PMB9955-DEV-C2 RFFE POWER RFFE GPO
UF2BGA
SYM 1 OF 7
BASEBAND

41 40 SIM1_DATA P31 CC1_IO USB_DPLUS AF33 90_USB_BB_P 16 41

41 40 SIM1_CLK P27 CC1_CLK USB_DMINUS AG34 90_USB_BB_N 16 41

41 40 SIM1_RST N30 CC1_RST SIM CARD 1 VBUS_DETECT AF25 PP_1V8_BB_USB_VBUS 16 VBUS DETECT IS 1V8 TOLERANT
41
AE32
41 40 39 SIM2_DATA T29 CC2_IO
U34 CC2_CLK
USB_HS_COMP
USB_HS_MON AE30
USB_HS_COMP
NC R511_K
BB RFFE SOURCE TERMINATIONS
41 40 39 SIM2_CLK NOTE: TUNING/COMPENSATION
SIM CARD 2 402 2 1 RESISTORS
41 40 39 SIM2_RST T31 CC2_RST USB30_OBS0 AF31 USB3_OBS0 1 R521_K
USB3.0 113 R560_K
AB31 USB30_OBS1 AE28 USB3_OBS1 1% 1%
41 UART_BB_DEBUG_TXD USIF1_TXD_MTSR 1/32W 1/32W
1
10 2
TK MF-HF 19 BB_TO_UAT_RFFE_CLK_R BB_TO_UAT_RFFE_CLK 19 23 41
41 UART_BB_DEBUG_RXD AB33 USIF1_RXD_MRST USB30_TX+ AH31 01005 01005 2
NC BASEBAND 5%
AA32 USIF1_RTS* USIF1 USB30_TX- AJ30 BASEBAND 1/32W
NC NC MF
41 16 10 AP_TO_BB_COEX AC34 USIF1_CTS* 01005
USB30_RX+ AH33 NC
41 16 10 UART_BB_TO_AOP_RXD AA34 USIF2_TXD_MTSR USB30_RX- AJ32 R561_K
NC 10 2
41 16 10 UART_AOP_TO_BB_TXD W30 USIF2_RXD_MRST PP_1V85_SMPS6_IO 21 22 23 25 27 29 39 19 BB_TO_UAT_RFFE_DATA_R 1 BB_TO_UAT_RFFE_DATA 19 23 41
W28 USIF2 PCI_PET_P1 AH5 90_PCIE_BB_TO_AP_RXD_P 10 16
41 16 10 BB_TO_AP_COEX USIF2_RTS* 5%
Y29 PCI_PET_N1 AJ6 90_PCIE_BB_TO_AP_RXD_N 10 16 1/32W
41 16 10 AP_TO_BB_PEAK_POWER_INDICATOR USIF2_CTS* MF
01005
AB13 PCI_PER_P1 AH3 90_PCIE_AP_TO_BB_TXD_P 10 16 41
1
R522_K
I2S_BB_TO_AP_BCLK I2S1_CLK0
41 16 10
PCIE PCI_PER_N1 AJ4 90_PCIE_AP_TO_BB_TXD_N 10 16 41 100K R562_K
AC14 I2S1_CLK1 5% 10 2
NC 1/32W 19 BB_TO_LAT_RFFE_CLK_R 1 BB_TO_LAT_RFFE_CLK 19 23 41
41 16 10 I2S_AP_TO_BB_DOUT AD13 I2S1_RX PCI_REFCLK+ AH7 90_PCIE_AP_TO_BB_REFCLK_P 10 16 41 MF
5%
AB15 I2S1
PCI_REFCLK- AJ8 90_PCIE_AP_TO_BB_REFCLK_N 2 01005
B 41 16 10

41 16 10
I2S_BB_TO_AP_DIN
I2S_BB_TO_AP_LRCLK AA14
I2S1_TX
I2S1_WA0
10 16 41 BASEBAND 1/32W
MF
01005
B
PCI_CLKREQ* AC8 PCIE_BB_BI_AP_CLKREQ_L 10 16 41
SIM2_DETECT AD15 I2S1_WA1
41 40 39 23
PCI_PERST* AB7 PCIE_AP_TO_BB_PERST_L 10 16 29 41
R563_K
AH15 AB3 1
10 2
41 16 10 LOFT_CANARY_1 I2S2_CLK0 PCI_WAKE* BB_TO_PMU_PCIE_HOST_WAKE_L 10 16 41 19 BB_TO_LAT_RFFE_DATA_R BB_TO_LAT_RFFE_DATA 19 23 41
AE16 I2S2_RX PCI_OBS0 AC4 PCIE_OBS0 R512_K 5%
NC I2S2 402 2 1/32W
AC16 I2S2_TX PCI_OBS1 AD3 PCIE_OBS1 1 MF
NC PP_1V85_SMPS6_IO 21 22 23 25 27 29 39 01005
41 16 10 LOFT_CANARY_2 AJ14 I2S2_WA0 1%
MMCI1_CMD AB25 1/32W
NC TK
41 23 I2C_BB_EEPROM_SCL C4 I2C1_SCL I2C1 MMCI1_CLK AH27 BB_DEBUG_ERROR 41 01005
I2C_BB_EEPROM_SDA A6 I2C1_SDA MMCI1_DAT_0 W20 BASEBAND 1
41 23
MMCI NC R552_K
MMCI1_DAT_1 V21 100K
G4 PHY_FTA_TRIG NC 5%
NC MMCI1_DAT_2 AE26 1/32W
H5 PHY_PA_BLANKING NC MF
NC MMCI1_DAT_3 AC26
42 41 UART_COEX_WLAN_TO_BB_TXD G6 PHY_IDC_UART_RXD NC 2 01005
BASEBAND
MMCI1_CD* AG26
UART_COEX_BB_TO_WLAN_TXD J6 PHY_IDC_UART_TXD NC
42 41

PHY FTA & IDC


EINT1 V33 SIM1_DETECT
EINT2 W34 SIM2_DETECT_R 23
40 41 BB EEPROM
39 29 27 25 23 22 21 PP_1V85_SMPS6_IO
EINT3 W32 GNSS_DWB_IRQ 27 41
EXTERNAL INTERRUPTS 1 C500_K 1 1
CLKOUT0 U26 AP_TO_BB_COREDUMP_TRIG 10 16 41
1UF R500_K R501_K
20% 10K 10K
CLOCK OUTPUT CLKOUT1 U28 NC 2 16V
CER-X5R 1% 1%
0201 1/32W 1/32W
BASEBAND MF MF
2 01005 2 01005

A1
BASEBAND BASEBAND
VCC
EEPROM_K
CAT24C08C4A
WLCSP
A 41 23 I2C_BB_EEPROM_SCL
CKPLUS_WAIVE=I2C_PULLUP
B1 SCL SDA B2 I2C_BB_EEPROM_SDA
CKPLUS_WAIVE=I2C_PULLUP
23 41
A
SIM2_DETECT TO EINT2 PAGE TITLE

BB: INTERFACE
R555_K VSS DRAWING NUMBER SIZE
0.00 2 BASEBAND
SIM2_DETECT 1 SIM2_DETECT_R 051-02695 D

A2
41 40 39 23 23

0% Apple Inc. REVISION


1/32W
MF
01005
4.0.0
BASEBAND NOTICE OF PROPRIETARY PROPERTY: BRANCH
NOSTUFF
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
8 OF 27
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 23 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

BB: DDR PWR & JTAG

D D

HOOKS FOR DDR4 TESTING/CAL

XG756 (2/7) PP_1V1_LDO6_BB_IO 22 24 25

1
R600_K
XG756 (6/7)
U_BB_K
240
PMB9955-DEV-C2 1%
UF2BGA 1/32W U_BB_K
MF
SYM 2 OF 7 2 01005 PMB9955-DEV-C2
BASEBAND UF2BGA
SYM 6 OF 7
AF23 NAND_ADQ_0 ZQ_DRAM K1 BB_ZQDRAM
NC
AJ24

LPDDR
NC NAND_ADQ_1 JTAG MIPI PTI
AC20 DDR_OBS0 L4 NC 41 BB_JTAG_TDO F7 TDO MIPI_PTI1_CLK AE18 NC
NC NAND_ADQ_2
AJ22 DDR_OBS1 J2 NC 41 BB_JTAG_TDI B11 TDI
NAND_ADQ_3 MIPI_PTI1_DATA0 AJ16 NC
C NC
NC
AG22 NAND_ADQ_4 DDR_RCOMP R2 BB_DDRCOMP
41 16 10 SWD_AOP_BI_BB_SWDIO E6
A12
TMS
MIPI_PTI1_DATA1 Y15 NC
C
41 29 SWD_JTAG_TCK_SWDCLK_R TCK
NC
Y21 NAND_ADQ_5 DDR_RESET* V1 NC BB_JTAG_TRST_L C12 MIPI_PTI1_DATA2 Y13 NC
AH23 29 TRST*
NAND_ADQ_6 1
R603_K MIPI_PTI1_DATA3 V15 NC

NAND
NC VSS C8 G8 RTCK
AA20 NAND_ADQ_7 80.6 NC MIPI_PTI1_DATA4 AA16 NC
NC VSS C16 1%
AE24 1/32W MIPI_PTI1_DATA5 AH17 NC
NC NAND_ALE VSS C20 MF 29 HW_MON1 C10 HW_MON1
AE22 2 01005 MIPI_PTI1_DATA6 AD17 NC
NC NAND_CE* VSS C30 29 HW_MON2 AB19 HW_MON2
AC22 BASEBAND MIPI_PTI1_DATA7 AJ18 NC
NC NAND_CLE VSS D1 MONTITORING
AJ26 29 TRIG_IN A10 TRIG_IN SINGLALS MIPI_PTI1_DATA8 AH19 NC
NC NAND_RB* VSS D21
AD21 MIPI_PTI1_DATA9 V17 NC
NC NAND_RE* VSS D23
AD23 NC
R20 THERM_SNSA MIPI_PTI1_DATA10 AJ20 NC
NC NAND_WE* VSS D27
AH25 NC
P19 THERM_SNSC MIPI_PTI1_DATA11 U18 NC
NC NAND_WP* VSS E12
H19 MIPI_PTI1_DATA12 W18 NC
AG24 NAND_CLK_X_IN_OUT VSS E18 NC EDM_COM SENSE &
NC F19 MONITORING MIPI_PTI1_DATA13 AA18 NC
VSS F5 NC EDM_RES
C2 VDD1_DRAM MIPI_PTI1_DATA14 Y19 NC
22 PP_1V8_LDO4_BB_MEM VSS F15 T7
AE2 VDD1_DRAM NC DNU_CPU_L2_LYA+ MIPI_PTI1_DATA15 AG20 NC
VSS G2 U8
NC DNU_CPU_L2_LYA-
1 C600_K 1 C601_K 1 C602_K M5 VSS G20 PHY_MIPI_PTI1_CLK G10 NC
2.2UF 0.1UF 0.1UF VDD_DDR_IO
20% 20% 20% P5 VSS G22 NC
M17 RCT_MON1 C18
VDD_DDR_IO PHY_MIPI_PTI1_DATA0 NC
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM T5 VSS G30 NC
M19 RCT_MON2 F17
0201 01005 01005 VDD_DDR_IO PHY_MIPI_PTI1_DATA1 NC
BASEBAND BASEBAND BASEBAND V5 VSS H1 P23 G12
VDD_DDR_IO 25 VSS_SENSE VSS_SENSE PHY_MIPI_PTI1_DATA2
VSS H33 NC
PHY_MIPI_PTI1_DATA3 K15

PHY MIPI PTI


25 22 PP_0V8_SMPS2_BB_DIG N6 VDD_DIG_DDR VSS J8 NC
A2 DUMMY_BALL PHY_MIPI_PTI1_DATA4 B17
R6 VDD_DIG_DDR VSS J18 NC DUMMY NC
A34 M7
MEMORY POWER

25 24 22 PP_1V1_LDO6_BB_IO U6 NC DUMMY_BALL PHY_MIPI_PTI1_DATA5 NC


VDD_DIG_DDR VSS K13 B1 J10
W6 NC DUMMY_BALL PHY_MIPI_PTI1_DATA6 NC
1 C603_K 1 C604_K 1 C605_K 1 C606_K VDD_DIG_DDR VSS K19 AH1 J16
1UF 1UF 0.1UF 0.1UF NC DUMMY_BALL PHY_MIPI_PTI1_DATA7 NC
20% 20% 20% 20% B3 VSS K21 AJ2 L10
VDD_DDR_DRAM DUMMY_BALL PHY_MIPI_PTI1_DATA8 BB_TO_MANY_GSM_BURST_IND 10 16 41
2 16V 2 16V 2 6.3V 2 6.3V VSS K23 NC
B CER-X5R
0201
CER-X5R
0201
X5R-CERM
01005
X5R-CERM
01005
F1 VDD_DDR_DRAM
VSS K25 NC
AJ34 DUMMY_BALL PHY_MIPI_PTI1_DATA9 B15
NC
B
BASEBAND BASEBAND BASEBAND BASEBAND M1 VDD_DDR_DRAM PHY_MIPI_PTI1_DATA10 J12
VSS K27 NC
T1 VDD_DDR_DRAM PHY_MIPI_PTI1_DATA11 A14
VSS K29 NC
Y1 VDD_DDR_DRAM PHY_MIPI_PTI1_DATA12 A16
VSS L2 NC
AD1 VDD_DDR_DRAM PHY_MIPI_PTI1_DATA13 C14
VSS L22 NC
25 24 22 PP_1V1_LDO6_BB_IO AG2 VDD_DDR_DRAM PHY_MIPI_PTI1_DATA14 F13
VSS M3 NC
PHY_MIPI_PTI1_DATA15 G14
VSS M11 NC
1 C607_K 1 C608_K
0.1UF 0.1UF VSS M13
20% 20%
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
01005 01005
BASEBAND BASEBAND

A A
PAGE TITLE

BB: DDR PWR & JTAG


DRAWING NUMBER SIZE

051-02695 D
Apple Inc. REVISION

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
9 OF 27
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 24 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

BB: DIGITAL PWR


D D
XG756 (4/7)
XG756 (3/7) VSS_SENSE 24

R700_K XW700_K
U_BB_K SHORT-20L-0.05MM-SM
25 22 PP_0V9_SMPS1_BB_SRAM
1
0.00 2 1 2
PMB9955-DEV-C2 BB_VREF
UF2BGA 0%
U_BB_K 1 SYM 4 OF 7 1/32W
PMB9955-DEV-C2 C700_K MF
01005
4.7UF POWER
UF2BGA Y3 BASEBAND
20% VDD_L2C_SRAM VREF AF15
SYM 3 OF 7 2 10V
X5R Y5
POWER 0402-1 VDD_L2C_SRAM PP_1V0_SMPS5_XCVR_CORE 22 25 27
AE4 VDD_PCIE AG6
B9 D19 BASEBAND VDD_L2C_SRAM 1 1 1 1 1 1
24 22 PP_0V8_SMPS2_BB_DIG VDD_DIG_MAIN VDD_SRAM_MAIN PP_0V9_SMPS1_BB_SRAM 22 25 C701_K C702_K C703_K C704_K C705_K C706_K
C24 D25
AF5 VDD_L2C_SRAM VDD_IO_PCIE AF7 1UF 0.1UF 1UF 0.1UF 1UF 0.1UF
VDD_DIG_MAIN VDD_SRAM_MAIN 20% 20% 20% 20% 20% 20%
E20 VDD_DIG_MAIN VDD_SRAM_MAIN P9 PP_1V0_SMPS5_XCVR_CORE U16 VDD_LDO_PLL_PHY VDD_LDO_DIGRF0 D31 16V 6.3V 2 16V 6.3V 2 16V 6.3V 2
1 C707_K 1 C708_K 1 C709_K 1 C710_K
27 25 22 CER-X5R 2 X5R-CERM CER-X5R 2 X5R-CERM CER-X5R 2 X5R-CERM
J20 VDD_DIG_MAIN VDD_SRAM_MAIN P11 VDD_LDO_DIGRF1 C28 0201 01005 0201 01005 0201 01005
4.7UF 0.1UF 0.1UF 4.7UF 1 C711_K 1 C712_K 1 C713_K 1 C714_K 1 C715_K AE14 VDD_LDO_PLL_HOST BASEBAND BASEBAND BASEBAND BASEBAND BASEBAND BASEBAND
20% 20% L16 VDD_DIG_MAIN VDD_SRAM_MAIN R16 20% 20% VDD_LDO_DIGRF2 C22
2 10V 2 6.3V 2 6.3V 2 10V 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
X5R X5R-CERM N8 VDD_DIG_MAIN VDD_SRAM_MAIN R18 X5R-CERM X5R 20% 20% 20% 20% 20% U10 VDD_LDO_AMT_PLL
0402-1 01005 01005 0402-1 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V VDD_LDO_USB_SS AG30 PP_1V24_LDO5_USB_SS 22
BASEBAND BASEBAND N10 VDD_DIG_MAIN VDD_SRAM_MAIN U12 BASEBAND BASEBAND X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM
01005 01005 01005 01005 01005 L20 VDD_LDO_PLL_LTE
N12 VDD_DIG_MAIN VDD_SRAM_MAIN W14 BASEBAND BASEBAND BASEBAND BASEBAND BASEBAND VDD_USB_HS_IO AH29 PP_3V3_LDO3_USB_HS 22
1 C716_K
N14 VDD_DIG_MAIN VDD_SRAM_MAIN AF3 F9 VDD_LDO_PLL_3G
VDD_MMC_IO AJ28 PP_1V85_SMPS6_IO 21 22 23 25
4.7UF
N16 VDD_DIG_MAIN VDD_SRAM_MAIN AF13 27 29 39 20%
N18
1 C717_K 1 C718_K 1 C719_K 1 C720_K L14 VDD_LDO_PLL_2G 1 C723_K 2 10V
X5R
VDD_DIG_MAIN VDD_SRAM_MAIN AF21
0.1UF 0.1UF 0.1UF 0.1UF VDD_SIM1_IO N34 PP_VDD_SIM1 22 40 41
1 4.7UF 0402-1
N20 AF27 20% 20% 20% 20% AG18 VDD_SIM2_IO R34 PP_VDD_SIM2
C722_K 20% BASEBAND
VDD_DIG_MAIN VDD_SRAM_MAIN VDD_LDO_PLL_L2C 22 39 40 41
4UF
T9 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 20% 2 10V
X5R
VDD_DIG_MAIN 01005 01005 01005 01005
E24 AB17 VDD_OEM_18 AJ10 PP_1V85_SMPS6_IO 1 1 2 6.3V 0402-1
39
T13 VDD_SRAM_LTE BASEBAND BASEBAND BASEBAND BASEBAND VDD_LDO_PLL_L2 21 22 23 C750_K C721_K CERM-X5R BASEBAND
VDD_DIG_MAIN E28
25 27 29
0.47UF 0.47UF 0201
VDD_SRAM_LTE
T15 VDD_DIG_MAIN R8 VDD_LDO_PLL_CPU VCC_EVR_CP AJ12 VCC_EVR_POS 25
20% 20% BASEBAND
VDD_SRAM_LTE F21 2 6.3V
X5R 2 6.3V
X5R
T17 VDD_DIG_MAIN 1 C725_K 1 C726_K 1 C746_K VCC_EVR_CN AH11 VCC_EVR_NEG
C AF9 VDD_DIG_MAIN
VDD_SRAM_LTE H21
0.1UF 4UF 4UF 24 22 PP_1V1_LDO6_BB_IO T3 VDD_LDO_ADPLL_DDR
25 01005
BASEBAND
01005
BASEBAND
C
VDD_SRAM_LTE H23 20% 20% 20% VSCVR AH9
AF17 VDD_DIG_MAIN H27 2 6.3V
X5R-CERM 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 25 22 PP_0V9_SMPS1_BB_SRAM K17 VDD_SRAM_JHARQ
AF29 VDD_SRAM_LTE 01005 0201 0201 L18 AG10
VDD_DIG_MAIN VDD_SRAM_JHARQ VCCFHV_3V3 VSCVR
VDD_SRAM_LTE L24 BASEBAND BASEBAND BASEBAND
VCCFHV_AMT AA6 PP_1V0_SMPS5_XCVR_CORE 22 25 27
V7 VDD_DIG_BIA VDD_SRAM_LTE L26 39 29 27 25 23 22 21 PP_1V85_SMPS6_IO AD33 VDD_RTC
VCCF_1V2 AG12
VDD_SRAM_LTE L30 1 C727_K NC
D33 VDD_DIG_LTE 1 C728_K 1 C729_K M15 VSS VCCFHV_2V4_0 AD7
1 C730_K VDD_SRAM_LTE P21 0.1UF 1 C731_K NC C748_K 1
F23 VDD_DIG_LTE 20% 0.1UF 0.1UF M21 VSS VCCFHV_2V4_1 AC6
0.1UF VDD_SRAM_LTE P25 2 6.3V 20% 20% 0.1UF NC 1UF
20% F25 VDD_DIG_LTE X5R-CERM 2 6.3V 2 6.3V 20% M31 VSS 20%
2 6.3V
X5R-CERM F29 VDD_SRAM_LTE P29 01005
BASEBAND
X5R-CERM
01005
X5R-CERM
01005 2 6.3V
X5R-CERM N2 LDO_MON1 E22
NC
16V
CER-X5R 2 25 VCC_EVR_POS
01005 VDD_DIG_LTE U22 BASEBAND BASEBAND 01005 VSS R14 0201
BASEBAND J22 VDD_SRAM_LTE BASEBAND N4 LDO_MON2 NC BASEBAND
VDD_DIG_LTE U24 VSS F11 1
J24 VDD_SRAM_LTE N22 LDO_MON3 NC C724_K
VDD_DIG_LTE U30 VSS U14 0.033UF
J26 VDD_SRAM_LTE N26 LDO_MON4 NC 20%
VDD_DIG_LTE VSS
J28 VDD_SRAM_LTE U32
P1 LDO_MON5 P15
NC 2 6.3V
CER-X5R
VDD_DIG_LTE Y23 VSS AD27 01005
J30 VDD_SRAM_LTE P3 LDO_MON6 NC
VDD_DIG_LTE VSS 25 VCC_EVR_NEG BASEBAND
VDD_SRAM_LTE AA24 LDO_MON7 R12
M23 VDD_DIG_LTE P7 VSS NC
VDD_SRAM_LTE AA26 LDO_MON8 V13
M25 VDD_DIG_LTE P13 VSS NC
VDD_SRAM_LTE AA30 LDO_MON9 AG16
M29 VDD_DIG_LTE P17 VSS NC
VDD_SRAM_LTE AB21 LDO_MON10 AF11
M33 VDD_DIG_LTE R4 VSS NC
1 C733_K LDO_MON11 AC12
R22 VDD_DIG_LTE VDD_SRAM_3G D3 R10 VSS NC
0.1UF
20% R24 VDD_DIG_LTE VDD_SRAM_3G D7 T11 VSS VSS AA10
2 6.3V
X5R-CERM R26 D9 1 1 1 T21 AA12
01005 VDD_DIG_LTE VDD_SRAM_3G C735_K C738_K C739_K VSS VSS
BASEBAND R28 VDD_DIG_LTE VDD_SRAM_3G D11 0.1UF 0.1UF 0.1UF T23 VSS VSS AB1
20% 20% 20%
R30 VDD_DIG_LTE VDD_SRAM_3G E14 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
T25 VSS VSS AB5
R32 VDD_DIG_LTE VDD_SRAM_3G E16 01005 01005 01005 T27 VSS VSS AB11
BASEBAND BASEBAND BASEBAND
V23 VDD_DIG_LTE VDD_SRAM_3G G16 T33 VSS VSS AB27
V25 VDD_DIG_LTE VDD_SRAM_3G G18 U2 VSS VSS AC2
B V27 VDD_DIG_LTE VDD_SRAM_3G H9 U4 VSS VSS AC18 B
V29 VDD_DIG_LTE VDD_SRAM_3G H11 U20 VSS VSS AD5
V31 VDD_DIG_LTE VDD_SRAM_3G J4 V3 VSS VSS AD9
AA22 VDD_DIG_LTE VDD_SRAM_3G J14 V9 VSS VSS AD11
AC24 VDD_DIG_LTE VDD_SRAM_3G L6 V11 VSS VSS AD19
AC32 VDD_DIG_LTE VDD_SRAM_3G L8 W2 VSS VSS AD25
W4 VSS VSS AD31
D13 VDD_DIG_3G VDD_SRAM_DSP K11 W22 VSS VSS AF1
D15 VDD_DIG_3G
D17 VDD_SRAM_CDMA W16 W24 VSS VSS AF19
1 1 VDD_DIG_3G W26 AG4
C736_K C737_K E4 W8 PP_0V77_SMPS4_BB_CORE
VSS VSS
4.7UF 0.1UF VDD_DIG_3G VDD_CORE 22
Y9 AG8
20% 20% E8 W10 VSS VSS
VDD_DIG_3G VDD_CORE
2 10V
X5R 2 6.3V
X5R-CERM E10 W12
Y11 VSS VSS AG32
0402-1 01005 VDD_DIG_3G VDD_CORE 1 1 1 1 Y17 AH13
BASEBAND H7 Y7 C740_K C741_K C770_K C771_K VSS VSS
BASEBAND VDD_DIG_3G VDD_CORE 4.7UF 0.1UF 2.2UF 2.2UF Y31 AH21
H13 AB9 20% 20% 20% 20% VSS VSS
VDD_DIG_3G VDD_CORE
H15 AC10 2 10V
X5R 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
AA2 VSS
VDD_DIG_3G VDD_CORE 0402-1 01005 0201 0201 AA4
H17 AE6 BASEBAND BASEBAND VSS
VDD_DIG_3G VDD_CORE BASEBAND BASEBAND AA8
K5 AE8 VSS
VDD_DIG_3G VDD_CORE
K7 VDD_DIG_3G VDD_CORE AE10
K9 VDD_DIG_3G VDD_CORE AE12
M9 VDD_DIG_3G
VDD_IO18 B13 PP_1V85_SMPS6_IO 21 22 23 25 27 29 39
L12 VDD_DIG_DSP VDD_IO18 E32
VDD_IO18 Y33
V19 VDD_DIG_CDMA
VDD_IO18 AG28 1 C742_K
C26 VDD_DIG_RF 4UF
20%
2 6.3V
A 1 1 1
CERM-X5R
0201
BBPMU
A
C743_K C744_K C745_K PAGE TITLE
0.1UF 0.1UF 0.1UF
20%
2 6.3V
X5R-CERM
20%
2 6.3V
X5R-CERM
20%
2 6.3V
X5R-CERM PLACE C742_K NEAR BB_K.G32:5MM BB: DIGITAL PWR
01005 01005 01005 DRAWING NUMBER SIZE
BASEBAND BASEBAND BASEBAND 051-02695 D
Apple Inc. REVISION

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
10 OF 27
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 25 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

XCVR: TRANSMIT & GNSS

D D

SMARTI7 (3/7)
FLTGPS_K U_XCVR_K
SAW-GPS
SAFRQ1G56XB0F57 PMB5762-A2
L801_K C800_K
LGA 3.6NH+/-0.1NH-180MA UFWLB
20PF
SYM 3 OF 7
38 50_GNSS_SAW 4 INPUT OUTPUT 2 GNSS_RF_IN_MATCH 1 2 GNSS_MATCH 1 2 50_GNSS_RF_IN_UNMATCH B1 GN_RF_IN GN_NTCMI- C2
XCVR
GN_NTCMI+ D3

GND
GND
01005
5%
16V
C0G GN_PPS_IN F3 AP_TO_GNSS_TIME_MARK 10 16 41
01005

1
3
C801_K 1 GN_UART_RTS F7 UART_GNSS_TO_AP_RTS_L_R 26
1
0.7PF H7 UART_AP_TO_GNSS_TXD R825_K
SMARTI7 (4/7) +/-0.05PF
16V
NP0-C0G 2 41 23 21 CLK_BBPMU_32KHZ H1 GN_LPO_CLK
GN_UART_RX
GN_UART_TX H3 UART_GNSS_TO_AP_TXD_R
10 16 41

26 5%
100K
01005 H11 G2 1/32W
JTAG_MODE GN_LNA_EN GNSS_TO_BBPMU_LNA_EN 21 41 MF
C U_XCVR_K
41 21 UART_BBPMU_TO_GNSS_1W F5
L6
GN_NTC GN_UART_WAKE G4
H5
GNSS_TO_AP_LOW_PWR_IND_R 26
2 01005
C
41 21 16 10 PMU_TO_GNSS_EN GN_EN GN_FSYS_REQ GNSS_TO_BBPMU_CLK_EN 21 41
PMB5762-A2
UFWLB
SYM 4 OF 7
PADACF+ L4 50_ET_DAC_P 30 41
XCVR
PADACF- M3 50_ET_DAC_N 30 41

RAMPDAC K3 NC R1305_K
0.00 2
TX_LB1 T1
U2
50_XCVR_TX_LB1 1 50_TX_LB_PA_IN
699 - 915 MHZ
10 16 GNSS DAMPING RESISTORS
TX_LB2 50_XCVR_TX_LB2 33 824 - 915 2G TX OUTPUT 0%
1/32W
TX_MB1 R2 50_XCVR_TX_MB1 1 C1309_K MF R820_K
Y1 47PF 01005
1
49.9 2
TX_MB2 50_XCVR_TX_MB2 RADIO_LB_PAD 26 UART_GNSS_TO_AP_RTS_L_R UART_GNSS_TO_AP_CTS_L 10 16 41
5%
TX_MB3 AA2 50_TX_MB3_MLB_2G 33 1400 - 1600 2 16V 1%
NP0-C0G 1/32W
TX_MB4 P1 01005 MF
NC NOSTUFF 01005
TX_HB AB1 50_XCVR_TX_HB RADIO_LB_PAD
TX_UB AC2 50_XCVR_TX_UHB 3400 - 3600
33
R821_K
UART_GNSS_TO_AP_TXD_R 1
49.9 2 UART_GNSS_TO_AP_RXD
26 10 16 41
C1410_K 1%
27PF 1/32W
MF
1 2 50_TX_MB1_IN 10 16 01005
1710 - 1995 MHZ
5% R822_K
16V 1 49.9 2
NP0-C0G 26 GNSS_TO_AP_LOW_PWR_IND_R 1 GNSS_TO_AP_LOW_PWR_IND 10 16 41
01005-1
RADIO_HB_PAD 1%
L1400_K 1/32W
MF
10NH-+/-3%-0.25A 01005
01005
RADIO_HB_PAD

B NOSTUFF
2 B

C1411_K
27PF
1 2 50_TX_2G_HB_IN 10 16
1710 - 1995 MHZ
5%
16V
NP0-C0G 1
01005-1
RADIO_HB_PAD
L1415_K
10NH-+/-3%-0.25A
01005
RADIO_HB_PAD
NOSTUFF 2

C1412_K
27PF
1 2 50_TX_HB_PA_IN 10 16
2300 - 2690 MHZ
5%
16V
NP0-C0G 1
01005-1
RADIO_HB_PAD
L1401_RF
10NH-+/-3%-0.25A
A 01005
RADIO_HB_PAD A
PAGE TITLE
NOSTUFF
2
XCVR: TX & GNSS
DRAWING NUMBER SIZE

051-02695 D
Apple Inc. REVISION

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
11 OF 27
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 26 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

XCVR: INTERFACE & PWR

D 27 25 22
(LAYOUT: MAX DCR 85MOHM)
PP_1V0_SMPS5_XCVR_CORE
D
C900_K 1
2 0.47UF PP_1V85_SMPS6_IO 21 22 23 25 27 29 39
20%
SHORT-10L-0.1MM-SM
XW910_K 6.3V 2
X5R
01005-1
SMARTI7 (1/7) SMARTI7 (7/7)
OMIT XCVR
FL900_K XCVR1 STAR ROUTE
240OHM-25%-0.2A-0.9OHM PP_1V8_LDO10_XCVR_HI 22
(LAYOUT: STAR ROUTE) U_XCVR_K
PP_1V3_SMPS3_XCVR_ANA 1 2 U_XCVR_K
27 22
1 PMB5762-A2 1 1 1
01005 C901_K C902_K C903_K C904_K TIE A2 TO SYSTEM GND PLANE. PMB5762-A2
0.1UF UFWLB 0.1UF 100PF 15UF
XCVR 1 20% 20% 5% 20% DO NOT TIE TO SURFACE GND. UFWLB
C905_K SYM 1 OF 7
C906_K 1 C907_K 1
0.1UF 2 6.3V
X5R-CERM
AC8 VDD1V0_DIG XCVR VDD1V8_IO_2 G6 2 6.3V
X5R-CERM 2 25V
C0G-CERM 2 6.3V
X5R-CERM A2
SYM 7 OF 7
N14
15UF 0.1UF VSS_GN_RF VSS
20% 20%
20%
6.3V
01005
XCVR F1 VDD1V8_IO U8 01005
XCVR
01005
XCVR
0402-0.1MM
XCVR A6
XCVR
N16
6.3V 6.3V X5R-CERM 2 PP_1V0_XCVR_CORE_F1 VDD1V1_GN VSS VSS
X5R-CERM 2 X5R-CERM 2 01005 A14 VSS VSS N20
0402-0.1MM
XCVR
01005
XCVR CAP IMPROVES XCVR PP_1V3_XCVR_ANA_GN E2 VDD1V3_GN VDD1V8_GN A4 B3 P3
TX GAMMA SPURS XW900_K VSS VSS
(XCVR BALL N6) SHORT-10L-0.1MM-SM B5 P5
VSS VSS
27 PP_1V3_XCVR_TXPLL VFE_XCVR_ANA_1V3 AA18 VDD1V3_RX1PLL VDD1V8_RXPLL_1 AA20 PP_1V8_XCVR_HI_PLL 2 1
B15 P9
VSS VSS
OMIT B19 P11
C921_K 1 XW901_K C18 VDD1V3_RX2PLL VDD1V8_RXPLL_2 C20 XCVR VSS VSS
6800PF SHORT-10L-0.1MM-SM B21 P13
10% 1 2 H19 VSS VSS
6.3V 2 PP_1V3_XCVR_RXPLL_2_3 VDD1V3_RX3PLL C4 P15
X5R XCVR VSS VSS
OMIT P17 C10 P19
01005
XCVR XW909_K VFE_XCVR_ANA_1V3 VDD1V3_RX4PLL VDD1V8_TXPLL AC4 VSS VSS
SHORT-10L-0.1MM-SM C16 P21
N6 VSS VSS
1 2 27 PP_1V3_XCVR_TXPLL VDD1V3_TXPLL VDD1V8_CI F13 D5 R4
XCVR (SEE 0.1U CAP ON LEFT) VSS VSS
OMIT VDD1V8_CI_2 P7 PP_1V85_SMPS6_IO 21 22 23 25 27 29 39
D15 R6
AB17 VSS VSS
27 22 PP_1V3_SMPS3_XCVR_ANA VDD1V3_RX1DCO D21 R8
VSS VSS
STAR ROUTE E4 R10
PP_1V3_XCVR_RX2DCO B17 VDD1V3_RX2DCO VDD_MEM_RET AB7 PP_1V0_SMPS5_XCVR_CORE 22 25 27 VSS VSS
C908_K 1 E6 VSS VSS R14
PP_1V3_XCVR_RX3DCO G18 VDD1V3_RX3DCO CEXT_GN
C 0.1UF
20%
6.3V
1 C909_K N18
CEXT_TX
E8
E10
VSS VSS R16
R18
C
X5R-CERM 2 0.1UF VFE_XCVR_ANA_1V3 VDD1V3_RX4DCO 1 VSS VSS
01005 20% 1 C910_K E12 R20
C911_K 1UF VSS VSS
2 6.3V
X5R 1 1
AB21 VDD1V3_RC_LO1 VDD_CEXT_GN D1 1UF 20% E14 T3
01005 C912_K C913_K VSS VSS
0.1UF 0.1UF
20% 2 10V E16 T15
NOSTUFF 20% 20%
A20 VDD1V3_RC_LO2 VDD_CEXT_TX W2 2 10V
X5R
X5R
0201 VSS VSS
PP_1V3_XCVR_RC_LO 0201 E18 T17
XW902_K XCVR 2 6.3V
X5R 2 6.3V
X5R-CERM F21 XCVR
XCVR VSS VSS
SHORT-10L-0.1MM-SM 01005 01005 REMOVED C914_K VDD1V3_RC_LO2 E20 T21
1 2 VSS VSS
NOSTUFF (HIGHLY PROBABLE) K21 F15 U6
VDD1V3_RC_LO1 VDD1V3_MPHY B13 PP_1V3_SMPS3_XCVR_ANA 22 27 VSS VSS
OMIT XCVR G8 U10
XCVR XW903_K Y17 XW904_K STAR ROUTE VSS VSS
SHORT-10L-0.1MM-SM VDD1V3_RC_ADC1 SHORT-10L-0.1MM-SM G10 U12
1 2 VDD1V3_RDRF F23 2 1 VSS VSS
PP_1V3_XCVR_RDRF G14
D17 VDD1V3_RC_ADC2 VSS VSS U14
OMIT XCVR VDD1V3_RXRF V23 OMIT G16 U18
XW905_K PP_1V3_XCVR_RC_ADC
J16 1 XCVR VSS VSS
SHORT-10L-0.1MM-SM VDD1V3_RC_ADC2 C915_K G20 U20
0.47UF VSS VSS
1 2
1 U16 VDD1V3_TXANA N4 20% H15 V7
C916_K VDD1V3_RC_ADC1 VSS VSS
XW906_K OMIT 0.1UF 2 6.3V H17 V15
SHORT-10L-0.1MM-SM XCVR 20% Y19 VDD1V3_TXDCO U4 1 C917_K X5R
01005 VSS VSS
VDD1V3_RC_GM1 2200PF H21 V17
1 2 2 6.3V XCVR VSS VSS
X5R
01005 D19 VDD1V3_TXRF V3 10% NOSTUFF J2 V19
OMIT XCVR VDD1V3_RC_GM2 1 C918_K 2 16V
X5R-CERM VSS VSS
XW907_K XCVR 0.1UF 01005 J4 V21
SHORT-10L-0.1MM-SM NOSTUFF K19 VSS VSS
VDD1V3_RC_GM2 VDD1V3_CI G12 1 C919_K 20% XCVR
J6 W4
1 2 PP_1V3_XCVR_RC_GM
6800PF 2 6.3V
X5R-CERM VSS VSS
OMIT REMOVED C920_K T19 VDD1V3_RC_GM1 10% 01005 J8 VSS VSS W6
XCVR 2 6.3V
X5R
XCVR
J10 W10
(HIGHLY PROBABLE) 01005 VSS VSS
XCVR VDD1V3_TXRF = 230MA J12 W14
VSS VSS
J14 VSS VSS W16
1 C920_K J18 VSS VSS W18
6800PF J20 VSS VSS W20
10%
2 6.3V K5 VSS VSS Y3
X5R
01005 K13 Y13
B XW908_K
XCVR
NOSTUFF K15
VSS
VSS
VSS
VSS Y15 B
SHORT-10L-0.1MM-SM K17 Y21
2 1 VSS VSS
PP_1V3_XCVR_CI L8 VSS VSS AA4
SMARTI7 (2/7) OMIT
XCVR L10
L12
VSS VSS AA6
AA10
VSS VSS
L14 VSS VSS AA14
U_XCVR_K L16 AA16
VSS VSS
PMB5762-A2 L18 AB3
VSS VSS
UFWLB L20 AB13
VSS VSS
F9 SYM 2 OF 7 Y11 M5 AB15
41 23 BB_TO_XCVR_DWB_DATA DWB_SDATA GPO0 VSS VSS
XCVR NC
41 23 BB_TO_XCVR_DWB_CLK F11 DWB_SCLK GPO1 Y9 M7 VSS VSS AB19
NC
GPO2 AB9 UART_AP_TO_GNSS_RTS_L 10 16 41
M13 VSS VSS AC6
41 23 BB_TO_XCVR_RESET_L W8 RESET_MAIN*
GPO3 AA8 M21 VSS VSS AC10
NC
GPO4 Y7 GNSS_DWB_IRQ 23 41
N2 VSS VSS AC14
41 21 CLK_BBPMU_TO_XCVR_38MHZ H13 FSYS_CLK
GPO5 AA12 N10 VSS VSS AC20
NC
V9 TCKC GPO6 AB11
NC
NC
T9 TMSC GPO7 AC12
NC XCVR RFFE DAMPING RESISTORS
41 23 90_DIGRF_HI_RX1_P A8 MPHY2_RX1_DAT MRFFE_VIO K11 PP_1V8_VIO PP_1V8_VIO-10[I120] 16 30 33 34 35 36 41
42
41 23 90_DIGRF_HI_RX1_N B7 MPHY2_RX1_DATX MRFFE1_SDATA N12 XCVR_TO_BB_RFFE_DATA 23 41
R1820_K
A10 M11 1
20.0 2
41 23 90_DIGRF_HI_RX2_P MPHY2_RX2_DAT MRFFE1_SCLK XCVR_TO_BB_RFFE_CLK 23 41 42 41 36 35 34 33 27 XCVR_TO_FE_RX_RFFE_DATA SHIELD_RFFE_RX_SDATA SHIELD_RFFE_RX_SDATA-10[I120] 16
1 C922_K
90_DIGRF_HI_RX2_N B9 MPHY2_RX2_DATX MRFFE2_SDATA R12 SHIELD_RFFE_TX_SDATA 5%
41 23
1000PF SHIELD_RFFE_TX_SDATA-10[I120]
16 30 33 37 41 1/32W
41 23 90_DIGRF_HI_RX3_P D9 MPHY2_RX3_DAT MRFFE2_SCLK T13 SHIELD_RFFE_TX_SCLK 10% SHIELD_RFFE_TX_SCLK-10[I120] 16 30 33 37 41 MF
C8 V13 2 10V
X5R 01005
41 23 90_DIGRF_HI_RX3_N MPHY2_RX3_DATX MRFFE3_SDATA XCVR_TO_FE_RX_RFFE_DATA 27 33 34 35 36 41 42 01005
90_DIGRF_HI_RX4_P A12 MPHY2_RX4_DAT MRFFE3_SCLK T11 XCVR_TO_FE_RX_RFFE_CLK XCVR
41 23 27 33 34 35 36 41 42
R1821_K
A 41 23 90_DIGRF_HI_RX4_N B11
D7
MPHY2_RX4_DATX MRFFE4_SDATA W12
V11
NC 42 41 36 35 34 33 27 XCVR_TO_FE_RX_RFFE_CLK 1
20.0 2
SHIELD_RFFE_RX_SCLK SHIELD_RFFE_RX_SCLK-10[I120] 16 A
NCMAYBE ADD TEST POINTS
41 23 90_DIGRF_HI_TX_P MPHY2_TX_DAT MRFFE4_SCLK
5% PAGE TITLE
90_DIGRF_HI_TX_N C6 MPHY2_TX_DATX 1/32W
41 23
SRFFE_VIO H9 PP_1V8_BB_MASTER_IO 23 41 MF
01005
XCVR: INTERFACE & PWR
41 23 90_DIGRF_LO_RX_P C14 MPHY1_RX_DAT SRFFE1_SDATA K7 BB_TO_XCVR_RFFE_DATA 23 41 DRAWING NUMBER SIZE

41 23 90_DIGRF_LO_RX_N D13 MPHY1_RX_DATX SRFFE1_SCLK K9 BB_TO_XCVR_RFFE_CLK 23 41


1 051-02695 D
41 23 90_DIGRF_LO_TX_P C12 MPHY1_TX_DAT SRFFE2_SDATA N8
NC
C923_K
1000PF
Apple Inc. REVISION

41 23 90_DIGRF_LO_TX_N D11 MPHY1_TX_DATX SRFFE2_SCLK M9


NC
10%
2 10V
4.0.0
X5R NOTICE OF PROPRIETARY PROPERTY: BRANCH
01005
XCVR THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
12 OF 27
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST IV ALL RIGHTS RESERVED 27 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

XCVR: PRIMARY/DIVERSITY RX
C1000_K
2.7PF
1 2 50_WIFI_LAA_LAT_TO_XCVR_PRX 42

+/-0.1PF 1 FROM WLAN


16V
NP0-C0G
01005-1
XCVR L1000_K C1001_K
0.4NH-+/-0.1NH-1.0A-0.03OHM 2.7PF
1 2
D
01005
XCVR
50_WIFI_LAA_UAT_TO_XCVR_DRX 42
D
33 2
+/-0.1PF
16V
1 FROM WLAN
NP0-C0G
01005-1
1 XCVR L1001_K
0.4NH-+/-0.1NH-1.0A-0.03OHM
01005
L1002_K XCVR
0.7NH-+/-0.1NH-0.9A-0.05OHM
01005 2
XCVR

2
50_XCVR_RD2_MB_HB_UHB_DRX 35

10 16

1 L1003_K
0.9NH-+/-0.1NH-0.9A-0.05OHM
01005
XCVR
L1004_K
0.7NH-+/-0.1NH-0.9A-0.05OHM 2
01005
XCVR

2
50_XCVR_LMB_MB_HB_DRX 35

SMARTI7 PRX (5/7) SMARTI7 DRX (6/7) 1

50_COUPLER2_OUT IN 37
L1005_K
U_XCVR_K 0.9NH-+/-0.1NH-0.9A-0.05OHM
U_XCVR_K 10 16
01005
PMB5762-A2
PMB5762-A2 1 XCVR
UFWLB UFWLB
C SYM 5 OF 7
TIE L2 TO SYSTEM GND PLANE.
DO NOT TIE TO SURFACE GND.
SYM 6 OF 7
RD1 J22 50_RD1_LAA_DRX
2 C
XCVR FBR1 K1 L1006_K XCVR H23
0.7NH-+/-0.1NH-0.9A-0.05OHM RD2
FBR2 M1 NC G22
01005 RD3
VSS_SHIELD_FBR_1 L2 XCVR E22
RD4 50_XCVR_HB_DRX 35

2 RD5 D23
RX1 P23 50_RX1_LAA_PRX 1
RD6 C22
RX2 R22 50_XCVR_UHB_PRX
RD7 B23
RX3 T23 50_PRX_HB2_PAD_LHB_SDR_IN_XCVR L1007_K
RD8 A22
RX4 U22 50_PRX_HB1_PAD_HB_SDR_IN_XCVR 0.8NH-+/-0.1NH-0.9A-0.05OHM
RDM1 K23 01005
RX5 W22 10 16 XCVR
RDM2 L22
RX6 Y23 50_PRX_MB2_PAD_MB_B_SDR_IN_XCVR
1 2
RX7 AA22 50_PRX_LB_PAD_LB2_SDR_IN_XCVR
RX8 AB23 50_RX8_MLB_PRX
AC22 L1008_K
RX9 50_PRX_MB1_PAD_MB_A_SDR_IN_XCVR
1.2NH-+/-0.1NH-0.80A S7 PORT MAP CHANGE 10/11/2016: 50_XCVR_LB_DRX 34
RXM1 N22 50_XCVR_RXM1_MB_HB_UHB_PRX 01005 USE RD6 INSTEAD OF RD3.
RXM2 M23 XCVR CONNECT ALL UNUSED RD PORTS TO GND. 1

2
L1009_K
2.2NH-+/-0.1NH-0.50A
01005
CONNECT ALL UNUSED RX PORTS TO GND. 10 16 XCVR
1 2

L1010_K
1.2NH-+/-0.1NH-0.80A 50_XCVR_RDM1_MB_HB_UHB_DRX 36
01005
XCVR 1

B 2
L1011_K
B
0.9NH-+/-0.1NH-0.9A-0.05OHM
01005
XCVR

2
10 16

L1012_K
2.0NH-+/-0.1NH-0.70A
01005
XCVR

33

L1013_K
2.0NH-+/-0.1NH-0.70A
01005
XCVR

A 36 A
PAGE TITLE
1
XCVR: PRX DRX
DRAWING NUMBER SIZE
L1014_K
0.9NH-+/-0.1NH-0.9A-0.05OHM 051-02695 D
01005 Apple Inc. REVISION
XCVR
4.0.0
2 NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
13 OF 27
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET

IV ALL RIGHTS RESERVED 28 OF 47


8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

KAROO CONFIG

D D

BOOTCFG
BOOTSTRAPS ARE INTERNALLY PULLED DOWN
HW_MON1 HW_MON2 TRIG_IN
PERST_L
NAND 0 0 1
FLASHLESS 1 0 1 PERST_L SIGNAL LOW WILL KEEP BB IN RESET.
FLASHLESS WDOG DIS 1 1 0 PP_1V85_SMPS6_IO
39 29 27 25 23 22 21
NAND (NON-SECURE) 1 1 1
1BASEBAND
R607_K
39 29 27 25 23 22 21 PP_1V85_SMPS6_IO 10K
1%
1 1 1 1/32W
R604_K R605_K R606_K MF
1.00K 1.00K 1.00K 2 01005
NOSTUFF
1% 1% 1% 41 23 16 10 PCIE_AP_TO_BB_PERST_L
1/32W 1/32W 1/32W
C MF
2 01005
BASEBAND
MF
2 01005
BASEBAND
MF
2 01005
BASEBAND
STUFF PU WHEN AP IS NOT CONNECTED C
24 HW_MON1 NOSTUFF (KAROO CONFIG: USB BOOT)
24 HW_MON2
24 TRIG_IN

THESE DON'T CHANGE FOR KAROO CONFIG MLBS, DEV ONLY

DEFAULTS SET TO AP/FLASHLESS BOOT

JTAG_RESET_L SWD ENABLE


TO ENABLE SWD, JTAG_TRST_L MUST BE PULLED HIGH TO ENABLE SWD, STUFF R620_K
39 29 27 25 23 22 21 PP_1V85_SMPS6_IO R620_K
0.00 2
B 1BASEBAND
R1100_K
16 10 SWD_AOP_TO_MANY_SWCLK 1
0%
SWD_JTAG_TCK_SWDCLK_R 24 41
B
1.00K 1/32W
5% MF
1/32W 01005
MF
01005
2NOSTUFF
24 BB_JTAG_TRST_L

STUFF PU WHEN USING JTAG NOSTUFF WITH PROD FUSED BB

HW BUG IN BASEBAND A/B SILICON, FIXED IN C SILICON


NOSTUFF, STARTING AT EVT

A A
PAGE TITLE

HW CONFIG OPTIONS
DRAWING NUMBER SIZE

051-02695 D
Apple Inc. REVISION

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
14 OF 27
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
IV ALL RIGHTS RESERVED 29 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

ET MODULATOR

D D

ALPES STX QM81019 E1.0.1 MODULE


42 41 22 16 10
PP_VDD_MAIN

1 C1208_K 1 C1200_K 1 C1203_K XW1201_K


100PF 10UF 100PF SHORT-10L-0.1MM-SM
5% 20% 5% 1 2
2 50V
C0G 2 10V
X5R-CERM 2 50V
C0G C1204_K C1205_K C1206_K
0201 0402-1 0201 ET
2.2UF 2.2UF 2.2UF
ET ET ET XW1200_K 1 2 1 2 ET_STX_VPARAMP 1 2 PP_ET_PA
SHORT-10L-0.1MM-SM PP_ET_PA-10[I120] 16 33
1 2 PP_VDD_ET_STX
10% 10% 10%
ET 10V 10V 10V

ET_STX_E1

ET_STX_D1

ET_STX_A2

ET_STX_A3
CER-X7S CER-X7S CER-X7S
C XW1202_K
SHORT-10L-0.1MM-SM
0402
ET
0402
ET
0402
ET
C
1 2
C1209_K
ET 4UF
30 STX_SW1 1 2

USID=0XC

C2
D2

D1

C1

A3

A4
F5
20%
6.3V
AVDD N1 N2 N3 N4 CERM-X5R
PVDD
VBATAMP B8 0201
ET
E5 U_ET2_K D8
NC TEST
QM81019M VCC_M E8 1
50_ET_DAC_P D5 ET_STX_VCCFB
C1207_K
41 26 VRAMP+ LGA 4.7UF
41 26 50_ET_DAC_N C5 VRAMP- VPARAMP G7 20%
ET F6 L1200_K 2 10V
X5R
SHIELD_RFFE_TX_SDATA D3 DATA VCCFB
2.2UH-20%-0.8A-0.216OHM 0402-1
41 37 33 27 16 SHIELD_RFFE_TX_SDATA-10[I120] G6 ET
41 37 33 27 16 SHIELD_RFFE_TX_SCLK-10[I120] SHIELD_RFFE_TX_SCLK E3 CLK ET_STX_LXA 2 1

42 41 36 35 34 33 27 16 PP_1V8_VIO-10[I120] PP_1V8_VIO E4 VIO G2 PSR20121T-SM ET


LXA G3
F8 SW1 L1201_K
30 STX_SW1 A2 1.0UH-20%-2.9A-0.075OHM
LXB B2 2 1
ET_STX_LXB PP_VDD_ET_2G 33
PIWA20121T ET
A6
LDO2G A7
GND

A1
A5
A8
B1
B3
B4
B5
B6
B7
C3
C4
C6
C7
C8
D4
D6
D7
E1
E2
E6
E7
F1
F2
F3
F4
F7
G1
G4
G5
G8
L1200_K APN=152S00811 Z=1.0MM
L1201_K APN=152S00814 Z=1.0MM
B B

STUFFED: C1204_K, C1205_K, C1206_K: KYOCERA APN=138S00167


ALTERNATE: C1204_K, C1205_K, C1206_K: MURATA APN=138S00237

A A
PAGE TITLE

ET
DRAWING NUMBER SIZE

051-02695 D
Apple Inc. REVISION

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
15 OF 27
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 30 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

LB SPAD

D D

C C

SEE MLB_LOFT

B B

A A
PAGE TITLE

LB SPAD
DRAWING NUMBER SIZE

051-02695 D
Apple Inc. REVISION

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
16 OF 27
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
IV ALL RIGHTS RESERVED 31 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

HB SPAD

D D

C C

SEE MLB_LOFT

B B

A A
PAGE TITLE

HB SPAD
DRAWING NUMBER SIZE

051-02695 D
Apple Inc. REVISION

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
17 OF 27
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 32 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

UHB LMB SPAD PP_VBATT_PA PP_VBATT_PA-10[I120] 16 22 37

1 C1501_K REMOVED C1502_K, 18PF


1.0UF
20% REMOVED C1500_K, 0.1UF
37 34 PP_1V8_VIO_TX 2 6.3V
X5R
0201-1 (BYPASS CAPS SHARED WITH LB PAD)
RADIO_UHB_PAD RADIO_UHB_PAD

D 1 C1503_K
SHIELD_RFFE_TX_SCLK
D
41 37 30 27 16 SHIELD_RFFE_TX_SCLK-10[I120]
18PF IN
5%
2 16V
CERM
01005 RADIO_UHB_PAD RADIO_UHB_PAD
SHIELD_RFFE_TX_SDATA R1502_K
37 30 27 16 SHIELD_RFFE_TX_SDATA-10[I120]
41 1 C1504_K IN
PP_VCC1_UHB_PA 0.00 2 PA_UHB_K
1 PP_ET_PA HRPDAF091
18PF PP_ET_PA-10[I120] 16 30
5% 0% LGA
2 16V
CERM 1
1/32W
A2 SYM 2 OF 2
01005 C1505_K MF
01005
GND
10PF 1 A4 RADIO_UHB_PAD
NOSTUFF 2% C1506_K GND
18PF OMIT_TABLE
2 25V
C0G-CERM 5%
A5 GND
01005 2 16V A6 GND
NOSTUFF CERM
01005 A7 GND GND E12
RADIO_UHB_PAD RADIO_UHB_PAD A8 F1
NOSTUFF GND GND
B1 GND GND F2
42 41 36 35 34 30 27 16 PP_1V8_VIO-10[I120] PP_1V8_VIO
PP_VDD_ET_2G 30 B2 GND GND F3
B3 GND GND F4
C1514_K 1 1 C1515_K
RADIO_UHB_PAD B4 GND GND F5
4UF 4UF
20% 20% B5 GND GND F6
1 C1508_K 6.3V 2 6.3V
42 41 36 35 34 27 XCVR_TO_FE_RX_RFFE_CLK CERM-X5R 2 CERM-X5R B6 GND GND F7
18PF 0201 0201
5% RADIO_UHB_PAD RADIO_UHB_PAD B7 GND GND F8
2 16V
CERM RADIO_UHB_PAD F9
01005 GND
1 C1509_K GND F10
18PF 36 35 34 27 XCVR_TO_FE_RX_RFFE_DATA PP_1V8_VBIAS_LNA PP_1V8_VBIAS_LNA-10[I120] 16 22 34 35 36 GND F11
5% 42 41
2 16V
CERM GND G2
01005 C2 GND GND G3
NOSTUFF RADIO_UHB_PAD
1 C1510_K C3 G4
GND GND

C12
D12
A12
A11
A10

B12
USID RX=0X0F

J12
H7

H6

A9
18PF

J7

J6
J4
C4 GND GND G5
5%
C 2 16V
CERM
C5 GND GND G6 C
USID TX=0X04

SDATA_RX
SCLK_RX
VIO_RX

SDATA_TX
SCLK_TX
VIO_TX

VBATT
VCC1

NC
NC
NC

VDD_LNA
VCC2
01005 C6 GND GND G7
GND G8
GND G9
GND G10
GND G11
R1500_K R1505_K
0.00 2 0.00 2 D1 GND GND H1
26 50_TX_MB3_MLB_2G 1 50_TX_MLB_2G_IN G12 TX_LMB_IN ANT_LMB A3 50_PAD_ANT_MLB1 1 50_PAD_MLB1_2G_HB_CPL2_IN 37
D2 GND GND H2
0% 1% TO COUPLER2
1 1/32W 1/20W D3 GND GND H3
NOSTUFF MF MF
01005 PA_UHB_K 0201 1 C1511_K D4 GND GND H4
RADIO_UHB_PAD HRPDAF091 RADIO_UHB_PAD 0.5PF D5 H5
L1500_K LGA +/-0.05PF GND GND
10NH-+/-3%-0.25A SYM 1 OF 2 2 16V D6 GND GND H8
01005 C0G-CERM
RADIO_UHB_PAD RADIO_UHB_PAD 01005 GND H9
OMIT_TABLE RADIO_UHB_PAD H10
GND
2 NOSTUFF H11
GND
GND J2
R1507_K E2 J3
R1506_K 1.2NH-+/-0.05NH-1.1A-0.04OHM GND GND
0.00 2 E3 GND GND J8
26 50_XCVR_TX_UHB 1 50_TX_UHB_IN F12 TX_UHB_IN ANT_UHB1 E1 50_PAD_ANT_UHB1 1 2 50_UHB_TRPL2 20
E4 GND GND J9
0% 0201 TO TRIPLEXER2
1/32W RADIO_UHB_PAD E5 GND GND J10
MF 1
01005 NOSTUFF 1 C1512_K E6 GND GND J11
RADIO_UHB_PAD 0.5PF E7 J5
0.05PF GND GND
L1501_K
10NH-+/-3%-0.25A 2 25V
NP0-C0G
01005 0201
RADIO_UHB_PAD RADIO_UHB_PAD
NOSTUFF
2

B B
R1509_K R1508_K
50_XCVR_TX_LB2
1
0.00 2 H12 C1 1
0.00 2
26 50_TX_2G_LB_IN NC ANT_UHB2 50_PAD_ANT_UHB2 50_UAT_TRX_UHB_MCS 37

0% 1% METROCIRC
2G TX INPUT 1/32W
1
1/20W
1
MF
01005
MF
0201
C1513_K
RADIO_UHB_PAD RADIO_UHB_PAD 0.5PF
0.05PF
L1503_K 2 25V
NP0-C0G
10NH-+/-3%-0.25A 0201
01005 RADIO_UHB_PAD
RADIO_UHB_PAD
NOSTUFF
NOSTUFF
2

50_RX8_MLB_PRX C7 G1
28 OUT LMB_RX_OUT NC 50_UHBPAD_2G_LB_CPL2_IN 37

50_XCVR_UHB_PRX D7
28 OUT UHB_RX_OUT

50_CPL3_OUT_CPL2_IN
37 A1 CPL_OUT
OUT
TO COUPLER2

NC J1 50_UHBPAD_2G_MB_CPL2_IN 37

A A
PAGE TITLE

UHB LMB SPAD


DRAWING NUMBER SIZE

051-02695 D
Apple Inc. REVISION

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
18 OF 27
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
IV ALL RIGHTS RESERVED 33 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

LB DIVERSITY RECEIVE LNA

D D

USID RX=0X09
FL1700_K
PP_1V8_LBDSM_RFFE_IO_FILT 1
0.00 2
34 PP_1V8_VDD_LNA_LBDSM PP_1V8_VBIAS_LNA PP_1V8_VBIAS_LNA-10[I120] 16 22 33 35 36

34
RFFE_RX_CLK_FILT 0%
1/32W
34
RFFE_RX_DATA_FILT MF
1 C1700_K 01005
47PF LB_DSM
5%
2 16V
NP0-C0G
01005
LB_DSM

SDATA 14
SCLK 15
VIO 13

VDD 12
DSM_LB_K
SKY13765
BGA
50_TRX_LB_MCL
SYM 1 OF 2 DRX_LB_IN1 4 37

LB_DSM METROCIRC
OMIT_TABLE
C C
DSM_LB_K
SKY13765
BGA
1 SYM 2 OF 2
3 LB_DSM
5 OMIT_TABLE
R1701_K 6
0.00 2 50_DRX_LB_MCL
28 50_XCVR_LB_DRX 1 50_DRX_LB_OUT_MATCH 9 DRX_LB_OUT DRX_LB_IN2 2 37 7
0% METROCIRC 8
1/32W GND
MF 1 10
01005
11
LB_DSM 16
L1701_K
4.7NH-3%-0.270A 17
01005
NOSTUFF 18
LB_DSM 20
2

DRX_LB_IN3 19 50_DSM_TRX_LB_IN_TRIPLEX1 38

TO TRIPLEXER1 (ANT2)

B B

RFFE FILTERING
R1704_K
1
0.00 2
42 41 36 35 33 30 27 16 PP_1V8_VIO-10[I120] PP_1V8_VIO PP_1V8_LBDSM_RFFE_IO_FILT 34

0%
1/32W
MF
C1701_K 1 01005
0.1UF RFFE
20%
6.3V
X5R-CERM 2
01005 R1705_K
RFFE 0.00 2
NOSTUFF 1 PP_1V8_VIO_TX 33 37

0%
1/32W
MF
01005
RFFE

R1707_K
1
0.00 2
42 41 36 35 33 27 XCVR_TO_FE_RX_RFFE_DATA RFFE_RX_DATA_FILT 34

0%
C1702_K 1 1/32W
MF
0.1UF 01005
20% RFFE
6.3V 2
A X5R-CERM
01005
RFFE
A
NOSTUFF PAGE TITLE

R1708_K
0.00 2
LB DIVERSITY RECEIVE LNA
42 41 36 35 33 27 XCVR_TO_FE_RX_RFFE_CLK 1 RFFE_RX_CLK_FILT 34 DRAWING NUMBER SIZE

1
0% 051-02695 D
C1703_K
0.1UF
1/32W
MF Apple Inc. REVISION
01005
20%
6.3V 2 RFFE 4.0.0
X5R-CERM NOTICE OF PROPRIETARY PROPERTY: BRANCH
01005
RFFE THE INFORMATION CONTAINED HEREIN IS THE
NOSTUFF PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
19 OF 27
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
IV ALL RIGHTS RESERVED 34 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

HB DIVERSITY RECEIVE LNA


XCVR_TO_FE_RX_RFFE_DATA 27 33 34 36 41 42

XCVR_TO_FE_RX_RFFE_CLK 27 33 34 36 41 42

R1800_K
DECOUPLING SHARED WITH LB DSM PP_1V8_HB_LB_DSM_IO_FILT 1
0.00 2
PP_1V8_VIO PP_1V8_VIO-10[I120] 16 27 30 33 34 36 41 42
1 C1800_K 0%
47PF 1/32W
5% MF
2 16V 1
D NP0-C0G
01005
C1801_K
0.1UF
01005
HB_DSM R1801_K D
HB_DSM 20% 0.00 2 PP_1V8_VBIAS_LNA
2 6.3V
X5R-CERM PP_1V8_VDD_LNA_HBDSM 1 PP_1V8_VBIAS_LNA-10[I120] 16 22 33 34 36
NOSTUFF 01005 0%
HB_DSM 1/32W
MF
1 C1802_K 01005

SDATA 30
SCLK 29
VIO 28

VDD 27
0.1UF HB_DSM
20%
2 6.3V
X5R-CERM
01005
HB_DSM
USID RX=0X0A
R1803_K
R1802_K 3.1NH-+/-0.1NH-0.5A-0.17OHM
50_XCVR_LMB_MB_HB_DRX
1
0.00 2 50_DRX_HB_OUT1_MATCH 4 21 50_DRX_HB_IN1_MATCH 1 2
28 DRX_HB_OUT1 DRX_HB_IN1 50_TRX_HB_MCL 37

TO STRIPLINE 0% 0201 METROCIRC


1/32W HB_DSM
MF DSM_HB_K 1
01005 SKY13768
HB_DSM 1 LGA 1 L1802_K
L1800_K 0.8PF
SYM 1 OF 2 4.7NH-3%-0.35A-0.35OHM +/-0.05PF
L1801_K 01005 2 16V
C0G-CERM
4.7NH-3%-0.270A NOSTUFF 01005
01005 HB_DSM HB_DSM DSM_HB_K
2 SKY13768
NOSTUFF
LGA
2 HB_DSM
C1803_K SYM 2 OF 2
50_DRX_HB_OUT2_MATCH 6 24 50_DSM_HB_IN_DRX_MLB_MBHB_MCU_MATCH 1
0.00 2 50_DRX_HB_MCL
DRX_HB_OUT2 DRX_HB_IN2 37
1 GND
1% METROCIRC
1/20W 2 GND
1 MF 1
0201 5 GND
7 GND
C L1803_K
4.7NH-3%-0.35A-0.35OHM
L1805_K
4.7NH-3%-0.35A-0.35OHM
9 GND
C
01005 01005 13 GND
NOSTUFF NOSTUFF 15 GND
HB_DSM HB_DSM 17
2 2 GND
18 GND
23 GND
R1805_K
50_XCVR_RD2_MB_HB_UHB_DRX 0.00 2 25 GND
28 1 8 DRX_HB_OUT3 DRX_HB_IN3 22 50_DSM_HB_IN_TRIPLEX1 38
26 GND
0% TO TRIPLEXER1 (ANT2)
STRIPLINE 1/32W
MF
01005 1

HB_DSM
L1804_K
4.7NH-3%-0.270A
01005
NOSTUFF
2 HB_DSM

R1810_K
3 20 50_HB_DSM_HB_IN4 1
0.00 2
DRX_HB_OUT4 DRX_HB_IN4 50_HB_DSM_HB_IN4_TRIPL2 20
NC
1% TO TRIPLEXER2 (ANT4)
1/20W
MF 1
0201
HB_DSM
L1808_K
18NH-3%-0.16A-1.63OHM
01005
HB_DSM

2
B B
DRX_HB_IN5 19 50_DSM_MM2_MHB_IN5 36

TO MIMO RDM (DSM_MM2_K)


R1808_K
50_XCVR_HB_DRX
1
0.00 2
28 50_DRX_HB_OUT3_MATCH
STRIPLINE 0%
1/32W
MF
01005
1
HB_DSM

L1806_K
4.7NH-3%-0.270A
01005
NOSTUFF 14
DRX_UHB_IN2 50_UAT_TRX_UHB_MCS 37
HB_DSM
2 METROCIRC

R1914_K
1.0NH-+/-0.1NH-0.9A-0.05OHM
DRX_UHB_IN3 16 50_DSM_HB_IN_TRX_UHB 1 2 50_DSM_MM2_UHB_TRIPL2 20

A 1
01005
MIMO_RDM
TO TRIPLEXER2
A
PAGE TITLE

L1908_K
HB DIVERSITY RECEIVE LNA
DRAWING NUMBER SIZE
10NH-+/-3%-0.25A
01005 051-02695 D
MIMO_RDM
NOSTUFF
Apple Inc. REVISION

2 4.0.0
GPO1 10 NOTICE OF PROPRIETARY PROPERTY: BRANCH
NC
GPO2 11 THE INFORMATION CONTAINED HEREIN IS THE
NC PROPRIETARY PROPERTY OF APPLE INC.
GPO3 12 THE POSESSOR AGREES TO THE FOLLOWING: PAGE
NC
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
20 OF 27
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
IV ALL RIGHTS RESERVED 35 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

MIMO RECEIVE LNAS PP_1V8_VDD_LNA_DSM_MM1


FL1900_K
1
0.00 2
0%
PP_1V8_VBIAS_LNA PP_1V8_VBIAS_LNA-10[I120] 16 22 33 34 35 36

1/32W
MF
1 C1906_K 01005
47PF MIMO_RPM R1913_K
5% 0.00 2
2 16V
NP0-C0G
50_DRX_MIMO1_UHB_MATCH 1 50_MIMO_TRPL4 37
01005 1% TO TRIPLEXER4 (ANT1)
USID RX=0X3 (MIMO RPM) MIMO_RPM 1/20W
MF
0201

11
1 MIMO_RPM
L1906_K
D VDD 0.3PF
+/-0.05PF
D
2 16V
C0G-CERM
DSM44L_K 01005
HFQRXRCJB-500 MIMO_RPM
LGA NOSTUFF
MIMO_RPM
R1907_K
50_XCVR_RXM1_MB_HB_UHB_PRX 0.00 2 50_PRX_MIMO1_HB_OUT1 8 DRX_MIMO_OUT
28 1 UHB_MIMO_IN 18 R1911_K
STRIPLINE 0%
MHB_MIMO_IN 20 50_PRX_MIMO1_MHB_MATCH 1
0.00 2
1/32W 50_DSM_MM1_MHB_IN 37
MF 1
01005 0% TO COUPLER2
MIMO_RPM 12 VIO SDATA 13 1/32W
1 MF
L1900_K 01005
4.7NH-3%-0.270A SCLK 14 MIMO_RPM
01005 L1904_K
NOSTUFF ID_SEL 15 4.7NH-3%-0.270A
MIMO_RPM 01005
2 NOSTUFF
GND
MIMO_RPM
20

19
17
16
10
9
7
6
5
4
3
2
1
XCVR_TO_FE_RX_RFFE_DATA 27 33 34 35 36 41 42

1 C1900_K
47PF XCVR_TO_FE_RX_RFFE_CLK 27 33 34 35 36 41 42
5%
C ID_SEL = 0, MIMO RPM 2 16V
NP0-C0G
01005 1 R1904_K
C
C1902_K
MIMO_RPM 47PF PP_1V8_DSM_MM1_IO_FILT 0.00 2
ID_SEL = 1, MIMO RDM NOSTUFF 5%
2 16V
NP0-C0G
1
0%
PP_1V8_VIO PP_1V8_VIO-10[I120] 16 27 30 33 34 35 36 41 42

01005 1/32W
1 C1904_K MF
MIMO_RPM 01005
47PF MIMO_RPM
NOSTUFF 5%
2 16V
NP0-C0G
01005
MIMO_RPM
NOSTUFF

R1906_K
1
0.00 2
PP_1V8_VDD_LNA_DSM_MM2 PP_1V8_VBIAS_LNA PP_1V8_VBIAS_LNA-10[I120] 16 22 33 34 35 36

0%
1/32W
MF
1 C1907_K 01005
47PF
5%
2 16V
NP0-C0G
01005
USID RX=0X4 (MIMO RDM) MIMO_RDM

11
B VDD
B
DSM44U_K 50_DSM_MIMO2_UHB_MATCH 20

HFQRXRCJB-500 TO DIPLEXER3
LGA
MIMO_RDM
R1908_K
50_XCVR_RDM1_MB_HB_UHB_DRX 0.00 2 50_DRX_MIMO2_HB_OUT1 8 DRX_MIMO_OUT
28 1 UHB_MIMO_IN 18 R1912_K
STRIPLINE 0%
MHB_MIMO_IN 20 50_DRX_MIMO2_MHB_MATCH 1
0.00 2
1/32W 50_DSM_MM2_MHB_IN5 35
MF 1
01005 0% TO HB DSM
MIMO_RDM 12 VIO SDATA 13 1/32W
1 MF
L1901_K 01005
4.7NH-3%-0.270A SCLK 14
01005 L1905_K
NOSTUFF ID_SEL 15 4.7NH-3%-0.270A
MIMO_RDM 01005
2 NOSTUFF
GND
MIMO_RDM
2
19
17
16
10
9
7
6
5
4
3
2
1

XCVR_TO_FE_RX_RFFE_DATA 27 33 34 35 36 41 42

XCVR_TO_FE_RX_RFFE_CLK 27 33 34 35 36 41 42

A R1905_K
0.00 2
A
PP_1V8_DSM_MM2_IO_FILT 1 PP_1V8_VIO PAGE TITLE
PP_1V8_VIO-10[I120] 16 27 30 33 34 35 36 41 42

0%
1/32W
MIMO RECEIVE LNAS
MF DRAWING NUMBER SIZE
01005
1 C1905_K MIMO_RDM 051-02695 D
47PF
5%
Apple Inc. REVISION

2 16V
NP0-C0G 4.0.0
01005 NOTICE OF PROPRIETARY PROPERTY: BRANCH
MIMO_RDM
THE INFORMATION CONTAINED HEREIN IS THE
NOSTUFF PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
21 OF 27
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 36 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

COUPLER & LOWER ANTENNA R2020_K


10-OHM-1.1A
1 2
34 33 PP_1V8_VIO_TX
01005
PP_1V8_VIO_CPLR
USID TX=0X06 CPL_K
SKY13775
1 C2001_K LGA
47PF SYM 2 OF 2
5% 4
PP_VBATT_PA
2 16V
NP0-C0G
PP_VBATT_PA-10[I120] 16 22 33
6
01005 9
C2000_K
D 41 33 30 27 16 SHIELD_RFFE_TX_SCLK-10[I120] SHIELD_RFFE_TX_SCLK
RADIO_CPL2 1 C2002_K
0.1UF
20%
1

5%
47PF METROCIRC REPLACEMENT 10
11
D
6.3V 2 16V
41 33
16 SHIELD_RFFE_TX_SDATA-10[I120]
30 27
SHIELD_RFFE_TX_SDATA
2 X5R-CERM
01005
NP0-C0G
01005 (CPL2 END) (DSM END) 12
14
RADIO_CPL2 RADIO_CPL2 37 50_DRX_LB_MCL 50_DRX_LB_MCL 34
1 C2003_K 15

2
1
3

8
47PF 1 C2004_K 37 50_DRX_HB_MCL 50_DRX_HB_MCL 35
16
5%
2 16V 47PF R2000_K 17

RFFE_DAT
RFFE_CLK
VIO

VDD
NP0-C0G 5% 0.00 2 33 50_UAT_TRX_UHB_MCS 50_UAT_TRX_UHB_MCS 35
01005 2 16V DRX_LB_OUT 7 50_CPL2_DRX_LB 1 50_DRX_LB_MCL 37
19
NOSTUFF NP0-C0G GND
01005 0% METROCIRC 37 50_TRX_HB_MCL 50_TRX_HB_MCL 35
20
RADIO_CPL2 NOSTUFF 1/32W
MF 25
RADIO_CPL2 01005 1 C2005_K 37 50_TRX_LB_MCL 50_TRX_LB_MCL 34
RADIO_CPL2 26
1.3PF
+/-0.05PF 28
16 10 50_PAD_ANT_LB_CPL2_IN 23 TRX_LB_IN 2 16V
C0G 29
CPL_K 01005
SKY13775 RADIO_CPL2 30
LGA NOSTUFF 32
R2002_K SYM 1 OF 2 34
0.00 2
16 10 50_LBPAD_2G_OUT_CPL2_IN_JPN 1 TRX_LB_UAT 5 50_TRX_LB_MCL 37
37
1% METROCIRC 40
1/20W
MF 42
0201
RADIO_CLP2
OMIT_TABLE

R2003_K R2016_K
1
0.00 2 50_CPL2_2GLB 1
0.00 2 22 TX_2GLB
33 50_UHBPAD_2G_LB_CPL2_IN 50_CPL2_TX_2GLB
1% 1%
1/20W 1/20W
MF 1 MF
0201 0201
RADIO_CLP2 RADIO_CLP2
C OMIT_TABLE
L1300_K C
TRX_LB_LAT 13
LB-MHB-UHB TRIPLEXER4 (ANT1)
2
10NH-3%-250MA
0201
RADIO_CLP2
NOSTUFF
50_TRX_LB_LAT_DIPLEXER_IN

TPLX4_K
ANT1
TPX253600MT-7039C1SJ R2005_K
LB 5 TRIPLEXER 7 50_LB_MLB_MB_HB_UHB_MATCH 1
0.00 2
LB ANT 37 50_LB_MLB_MB_HB_UHB_ANT1
19
16 10 50_PAD_ANT_HB_CPL2_IN 31 TRX_HB1_IN LGA
RADIO_CPL2 1%
3 LMB/MB/HB 1/20W
MF
LMB/MB/HB 1 0201
R2006_K 1 UHB RADIO_CLP2 1 C2008_K
R2015_K 1.3NH+/-0.1NH-1.1A GND 1.3PF
0.00 2 L2003_K +/-0.05PF
33 50_UHBPAD_2G_MB_CPL2_IN 1 TRX_HB_LAT 35 50_TRX_HB_LAT 1 2 50_TRX_HB_LAT_DIPLEXER_IN
10NH-3%-0.170A
16V
2 C0G

2
4
6
8
9
1% 0201 01005 01005
1/20W 1 RADIO_CPL2 RADIO_CPL2
MF NOSTUFF NOSTUFF
0201 1 C2009_K
RADIO_CLP2 50_MIMO_TRPL4 2
OMIT_TABLE L2004_K 1.3PF 36
+/-0.05PF MIMO
R2017_K 10NH-3%-0.170A 16V
2 C0G
1.0NH-+/-0.05NH-1.1A-0.04OHM 01005
R1403_K 01005
0.00 250_CPL2_2GHB_MATCH NOSTUFF RADIO_CPL2
16 10 50_HBPAD_2G_OUT_CPL2_IN_JPN 1 1 2 50_CPL2_2GHB 36 TX_2GHB RADIO_CPL2
2 NOSTUFF
1% 0201
1/20W RADIO_CPL2
MF 1
0201
RADIO_CLP2 1
OMIT_TABLE
L2101_K
6.8NH-3%-0.3A-0.4OHM TRX_HB_UAT 41 50_TRX_HB_MCL 37
L2100_K 01005 METROCIRC
50_LB_MLB_MB_HB_UHB_MATCH 50_LB_MLB_MB_HB_UHB_MATCH37
10NH-3%-0.170A MAKE_BASE=TRUE
RADIO_CPL2
01005
RADIO_CPL2
2
ALIAS FOR LAYOUT PURPOSES
B 2 B
NOTCH

C1609_K 1 39 TRX_LMB_IN
0.3PF
+/-0.05PF
16V
C0G-CERM 2
01005
RADIO_CLP2
DRX_HB_OUT 21 50_DRX_HB_MCL 37
METROCIRC

33 50_PAD_MLB1_2G_HB_CPL2_IN

16 10 50_TDD_PAD_ANT_HB_CPL2_IN 38 TRX_HPUE_IN

TRX_HB_ANT2 33 50_CPL2_HB_ANT3 20
TO DIPLEXER2

R2011_K
1
0.00 2 24 CPL_IN
33 50_CPL3_OUT_CPL2_IN 50_CPL3_IN
A 0%
1/32W
MF
A
01005 PAGE TITLE
RADIO_CPL2
COUPLER + LOWER ANTENNA
RX_HB_IN 27 50_DSM_MM1_MHB_IN 36 DRAWING NUMBER SIZE
CPL_OUT1

28
50_COUPLER2_OUT 051-02695 D
Apple Inc. REVISION

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
18

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
22 OF 27
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
IV ALL RIGHTS RESERVED 37 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

UPPER ANTENNA FEEDS

D D

LB/MHB/GPS TRIPLEXER1 50_LB_GNSS_MB_HB_MATCH


MAKE_BASE=TRUE
50_LB_GNSS_MB_HB_MATCH 38

R2302_K
4.7NH-3%-0.35A-0.35OHM ALIAS FOR LAYOUT PURPOSES
34 50_DSM_TRX_LB_IN_TRIPLEX1 1 2 50_UUAT_LB_PLEXER_K
01005
1 C2300_K TPLX1_K
1.2PF ACFM-1312-AP1
2 16V
+/-0.05PF
NP0-C0G-CERM
01005
7 LB
LGA
FOR ESD AND LOW FREQUENCY IMD

L2300_K
ANT2
1 GNSS 4 1
0.00 2 50_LB_GNSS_LMB_MBHB_ANT2
ANT
38 50_LB_GNSS_MB_HB_MATCH 19
R2303_K 1%
1
0.00 2 10 MH 1
1/20W
35 50_DSM_HB_IN_TRIPLEX1 50_UUAT_MB_HB_PLEXER_K MF
0201
1% GND
1/20W UP_RFFE 1 C2302_K
1 MF L2301_K 0.6PF

2
3
5
6
8
9
11
12
13
0201
UP_RFFE 11NH-3%-0.25A-0.8OHM +/-0.05PF
01005 2 16V
CERM
L2302_K UP_RFFE 01005
12NH-3%-0.23A-0.82OHM NOSTUFF
01005 1 2 UP_RFFE
UP_RFFE NOSTUFF
NOSTUFF
2 L2304_K
18NH-3%-0.16A-1.63OHM
C R2306_K 01005
NOSTUFF
C
50_GNSS_QPLEX 1
0.00 2
38 50_GNSS_PLEXER_K UP_RFFE
2
TO CELL: GNSS 0%
1/32W 50_GPS_NOTCH
MF
01005
1 UP_RFFE
1 C2307_K
2.2PF
C2304_K +/-0.1PF
10NH-+/-3%-0.25A 2 16V
NP0-C0G
01005 01005
UP_RFFE NOSTUFF
UP_RFFE
2

L2303_K
FERR-150OHM-25%-200MA
PP_1V8_LDO9_GNSS 1 2
22 PP_1V8_VDD_GLNA
01005
UP_RFFE
1 C2303_K
0.1UF
B 2 6.3V
20% B
X5R-CERM
01005
UP_RFFE

4
VCC
R2305_K LNAGPS_K
2.5PF SKY65795
50_GNSS_SAW 1 2 50_GNSS_OUT_MATCH 1 RFOUT 7 50_GNSS_QPLEX
26 LGA RFIN 38

+/-0.1PF LNA_EN 5
16V
NP0-C0G GND
1 01005
UP_RFFE

9
8
6
3
2
L2305_K
1.0NH+/-0.1NH-0.580A
01005
NOSTUFF
UP_RFFE
2

A A
PAGE TITLE

UPPER ANTENNA FEEDS


DRAWING NUMBER SIZE

051-02695 D
Apple Inc. REVISION

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
23 OF 27
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 38 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

SIM2_CLK SIM2_CLK

ESIM
41 40 23 39
MAKE_BASE=TRUE
41 40 23 SIM2_DATA SIM2_DATA 39
MAKE_BASE=TRUE
41 40 23 SIM2_RST SIM2_RST 39
MAKE_BASE=TRUE
41 40 23 SIM2_DETECT SIM2_DETECT 39
MAKE_BASE=TRUE
41 40 25 22 PP_VDD_SIM2 PP_VDD_SIM2 39
MAKE_BASE=TRUE
41 SIM2_DATA_R SIM2_DATA_R 39
MAKE_BASE=TRUE
D D

VINYL
APN: 998-14441
NJ0, BIRCH 4.0 DEV 2

39 PP_VDD_SIM2

1 C10_SIM
2.2UF 1
R12_SIM

A1
20%
2 6.3V
X5R-CERM 4.7K
0201 VCC 1%
1/32W
MF
U_SIM 2 01005
VINYL
ST33G1M2STL9ENJ0 OMIT_TABLE
39 SIM2_CLK D1 CLK WLCSP GPIO0 A2
NC
39
SIM2_RST D2 RST OMIT_TABLE GPIO1 B1
NC
B3 SWP GPIO2 D3
NC NC
C GPIO3 C1
NC
R13_SIM
C
B2 NC
0.00 2
NC IO0 C3 39 SIM2_DATA_R 1 SIM2_DATA 39
GND 0%
1/32W

A3
MF
01005
VINYL

29 27 25 23 22 21 PP_1V85_SMPS6_IO
ESIM DETECT
BASEBAND
1
R10_SIM
100K
B 5%
1/32W
MF
B
01005 2
OMIT_TABLE
ESIM = STUFF PU SIM2_DETECT 39
NO ESIM = STUFF PD
BASEBAND
1
R11_SIM
100K
5%
1/32W
MF
01005 2
OMIT_TABLE

A A
PAGE TITLE

SIM: ESIM
DRAWING NUMBER SIZE

051-02695 D
Apple Inc. REVISION

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
24 OF 27
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 39 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

PSIM 41 23

41 23

41 23

41 23

41 25 22
SIM1_CLK
MAKE_BASE=TRUE
SIM1_DATA
MAKE_BASE=TRUE
SIM1_RST
MAKE_BASE=TRUE
SIM1_DETECT
MAKE_BASE=TRUE
PP_VDD_SIM1
SIM1_CLK

SIM1_DATA

SIM1_RST

SIM1_DETECT

PP_VDD_SIM1
40

40

40

40

40
MAKE_BASE=TRUE

41 39 23 SIM2_CLK SIM2_CLK 40
MAKE_BASE=TRUE
D
D
ICE18.2 DUAL PHYSICAL SIM DUAL SIM DETECT 41 39 23

41 39 23
SIM2_DATA
MAKE_BASE=TRUE
SIM2_RST
MAKE_BASE=TRUE
SIM2_DATA

SIM2_RST
40

40

SINGLE SIM APN:512S00038 PP_VDD_SIM1 40


R24_SIM
41 39 23 SIM2_DETECT
MAKE_BASE=TRUE
SIM2_DETECT 40

DUAL SIM APN:512S00039 1


R21_SIM 1
PP_VDD_SIM2

R30_SIM
40
40 TOPPER_SIM_DETECT_RCPT 1
100 2
5%
SIM1_DETECT 40
41 39 25 22 PP_VDD_SIM2
MAKE_BASE=TRUE
PP_VDD_SIM2 40

4.7K 1
1/32W
1
1% 4.7K 2 C21_SIM MF R31_SIM
1/32W 1% DZ21_SIM 100PF 01005
0.00
MF 1/32W 5.5V-6.2PF 5%
2 01005
SIM
MF
0201 2 25V
0%
2 01005
SIM SIM C0G-CERM 1/32W
MF
01005 01005
1 SIM 2OMIT_TABLE
11 SIM_DETECT_SPG SIM_DETECT 6 TOPPER_SIM_DETECT_RCPT
J_SIM 40
SIM2_DETECT 40
SIM-DUAL-BUNK-D33
40 PSIM1_CLK_RCPT 2 CLK_A IO_A 1 PSIM1_DATA_RCPT 40
F-RT-SM
40 PSIM2_CLK_RCPT 7 CLK_B IO_B 14 PSIM2_DATA_RCPT 40
OMIT_TABLE
40 PSIM1_RST_RCPT 3 RST_A SWP_A 10 NC
40 PSIM2_RST_RCPT 5 RST_B SWP_B 13 NC
40 PP_VDD_SIM1 8 VCC_A

9 GND_A

12 GND_B
40 PP_VDD_SIM2 4 VCC_B
GND

15
16
17
18
19
20
21
22
23
24
25
26
C20_SIM 1 1 C22_SIM
2.2UF 2.2UF
20% 20%
6.3V 2 6.3V
X5R-CERM 2 X5R-CERM
0201 0201
SIM SIM
C C

EOS RESISTORS
R23_SIM
1
100 2
40 PSIM1_RST_RCPT SIM1_RST 40

5%
1/32W
MF
01005
R27_SIM
1
100 2
40 PSIM2_RST_RCPT SIM2_RST 40

5% OMIT_TABLE

ESD DIODES RESET 1/32W


MF
01005

R22_SIM
1
47 2
40 PSIM1_DATA_RCPT 40 PSIM1_RST_RCPT 40 PSIM1_CLK_RCPT 40 PSIM1_CLK_RCPT SIM1_CLK 40
40 PP_VDD_SIM1
5%
1/32W
2 2 2 MF
B 1 DZ20_SIM
DZ23_SIM
ESD202-B1-CSP01005
DZ24_SIM
ESD202-B1-CSP01005
DZ25_SIM
ESD202-B1-CSP01005
01005
R26_SIM B
12V-33PF SG-WLL-2-2 SG-WLL-2-2 SG-WLL-2-2
1
47 2
01005-1 40 PSIM2_CLK_RCPT SIM2_CLK 40

2 SIM 1 1 1
CLK 5%
1/32W
MF
01005
OMIT_TABLE

R25_SIM
1
100 2
40 PSIM1_DATA_RCPT SIM1_DATA 40

5%
1/32W
40 PSIM2_DATA_RCPT 40 PSIM2_RST_RCPT 40 PSIM2_CLK_RCPT MF
40 PP_VDD_SIM2 01005
R29_SIM
2 2 2 100 2
DZ27_SIM DZ28_SIM DZ29_SIM 40 PSIM2_DATA_RCPT 1 SIM2_DATA 40
1 ESD202-B1-CSP01005 ESD202-B1-CSP01005 ESD202-B1-CSP01005
DZ26_SIM
12V-33PF
01005-1
SG-WLL-2-2 SG-WLL-2-2 SG-WLL-2-2 DATA 5%
1/32W
MF
01005
OMIT_TABLE

2 SIM 1 1 1

A A
PAGE TITLE

SIM: PSIM
DRAWING NUMBER SIZE

051-02695 D
Apple Inc. REVISION

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
25 OF 27
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 40 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

DEBUG: TEST POINTS


DEBUG
PP2450_K
P2MM-NSM PP24A1_K
I2S PP24E7_K
VDIO DIGRF BBPMU PP24G3_K
BB GPIOS
OMIT SM
1
P2MM-NSM P2MM-NSM PP24G6_K P2MM-NSM
PP
BB_DEBUG_ERROR 23 41 OMIT SM
1 I2S_BB_TO_AP_BCLK OMIT SM
1
P2MM-NSM OMIT SM
1
PP 10 16 23 PP
BBPMU_ANAMON 21 PP24B0_K OMIT SM
1 PP AP_TO_BB_COREDUMP_TRIG 10 16 23
P2MM-NSM BBPMU_TO_BB_PWRGOOD 21 23

D
PP
PP24C0_K SM
D OMIT
P2MM-NSM
SM
1 BB_JTAG_TDO 24
PP24A2_K
P2MM-NSM
OMIT SM
PP2411_K
P2MM-NSM
OMIT SM
OMIT PP
1 90_DIGRF_LO_TX_P 23 27
PP24G8_K
P2MM-NSM
PP24F5_K
P2MM-NSM
OMIT SM
PP 1 I2S_BB_TO_AP_LRCLK 10 16 23 1 BB_TO_BBPMU_VDIO 21 23 OMIT SM 1 BB_RESET2_L_TEST 23
PP PP
PP24B1_K 1 BBPMU_TO_BB_RESET_SD_L 21 23
PP
PP
PP24C1_K P2MM-NSM
P2MM-NSM PP24A3_K PP2422_K SM
1
PP24G4_K
OMIT SM
1
P2MM-NSM P2MM-NSM OMIT PP
90_DIGRF_LO_TX_N 23 27 P2MM-NSM
BB_JTAG_TDI 24 OMIT SM OMIT SM OMIT SM
PP 1 I2S_AP_TO_BB_DOUT 10 16 23 1 BB_TO_BBPMU_VCLK 21 23 1 BB_TO_BBPMU_STBY 21 23
PP PP PP
PP2401_K PP24B2_K
P2MM-NSM
OMIT SM 1
PP
BBPMU_TO_BB_MEAS_RDY 21 23
PP24A4_K
P2MM-NSM
OMIT SM
PP
1 I2S_BB_TO_AP_DIN 10 16 23
PP2409_K
P2MM-NSM
OMIT SM
PP
1 BBPMU_TO_BB_ALERT_L 21 23
OMIT
P2MM-NSM
SM
PP
1 90_DIGRF_LO_RX_P 23 27 LO OMIT
PP24F2_K
P2MM-NSM
SM
PP
1 PMU_1PIN_BOOT_STRAP 21
PP24H8_K
P2MM-NSM
OMIT SM
PP
1 BB_DEBUG_ERROR 23 41

PP24B3_K
P2MM-NSM
SM
OMIT 1 90_DIGRF_LO_RX_N 23 27
PP

POWER-KEEPING AP PMU RAILS


PP2497_K
BB RFFE AOP UART
PP24B4_K
P2MM-NSM
OMIT
SM
PP
1 90_DIGRF_HI_TX_P 23 27 OMIT
PP24J3_K
P2MM-NSM
SM
1 OMIT
PP24J4_K
P2MM-NSM
SM
1
P2MM-NSM PP24E5_K PP
PP1V8_S2 10 16 19 41 42 PP
PP3V0_S2 10 16 19
OMIT SM
1
PP2486_K P2MM-NSM
PP
AP_TO_BBPMU_RADIO_ON_L 10 16 21 P2MM-NSM OMIT SM
1
OMIT SM
1 BB_TO_UAT_RFFE_DATA PP
UART_BB_TO_AOP_RXD 10 16 23 PP24B5_K
PP 19 23 P2MM-NSM
SM
PP2410_K PP2487_K PP24E6_K OMIT 1 90_DIGRF_HI_TX_N 23 27
PP
P2MM-NSM P2MM-NSM P2MM-NSM
OMIT SM
PP

PP24A9_K
1 BB_TO_XCVR_RESET_L 23 27
OMIT SM 1
PP

PP2488_K
P2MM-NSM
BB_TO_UAT_RFFE_CLK 19 23
OMIT SM
PP
1 UART_AOP_TO_BB_TXD 10 16 23

PP24B6_K
P2MM-NSM
SM
1
DEBUG CONNECTOR
OMIT
P2MM-NSM
SM
OMIT SM
PP
1 BB_TO_LAT_RFFE_CLK 19 23
OMIT PP
90_DIGRF_HI_RX1_P 23 27
FLEX: 516S00037
PP

PP2425_K
1 BB_TO_BBPMU_SDWN_L 21 23
PP2489_K
P2MM-NSM
OMIT SM 1
PP
BB_TO_LAT_RFFE_DATA 19 23 PP24E8_K
XCVR RFFE PP24B7_K
P2MM-NSM
OMIT
SM
PP
1 90_DIGRF_HI_RX1_N 23 27
MLB_BOT: 516S00038
P2MM-NSM P2MM-NSM
SM SM
C OMIT
PP
1 BBPMU_TO_BB_RESET_L 21 23
PP24A7_K
OMIT
PP
1 PP_1V8_VIO PP_1V8_VIO-10[I120]
34 35 36 41 42
16 27 30 33
PP24D0_K NOSTUFF
C
P2MM-NSM P2MM-NSM
OMIT SM
1
PP2467_K SM
1
PP24H7_K BB_TO_XCVR_DWB_CLK 23 27 P2MM-NSM OMIT 90_DIGRF_HI_RX2_P 23 27 J_DEBUG
OMIT
P2MM-NSM
SM
PP
1 BB_TO_AP_RESET_DETECT_L 10 16 23
PP

PP24A8_K
P2MM-NSM
OMIT SM
1
OMIT SM
PP

PP2468_K
1 BB_TO_XCVR_RFFE_DATA 23 27
PP

PP24D1_K
P2MM-NSM
HI BM28P0.6-44DS-0.35V
45
F-ST-SM
46
PP
BB_TO_XCVR_DWB_DATA 23 27 P2MM-NSM SM
1
OMIT SM OMIT 90_DIGRF_HI_RX2_N 23 27
1 BB_TO_XCVR_RFFE_CLK 23 27
PP
PP
PP24E0_K 16 10 UART_GNSS_TO_AP_RXD 1 2 90_USB_BB_P 16 23
P2MM-NSM PP24D2_K 26
OMIT SM
1
PP2469_K P2MM-NSM NC
3 4 90_USB_BB_N 16 23

COEXISTENCE PP
PP_1V8_BB_MASTER_IO 23 27 P2MM-NSM
OMIT SM
PP
1 XCVR_TO_BB_RFFE_DATA 23 27
OMIT
SM
PP
1 90_DIGRF_HI_RX3_P 23 27 23 16 PP_1V8_BB_USB_VBUS 5 6
NC
PP24A5_K NC
7 8 SIM1_RST 23 40
P2MM-NSM PP24D3_K
OMIT SM
1
PP2470_K P2MM-NSM 29 23 16 10 PCIE_AP_TO_BB_PERST_L 9 10 SIM2_CLK 23 39 40
PP
BB_TO_MANY_GSM_BURST_IND 10 16 24 P2MM-NSM SM
1 11 12
OMIT SM OMIT 90_DIGRF_HI_RX3_N 23 27 21 16 10 PMU_TO_BBPMU_RESET_L SIM1_DATA 23 40

PP24L0_K
P2MM-NSM
OMIT SM
1 OMIT
PP2427_K
P2MM-NSM
SM
1
CLKS PP

PP2471_K
P2MM-NSM
1 XCVR_TO_BB_RFFE_CLK 23 27
PP

PP24D5_K
P2MM-NSM
SM
1
26 16 10

41 23 16 10
UART_AP_TO_GNSS_TXD
AP_TO_BB_RESET_L
13
15
17
14
16
18
NC
SIM1_DETECT 23 40

AOP_TO_BBPMU_COEX 10 16 21 TP_TO_BBPMU_EXT_CLK_EN 21 OMIT SM OMIT 90_DIGRF_HI_RX4_P 23 27 PP_VDD_SIM1 22 25 40


PP PP 1 SHIELD_RFFE_TX_SDATA PP
SHIELD_RFFE_TX_SDATA-10[I120] 16 27 30 33 37 41
NC
PP 19 20
ICE_DETECT_L PP_VDD_SIM2 22 25 39 40
PP2483_K PP24D6_K
PP24J7_K P2MM-NSM PP2472_K P2MM-NSM 24 16 10 SWD_AOP_BI_BB_SWDIO 21 22 SIM2_DATA 23 39 40
P2MM-NSM OMIT SM
1
P2MM-NSM SM
1 23 24
OMIT SM CLK_BBPMU_TO_TP_EXT_38MHZ 21 OMIT SM OMIT 90_DIGRF_HI_RX4_N 23 27 SIM2_RST 23 39 40
1 TOUCH_TO_MANY_FORCE_PWM 10 16 22
PP 1 SHIELD_RFFE_TX_SCLK PP
SHIELD_RFFE_TX_SCLK-10[I120] 16 27 30 33 37 41
NC
PP PP 25 26
41 23 16 10 AP_TO_BB_RESET_L SIM2_DATA_R 39

PP2473_K 26 16 10 UART_GNSS_TO_AP_CTS_L 27 28
NC
PP24F0_K P2MM-NSM 29 30
P2MM-NSM OMIT SM
1 27 16 10 UART_AP_TO_GNSS_RTS_L UART_BB_DEBUG_TXD 23
OMIT SM XCVR_TO_FE_RX_RFFE_DATA 27 33 34 35 36 41 42
1 TP_TO_BBPMU_SMARTI2_CLK_EN 21
PP 31 32 SWD_JTAG_TCK_SWDCLK_R 24 29
PP NC

PP2494_K
P2MM-NSM
OMIT SM
1
PEAK-POWER
AP_TO_BB_PEAK_POWER_INDICATOR
OMIT
PP24F1_K
P2MM-NSM
SM
PP
1 CLK_BBPMU_TO_TP_SMARTI2_38MHZ 21
PP2474_K
P2MM-NSM
OMIT SM
PP
1 XCVR_TO_FE_RX_RFFE_CLK 27 33 34 35 36 41 42
OMIT
PP24H1_K
P2MM-NSM
SM
1
SMPS 42 41 19 16 10

40 23

26 21 16 10
PP1V8_S2
SIM1_CLK
PMU_TO_GNSS_EN
33
35
37
34
36
38
SIM2_DETECT
UART_BB_DEBUG_RXD
UART_COEX_WLAN_TO_BB_TXD
23 39 40

23

23 42
PP 10 16 23 PP
VDD_SMPS1_0V9_COEX 22
PP24K0_K 26 16 10 GNSS_TO_AP_LOW_PWR_IND 39 40 UART_COEX_BB_TO_WLAN_TXD 23 42

B PP24G9_K
P2MM-NSM
OMIT
SM
1 SHIELD_RFFE_TX_SDATA PP24H2_K
SHIELD_RFFE_TX_SDATA-10[I120] 16 27 30 33 37 41
NC
41 42
NC
B
PP 43 44
P2MM-NSM P2MM-NSM NC NC
OMIT SM OMIT SM
1 BB_TO_BBPMU_CLK_EN 21 23 PP24K1_K 1 VDD_SMPS2_0V8_COEX 22
PP PP
P2MM-NSM 47 48
SM 42 30 22 16 10 PP_VDD_MAIN

PP2434_K
P2MM-NSM
ET OMIT
PP2429_K
P2MM-NSM
SM
PP
1 CLK_BBPMU_TO_BB_38MHZ 21 23
OMIT PP

PP24K2_K
1 SHIELD_RFFE_TX_SCLK

OMIT
PP24H3_K
P2MM-NSM
SM
PP
SHIELD_RFFE_TX_SCLK-10[I120]

1 VDD_SMPS3_1V3_COEX
16 27 30 33 37 41

22
OMIT SM
1 50_ET_DAC_P
P2MM-NSM
26 30 SM
PP
OMIT 1 SHIELD_RFFE_TX_SDATA SHIELD_RFFE_TX_SDATA-10[I120] 16 27 30 33 37 41
PP
PP24H4_K
PP2435_K PP24H0_K P2MM-NSM
P2MM-NSM P2MM-NSM PP24K3_K OMIT SM
1
OMIT SM OMIT SM P2MM-NSM VDD_SMPS4_0V77_COEX 22
PP
1 50_ET_DAC_N 26 30 PP

PP2485_K
P2MM-NSM
1 GNSS_TO_BBPMU_CLK_EN 21 26
OMIT
SM
PP
1 SHIELD_RFFE_TX_SCLK
PP
SHIELD_RFFE_TX_SCLK-10[I120]

PP24H5_K
P2MM-NSM
16 27 30 33 37 41

PP24J0_K
P2MM-NSM
WLAN RFFE
OMIT SM OMIT SM OMIT SM
1 CLK_BBPMU_TO_XCVR_38MHZ 21 27 1 VDD_SMPS5_1V0_COEX 22 1 XCVR_TO_FE_RX_RFFE_DATA 27 33 34 35 36 41 42
PP PP PP

PP24G7_K PP24J1_K
PP24H6_K
PP24G0_K BBPMU RP P2MM-NSM
SM P2MM-NSM OMIT
P2MM-NSM
SM
P2MM-NSM
OMIT SM
PP
1 BB_TO_BBPMU_RP_SCL 21 23
OMIT PP
1 CLK_BBPMU_32KHZ 21 23 26

PP2442_K
P2MM-NSM
PCIE OMIT SM
PP
1 VDD_SMPS6_1V85_COEX 22
PP

PP24J2_K
P2MM-NSM
1 XCVR_TO_FE_RX_RFFE_CLK 27 33 34 35 36 41 42

OMIT SM OMIT SM
PP24G1_K 1 90_PCIE_AP_TO_BB_TXD_P 10 16 23 1 PP_1V8_VIO PP_1V8_VIO-10[I120] 16 27 30
PP PP
P2MM-NSM 33 34 35 36 41 42
OMIT SM
1 BB_TO_BBPMU_RP_SDA 21 23 PP2443_K
PP
P2MM-NSM
PP2492_K
AP COEX OMIT SM
PP
1 90_PCIE_AP_TO_BB_TXD_N 10 16 23
GNSS
P2MM-NSM PP24E9_K
OMIT SM
1
P2MM-NSM
PP2444_K
PP24E2_K
P2MM-NSM
I2C PP
AP_TO_BB_COEX 10 16 23

OMIT
P2MM-NSM
SM
1
OMIT SM
PP
1 UART_BBPMU_TO_GNSS_1W 21 26

OMIT SM PP2495_K 90_PCIE_AP_TO_BB_REFCLK_P


A PP
1 I2C_BB_EEPROM_SDA 23 P2MM-NSM
OMIT SM
1 BB_TO_AP_COEX
PP 10 16 23

PP24E4_K
P2MM-NSM
A
PP 10 16 23
PP24E3_K NO_TEST=1 PP2445_K OMIT SM
1
PAGE TITLE
P2MM-NSM P2MM-NSM
OMIT SM
PP
1 I2C_BB_EEPROM_SCL 23
OMIT SM
PP
1 90_PCIE_AP_TO_BB_REFCLK_N 10 16 23
PP GNSS_DWB_IRQ 23 27
TEST POINTS
DRAWING NUMBER SIZE
PP24A6_K
PP24G2_K
P2MM-NSM 051-02695 D
PP24J5_K LOFT CANARY P2MM-NSM
OMIT SM
PP
1 AP_TO_GNSS_TIME_MARK 10 16 26
Apple Inc. REVISION
P2MM-NSM OMIT SM
OMIT SM
1 LOFT_CANARY_1 10 16 23
PP
1 BB_TO_PMU_PCIE_HOST_WAKE_L 10 16 23 4.0.0
PP
PP2419_K NOTICE OF PROPRIETARY PROPERTY: BRANCH
P2MM-NSM
PP24J6_K PP24G5_K OMIT SM
1 THE INFORMATION CONTAINED HEREIN IS THE
P2MM-NSM P2MM-NSM PP
GNSS_TO_BBPMU_LNA_EN 21 26 PROPRIETARY PROPERTY OF APPLE INC.
OMIT SM OMIT SM THE POSESSOR AGREES TO THE FOLLOWING: PAGE
1 LOFT_CANARY_2 10 16 23 1 PCIE_BB_BI_AP_CLKREQ_L 10 16 23
PP PP I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
26 OF 27
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 41 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

SYMBOL: WIFI
HIERARCHICAL SYMBOL FOR HIER_WIFI

D D

DIETCOKE
HIER_WIFI I1

POWER KEEPING RFFE


44 41 30 22 16 10 PP_VDD_MAIN PP_VDD_MAIN PP_RFFE_VIO_1V8 PP_1V8_VIO PP_1V8_VIO-10[I120] 16 27 30 33 34 35 36 41 45

44 41 19 16 10 PP1V8_S2 PP1V8_APPMU_S2 RFFE_SCLK_UAT XCVR_TO_FE_RX_RFFE_CLK 27 33 34 35 36 41 42 45

44 16 10 PMU_TO_WLAN_REG_ON APPMU_TO_WLAN_REG_ON RFFE_SDATA_UAT XCVR_TO_FE_RX_RFFE_DATA 27 33 34 35 36 41 42 45

44 16 10 PMU_TO_BT_REG_ON APPMU_TO_BT_REG_ON RFFE_SCLK_LAT XCVR_TO_FE_RX_RFFE_CLK 27 33 34 35 36 41 42 45

44 16 10 AP_TO_BT_DEVICE_WAKE AP_TO_BT_DEV_WAKE RFFE_SDATA_LAT XCVR_TO_FE_RX_RFFE_DATA 27 33 34 35 36 41 42 45

hier_wifi COEX
CLOCKS
C UART_COEX_BB_TO_WLAN_TXD
C
44 16 10 AP_TO_WLAN_TIME_SYNC WLAN_TO_AP_TIME_SYNC UART_COEX_BB_TO_WLAN_TXD 23 41 44

44 16 10 BT_TO_AP_TIME_SYNC BT_TO_AP_TIME_SYNC UART_COEX_WLAN_TO_BB_TXD UART_COEX_WLAN_TO_BB_TXD 23 41 44

44 16 10 PMU_TO_WLAN_CLK32K APPMU_TO_WLAN_32K_CLK
UART
UART_BTWLAN_TO_AP_RTS_L UART_BT_TO_AP_CTS_L 10 16 44

UART_BTWLAN_TO_AP_TXD UART_BT_TO_AP_RXD 10 16 44

UART_AP_TO_BTWLAN_RTS_L UART_AP_TO_BT_RTS_L 10 16 44

UART_AP_TO_BTWLAN_TXD UART_AP_TO_BT_TXD 10 16 44

PCIE
44 16 10 90_PCIE_WLAN_TO_AP_RXD_P 90_PCIE_WLAN_TO_AP_TX_P
44 16 10 90_PCIE_WLAN_TO_AP_RXD_N 90_PCIE_WLAN_TO_AP_TX_N
44 16 10 90_PCIE_AP_TO_WLAN_TXD_P 90_PCIE_AP_TO_WLAN_TX_P
44 16 10 90_PCIE_AP_TO_WLAN_TXD_N 90_PCIE_AP_TO_WLAN_TX_N WLAN 2.4GHZ
50_WLAN_G_TRX0_VOID_UAT 50_WLAN_G_TRX0_VOID_UAT 20 44 TO ANT4 TRIPLEXER
44 16 10 90_PCIE_AP_TO_WLAN_REFCLK_P 90_PCIE_AP_TO_WLAN_REFCLK_P 50_WLAN_G_TRX1_VOID_LAT
90_PCIE_AP_TO_WLAN_REFCLK_N 50_WLAN_G_TRX1_VOID_LAT 20 44 TO ANT3 TRIPLEXER
44 16 10 90_PCIE_AP_TO_WLAN_REFCLK_N
50 OHM
44 16 10 WLAN_TO_PMU_HOST_WAKE BTWLAN_TO_APPMU_HOST_WAKE RF
44 16 10 PCIE_AP_TO_WLAN_PERST_L PCIE_AP_TO_WLAN_PERST_L
WLAN_LAA_5GHZ
44 16 10 PCIE_WLAN_BI_AP_CLKREQ_L PCIE_AP_BI_WLAN_CLKREQ_L 50_WLAN_LAA_FEM_TRX_VOID_UAT
50_WLAN_LAA_FEM_TRX_VOID_UAT 20 45 TO ANT5 BAND PASS FILTER
50_WLAN_LAA_FEM_TRX_VOID_LAT 50_WLAN_LAA_FEM_TRX_VOID_LAT 20 45 TO ANT6 DIPLEXER

CONTEXT
44 16 10 AOP_TO_WLAN_CONTEXT_A AOP_TO_WLAN_CONTEXT_A
B 44 16 10 AOP_TO_WLAN_CONTEXT_B AOP_TO_WLAN_CONTEXT_B
LAA OUT
B
50_PRX_LAA_LNA1_OUT 50_WIFI_LAA_LAT_TO_XCVR_PRX 28 45 TO XCVR PRX
50_DRX_LAA_LNA2_OUT 50_WIFI_LAA_UAT_TO_XCVR_DRX 28 45 TO XCVR DRX

A A
PAGE TITLE

SYMBOL: WIFI
DRAWING NUMBER SIZE

051-02695 D
Apple Inc. REVISION

4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
27 OF 27
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
IV ALL RIGHTS RESERVED 42 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
CK
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. APPD
REV ECN DESCRIPTION OF REVISION
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. DATE
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
4 0011669799 ENGINEERING RELEASED 2018-03-16

D
X1049 HIER_WIFI (DIETCOKE) D

LAST_MODIFICATION=Fri Mar 16 10:21:00 2018 WLAN SYMBOL IO PORTS


PAGE CSA CONTENTS SYNC DATE POWER
43 1 WIFI: TABLE OF CONTENTS 45 44 42 IO
PP_VDD_MAIN
VOLTAGE=3.8
44 2 DIETCOKE 45 44 42 IO
PP1V8_S2
VOLTAGE=1.8
45 3 FEM MODULES
CONTROL
44 42 IO
PMU_TO_WLAN_REG_ON
44 42 IO
PMU_TO_BT_REG_ON
44 42 IO
AP_TO_BT_DEVICE_WAKE

CLOCKS
44 42 IO
PMU_TO_WLAN_CLK32K
44 42 IO
AP_TO_WLAN_TIME_SYNC
44 42 IO
BT_TO_AP_TIME_SYNC

WLAN PCIE
44 42 IO
90_PCIE_AP_TO_WLAN_REFCLK_P
44 42 IO
90_PCIE_AP_TO_WLAN_REFCLK_N
44 42 IO
90_PCIE_AP_TO_WLAN_TXD_P
C 44 42 IO
90_PCIE_AP_TO_WLAN_TXD_N C
44 42 IO
90_PCIE_WLAN_TO_AP_RXD_P
44 42 IO
90_PCIE_WLAN_TO_AP_RXD_N
44 42 IO
PCIE_AP_TO_WLAN_PERST_L
44 42 IO
PCIE_WLAN_BI_AP_CLKREQ_L
44 42 IO
WLAN_TO_PMU_HOST_WAKE

BLWLAN UART
44 42 IO
UART_AP_TO_BT_TXD
44 42 IO
UART_BT_TO_AP_RXD
44 42 IO
UART_AP_TO_BT_RTS_L
44 42 IO
UART_BT_TO_AP_CTS_L

AOP
44 42 IO
AOP_TO_WLAN_CONTEXT_A
44 42 IO
AOP_TO_WLAN_CONTEXT_B

COEX
44 42 IO
UART_COEX_BB_TO_WLAN_TXD
44 42 IO
UART_COEX_WLAN_TO_BB_TXD

ANTENNA
B 44 42 IO
50_WLAN_G_TRX0_VOID_UAT
B
44 42 IO
50_WLAN_G_TRX1_VOID_LAT
45 42 IO
50_WLAN_LAA_FEM_TRX_VOID_UAT
45 42 IO
50_WLAN_LAA_FEM_TRX_VOID_LAT

RF
45 42 IO
50_WIFI_LAA_LAT_TO_XCVR_PRX
45 42 IO
50_WIFI_LAA_UAT_TO_XCVR_DRX

RFFE
45 42 IO
PP_1V8_VIO

45 42 IO
XCVR_TO_FE_RX_RFFE_CLK
45 42 IO
XCVR_TO_FE_RX_RFFE_DATA
45 42 IO
XCVR_TO_FE_RX_RFFE_CLK
45 42 IO
XCVR_TO_FE_RX_RFFE_DATA

A A
U_WLAN_W ALTERNATES TABLE_ALT_HEAD
DRAWING TITLE

SCH,MLB,BOT,ICE,D33
PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: DRAWING NUMBER SIZE
PART NUMBER
051-02695 D
998-14250 998-14229 BOM_TABLE_ALTS U_WLAN_W WIFI/BT MODULE
TABLE_ALT_ITEM

Apple Inc. REVISION

4.0.0
SCHEMATIC APN: 051-02623 NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
BRANCH

PAGE

1 OF 3
II NOT TO REPRODUCE OR COPY IT
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 43 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

WIFI/BT ASR_LVX
L253_W
2.2UH-20%-1.1A-0.293OHM
1
0603
WLAN
2
ASR_LVX_1 1
C254_W
3
7.5UF
2 4
DEFAULT_CAPACITOR_PACK_2_7.5e+06pF

20%
4V
CERM
0402
U_WLAN_W
MOD_WIFI_BT_DIETCOKE_LGA364_5_LGA_2103_170101_50

2103-170101-50
LGA
SYM 2 OF 3
MOD_WIFI_BT_DIETCOKE_LGA364_5_LGA_2103_17
U_WLAN_W
2103-170101-50
LGA
SYM 3 OF 3

WLAN 1 GND GND 144 219 GND GND 292


45 44 43 42 PP1V8_S2 220
DEFAULT_CAPACITOR_27.000000pF_2_1 2 GND GND 145 GND GND 293
1 C252_W
1 C250_W 3 GND GND 146 221 GND GND 294
0.01UF
D 5%
27PF 10%
2 6.3V
4 GND GND 147 222 GND GND 295 D
2 16V X5R 5 GND GND 148 223 GND GND 296
NP0-C0G 01005 ABUCK_1P12V
01005-1 WLAN L255_W 7 GND GND 149 224 GND GND 297
WLAN DEFAULT_CAPACITOR_PACK_2_7.5e+06pF
2.2UH-20%-1.1A-0.293OHM 9 GND GND 150 225 GND GND 298
C256_W
CSR_LVX 1 2 CSR_LVX_1 1 3 10 GND GND 151 226 GND GND 299
0603
7.5UF 12 152 227 300
45 43 42 PP_VDD_MAIN 20% GND GND GND GND
WLAN 2 4 4V 13 153 228 301
1 DEFAULT_CAPACITOR_27.000000pF_2_1 CERM GND GND GND GND
C232_W 1 1 1 0402 22 154 229 302
10UF C245_W C246_W C247_W WLAN GND GND GND GND
20% 0.01UF 27PF 4UF 24 GND GND 155 230 GND GND 303
CBUCK_0P9V
2 6.3V
CERM-X5R
10% 5% 20%
25 231
0402-9 2 6.3V
X5R 2 16V
NP0-C0G 2 6.3V
CER-X5R GND GND 156 GND GND 304
WLAN 01005 01005-1 0201 27 GND GND 157 232 GND GND 305
WLAN NC

102
103
104

109

112

113

107

105
WLAN

33
34
35

23

42

45

46

40

38

63
WLAN 29 GND GND 158 233 GND GND 306
R233_W 31 GND GND 159 234 GND GND 307
1 2

VBATT
VBATT
VBATT
VBATT
VBATT
VBATT

VDDIO_1V8

ASR_VLX
ASR_VLX

ABUCK_BT_1V12
ABUCK_BT_1V12

ABUCK_WLAN_1V12
ABUCK_WLAN_1V12

CSR_VLX
CSR_VLX

CBUCK_0V9
CBUCK_0V9

VDD_RFLDO_3V3
50_WLAN_A_TX0 50_WLAN_A_TX0_VOID_DTCK_OUT
45 OUT 32 GND GND 160 235 GND GND 308
1 0.00 1 36 161 236 309
C201_W 0% 1/32W MF
C202_W GND GND GND GND
0.3PF 01005 0.3PF 37 GND GND 162 237 GND GND 310
+/-0.05PF WLAN +/-0.05PF
2 16V 2 16V 39 GND GND 163 238 GND GND 311
C0G-CERM C0G-CERM
01005 01005 41 GND GND 164 239 GND GND 312
NOSTUFF NOSTUFF 43 165 240 313
R234_W GND GND GND GND
WLAN WLAN 50_WLAN_A_RX0_VOID_DTCK_IN 55 166 241 314
45 IN
50_WLAN_A_RX0 1 2 GND GND GND GND
0.00 57 GND GND 167 242 GND GND 315
1 C227_W 1 C240_W
0% 1/32W MF 58 GND GND 168 243 GND GND 316
0.3PF 01005 0.3PF 8 5GHZ_TX_C0 JTAG_TDI/CONTEXT_A 11 AOP_TO_WLAN_CONTEXT_A
+/-0.05PF WLAN +/-0.05PF 42 43 44
59 GND GND 169 244 GND GND 317
2 16V
C0G-CERM 2 16V
C0G-CERM
6 5GHZ_RX_C0 JTAG_TDO/CONTEXT_B 82
MOD_WIFI_BT_DIETCOKE_LGA364_5_LGA_2103_170101_50 AOP_TO_WLAN_CONTEXT_B 42 43 44 61 170 245 318
01005 01005 GND GND GND GND
U_WLAN_W JTAG_TRST* 15 JTAG_WLAN_TRST_L 44 62 171 246 319
NOSTUFF NOSTUFF 2103-170101-50 GND GND GND GND
R235_W JTAG_SEL 114 JTAG_WLAN_SEL 44 64 172 247 320
WLAN WLAN 60 LGA GND GND GND GND
45 OUT
50_WLAN_A_TX1 1 2 50_WLAN_A_TX1_VOID_DTCK_OUT 5GHZ_TX_C1 JTAG_TMS 14 JTAG_WLAN_TMS 44 65 173 248 321
GND GND GND GND
C WLAN
1 C228_W 0.00 1 C241_W
56 5GHZ_RX_C1
SYM 1 OF 3
JTAG_TCK 84 JTAG_WLAN_TCK 44 67 GND GND 174 249 GND GND 322 C
0% 1/32W MF
0.3PF 01005 WLAN 0.3PF 68 GND GND 175 250 GND GND 323
+/-0.05PF WLAN +/-0.05PF
2 16V 2 16V 70 GND GND 176 251 GND GND 324
C0G-CERM C0G-CERM BT_UART_CTS_IN* 90 UART_AP_TO_BT_RTS_L
01005 01005 42 43 44 71 GND GND 177 252 GND GND 325
NOSTUFF NOSTUFF BT_UART_RX 21 UART_AP_TO_BT_TXD 42 43 44 72 GND GND 178 253 GND GND 326
69 2P4GHZ_ANT_C0 BT_UART_RTS_OUT* 20 UART_BT_TO_AP_CTS_L
R236_W 42 43 44 73 GND GND 179 254 GND GND 327
45 50_WLAN_A_RX1 1 2 50_WLAN_A_RX1_VOID_DTCK_IN BT_UART_TX 91 UART_BT_TO_AP_RXD 42 43 44
IN 74 GND GND 180 255 GND GND 328
WLAN
1 C229_W 0.00 1 66 85 75 181 256 329
0% 1/32W MF
C242_W 2P4GHZ_ANT_C1 WL_BT_HOST_WAKE WLAN_TO_PMU_HOST_WAKE OUT 42 43 44 GND GND GND GND
0.3PF 01005 WLAN 0.3PF WL_REG_ON 111 PMU_TO_WLAN_REG_ON IN 42 43 44
76 GND GND 182 257 GND GND 330
+/-0.05PF WLAN +/-0.05PF
2 16V 2 16V BT_REG_ON 44 PMU_TO_BT_REG_ON 42 43 44
77 GND GND 183 258 GND GND 331
C0G-CERM C0G-CERM IN
01005 01005 BT_DEV_WAKE 92 AP_TO_BT_DEVICE_WAKE 42 43 44
78 GND GND 184 259 GND GND 332
NOSTUFF NOSTUFF 79 185 260 333
81 89 GND GND GND GND
5GHZ_TSSI_C0 RF_SW_CTRL_6/WLAN_GPIO_8 80 186 261 334
16 88 GND GND GND GND
DEFAULT_RESISTOR_0.001OHM_2_1 RFA0_SW_CTRL_3 BT_GPIO_2 NC 83 187 262 335
R237_W 86 17 GND GND GND GND
RFA0_SW_CTRL_4 BT_GPIO_3 BT_TO_AP_TIME_SYNC 42 43 44
93 263
43 42 50_WLAN_G_TRX0_VOID_UAT 1 2 50_WLAN_G_TRX0_VOID_DTCK OUT
GND GND 188 GND GND 336
BI 87 RFA0_SW_CTRL_5 BT_GPIO_4 18
WLAN 0.00 1% NC 94 GND GND 189 264 GND GND 337
1 C230_W 1/20W 1 C243_W BT_GPIO_5 19
MF 119 5GHZ_TSSI_C1 NC 96 GND GND 190 265 GND GND 338
0.3PF 0201
WLAN 0.3PF
+/-0.05PF +/-0.05PF
IND_0201_2_7NH___0_1NH_0_6A 120 RFA1_SW_CTRL_13 LBIST_MBIST 98 GND GND 191 266 GND GND 339
16V
2 C0G-CERM 2 16V LHL_GPIO2 51
R238_W C0G-CERM 53 RFA1_SW_CTRL_14 NC R260_W 100 GND GND 192 267 GND GND 340
01005 01005 GPIO_14
44 48 GPIO_14 1 2 AP_TO_BT_DEVICE_WAKE
NOSTUFF
2.7NH+/-0.1NH-0.6A NOSTUFF 52 RFA1_SW_CTRL_15
42 43 44
101 GND GND 193 268 GND GND 341
PCIE_PME* 50 0.00
43 42 50_WLAN_G_TRX1_VOID_LAT 1 2 50_WLAN_G_TRX1_VOID_DTCK 0% 1/32W 106 GND GND 194 269 GND GND 342
BI
DEFAULT_CAPACITOR_0.7pF_2_1 DEFAULT_CAPACITOR_0.7pF_2_1 121 RF_SW_CTRL_16 MF
0201 01005 108 GND GND 195 270 GND GND 343
1 WLAN
C231_W 1 C244_W 47 RF_SW_CTRL_17 110 GND GND 196 271 GND GND 344
0.7PF WLAN 0.7PF
+/-0.05PF +/-0.05PF 122 GND GND 197 272 GND GND 345
2 16V
NP0-C0G
16V
2 NP0-C0G WLAN_TIME_SYNC
123 198 273 346
01005 01005 GND GND GND GND

PCIE_REFCLK_N
PCIE_REFCLK_P
124 199 274 347

PCIE_CLKREQ*
GND GND GND GND
B PCIE_PERST* B

PCIE_RXD_N
PCIE_RXD_P

PCIE_TXD_N
PCIE_TXD_P
125 GND GND 200 275 GND GND 348

SECI_OUT
5GHZ_C0_VDET_SHIELD 126 GND GND 201 276 GND GND 349

SECI_IN
45
LPO_IN

IN
45 RFA0_SW_CTRL0_SHIELD 127 GND GND 202 277 GND GND 350
OUT
45 RFA0_SW_CTRL1_SHIELD 128 GND GND 203 278 GND GND 351
OUT
45 RFA0_SW_CTRL2_SHIELD 129 GND GND 204 279 GND GND 352
OUT
118
54

117
116

30
99

28
97

26
95

49
115
130 GND GND 205 280 GND GND 353
45 IN
5GHZ_C1_VDET_SHIELD 131 281
GND GND 206 GND GND 354
45 OUT
RFA1_SW_CTRL0_SHIELD 132 282
GND GND 207 GND GND 355
45 OUT
RFA1_SW_CTRL1_SHIELD 133 283
GND GND 208 GND GND 356
45 OUT
RFA1_SW_CTRL2_SHIELD UART_COEX_BB_TO_WLAN_TXD IN 42 43
134 284
GND GND 209 GND GND 357
UART_COEX_WLAN_TO_BB_TXD OUT 42 43
135 285
GND GND 210 GND GND 358
44 43 42 AP_TO_WLAN_TIME_SYNC 90_PCIE_AP_TO_WLAN_REFCLK_N 42 43 44
136 GND GND 211 286 GND GND 359
IN BI
44 43 42 PMU_TO_WLAN_CLK32K 90_PCIE_AP_TO_WLAN_REFCLK_P 42 43 44
137 GND GND 212 287 GND GND 360
IN BI
44 43 42 PCIE_AP_TO_WLAN_PERST_L 138 GND GND 213 288 GND GND 361
IN
DEFAULT_CAPACITOR_100.000000pF_2_1 90_PCIE_WLAN_TO_AP_RXD_N OUT 42 43 44
139 289
GND GND 214 GND GND 362
1 C226_W 90_PCIE_WLAN_TO_AP_RXD_P 42 43 44
OUT 140 GND GND 215 290 GND GND 363
100PF
REQUEST FROM REGULATORY 5% 90_PCIE_AP_TO_WLAN_TXD_N 42 43 44
141 GND GND 216 291 GND GND 364
2 25V
IN
FOR DE-GLITCH/SPUR C0G-CERM 142 217
01005 90_PCIE_AP_TO_WLAN_TXD_P IN 42 43 44 GND GND
WLAN 143 GND GND 218
PCIE_WLAN_BI_AP_CLKREQ_L BI 42 43 44

44 43 42 AOP_TO_WLAN_CONTEXT_A 1 PP239_W SM
PP
1 1
P2MM-NSM OMIT
44 43 42 90_PCIE_AP_TO_WLAN_REFCLK_P PP PP282_W SM 44 43 42 AOP_TO_WLAN_CONTEXT_B PP PP240_W SM
1
P2MM-NSMOMIT 1
P2MM-NSM OMIT
44 43 42 90_PCIE_AP_TO_WLAN_REFCLK_N PP PP283_W SM 44 JTAG_WLAN_TCK PP PP234_W SM
1
P2MM-NSMOMIT 1
P2MM-NSM OMIT
44 43 42 90_PCIE_AP_TO_WLAN_TXD_P PP PP284_W SM 44 JTAG_WLAN_TMS PP PP233_W SM
1
P2MM-NSMOMIT 1
P2MM-NSM OMIT
90_PCIE_AP_TO_WLAN_TXD_N PP285_W SM JTAG_WLAN_TRST_L PP228_W SM
A 44 43 42

44 43 42 90_PCIE_WLAN_TO_AP_RXD_N 1
PP

PP
P2MM-NSMOMIT
PP287_W SM
P2MM-NSMOMIT
44

44
JTAG_WLAN_SEL 1
PP

PP
P2MM-NSM OMIT
PP229_W SM
P2MM-NSM OMIT
A
44 43 42 90_PCIE_WLAN_TO_AP_RXD_P 1 PP288_W SM PAGE TITLE
PP
P2MM-NSMOMIT
44 43 42 PCIE_WLAN_BI_AP_CLKREQ_L 1
1
PP PP299_W SM
P2MM-NSMOMIT 44 43 42 PMU_TO_WLAN_CLK32K 1
PP PP297_W SM
DIETCOKE
44 43 42 PCIE_AP_TO_WLAN_PERST_L PP PP293_W SM 1
P2MM-NSMOMIT DRAWING NUMBER SIZE
P2MM-NSMOMIT PP PP2015_W
44 43 42 AP_TO_BT_DEVICE_WAKE SM
1
P2MM-NSMOMIT 44 43 42 WLAN_TO_PMU_HOST_WAKE 45 44 43 42 PP1V8_S2 44 43 42 PP1V8_S2 051-02695 D
PP PP295_W Apple Inc.
44 43 42 PMU_TO_WLAN_REG_ON SM 45

1 1
P2MM-NSMOMIT 1 DEFAULT_RESISTOR_100000OHM_2_1
1 1 REVISION
44 43 42 WLAN_TO_PMU_HOST_WAKE PP281_W SM 44 43 42 PMU_TO_BT_REG_ON PP296_W SM R259_W R257_W R258_W
44 43 42 AP_TO_WLAN_TIME_SYNC 1
PP
P2MM-NSMOMIT
PP214_W SM
PP
P2MM-NSMOMIT BT & WLAN SHARE HOST WAKE
RDAR://30428546 100K 10K 10K
4.0.0
PP 1
P2MM-NSMOMIT PP PP210_W
44 43 42 UART_AP_TO_BT_RTS_L SM 5% 5% 5% NOTICE OF PROPRIETARY PROPERTY: BRANCH
44 43 42 BT_TO_AP_TIME_SYNC 1 PP215_W SM P2MM-NSMOMIT 1/32W 1/32W 1/32W
PP
P2MM-NSMOMIT 44 43 42 UART_AP_TO_BT_TXD 1 PP211_W SM MF MF MF THE INFORMATION CONTAINED HEREIN IS THE
PP
1
P2MM-NSMOMIT 2 01005 2 01005 2 01005 PROPRIETARY PROPERTY OF APPLE INC.
PP PP212_W
44 43 42 UART_BT_TO_AP_CTS_L SM WLAN WLAN THE POSESSOR AGREES TO THE FOLLOWING: PAGE
P2MM-NSMOMIT 44 JTAG_WLAN_SEL NOSTUFF 44 GPIO_14 NOSTUFF
44 43 42 UART_BT_TO_AP_RXD 1
PP PP213_W
SM
P2MM-NSMOMIT NOSTUFF= JTAG DISABLED NOSTUFF=BT OVER PCIE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
2 OF 3
INTERNAL PD FOR BT OVER PCIE SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 44 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

FEM MODULES
5GHZ UAT FEED
FL302_W
10-OHM-1.1A
D 45 44 43 42
PP1V8_S2 1 2
VOLTAGE=1.8
PP1V8_UAT_FEM_LNA PP_VDD_MAIN 42 43 44 45
D
01005 DEFAULT_CAPACITOR_33.000000pF_2_1
1 C304_W DEFAULT_CAPACITOR_33.000000pF_2_1
UAT_FEM 1 1
33PF C305_W C306_W
R363_W 5% 10UF 33PF
2 16V
NP0-C0G
20% 5%
44 IN
50_WLAN_A_TX0 1 2 50_WLAN_A_TX0_VOID_FEM_IN 01005-1 2 6.3V
CERM-X5R 2 16V
NP0-C0G
0.00 UAT_FEM 0402-9 01005-1
1 C366_W UAT_FEM UAT_FEM
0% 1/32W
MF 0.3PF
01005 +/-0.05PF
2 16V

VBATT 18
VBATT 19
UAT_FEM

8
C0G-CERM
01005
NOSTUFF R362_W

VDD_1V8
UAT_FEM 12
5G_RX 50_WLAN_A_RX0_VOID_FEM_OUT 1 2 50_WLAN_A_RX0 44
16 5G_TX_IN OUT
0.00
44 5GHZ_C0_VDET_SHIELD 20 VDET 0% 1/32W
OUT
ANT 6 MF 1 C361_W
U_5G_U_W 01005
44 IN
RFA0_SW_CTRL0_SHIELD 9 WLAN_CTRL_0 SKY85759 UAT_FEM 0.3PF
+/-0.05PF
44 RFA0_SW_CTRL1_SHIELD 26 WLAN_CTRL_1 LGA 2 16V
IN C0G-CERM
44 RFA0_SW_CTRL2_SHIELD 10 WLAN_CTRL_2 01005
IN
NOSTUFF
1 1 1 14 UAT_FEM
C382_W C381_W C380_W LAA_RX
10PF 10PF 10PF RFFE_VIO 2
5% 5% 5% 4 RFFE_DATA
2 16V
CERM 2 16V
CERM 2 16V
CERM 50_WLAN_LAA_FEM_TRX_VOID_UAT BI 42 43
01005 01005 01005 3 RFFE_CLK
UAT_FEM UAT_FEM UAT_FEM
50_WIFI_LAA_UAT_TO_XCVR_DRX 23 USID1
43 42 OUT
GND
USID RX=0X42 (LAA RDM)
XCVR_TO_FE_RX_RFFE_DATA
USID RX=0X6 (LAA RDM) MURATA
43 42 BI

1
5
7
11
13
15
17
21
22
24
25
27
28
29
30
31
32
33
34
35
43 42 IN
XCVR_TO_FE_RX_RFFE_CLK

C 1 C321_W 1 C322_W C
18PF 18PF
5% 5%
2 16V
CERM 2 16V
CERM
01005 01005
UAT_FEM UAT_FEM
NOSTUFF NOSTUFF
R310_W
45 43 42 PP_1V8_VIO 1 2 PP_1V8_VIO_UAT
IN
VOLTAGE=1.8 VOLTAGE=1.8
0.00 01005
UAT_FEM 1 C323_W RFFE CLK AND DATA FILTERING CAPS ADDED TO UAT FEM ONLY (FURTHER FROM XCVR)
18PF
5%
2 16V
CERM
01005
UAT_FEM

FL312_W
5GHZ LAT FEED
10-OHM-1.1A VOLTAGE=1.8
45 44 43 42
PP1V8_S2 1 2 PP1V8_LAT_FEM_LNA PP_VDD_MAIN 42 43 44 45
01005 DEFAULT_CAPACITOR_33.000000pF_2_1
1 C314_W DEFAULT_CAPACITOR_33.000000pF_2_1
LAT_FEM 1 1
R373_W 33PF C315_W C316_W
5% 10UF 33PF
44 50_WLAN_A_TX1 1 2 50_WLAN_A_TX1_FEM_IN 2 16V 20% 5%
NP0-C0G 2 6.3V 2 16V
IN
0.00 01005-1 CERM-X5R NP0-C0G
1 C376_W 0402-9 01005-1
B 0% 1/32W
MF 0.3PF
LAT_FEM
LAT_FEM LAT_FEM B
01005 +/-0.05PF
LAT_FEM 2 16V
C0G-CERM

VBATT 18
VBATT 19
8
01005
NOSTUFF R372_W
LAT_FEM

VDD_1V8
5G_RX 12 50_WLAN_A_RX1_VOID_FEM_OUT 1 2 50_WLAN_A_RX1 44
16 5G_TX_IN OUT
0.00 1 C371_W
5GHZ_C1_VDET_SHIELD 20 VDET 0% 1/32W
44 OUT
ANT 6 MF 0.3PF
U_5G_L_W 01005 +/-0.05PF
44
RFA1_SW_CTRL0_SHIELD 9 WLAN_CTRL_0 SKY85759 LAT_FEM 2 16V
IN C0G-CERM
44 RFA1_SW_CTRL1_SHIELD 26 WLAN_CTRL_1 LGA 01005
IN
10 NOSTUFF
44 IN
RFA1_SW_CTRL2_SHIELD WLAN_CTRL_2 LAT_FEM
1 C385_W 1 C384_W 1 C383_W 14 LAA_RX
50_WLAN_LAA_FEM_TRX_VOID_LAT
10PF 10PF 10PF RFFE_VIO 2 BI 42 43
5% 5% 5% 4 RFFE_DATA
2 16V
CERM 2 16V
CERM 2 16V
CERM
01005 01005 01005 3 RFFE_CLK
LAT_FEM LAT_FEM LAT_FEM USID RX=0X41 (LAA RPM)
43 42 OUT
50_WIFI_LAA_LAT_TO_XCVR_PRX 23 USID1 USID RX=0X5 (LAA RPM)-MURATA
GND
43 42 XCVR_TO_FE_RX_RFFE_DATA
BI
1
5
7
11
13
15
17
21
22
24
25
27
28
29
30
31
32
33
34
35
43 42 IN
XCVR_TO_FE_RX_RFFE_CLK

A A
R364_W 1.8 PAGE TITLE
1 2 PP_1V8_VIO_LAT
45 43 42 IN
PP_1V8_VIO
0.00 01005
1 C333_W
FEM MODULES
DRAWING NUMBER SIZE
LAT_FEM 18PF
5% 051-02695 D
2 16V
CERM
Apple Inc. REVISION
01005
LAT_FEM
4.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
3 OF 3
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 45 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
CK
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. APPD
REV ECN DESCRIPTION OF REVISION
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. DATE
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
4 0011669799 ENGINEERING RELEASED 2018-03-16

D HIER_NFC D

LAST_MODIFICATION=Fri Mar 16 10:21:01 2018


PAGE CSA CONTENTS SYNC DATE
46 1 NFC: TABLE OF CONTENTS
47 75 NFC

C C

47 10 IN
PP_VDD_MAIN
VOLTAGE=3.8

47 10 IN
PP1V8_NFC_S2
VOLTAGE=1.8

47 10 IN
PMU_TO_NFC_EN
47 10 OUT NFC_TO_AOP_HOST_WAKE
47 10 IN
AP_TO_NFC_DEV_WAKE
47 10 IN
AP_TO_NFC_FW_DWLD_REQ

47 10 IN
UART_AP_TO_NFC_TXD
47 10 OUT UART_NFC_TO_AP_RXD
47 10 IN
UART_AP_TO_NFC_RTS_L
47 10 OUT UART_NFC_TO_AP_CTS_L

47 IN
AP_TO_NFC_BUTTON

47 10 IN
PMU_TO_NFC_VDD_MAIN_EN
NFC_TO_ARC_RESET_L
B 47 10 OUT

47 10 OUT NFC_TO_ARC_TRIG
B

47 10 OUT NFC_ANT

NFC: TABLE OF CONTENTS


A A
DRAWING TITLE

SCH,MLB,BOT,ICE,D33
DRAWING NUMBER SIZE

051-02695 D
TABLE_ALT_HEAD
Apple Inc. REVISION

PART NUMBER ALTERNATE FOR


PART NUMBER
BOM OPTION REF DES COMMENTS: 4.0.0
TABLE_ALT_ITEM
NOTICE OF PROPRIETARY PROPERTY: BRANCH

197S00076 197S00060 BOM_TABLE_ALTS Y7500_S XTAL,27P12 MHZ THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
TABLE_ALT_ITEM

197S00077 197S00060 BOM_TABLE_ALTS Y7500_S XTAL,27P12 MHZ I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
1 OF 75
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 46 OF 47
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

STOCKHOLM
D D
NFC CONTROLLER
PP7516_S
P2MM-NSM
SM
1 46 10 PP1V8_NFC_S2
PP
OMIT

PP7515_S
P2MM-NSM
SM
1 C7527_S 1 C7500_S 1 C7502_S 1
PP
2.2UF 2.2UF 2.2UF OMIT
20% 20% 20% 47 PP_VDD_NFC_TVDD
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
0201 0201 0201 PP7514_S 1 1 1 1
NFC NFC P2MM-NSM
SM
C7530_S C7506_S C7526_S C7523_S
NFC 1 100PF 10UF 2.2UF 2.2UF
PP7512_S PP
47 PP_NFC_VDDBOOST
5% 20% 20% 20%
P2MM-NSM
SM
1 OMIT 1 C7521_S 1 C7520_S 2 25V
C0G-CERM 2 10V
X5R 2 10V
X5R 2 6.3V
X5R-CERM
PP_VDD_NFC_AVDD
PP
VOLTAGE=1.8 100PF 2.2UF 01005 0402 0201 0201
OMIT 5% 20% NFC NFC NFC NFC
1 1 2 25V
C0G-CERM 2 6.3V
X5R-CERM
C7505_S C7522_S 01005 0201
2.2UF 100PF NFC NFC
20% 5%
2 6.3V
X5R-CERM 2 25V
C0G-CERM
0201 01005 PP_NFC_VDDC
NFC NFC
PP_NFC_VDDNV
PP_NFC_VDDPLL
47 PP_VDD_MAIN_LS
PP_NFC_VHV
NCNCNC PP_NFC_VREF
C7507_S
C 1 C7534_S 1 C7535_S 1 C7536_S 1 C7552_S 1 C7537_S 1 C7538_S R7508_S 1000PF C

VUP G1
VDDA H5

VDDC C2

VDDCIN C1

VDDIO C3

VDDPA H2

VDDPLL H3

VREF D2
PMUVCC1 B5
PMUVCC2 B6
PMUVCC3 B7

SIMVCC1 A6
SIMVCC2 A7
SIMVCC3 A8

VBAT E1
VBATPWR A3

VDDBOOST B1

VDDIO_SE E5

VDDNV B3

VHV F1
0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 1
560 2 1 2
47 NFC_RXP
20% 20% 20% 20% 20% 20% NFC_RXP_CAP
2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 1%
2%

NFC FRONT END


01005-1 01005-1 01005-1 01005-1 01005-1 01005-1 1/20W
MF 25V
NFC NFC NFC NFC NFC NFC 201 C0G-NP0
NFC 0201
NFC
H8 SE_GPIO0 F8 AP_TO_NFC_BUTTON IN 46
NFC_CLK_REQ L7500_S
AP_TO_NFC_FW_DWLD_REQ
NC
J8 SE_GPIO1 D4 NC 110NH-2.5%-1.5A-0.36OHM
47 46 10 IN NFC_DWL_REQ
U_NFC_S TP7503
NFC_TEST_OUT E4 SN100VUK-B20148 SE_I2C_SCL G8 NC 47 NFC_TXN 1 2 NFC_BAL1 1
A
47 NFC_GPIO0
WLCSP SE_I2C_SDA F7 0402 TP-P55

BAL1 3
UNBAL 4
F3 NFC_GPIO1 NC NFC 1 C7510_S 1 C7550_S NFC
OMIT
46 10 NFC_TO_ARC_RESET_L G6 NFC_GPIO2_AO SE_ISO_CLK D6 1000PF 100PF
OUT NC 2% 2%

ATB161006D-20011
46 10 NFC_TO_ARC_TRIG G5 NFC_GPIO3_AO SE_ISO_IO D7 2 25V 2 50V
OUT NC C0G-NP0 C0G
UART_AP_TO_NFC_RTS_L F2 SE_ISO_RST D3 NC
0201
NFC
0201
NFC C7514_S

T7500_S
47 46 10 IN NFC_HSU_CTS
UART_NFC_TO_AP_CTS_L F5 E8 470PF
NFC_HSU_RTS SE_SPI_CLK

SM
47 46 10 OUT NC NFC_ANT_MATCH 1 2 NFC_ANT 10 46
47 46 10 UART_AP_TO_NFC_TXD E3 NFC_HSU_RX DIG NFC DIS SE SE_SPI_CS E6 OUT
IN NC NFC
47 46 10
UART_NFC_TO_AP_RXD F4 NFC_HSU_TX SE_SPI_MISO E7 2%
OUT NC L7502_S 25V 1 C7515_S 1 C7516_S 1 C7518_S
SE_SPI_MOSI D5 NP0-C0G
47 46 10 NFC_TO_AOP_HOST_WAKE H7 NFC_IRQ NC 1UH-20%-2.1A-0.1OHM 0201 1000PF 1000PF 180PF
OUT PP_VDD_MAIN_LS 2% 2% 2%

2 BAL0
1 GND
NFC
A5 BOOST_LX A1 PP_NFC_BOOST_LX 1 2 47 L7501_S 2 25V
C0G-NP0 2 25V
C0G-NP0 2 50V
NP0-C0G
NC NFC_SIM_SWIO1 PIWA2012FE-SM 110NH-2.5%-1.5A-0.36OHM C7512_S 0201 0201 0201
B8 1 NFC NFC NFC
NC NFC_SIM_SWIO2 NFC C7511_S NFC_TXP 1 2 NFC_BAL2
82PF
C8 NFC_SIM_SWIO3 15UF 47
1 2 TP7507
NC 20% 0402 1
2 6.3V NFC 1 C7513_S 1 C7551_S A
AP_TO_NFC_DEV_WAKE G7 NFC_WKUP_REQ X5R 2% TP-P55
47 46 10 IN 0402-1 1000PF 100PF 50V NFC
NFC 2% 2% NP0-C0G OMIT
PP7513_S G3 NFC_CLK_32K 2 25V 2 50V 0201
P2MM-NSM C0G-NP0 C0G
SM 47 NFC_XTAL1 PP_NFC_VDDBOOST 0201 0201 NFC
GND
TP7508
1
1 H6 NFC_XTAL1 47
NFC NFC MAKE_BASE=TRUE A
PP TP-P55
NFC
B OMIT
NC
B4 NFC_SIM_SWCTRL1 ANALOG SIGNAL
1 C7517_S 1 C7519_S 1 C7504_S
OMIT B
C6 NFC_SIM_SWCTRL2 10UF 10UF C7503_S
NC 20% 20% 10UF R7509_S 1000PF
NFC_XTAL2
J7 2 10V
X5R 2 10V
X5R
20% 560 2
47 NFC_XTAL2 0402 0402 2 10V
X5R 47 NFC_RXN 1 1 2
0402 NFC_RXN_CAP
NFC NFC 1%
47 NFC_RXP J5 RXP NFC 1/20W 2%
MF 25V
47 NFC_RXN J4 RXN 201 C0G-NP0
NFC 0201
NFC
47 NFC_TXP J1 TX1
47 NFC_TXN J3 TX2
NFC_TXVCASC G2 TXVCASC
NFC_TXVCM H1 TXVCM
VSS_PWR
VSS_PWR
VSS_PMU

C4
VSS_NFC

VSS_SUB
VSS_SUB

PMU_TO_NFC_EN
VSS_REF
VSS_DIG
VSS_DIG
VSS_DIG

VSS_PLL

47 46 10 VEN
VSS_PA

IN

VMID J6 VTUNE
C7539_S 1
0.22UF 1 C7540_S
20% 1 C7553_S
C5
C7
D8

G4

J2

H4

D1

A2
B2

E2

A4
F6

6.3V 2 0.22UF R7500_S


X5R 20% 0.1UF 0.00 2
01005-1 2 6.3V 20% 1
NFC X5R 2 6.3V
01005-1 X5R-CERM 0%
NFC 01005 1/10W
NFC MF
0201
47 PP_VDD_NFC_TVDD

Y7500_S U_NFC_LS
PP7503_S PP7507_S 1.20X1.00-SM
FPF1204UCX
P2MM-NSM P2MM-NSM 27.12MHZ-10PPM-6PF PP_VDD_MAIN_LS
SM SM PP_VDD_MAIN
47 46 10 UART_AP_TO_NFC_TXD 1
PP 47 46 10 NFC_TO_AOP_HOST_WAKE 1
PP 47 NFC_XTAL1 1 3 NFC_XTAL2 47 46 10 A2 VIN WLCSP-COMBOVOUT A1 47

OMIT OMIT
A PP7504_S PP7508_S 1
2 4
1
1 C7554_S
0.22UF B2 ON
A
P2MM-NSM
SM
P2MM-NSM
SM
C7542_S C7541_S 20% PAGE TITLE
47 46 10 UART_NFC_TO_AP_RXD 1
PP
OMIT
47 46 10 PMU_TO_NFC_EN 1
OMIT
PP
2 16V
8PF
+/-0.1PF
NP0/C0G
8PF
2 16V
+/-0.1PF
NP0/C0G
2 6.3V
X5R
01005-1
NFC
GND
NFC DRAWING NUMBER SIZE
01005 01005

B1
PP7505_S PP7509_S
P2MM-NSM
SM
P2MM-NSM
SM
NOSTUFF
Apple Inc.
051-02695 D
47 46 10 UART_AP_TO_NFC_RTS_L 1 47 46 10 AP_TO_NFC_DEV_WAKE 1 REVISION
PP PP
OMIT OMIT
47 46 10

PMU_TO_NFC_VDD_MAIN_EN
4.0.0
PP7506_S PP7510_S NOTICE OF PROPRIETARY PROPERTY: BRANCH
P2MM-NSM P2MM-NSM PP7511_S
1
SM
1
SM
NFC_TEST_OUT TP7506
1
P2MM-NSM THE INFORMATION CONTAINED HEREIN IS THE
47 46 10 UART_NFC_TO_AP_CTS_L 47 46 10 AP_TO_NFC_FW_DWLD_REQ 47 A PMU_TO_NFC_VDD_MAIN_EN SM PROPRIETARY PROPERTY OF APPLE INC.
PP PP
47 46 10 1 THE POSESSOR AGREES TO THE FOLLOWING: PAGE
TP-P55 PP
OMIT OMIT NFC
OMIT OMIT I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
75 OF 75
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 47 OF 47
8 7 6 5 4 3 2 1

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