ENEE 3543 – Homework 4 – Spring 2019

NAME:______________________________________
1. In the following circuit, RD = 3K, VDD = 5V, VSS = -5V, Kn = 2mA/V2 and VTN = 1V for all
transistors. Also, consider that vG1 and vG2 are small signal voltage sources (i.e., their DC
component is 0V). Remember that when the NMOS is in saturation, ID = ½ Kn(VGS – VTN)2, and gm2
= 2KnID. Also, the expression for the gains of the NMOS differential amplifier are:
For both amplifiers: Acd = 0 V/V, |Add| = gmRD, |Adc| = ½ gmRD
For the first amplifier: |Acc| = RD/(1 + gm 2 RS1)
For the second amplifier: |Acc| = RD/(1 + gm 2 RS2).

(a) Find the DC drain current of Q1 and Q2, so that the DC component of vD1 & vD2 is 2V.
(b) What is the maximum possible AC swing at vD2 in this case (explain)?
(c) Using the DC drain current of part (a), find RS1.
(d) Find the DC drain current of Q3 and Q4 so that the DC component of vo is 3V.
(e) Using the DC drain current of part (d) find RS2.
(f) Assuming that the common mode input is 0V, calculate the small signal voltage gain,
namely: |vo/(vG1 – vG2)|.
(g) Would the gain of part (f) be different if the common mode input was not zero?
(h) Confirm that all transistors are in saturation for large signal (DC) operation.
2. Consider the differential amplifier shown next. V DD = 5V, VSS = -5V, Kn = 2mA/V, and VTN = 1V.
The small signal differential gain is equal to |Add| = gmRD.

(a) Assuming that RD and RS cannot be equal, choose values for R D and RS so that |Add| = 5V/V
and I = 10mA, and so that the two transistors are in saturation. Confirm that your design is valid
or not by checking the transistor conditions. Find the CMRR (differential output).
(b) Repeat part (a) by replacing RS with the following transistor (V SS is again -5V) that has an
Early Effect resistance of r o = 50K. Determine the V GG needed for |Add| = 5V/V and I = 10mA.
Does this circuit work out (explain)?