References:-

[1] https://en.wikipedia.org/wiki/Instrumentation_amplifier

[2] www.circuitstoday.com/instrumentation-amplifer

Trade-OFF Analysis:-
(1) Low Power Consumption:- In order to drive the IN-AMP with low power consumption,
the Voltage Source Supply Vdd, had to be limited. However, this affected the noise floor
ratio at the input of the circuit. With lower Vdd, high CMRR gain ratio was also a
hinderance, but with parametric modifications, the issue of the CMRR was solved.
(2) Phase Margin & Bandwidth:- To achieve the minimum phase margin criterion of 80
Degree, the nulling resistor value had to be increased. However, achieving that high phase
margin, hindered the bandwidth specification. Thus, to meet the bandwidth criterion as
well as phase margin, moderate value of Miller Bridging Capacitor and Nulling Resistor
were used. This increased the noise in that feedback loop as well as the power consumption.
(3) Slew Rate & Settling Time:- As the settling time criterion was easily met, the
specification of Slew Rate was an issue for Gain=1. However, no trade-off was made to
improve the slew rate for that gain level, but an increase in the Vdd can improve the Slew
Rate response for the Gain level.
(4) Gain Accuracy:- To design the IN-AMP for achieving the maximum accuracy for Gain at
G=1, the open-loop gain of the OTA had to be maximized. In order to increase the gain,
the (µ𝑓 )𝑟𝑜 had to be increased. This made the trad-off of increasing the length of the
transistors, thus increasing the Input Floor Noise in the OTA Circuitry.