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ECA LAB

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 1


CIRCUIT DIAGRAM:

R2
68k

Q1
R1

4.7k
Q2N2222

C1
V1 V2
100mVac 12Vdc
10u
0Vdc

R4 R5
R3
10k 10k
33k

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 2


Expt. No:1

1. VOLTAGE SERIES FEEDBACK AMPLIFIER


AIM: To obtain the frequency response &analysis of voltage series feedback amplifier
using P-spice.

APPARATUS:

Transistor (Q2N2222) - 1No.

Resistors (10k ) - 2No.


(33k ) - 1No.
(4.7k ) - 1No.
(68k ) - 1No.

Capacitors (10 F) - 1No.


Source:
Vac source - 1No.
Vdc source - 1No.

Ground: (0) source ground - 1No.

THEORY:
When any increase in the output signal results into the input in such a way as to
cause the decrease in the output signal, the amplifier is said to have negative feedback.
The advantages of providing negative feedback are that the transfer gain of the amplifier
with feedback can be stabilized against variations in the hybrid parameters of the
transistor orthe parameters of the other active devices used in the circuit. The most
advantage of the
negative feedback is that by proper use of this, there is significant improvement in the
frequency response and in the linearity of the operation of the amplifier. This
disadvantage ofthe negative feedback is that the voltage gain is decreased.

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 3


MODEL GRAPH:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 4


PROCEDURE:

1. Connect the circuit as per the circuit diagram on computer using PSpice.
2. After connecting the circuit of the amplifier go for simulation settings and set the
analysis type as Ac sweep/noise, start frequency, end frequency, points/decade.
3. Place the markers.
4. Simulate the circuit and observe the output.
5. Calculate the gain using the formula 20log (Vo/Vi).
6. Set the lower & higher cutoff frequencies and calculate the bandwidth.

RESULT:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 5


CIRCUIT DIAGRAM:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 6


Expt. No:2

2.CURRENT SHUNT FEEDBACK AMPLIFIER


AIM: To obtain the frequency response &analysis of current shunt feedback amplifier
using P-spice and hardware testing.

APPARATUS:

Transistor (Q2N2222) - 1No.

Resistors (10k ) - 1No.


(1k ) - 1No.
(33k ) - 2Nos.
(4.7k ) - 1No.
(68k ) - 1No.

Capacitors (10 F) - 1No.


Source:
Vac source - 1No.
Vdc source - 1No.

Ground: (0) source ground - 1No.

THEORY:

Feedback is introduced in a two stage R.C coupled amplifier, signal from the

emitter of the second transistor is coupled to the base of first transistor , via the resistor

Rf. This type of feedback is called “the current shunt feedback type” .The input current is

the difference of the current at the base due Vs and the current If. This is smaller than the

magnitude of current without feed back. Therefore this circuit is functioning as a negative

feedback circuit .

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 7


MODEL GRAPH:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 8


PROCEDURE:

1.Connect the circuit as per the circuit diagram on computer using PSpice.
2.After connecting the circuit of the amplifier go for simulation settings and set the
analysis type as Ac sweep/noise, start frequency, end frequency, points/decade.
3.Place the markers.
4.Simulate the circuit and observe the output.
5.Calculate the gain using the formula 20log (Vo/Vi).
6.Set the lower & higher cutoff frequencies and calculate the bandwidth.

RESULT:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 9


CIRCUIT DIAGRAM:

R1 R2 R5 R7
100k 15k 100k 15k
C2
C4 V2
12Vdc
Q1 10u Q2
C1
10u
V
10u
Q2N2222 Q2N2222
V
R9
V1
20mv 100
0Vdc
R3 R4 R6 R8
C3 C5
10k 1.5k 10k 1.5k
470u 470u

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 10


Expt. No:3

3.TWO STAGE RC COUPLED AMPLIFIER

AIM: To obtain the frequency response of two stage RC coupled amplifier using
Pspice and hardware testing.

APPARATUS:

Transistor (Q2N2222) - 2Nos.

Resistors (100k ) - 2Nos.


(15k ) - 2Nos.
(10k ) - 3Nos.
(1.5k ) - 2Nos.
Capacitors (470 F) - 2Nos.
(10 F) - 3Nos.
Sources:
Vac source - 1No.
Vdc source - 1No.

Ground: (0) source ground - 1No.

THEORY:

As the gain provided by a single stage amplifier is usually not sufficient to drive
the load, so to achieve extra gain multi-stage amplifier is used. In multi-stage amplifiers
output of one-stage is coupled to the input of the next stage. The coupling of one stage to
another is done with the help of some coupling devices. If it is coupled by RC then the
amplifier is called RC-coupled amplifier.
Frequency response of an amplifier is defined as the variation of gain with respect
to frequency. The gain of the amplifier increases as the frequency increases from zero till
it becomes maximum at lower cut-off frequency and remains constant till higher cut-off
frequency and then it falls again as the frequency increases.
At low frequencies the reactance of coupling capacitor CC is quite high and hence
very small part of signal will pass through from one stage to the next stage.
At high frequencies the reactance of inter electrode capacitance is very small and
behaves as a short circuit. This increases the loading effect on next stage and service to
reduce the voltage gain due to these reasons the voltage gain drops at high frequencies.

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 11


MODEL GRAPH:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 12


At mid frequencies the effect of coupling capacitors is negligible and acts like short
circuit, where as inter electrode capacitors acts like open circuit. So, the circuit becomes
resistive at mid frequencies and the voltage gain remains constant during this range.
PROCEDURE:
PSPICE:

1. Connect the circuit as per the circuit diagram on computer using P-SPICE.
2. After connecting the circuit of the amplifier go for simulation settings and set the
analysis type as AC sweep/noise, start frequency, end frequency, points/decade.
3. Place the markers.
4. Simulate the circuit and observe the output.
5. Calculate the gain using the formula 20log (Vo/Vi).
6. Set the lower &higher cutoff frequency and calculate the bandwidth.

PRECAUTIONS:

1. Connect the circuit without errors.


2. Use the components with proper values.
3. Ground the circuit properly.

APPLICATIONS:

1. Audio amplifiers
2. Radio Transmitters and Receivers

RESULT:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 13


CIRCUIT DIAGRAM:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 14


Expt. No:4

4.CLASS A SERIES FED POWER AMPLIFIER


AIM: To observe the operation of class A power amplifier using P-spice software.

APPARATUS:

Transistor (Q2N2222) - 1No.


Resistors (15k ) - 1No.
(10k ) - 1No.
Capacitors (100 F) - 1No.
Sources:
Vsin source - 1No.
Vdc source - 2Nos.
Ground: (0) source ground - 1No.

THEORY:

The above circuit is called as “series fed” because the load RL is connected in
series with transistor output. It is also called as direct coupled amplifier.
ICQ = Zero signal collector current
VCEQ = Zero signal collector to emitter voltage
Power amplifiers are mainly used to deliver more power to the load. To deliver
more power it requires large input signals, so generally power amplifiers are preceded by
a series of voltage amplifiers.
In class-A power amplifiers, Q-point is located in the middle of DC-load line. So
output current flows for complete cycle of input signal. Under zero signal condition,
maximum power dissipation occurs across the transistor. As the input signal amplitude
increases power dissipation reduces.
The maximum theoretical efficiency is 25%.

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 15


MODEL GRAPH:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 16


PROCEDURE:

1. Connect the circuit as per the circuit diagram on computer using P-SPICE
software.
2. After connecting the circuit of the amplifier, go for simulation settings and set the
analysis type as time domain (transient), run to time, maximum step size etc.
3. Place the markers.
4. Simulate the circuit and observe the output.
5. Observe whether the waveforms are out of phase or not.
6. Set the minimum and maximum points of the waves.

RESULT:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 17


CIRCUIT DIAGRAM:

Q2
12Vdc
V1

Q2N3904

C1 R2 R1

100U 100 10K


V V
V3
VOFF = 0
VAMPL = 5mv V2 0
FREQ = 300 Q1
Q2N3906 12Vdc
0

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 18


Expt. No:5

5.CLASS B COMPLEMENTARY SYMMETRY AMPLIFIER

AIM: To observe the operation of class B complementary symmetry amplifier.

APPARATUS:

Transistor (Q2N3904) - 1No.


(Q2N3906) - 1No.
Resistors (10k ) - 1No.
(100 ) - 1No.
Capacitors (100 F) - 1No.

Sources:
Vsin source - 1No.
Vdc source - 2Nos.

Ground: (0) source ground - 2Nos.

THEORY:

Power amplifiers are designed using different circuit configuration with the sole
purpose of delivering maximum undistorted output power to load. Push-pull amplifiers
operating either in class-B are class-AB are used in high power audio system with high
efficiency.
In complementary-symmetry class-B power amplifier two types of transistors, NPN
and PNP are used. These transistors acts as emitter follower with both emitters connected
together.
In class-B power amplifier Q-point is located either in cut-off region or in saturation
region. So, that only 180o of the input signal is flowing in the output.
In complementary-symmetry power amplifier, during the positive half cycle of input
signal NPN transistor conducts and during the negative half cycle PNP transistor
conducts. Since, the two transistors are complement of each other and they are connected
symmetrically so, the name complementary symmetry has come
Theoretically, efficiency of complementary symmetry power amplifier is 78.5%.

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 19


MODEL GRAPH:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 20


PROCEDURE:

1. Connect the circuit as per the circuit diagram on computer using PSpice.
2. After connecting the circuit of the amplifier, go for simulation settings and set the
analysis type as time domain (transient), run to time, maximum step size etc.
3. Place the markers.
4. Simulate the circuit and observe the output.
5. Observe whether the waveforms are out of phase or not.
6. Set the minimum and maximum points of the waves.

RESULT:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 21


CIRCUIT DIAGRAM:

R4
R1
15k
100k

V1
Q3
15v

2N2222

R2 R3
C5
10k 1.5k
470u

0
R5 C6 C7 C9

0.001u 0.001u
0.001u V
15k
R6 R7
10k 10k

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 22


Expt. No:6

6.RC PHASE SHIFT OSCILLATOR

AIM: To observe the operation of RC phase shift oscillator using PSpice.

APPARATUS:

Transistor (2N2222) - 1No.


Resistors (100k ) - 1No.
(10k ) - 3Nos.
(15k ) - 2Nos.
(1.5k ) - 1No.
Capacitors (0.001uF) - 3Nos.
(470uF) - 1No.
Sources:
Vdc source - 1Nos.

Ground: (0) source ground - 2Nos.

THEORY:
RC – phase shift oscillator has a CE amplifier followed by three sections of RC
phase shift feedback networks. The output of the last stage is return to the input of the
amplifier. the values of R and C are chosen such that the phase shift of each RC section is
600 .thus, the RC ladder network produces a total phase shift of 1800 between its input and
output voltage for the given frequencies. since CE amplifier produces 1800phase shift the
total phase shift from the base of the transistor around the circuit and back to the
transistor will be exactly 3600or 00.

The frequency of oscillation is given by


f0 = 1/(2 RC 6) where R1=R2=R3=R
C1=C2=C3=C

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 23


MODEL GRAPH

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 24


PROCEDURE:

1. Connect the circuit as per the circuit diagram on computer using PSpice.
2. After connecting the circuit of the amplifier, go for simulation settings and set the
analysis type as time domain (transient), run to time, maximum step size etc.
3. Place the markers.
4. Simulate the circuit and observe the output.
5. Set the minimum and maximum points of the waves.

RESULT:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 25


CIRCUIT DIAGRAM:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 26


Expt. No:7

7.DARLINGTON PAIR AMPLIFIER

AIM: To construct a Darlington current amplifier circuit and to plot the


frequency response characteristics using PSpice.

APPARATUS:

Transistor (2N2222) - 2Nos.


Resistors (6k ) - 1No.
(10k ) - 1No.
(15k ) - 1No.
(1k ) - 1No.
Capacitor (10uF) - 2Nos.

Sources:
Vdc source - 1No.

Ground: (0) source ground - 2Nos.

THEORY:

Darlington transistor (often called a Darlington pair) is a compound structure


consisting of two bipolar transistors (either integrated or separated devices) connected in
such a way that the current amplified by the first transistor is amplified further by the
second one. This configuration gives a much higher common/emitter current gain than
each transistor taken separately and, in the case of integrated devices, can take less space
than two individual transistors because they can use a shared collector. Integrated
Darlington pairs come packaged singly in transistor-like packages or as an array of
devices (usually eight) in an integrated circuit.

The Darlington configuration was invented by Bell Laboratories engineer Sidney


Darlington in 1953. He patented the idea of having two or three transistors on a single
chip sharing a collector.

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 27


MODEL GRAPH:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 28


PROCEDURE:

1. Connect the circuit as per the circuit diagram on computer using P-SPICE.
2. After connecting the circuit of the amplifier go for simulation settings and set the
analysis type as AC sweep/noise, start frequency, end frequency, points/decade.
3. Place the markers.
4. Simulate the circuit and observe the output.
1. Calculate the gain using the formula 20log (Vo/Vi).
2. Set the lower &higher cutoff frequency and calculate the bandwidth.

RESULT:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 29


CIRCUIT DIAGRAM:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 30


Expt. No:8

8. SINGLE TUNED AMPLIFIER

AIM: To Construct & Plot the frequency response of a single tuned amplifier
using PSpice

APPARATUS:

Transistor (2N2222) - 1No.


Resistors (220 ) - 1No.
(10k ) - 1No.
(22k ) - 1No.
(5.6k ) - 1No.
Capacitors (10uF) - 1No.
(100uF) - 1No.
(1nF) - 1No.
Inductor (1mH) - 1No.

Sources:
Vdc source - 1No.

Ground: (0) source ground - 1No.

THEORY:

Amplifiers which amplify a specific frequency or narrow band of frequencies are called
tuned amplifiers. Tuned amplifiers are mostly used for the amplification of high or radio
frequencies. It is because radio frequencies are generally single and the tuned circuit
permits their selection and efficient amplification. However, such amplifiers are not
suitable for the amplification of audio frequencies as they are mixture of frequencies from
20 Hz to 20 kHz and not single. Tuned amplifiers are widely used in radio and television
circuits where they are called upon to handle radio frequencies. Fig shows the circuit of a
simple transistor tuned amplifier. Here, instead of load resistor, we have a parallel tuned
circuit in the collector. The impedance of this tuned circuit strongly depends upon
frequency. It offers a very high impedance at resonant frequency and very small
impedance at all other frequencies. If the signal has the same frequency as the resonant
frequency of LC circuit, large amplification will result due to high impedance of LC
circuit at this frequency. When signals of many frequencies are present at the input of
tuned amplifier, it will select and strongly amplify the signals of resonant frequency while
rejecting all others. Therefore, such amplifiers are very useful in radio receivers to select
the signal from one particular broadcasting station when signals of many other
frequencies are present at the receiving aerial.

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 31


MODEL GRAPH:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 32


PROCEDURE:

1. Connect the circuit as per the circuit diagram on computer using P-SPICE.
2. After connecting the circuit of the amplifier go for simulation settings and set the
analysis type as AC sweep/noise, start frequency, end frequency, points/decade.
3. Place the markers.
4. Simulate the circuit and observe the output.
5. Calculate the gain using the formula 20log (Vo/Vi).
6. Set the lower &higher cutoff frequency and calculate the bandwidth.

RESULT:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 33


CIRCUIT DIAGRAM:

MODEL GRAPH:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 34


Expt. No:9

9. COLPITT’S OSCLLATOR

AIM: To Find practical frequency of Colpitt’s oscillator and to compare it with


theoretical values using PSpice.

APPARATUS:

Transistor (2N2222) - 1No.


Resistors (330 ) - 1No.
(33k ) - 1No.
(3.3k ) - 1No.
(1.5k ) - 1No.
Capacitors (0.1uF) - 1No.
(0.1uF) - 2Nos.
(10uF) - 1No.
Inductor (2mH) - 1No.

Sources:
Vdc source - 1No.

Ground: (0) source ground - 1No.

THEORY:

The Colpitts circuit, like other LC oscillators, consists of a gain device (such as a
bipolar junction transistor, field effect transistor etc..) with its output connected to its
input in a feedback loop containing a parallel LC circuit (tuned circuit) which functions as
a band pass filter to set the frequency of oscillation. A Colpitts oscillator is the electrical
dual of a Hartley oscillator, where the feedback signal is taken from an "inductive"
voltage divider consisting of two coils in series (or a tapped coil) Fig. shows the common-
collector version. Here the voltage across C1 provides feedback. The frequency of
oscillation is approximately the resonant frequency of the LC circuit, which is the series
combination of the two capacitors in parallel with the inductor.

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 35


Dept of ECE, ADITYA COLLEGE OF ENGINEERING 36
PROCEDURE:

1. Connect the circuit as per the circuit diagram on computer using PSpice.
2. After connecting the circuit of the amplifier, go for simulation settings and set the
analysis type as time domain (transient), run to time, maximum step size etc.
3. Place the markers.
4. Simulate the circuit and observe the output.
5. Set the minimum and maximum points of the waves.

HARDWARE:
1. Connect the circuit as shown in the figure
2. Connect C2= 0.001uF in the circuit and observe the waveform.
3. Time period of the waveform is to be noted and frequency should be
calculated by the formula f=1/T
4. Now, fix the capacitance to 0.002 uF and then to 0.003 uF and calculate the
frequency and tabulate the reading as shown.
1
5. Find theoretical frequency from the formula f ,
2 LCT
where CT C1C2
C1 C2

RESULT:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 37


CIRCUIT DIAGRAM:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 38


Expt. No:10

10. PUSH PULL AMPLIFIER

AIM: To Construct & Plot the frequency response of a push pull amplifier
using PSpice.

APPARATUS:

Transistor (2N2222) - 2Nos.


Resistors R1 - 1No.
R2 - 1No.
R3 - 1No..
Transformers - 2Nos.

Sources:
Vdc source - 1No.

Ground: (0) source ground - 2Nos.

.
THEORY:
A push–pull output is a type of electronic circuit that uses a pair of active devices
that alternately supply current to, or absorb current from, a connected load. Push–pull
outputs are present in TTL and CMOS digital logic circuits and in some types
of amplifiers, and are usually realized as a complementary pair of transistors, one
dissipating or sinking current from the load to ground or a negative power supply, and the
other supplying or sourcing current to the load from a positive power supply. A push–
pull amplifier is more efficient than a single-ended "class-A" amplifier. The output power
that can be achieved is higher than the continuous dissipation rating of either transistor or
tube used alone and increases the power available for a given supply voltage.
Symmetrical construction of the two sides of the amplifier means that even-order
harmonics are cancelled, which can reduce distortion DC current is cancelled in the
output, allowing a smaller output transformer to be used than in a single-ended amplifier.

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 39


MODEL GRAPH:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 40


.

PROCEDURE:

1. Connect the circuit as per the circuit diagram on computer using p-spice PSpice.
2. After connecting the circuit of the amplifier, go for simulation settings and set the
analysis type as time domain (transient), run to time, maximum step size etc.
3. Place the markers.
4. Simulate the circuit and observe the output.
5. Observe whether the waveforms are out of phase or not.
6. Set the minimum and maximum points of the waves.

RESULT:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 41


CIRCUIT DIAGRAM:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 42


Expt. No:11

11.VOLTAGE SERIES FEEDBACK AMPLIFIER


AIM: To obtain the frequency response &analysis of voltage series feedback amplifier
using hardware.

APPARATUS:

Transistor (BC107) - 1No.

Resistors (33k ) - 1No.


(68k ) - 1No.
(10k ) - 1Nos.

Capacitors (10 F) - 1No.

Function Generator - 1No.


CRO - 1No.
RPS - 1No.
THEORY:
When any increase in the output signal results into the input in such a way as to
cause the decrease in the output signal, the amplifier is said to have negative
feedback.The advantages of providing negative feedback are that the transfer gain of the
amplifier with feedback can be stabilized against variations in the hybrid parameters of
the transistor orthe parameters of the other active devices used in the circuit. The most
advantage of the negative feedback is that by proper use of this, there is significant
improvement in the frequency response and in the linearity of the operation of the
amplifier. This disadvantage ofthe negative feedback is that the voltage gain is decreased.

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 43


OBSERVATIONS:

1. Voltage gain

S.No Vs(V) Vi(V) Vo(V) Av = (Vo/ Vi)

Voltage gain =

2. Input impedance

S.No Vs(V) Vi(V) Vo(V) Ii = (Vs-Vi)/Rs

Input impedance, Zi = Vi/Ii=

3. Output impedance

S.No Vs(V) Vi(V) Vo(V) Io = (Vs-Vo)/Rb

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 44


PROCEDURE:

1. The circuit is setup as shown in the circuit diagram.


2. Voltage gain: A signal of 2 volts is applied to the input terminals and the input
and the output waveforms are observed in CRO and corresponding voltages re
V0
noted. Voltage gain is given by AV .
Vi
3. Input impedance: A signal of some voltage is given to the input when the
output is opened and the input voltage is noted in CRO. Then the current
entering the base of the transistor is given by I i Vs VI
.
RS
4. Output impedance: the output is given to the source voltage with input shorted
V1 V
and the current I0 is noted as I 0 s 0
.
RS
5. Therefore output impedance is given by Z0=V0/I0
6. With I0 and Ii the current gain is calculated Ai=I0/Ii.

RESULT:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 45


CIRCUIT DIAGRAM:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 46


Expt. No:12

12. CURRENT SHUNT FEEDBACK AMPLIFIER


AIM: To obtain the frequency response &analysis of current shunt feedback amplifier
using hardware.

APPARATUS:

Transistor (BC107) - 1No.

Resistors (33k ) - 1No.


(68k ) - 1No.
(10k ) - 1No.

Capacitors (10 F) - 1No.

Function Generator - 1No.


CRO - 1No.
RPS - 1No.

THEORY:

Feedback is introduced in a two stage R.C coupled amplifier, signal from the emitter of

the second transistor is coupled to the base of first transistor , via the resistor Rf. This

type of feedback is called “the current shunt feedback type” .The input current is the

difference of the current at the base due Vs and the current If. This is smaller than the

magnitude of current without feed back. Therefore this circuit is functioning as a negative

feedback circuit .

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 47


OBSERVATIONS:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 48


PROCEDURE:
1. The circuit is setup as shown in the circuit diagram.
2. Voltage gain: A signal of 2 volts is applied to the input terminals and the input
and the output waveforms are observed in CRO and corresponding voltages re
V0
noted. Voltage gain is given by AV .
Vi
3. Input impedance: A signal of some voltage is given to the input when the output
is opened and the input voltage is noted in CRO. Then the current entering the
base of the transistor is given by I i Vs VI
.
RS
4.Output impedance: the output is given to the source voltage with input shorted
V1 V
and The current I0 is noted as I 0 s 0
.
RS
5. Therefore output impedance is given by Z0=V0/I0
6.With I0 and Ii the current gain is calculated Ai=I0/Ii.

RESULT:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 49


CIRCUIT DIAGRAM:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 50


Expt. No:13

13. TWO STAGE RC COUPLED AMPLIFIER

AIM: To obtain the frequency response of two stage RC coupled amplifier


hardware.

APPARATUS:

Transistor (BC107) - 2Nos.

Resistors (33k ) - 2Nos.


(3.3k ) - 2Nos.
(330 ) - 2Nos.
(1.5k ) - 2Nos.

Capacitors (100 F) - 2Nos.


(10 F) - 3Nos.
Function generator - 1No.
CRO - 1No.
RPS - 1No.

THEORY:
As the gain provided by a single stage amplifier is usually not sufficient to drive
the load, so to achieve extra gain multi-stage amplifier is used. In multi-stage amplifiers
output of one-stage is coupled to the input of the next stage. The coupling of one stage to
another is done with the help of some coupling devices. If it is coupled by RC then the
amplifier is called RC-coupled amplifier.
Frequency response of an amplifier is defined as the variation of gain with respect
to frequency. The gain of the amplifier increases as the frequency increases from zero till
it becomes maximum at lower cut-off frequency and remains constant till higher cut-off
frequency and then it falls again as the frequency increases.

At low frequencies the reactance of coupling capacitor CC is quite high and hence
very small part of signal will pass through from one stage to the next stage.
At high frequencies the reactance of inter electrode capacitance is very small and
behaves as a short circuit. This increases the loading effect on next stage and service to
reduce the voltage gain due to these reasons the voltage gain drops at high frequencies.
At mid frequencies the effect of coupling capacitors is negligible and acts like
short circuit, where as inter electrode capacitors acts like open circuit. So, the circuit
becomes resistive at mid frequencies and the voltage gain remains constant during this
range.

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 51


MODEL GRAPH:

OBSERVATIONS:

S.No. Vi(volts) Freq (Hz) Vo(volts) A=Vo/Vi Gain =20log A

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 52


PROCEDURE:

1. Connect the circuit as per the circuit diagram.


2. After connecting the circuit, apply an input voltage of 50mv.
3. Now, by varying the frequency on function generator observe the output on CRO.
4. Take the readings and calculate the gain using the formula 20log (Vo/Vi).
5. Draw the graph on semi log graph sheet.
6. Set the lower &higher cutoff frequency and calculate the bandwidth using the
formula
BW = fH – fL

PRECAUTIONS:

1.Connect the circuit without errors.


2.Use the components with proper values.
3.Ground the circuit properly.

RESULT:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 53


CIRCUIT DIAGRAM:
Vcc

Transformer

Auto transformer 1 KHz


1

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 54


Expt. No:14

14. CLASS A POWER AMPLIFIER

AIM: To observe the operation of class A power amplifier using Hardware.

APPARATUS:

Transistor (BC107) - 1No.

Resistors (1k ) - 3No.


(10k ) - 1No.
Capacitors (4.7 F) - 2No.

Function generator - 1No.


CRO - 1No.

THEORY:

The above circuit is called as “series fed” because the load RL is connected in
series with transistor output. It is also called as direct coupled amplifier.
ICQ = Zero signal collector current
VCEQ = Zero signal collector to emitter voltage
Power amplifiers are mainly used to deliver more power to the load. To deliver
more power it requires large input signals, so generally power amplifiers are preceded by
a series of voltage amplifiers.
In class-A power amplifiers, Q-point is located in the middle of DC-load line. So
output current flows for complete cycle of input signal. Under zero signal condition,
maximum power dissipation occurs across the transistor. As the input signal amplitude
increases power dissipation reduces.
The maximum theoretical efficiency is 25%.

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 55


MODEL GRAPH:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 56


PROCEDURE:

1. Connect the circuit as per the circuit diagram.


2. After connecting the circuit. Apply VCC of 12V.
3. Set the input voltage of 20mv, 1 KHz from function generator.
4. Apply an input and observe the output waveforms on CRO.
5. Take the readings of input and output waveforms.
6. Draw the waveforms on graph sheet.

RESULT:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 57


CIRCUIT DIAGRAM:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 58


Expt. No:15

15. CLASS B COMPLEMENTARY SYMMETRY AMPLIFIER

AIM: To observe the operation of class B complementary symmetry amplifier.

APPARATUS:

Transistor (BC 107) - 1No.


(BC 177) - 1No.
Resistors (10k ) - 2No.
Capacitors (10 F) - 2No.
Diodes (D1N4148) - 2No.
Function generator - 1No.
CRO - 1No.
RPS - 1No.

THEORY:

Power amplifiers are designed using different circuit configuration with the sole
purpose of delivering maximum undistorted output power to load. Push-pull amplifiers
operating either in class-B are class-AB are used in high power audio system with high
efficiency.
In complementary-symmetry class-B power amplifier two types of transistors, NPN
and PNP are used. These transistors acts as emitter follower with both emitters connected
together.
In class-B power amplifier Q-point is located either in cut-off region or in saturation
region. So, that only 180o of the input signal is flowing in the output.

In complementary-symmetry power amplifier, during the positive half cycle of input


signal NPN transistor conducts and during the negative half cycle PNP transistor
conducts. Since, the two transistors are complement of each other and they are connected
symmetrically so, the name complementary symmetry has come
Theoretically, efficiency of complementary symmetry power amplifier is 78.5%.

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 59


MODEL GRAPH:

OBSERVATIONS:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 60


PROCEDURE:

1. Connect the circuit as per the circuit diagram.


2. After connecting the amplifier circuit, apply an input voltage of 5mv.
3. Now by varying the frequency on function generator observe the output on CRO.
4. Take the readings of input and output waveforms.
5. Draw the wave forms on graph sheet.

RESULT:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 61


CIRCUIT DIAGRAM:

R4
R1
15k
100k

V1
Q3
15v

BC107

R2 R3
C5
10k 1.5k
470u

0
R5 C6 C7 C9

0.001u 0.001u
0.001u V
15k
R6 R7
10k 10k

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 62


Expt. No:16

16.RC PHASE SHIFT OSCILLATOR

AIM: To observe the operation of RC phase shift oscillator using PSpice.

APPARATUS:

Transistor (BC107) - 1No.


Resistors (100k ) - 1No.
(10k ) - 3Nos.
(15k ) - 2Nos.
(1.5k ) - 1No.
Capacitors (0.001uF) - 3Nos.
(470uF) - 1No.

THEORY:
RC – phase shift oscillator has a CE amplifier followed by three sections of RC
phase shift feedback networks. The output of the last stage is return to the input of the
amplifier. the values of R and C are chosen such that the phase shift of each RC section is
600 .thus, the RC ladder network produces a total phase shift of 1800 between its input and
output voltage for the given frequencies. since CE amplifier produces 1800phase shift the
total phase shift from the base of the transistor around the circuit and back to the
transistor will be exactly 3600or 00.

The frequency of oscillation is given by


f0 = 1/(2 RC 6) where R1=R2=R3=R
C1=C2=C3=C

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 63


MODEL GRAPH

OBSERVATIONS:

THEORETICAL CALCULATION:
1
f Where K = Rc/R
2 RC 6 4K

PRACTICAL CALCULATION:

1
f Where T= time period
T

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 64


PROCEDURE:

1.Connect the circuit as per the circuit diagram.


2.After connecting the circuit, apply an input voltage through RPS.
3. Observe the output on CRO.
4. Plot the graph by using model waveform, find out the oscillating frequency.

RESULT:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 65


CIRCUIT DIAGRAM:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 66


Expt. No:17

17.DARLINGTON PAIR AMPLIFIER

AIM: To construct a Darlington current amplifier circuit and to plot the


frequency response characteristics.

APPARATUS:

Transistor (BC107) - 1No.


Resistors (680 ) - 1No.
(10k ) - 1No.
(15k ) - 1No.
(6k ) - 1No.
Capacitors (10uF) - 2Nos.
(470uF) - 1No.

THEORY:

Darlington transistor (often called a Darlington pair) is a compound structure


consisting of two bipolar transistors (either integrated or separated devices) connected in
such a way that the current amplified by the first transistor is amplified further by the
second one. This configuration gives a much higher common/emitter current gain than
each transistor taken separately and, in the case of integrated devices, can take less space
than two individual transistors because they can use a shared collector.

Integrated Darlington pairs come packaged singly in transistor-like packages or


as an array of devices (usually eight) in an integrated circuit.The Darlington
configuration was invented by Bell Laboratories engineer Sidney Darlington in 1953. He
patented the idea of having two or three transistors on a single chip sharing a collector.

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 67


MODEL GRAPH:

OBSERVATIONS:

S.No. Vi(volts) Freq (Hz) Vo(volts) A=Vo/Vi Gain =20log A

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 68


PROCEDURE:

1. Connect the circuit as per the circuit diagram.


2. After connecting the circuit, apply an input voltage of 50mv.
3. Now, by varying the frequency on function generator observe the output on CRO.
4. Take the readings and calculate the gain using the formula 20log (Vo/Vi).
5. Draw the graph on semi log graph sheet.
6. Set the lower &higher cutoff frequency and calculate the bandwidth

RESULT:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 69


CIRCUIT DIAGRAM:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 70


Expt. No:18

18. SINGLE TUNED AMPLIFIER

AIM: To Construct & Plot the frequency response of a single tuned amplifier

APPARATUS:

Transistor (BC107) - 1No.


Resistors (220 ) - 1No.
(10k ) - 1No.
(22k ) - 1No.
(5.6k ) - 1No.
Capacitors (10uF) - 1No.
(100uF) - 1No.
(1nF) - 1No.
Inductor (1mH) - 1No.

THEORY:

Amplifiers which amplify a specific frequency or narrow band of frequencies are


called tuned amplifiers. Tuned amplifiers are mostly used for the amplification of high or
radio frequencies. It is because radio frequencies are generally single and the tuned circuit
permits their selection and efficient amplification. However, such amplifiers are not
suitable for the amplification of audio frequencies as they are mixture of frequencies from
20 Hz to 20 kHz and not single.

Tuned amplifiers are widely used in radio and television circuits where they are
called upon to handle radio frequencies. Fig shows the circuit of a simple transistor tuned
amplifier. Here, instead of load resistor, we have a parallel tuned circuit in the collector.
The impedance of this tuned circuit strongly depends upon frequency. It offers a very
high impedance at resonant frequency and very small impedance at all other frequencies.

If the signal has the same frequency as the resonant frequency of LC circuit, large
amplification will result due to high impedance of LC circuit at this frequency. When
signals of many frequencies are present at the input of tuned amplifier, it will select and
strongly amplify the signals of resonant frequency while rejecting all others. Therefore,
such amplifiers are very useful in radio receivers to select the signal from one particular
broadcasting station when signals of many other frequencies are present at the receiving
aerial.

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 71


MODEL GRAPH:

OBSERVATIONS:

Freq
S.No. Vi(volts) Vo(volts) A=Vo/Vi Gain =20log A
(KHz)

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 72


PROCEDURE:
1. Connect the circuit as per the circuit diagram.
2. After connecting the circuit, apply an input voltage of 50mv.
3. Now, by varying the frequency on function generator observe the output on CRO.
4. Take the readings and calculate the gain using the formula 20log (Vo/Vi).
5. Draw the graph on semi log graph sheet.
6. Set the lower &higher cutoff frequency and calculate the bandwidth

RESULT:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 73


CIRCUIT DIAGRAM:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 74


Expt. No:19

19. COLPITT’S OSCLLATOR

AIM: To Find practical frequency of Colpitt’s oscillator and to compare it with


theoretical values.

APPARATUS:

Transistor (BC107) - 1No.


Resistors (330 ) - 1No.
(33k ) - 1No.
(3.3k ) - 1No.
(1.5k ) - 1No.
Capacitors (0.1uF) - 1No.
(0.1uF) - 1No.
(10uF) - 2Nos.
Inductor (2mH) - 1No
THEORY:

The Colpitts circuit, like other LC oscillators, consists of a gain device (such as a
bipolar junction transistor, field effect transistor etc..) with its output connected to its
input in a feedback loop containing a parallel LC circuit (tuned circuit) which functions as
a bandpass filter to set the frequency of oscillation.

A Colpitts oscillator is the electrical dual of a Hartley oscillator, where the


feedback signal is taken from an "inductive" voltage divider consisting of two coils in
series (or a tapped coil) Fig. shows the common-collector version. Here the voltage
across C1 provides feedback. The frequency of oscillation is approximately the resonant
frequency of the LC circuit, which is the series combination of the two capacitors in
parallel with the inductor

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 75


MODEL GRAPH:

OBSERVATIONS:

S.NO L(mH) C1 ( F) C2 ( F) CT ( F) Theoretical Practical Vo(V)


Frequency
Frequency (KHz) Peak to
(KHz) peak
1 1mH

2 1mH

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 76


PROCEDURE:
1.Connect the circuit as shown in the figure
2.Connect C2= 0.001uF in the circuit and observe the waveform.
3.Time period of the waveform is to be noted and frequency should be
calculated by the formula f=1/T
4.Now, fix the capacitance to 0.002 uF and then to 0.003 uF and calculate the
frequency and tabulate the reading as shown.
1
5. Find theoretical frequency from the formula f ,
2 LCT
where CT C1C2
C1 C2

RESULT:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 77


CIRCUIT DIAGRAM:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 78


Expt. No:20

20. PUSH PULL AMPLIFIER

AIM: To Construct & Plot the frequency response of a push pull amplifier

APPARATUS:

Transistor (BC107) - 2Nos.


Resistors R1 - 1No.
R2 - 1No.
R3 - 1No.
Transformers - 2Nos.

THEORY:
A push–pull output is a type of electronic circuit that uses a pair of active devices
that alternately supply current to, or absorb current from, a connected load. Push–pull
outputs are present in TTL and CMOS digital logic circuits and in some types
of amplifiers, and are usually realized as a complementary pair of transistors, one
dissipating or sinking current from the load to ground or a negative power supply, and the
other supplying or sourcing current to the load from a positive power supply.
A push–pull amplifier is more efficient than a single-ended "class-A" amplifier.
The output power that can be achieved is higher than the continuous dissipation rating of
either transistor or tube used alone and increases the power available for a given supply
voltage. Symmetrical construction of the two sides of the amplifier means that even-order
harmonics are cancelled, which can reduce distortion DC current is cancelled in the
output, allowing a smaller output transformer to be used than in a single-ended amplifier.

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 79


MODEL GRAPH:

OBSERVATIONS:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 80


PROCEDURE:

1. Connect the circuit as per the circuit diagram.


2. After connecting the amplifier circuit, apply an input voltage of 5mv.
3. Now by varying the frequency on function generator observe the output on CRO.
4. Take the readings of input and output waveforms.
5. Draw the wave forms on graph sheet.

RESULT:

Dept of ECE, ADITYA COLLEGE OF ENGINEERING 81

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