Micropower, Zero Drift, True Rail-to-Rail

Instrumentation Amplifier
Data Sheet AD8237
FEATURES PIN CONFIGURATION
Gain set with 2 external resistors AD8237
Can achieve low gain drift at all gains BW 1 8 VOUT
Ideal for battery powered instruments +IN 2 + – 7 FB
Supply current: 115 µA –IN 3 – + 6 REF

10289-001
Rail-to-rail input and output –VS 4 TOP VIEW
(Not to Scale)
5 +VS

Zero input crossover distortion

Figure 1.
Designed for excellent dc performance
Minimum CMRR: 106 dB
Maximum offset voltage drift: 0.3 µV/°C
Maximum gain error: 0.005% (all gains)
Maximum gain drift: 0.5 ppm/°C (all gains)
Input bias current: 1 nA guaranteed to 125°C
Bandwidth mode pin (BW) to adjust compensation
8 kV HBM ESD rating
RFI filter on-chip
Single-supply operation: 1.8 V to 5.5 V Table 1. Instrumentation Amplifiers by Category1
8-lead MSOP package General Zero Military Digital
Purpose Drift Grade Micropower Gain
APPLICATIONS AD8421 AD8237 AD620 AD8237 AD8250
AD8221/AD8222 AD8231 AD621 AD8420 AD8251
Bridge amplification AD8220/AD8224 AD8293 AD524 AD8235/AD8236 AD8253
Pressure measurement AD8228 AD8553 AD526 AD627 AD8231
Medical instrumentation AD8295 AD8556 AD624
Thermocouple interface AD8226 AD8557
Portable systems
1
Current measurement See www.analog.com for the latest instrumentation amplifiers.

GENERAL DESCRIPTION
The AD8237 is a micropower, zero drift, rail-to-rail input and The AD8237 is available in an 8-lead MSOP package. Performance
output instrumentation amplifier. The relative match of two is specified over the full temperature range of −40°C to +125°C.
resistors sets any gain from 1 to 1000. The AD8237 has excellent 6
AD8237
gain accuracy performance that can be preserved at any gain
G = 100
with two ratio-matched resistors.
INPUT COMMON-MODE VOLTAGE (V)

5
VS = 5V
VREF = 2.5V
The AD8237 employs the indirect current feedback architecture to 4
TRADITIONAL IN-AMP
(RAIL-TO-RAIL OUT)
achieve a true rail-to-rail capability. Unlike conventional in-amps,
the AD8237 can fully amplify signals with common-mode voltage 3

at or even slightly beyond its supplies. This enables applications

2
with high common-mode voltages to use smaller supplies and
save power. 1

The AD8237 is an excellent choice for portable systems. With a

0
minimum supply voltage of 1.8 V, a 115 µA typical supply current,
and wide input range, the AD8237 makes full use of a limited –1
10289-002

power budget, yet offers bandwidth and drift performance suitable 0 1 2 3 4 5

OUTPUT VOLTAGE (V)
for bench-top systems.
Figure 2. Input Common-Mode Voltage vs. Output Voltage, +VS = 5 V, G = 100

Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 www.analog.com
Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 ©2012 Analog Devices, Inc. All rights reserved.
AD8237
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Pin Configuration ............................................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings ............................................................ 7
Thermal Resistance ...................................................................... 7
ESD Caution .................................................................................. 7
Pin Configuration and Function Descriptions ............................. 8
Typical Performance Characteristics ............................................. 9
Theory of Operation ...................................................................... 20
Architecture ................................................................................. 20
Setting the Gain .......................................................................... 20
Gain Accuracy............................................................................. 21
REVISION HISTORY
8/12—Revision 0: Initial Version
Rev. 0 | Page 2 of 28
Data Sheet
Clock Feedthrough ..................................................................... 21
Input Voltage Range ................................................................... 21
Input Protection ......................................................................... 22
Filtering Radio Frequency Interference .................................. 22
Using the Reference Pin ............................................................ 22
Layout .......................................................................................... 23
Input Bias Current Return Path ............................................... 23
Applications Information .............................................................. 25
Battery Current Monitor ........................................................... 25
Programmable Gain In-Amp.................................................... 25
AD8237 in an Electrocardiogram (ECG) Front End............. 26
Outline Dimensions ....................................................................... 27
Ordering Guide .......................................................................... 27
Data Sheet AD8237

SPECIFICATIONS
+VS = +5 V, −VS = 0 V, VREF = 2.5 V, VCM = 2.5 V, TA = 25°C, G = 1 to 1000, RL = 10 kΩ to ground, specifications referred to input, unless
otherwise noted.

Table 2.
Parameter Test Conditions/Comments Min Typ Max Unit
COMMON-MODE REJECTION RATIO (CMRR) VCM = 0.1 V to 4.9 V
CMRR at DC
G = 1, G = 10 106 120 dB
G = 100, G = 1000 114 140 dB
Over Temperature (G = 1) TA = −40°C to +125°C 104 dB
CMRR at 1 kHz 80 dB
NOISE
Voltage Noise
Spectral Density f = 1 kHz 68 nV/√Hz
Peak to Peak f = 0.1 Hz to 10 Hz 1.5 µV p-p
Current Noise
Spectral Density f = 1 kHz 70 fA/√Hz
Peak to Peak f = 0.1 Hz to 10 Hz 3 pA p-p
VOLTAGE OFFSET
Offset 30 75 µV
Average Temperature Coefficient TA = −40°C to +125°C 0.3 µV/°C
Offset RTI vs. Supply (PSR) 100 dB
INPUTS 1 Valid for REF and FB pair, as well as +IN and −IN
Input Bias Current TA = +25°C 250 650 pA
Over Temperature TA = −40°C to +125°C 1 nA
Average Temperature Coefficient 0.5 pA/°C
Input Offset Current TA = +25°C 250 650 pA
Over Temperature TA = −40°C to +125°C 1 nA
Average Temperature Coefficient 0.5 pA/°C
Input Impedance
Differential 100||5 MΩ||pF
Common Mode 800||10 MΩ||pF
Differential Input Operating Voltage TA = −40°C to +125°C ±3.85 V
Input Operating Voltage (+IN, −IN, or REF) TA = +25°C −VS − 0.3 +VS + 0.3 V
TA = −40°C to +125°C −VS − 0.2 +VS + 0.2 V
DYNAMIC RESPONSE
Small Signal Bandwidth −3 dB
Low Bandwidth Mode Pin 1 connected to −VS
G=1 200 kHz
G = 10 20 kHz
G = 100 2 kHz
G = 1000 0.2 kHz
High Bandwidth Mode Pin 1 connected to +VS
G = 10 100 kHz
G = 100 10 kHz
G = 1000 1 kHz

Rev. 0 | Page 3 of 28
AD8237 Data Sheet
Parameter Test Conditions/Comments Min Typ Max Unit
Settling Time 0.01% 4 V output step
Low Bandwidth Mode Pin 1 connected to −VS
G=1 80 µs
G = 10 100 µs
G = 100 440 µs
G = 1000 4 ms
High Bandwidth Mode Pin 1 connected to +VS
G = 10 80 µs
G = 100 100 µs
G = 1000 820 µs
Slew Rate
Low Bandwidth Mode 0.05 V/µs
High Bandwidth Mode 0.15 V/µs
EMI Filter Frequency 6 MHz
GAIN 2 G = 1 + (R2/R1)
Gain Range 3 1 1000 V/V
Gain Error VOUT = 0.1 V to 4.9 V, G = 1 to G = 1000 0.005 %
Gain Error vs. VCM 15 ppm/V
Gain vs. Temperature TA = −40°C to +125°C 0.5 ppm/°C
Gain Nonlinearity VOUT = 0.2 V to 4.8 V, RL = 10 kΩ to ground
G = 1, G = 10 3 ppm
G = 100 6 ppm
G = 1000 10 ppm
OUTPUT
Output Swing
RL = 10 kΩ to Midsupply TA = +25°C −VS + 0.05 +VS − 0.05 V
TA = −40°C to 125°C −VS + 0.07 +VS − 0.07 V
RL = 100 kΩ to Midsupply TA = +25°C −VS + 0.02 +VS − 0.02 V
TA = −40°C to 125°C −VS + 0.03 +VS − 0.03 V
Short-Circuit Current 4 mA
POWER SUPPLY
Operating Range 1.8 5.5 V
Quiescent Current TA = +25°C 115 130 µA
TA = −40°C to +125°C 150 µA
TEMPERATURE RANGE
Specified −40 +125 °C
1
Specifications apply to input voltages between 0 V and 5 V. When measuring voltages beyond the supplies, there is additional offset error, bias currents increase, and
input impedance decreases, especially at higher temperatures.
2
For G > 1, errors from the external resistors, R1 and R2, must be added to these specifications, including error from the FB pin bias current.
3
The AD8237 has only been characterized for gains of 1 to 1000; however, higher gains are possible.

Rev. 0 | Page 4 of 28
Data Sheet AD8237
+VS = 1.8 V, −VS = 0 V, VREF = 0.9 V, VCM = 0.9 V, TA = 25°C, G = 1 to 1000, RL = 10 kΩ to ground, specifications referred to input, unless
otherwise noted.

Table 3.
Parameter Test Conditions/Comments Min Typ Max Unit
COMMON-MODE REJECTION RATIO (CMRR) VCM = 0.2 V to 1.6 V
CMRR at DC
G = 1, G = 10 100 120 dB
G = 100, G = 1000 114 140 dB
Over Temperature (G = 1) TA = −40°C to +125°C 94 dB
CMRR at 1 kHz 80 dB
NOISE
Voltage Noise
Spectral Density f = 1 kHz, VDIFF ≤ 100 mV 68 nV/√Hz
Peak to Peak f = 0.1 Hz to 10 Hz, VDIFF ≤ 100 mV 1.5 µV p-p
Current Noise
Spectral Density f = 1 kHz 70 fA/√Hz
Peak to Peak f = 0.1 Hz to 10 Hz 3 pA p-p
VOLTAGE OFFSET
Offset 25 75 µV
Average Temperature Coefficient TA = −40°C to +125°C 0.3 µV/°C
Offset RTI vs. Supply (PSR) 100 dB
INPUTS 1 Valid for REF and FB pair, as well as +IN and −IN
Input Bias Current TA = +25°C 250 650 pA
Over Temperature TA = −40°C to +125°C 1 nA
Average Temperature Coefficient 0.5 pA/°C
Input Offset Current TA = +25°C 250 650 pA
Over Temperature TA = −40°C to +125°C 1 nA
Average Temperature Coefficient 0.5 pA/°C
Input Impedance
Differential 100||5 MΩ||pF
Common Mode 800||10 MΩ||pF
Differential Input Operating Voltage TA = −40°C to +125°C ± 0.75 V
Input Operating Voltage (+IN, −IN, REF, or FB) TA = +25°C −VS − 0.3 +VS + 0.3 V
TA = −40°C to +125°C −VS − 0.2 +VS + 0.2 V
DYNAMIC RESPONSE
Small Signal Bandwidth −3 dB
Low Bandwidth Mode Pin 1 connected to −VS
G=1 200 kHz
G = 10 20 kHz
G = 100 2 kHz
G = 1000 0.2 kHz
High Bandwidth Mode Pin 1 connected to +VS
G = 10 100 kHz
G = 100 10 kHz
G = 1000 1 kHz
Slew Rate
Low Bandwidth Mode 0.05 V/µs
High Bandwidth Mode 0.15 V/µs
EMI Filter Frequency 6 MHz

Rev. 0 | Page 5 of 28
AD8237 Data Sheet
Parameter Test Conditions/Comments Min Typ Max Unit
GAIN 2 G = 1 + (R2/R1)
Gain Range 3 1 1000 V/V
Gain Error VOUT = 0.2 V to 1.6 V, G = 1 to G = 1000 0.005 %
Gain Error vs. VCM 15 ppm/V
Gain vs. Temperature TA = −40°C to +125°C 0.5 ppm/°C
Gain Nonlinearity VOUT = 0.2 V to 1.6 V
G = 1, G = 10 3 ppm
G = 100 6 ppm
G = 1000 10 ppm
OUTPUT
Output Swing
RL = 10 kΩ to Midsupply TA = +25°C −VS + 0.05 +VS − 0.05 V
TA = −40°C to 125°C −VS + 0.07 +VS − 0.07 V
RL = 100 kΩ to Midsupply TA = +25°C −VS + 0.02 +VS − 0.02 V
TA = −40°C to 125°C −VS + 0.03 +VS − 0.03 V
Short-Circuit Current 4 mA
POWER SUPPLY
Operating Range 1.8 5.5 V
Quiescent Current TA = +25°C 115 130 µA
TA = −40°C to +125°C 150 µA
TEMPERATURE RANGE
Specified −40 +125 °C
1
Specifications apply to input voltages between 0 V and 1.8 V. When measuring voltages beyond the supplies, there is additional offset error, bias currents increase,
and input impedance decreases, especially at higher temperatures.
2
For G > 1, errors from the external resistors, R1 and R2, must be added to these specifications, including error from the FB pin bias current.
3
The AD8237 has only been characterized for gains of 1 to 1000; however, higher gains are possible.

Rev. 0 | Page 6 of 28
Data Sheet AD8237

ABSOLUTE MAXIMUM RATINGS

THERMAL RESISTANCE
Table 4.
Parameter Rating θJA is specified for a device in free air.
Supply Voltage 6V Table 5.
Output Short-Circuit Current Duration Indefinite Package θJA Unit
Maximum Voltage at −IN, +IN, FB, or REF1 +VS + 0.5 V 8-Lead MSOP, 4-Layer JEDEC Board 145.7 °C/W
Minimum Voltage at −IN, +IN, FB, or REF1 −VS − 0.5 V
Storage Temperature Range −65°C to +150°C
Junction Temperature Range −65°C to +150°C ESD CAUTION
ESD
Human Body Model 8 kV
Charge Device Model 1.25 kV
Machine Model 0.2 kV
1
If input voltages beyond the specified minimum or maximum voltages are
expected, place resistors in series with the inputs to limit the current to 5 mA.

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

Rev. 0 | Page 7 of 28
AD8237 Data Sheet

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

AD8237
BW 1 8 VOUT
+IN 2 + – 7 FB
–IN 3 – + 6 REF

10289-003
–VS 4 TOP VIEW 5 +VS
(Not to Scale)

Figure 3. Pin Configuration

Table 6. Pin Function Descriptions

Pin No. Mnemonic Description
1 BW For high bandwidth mode, connect this pin to +VS, or for low bandwidth mode, connect this pin to −VS. Do not
leave this pin floating.
2 +IN Positive Input.
3 −IN Negative Input.
4 −VS Negative Supply.
5 +VS Positive Supply.
6 REF Reference Input.
7 FB Feedback Input.
8 VOUT Output.

Rev. 0 | Page 8 of 28
Data Sheet AD8237

TYPICAL PERFORMANCE CHARACTERISTICS

+VS = +5 V, −VS = 0 V, VREF = 2.5 V, TA = 25°C, RL = 10 kΩ to ground, unless otherwise noted.
40
16
35
14
30
12

25
10
UNITS

UNITS
20
8

6 15

4 10

2 5

0 0

10289-004

10289-007
–60 –40 –20 0 20 40 60 –6 –4 –2 0 2 4 6
OFFSET VOLTAGE (µV) CMRR (µV/V)

Figure 4. Typical Distribution of Offset Voltage Figure 7. Typical Distribution of CMRR

21
18
18
15
15

12
UNITS

UNITS

12

9
9

6 6

3 3

0 0
10289-005

10289-008
–0.6 –0.4 –0.2 0 0.2 0.4 0.6 –0.6 –0.4 –0.2 0 0.2 0.4 0.6
POSITIVE INPUT BIAS CURRENT (nA) INPUT OFFSET CURRENT (nA)

Figure 5. Typical Distribution of Input Bias Current Figure 8. Typical Distribution of Input Offset Current

24
35
21
30
18
25
15
UNITS

UNITS

20
12
15
9

10
6

5 3

0 0
10289-006

10289-009

–60 –40 –20 0 20 40 60 100 105 110 115 120 125 130
GAIN ERROR (µV/V) SUPPLY CURRENT (µA)

Figure 6. Typical Distribution of Gain Error (G = 1) Figure 9. Typical Distribution of Supply Current

Rev. 0 | Page 9 of 28
AD8237 Data Sheet
6 4
G=1 VS = ±2.5V
VREF = 0V
5 RL = 10kΩ 3
VS = 5V
COMMON-MODE VOLTAGE (V)

COMMON-MODE VOLTAGE (V)

2
4

1
3
0 VS = ±0.9V
2
–1
VS = 1.8V
1
–2

0 –3 G = 100
VREF = 0V
RL = 5kΩ
–1 –4

10289-010

10289-013
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 –3 –2 –1 0 1 2 3
OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V)

Figure 10. Input Common-Mode Voltage vs. Output Voltage, Figure 13. Input Common-Mode Voltage vs. Output Voltage,
G = 1, VREF = 0 V, VS = 5 V and VS = 1.8 V, RL = 10 kΩ to Ground G = 100, VREF = 0 V, VS = ±2.5 V and VS = ±0.9 V, RL = 5 kΩ to Ground

6 5.0
G = 100 –40°C
VREF = 0V 4.5 +25°C
5 RL = 10kΩ +85°C
VS = 5V
4.0 +105°C
COMMON-MODE VOLTAGE (V)

+125°C
4 3.5

3.0
3
VIN (V)

VS = 1.8V 2.5
2
2.0

1 1.5

1.0
0
0.5

–1 0

10289-014
10289-011

0 1 2 3 4 5 6 1.8 2.3 2.8 3.3 3.8 4.3 4.8

OUTPUT VOLTAGE (V) SUPPLY VOLTAGE (V)

Figure 11. Input Common-Mode Voltage vs. Output Voltage, Figure 14. Maximum Differential Input vs. Supply Voltage
G = 100, VREF = 0 V, VS = 5 V and VS = 1.8 V, RL = 10 kΩ to Ground

4 5
VS = ±2.5V G=1
VREF = 0V 4
3 RL = 5kΩ –VS
COMMON-MODE VOLTAGE (V)

3
2
INPUT BIAS CURRENT (nA)

2
1
1
IB –
0 VS = ±0.9V 0
IB+
–1 –1

–2 –2
+VS
–3
–3
–4
REPRESENTATIVE SAMPLE
–4 –5
10289-012

10289-015

–3 –2 –1 0 1 2 3 –3.0 –2.5 –2.0 –1.5 –1.0 –0.5 0 0.5 1.0 1.5 2.0 2.5 3.0
VOLTAGE OUTPUT (V) COMMON-MODE VOLTAGE (V)
Figure 12. Input Common-Mode Voltage vs. Output Voltage, Figure 15. Input Bias Current vs. Common-Mode Voltage
G = 1, VREF = 0 V, VS = ±2.5 V and VS = ±0.9 V, RL = 5 kΩ to Ground

Rev. 0 | Page 10 of 28
Data Sheet AD8237
15 140
VS = ±2.5V HIGH BANDWIDTH MODE
VCM = 0V
10 120
IB–
INPUT BIAS CURRENT (nA)

100

POSITIVE PSRR (dB)

5

80
0
60

–5 BW LIMIT
40
IB+
–10 GAIN = 10
20
GAIN = 100
REPRESENTATIVE SAMPLE GAIN = 1000
–15 0

10289-016

10289-019
–2.5 –2.0 –1.5 –1.0 –0.5 0 0.5 1.0 1.5 2.0 2.5 0.1 1 10 100 1k 10k
DIFFERENTIAL INPUT VOLTAGE (V) FREQUENCY (Hz)

Figure 16. Input Bias Current vs. Differential Input Voltage Figure 19. Positive PSRR vs. Frequency, RTI, High Bandwidth Mode

140 140
LOW BANDWIDTH MODE HIGH BANDWIDTH MODE
VS = 5V
120 120

100 100

NEGATIVE PSRR (dB)

PSRR (dB)

80 80

60 60

BW LIMIT
40 40
BW LIMIT
GAIN = 1
20 GAIN = 10 20 GAIN = 10
GAIN = 100 GAIN = 100
GAIN = 1000 GAIN = 1000
0 0
10289-017

10289-020
0.1 1 10 100 1k 10k 0.1 1 10 100 1k 10k
FREQUENCY (Hz) FREQUENCY (Hz)

Figure 17. Positive PSRR vs. Frequency, RTI, Low Bandwidth Mode, VS = 5 V Figure 20. Negative PSRR vs. Frequency, RTI, High Bandwidth Mode

140 80
LOW BANDWIDTH MODE LOW BANDWIDTH MODE
VS = 5V VS = 5V
70
120
GAIN = 1000
60
100
NEGATIVE PSRR (dB)

50
80 GAIN = 100
40
GAIN (dB)

60 30
GAIN = 10
40 20
BW LIMIT
10
20
GAIN = 1
GAIN = 1 0
0 GAIN = 10
GAIN = 100 –10
GAIN = 1000
–20 –20
10289-018

10289-021

0.1 1 10 100 1k 10k 10 100 1k 10k 100k 1M

FREQUENCY (Hz) FREQUENCY (Hz)

Figure 18. Negative PSRR vs. Frequency, RTI, Low Bandwidth Mode, VS = 5 V Figure 21. Gain vs. Frequency, Low Bandwidth Mode, VS = 5 V

Rev. 0 | Page 11 of 28
AD8237 Data Sheet
80 5.0
LOW BANDWIDTH MODE
VS = 1.8V
70 4.5
GAIN = 1000 DIFFERENTIAL
60 4.0
INPUT

OUTPUT VOLTAGE (V p-p)

50 3.5
–IN +IN
GAIN = 100
40 3.0
GAIN (dB)

30 2.5
GAIN = 10
20 2.0

10 1.5
GAIN = 1
0 1.0

–10 0.5 G=1

LOW BANDWIDTH MODE
–20 0

10289-022

10289-025
10 100 1k 10k 100k 1M 10 100 1k 10k 100k
FREQUENCY (Hz) FREQUENCY (Hz)

Figure 22. Gain vs. Frequency, Low Bandwidth Mode, VS = 1.8 V Figure 25. Large Signal Frequency Response, Low Bandwidth Mode, G = 1

80 5.0
HIGH BANDWIDTH MODE
VS = 5V
70 4.5
DIFFERENTIAL
GAIN = 1000 INPUT
60 4.0

50 OUTPUT VOLTAGE (V p-p) 3.5 –IN +IN

GAIN = 100
40 3.0
GAIN (dB)

30 2.5
GAIN = 10
20 2.0

10 1.5

0 1.0

–10 0.5 G = 10
HIGH BANDWIDTH MODE
–20 0
10289-023

10289-026
10 100 1k 10k 100k 1M 10 100 1k 10k 100k
FREQUENCY (Hz) FREQUENCY (Hz)

Figure 23. Gain vs. Frequency, High Bandwidth Mode, VS = 5 V Figure 26. Large Signal Frequency Response, High Bandwidth Mode, G = 10

80 6
HIGH BANDWIDTH MODE
MAXIMUM COMMON-MODE VOLTAGE (V p-p)

VS = 1.8V
70 VS = ±2.5 V
GAIN = 1000 5
60

50
4
GAIN = 100
40
GAIN (dB)

30 3
GAIN = 10
20
VS = ±0.9V
2
10

0
1
–10

–20 0
10289-024

10289-080

10 100 1k 10k 100k 1M 1 10 100 1k 10k 100k

FREQUENCY (Hz) FREQUENCY (Hz)

Figure 24. Gain vs. Frequency, High Bandwidth Mode, VS = 1.8 V Figure 27. Maximum Common-Mode Voltage vs. Frequency

Rev. 0 | Page 12 of 28
Data Sheet AD8237
160
BOTH BANDWIDTH MODES
ONLY BW LIMIT CHANGES
140

120

100 GAIN = 1
LOW BANDWIDTH MODE ONLY
CMRR (dB)

BW LIMIT
80

60

40
GAIN = 1
GAIN = 10

10289-031
20
GAIN = 100
0.4µV/DIV 1s/DIV
GAIN = 1000
0

10289-027
0.1 1 10 100 1k 10k 100k
FREQUENCY (Hz)

Figure 28. CMRR vs. Frequency Figure 31. 0.1 Hz to 10 Hz RTI Voltage Noise

160 1k
BOTH BANDWIDTH MODES VALID FOR BOTH BANDWIDTH MODES
ONLY BW LIMIT CHANGES
140

120

NOISE (nV/√Hz)
100
CMRR (dB)

GAIN = 1
LOW BANDWIDTH MODE ONLY BW LIMIT
80 100

60

40
GAIN = 1
20 GAIN = 10
GAIN = 100
GAIN = 1000
0 10

10289-032
10289-028

0.1 1 10 100 1k 10k 100k 1 10 100 1k 10k 100k

FREQUENCY (Hz) FREQUENCY (Hz)

Figure 29. CMRR vs. Frequency, 1 kΩ Source Imbalance Figure 32. Current Noise Spectral Density vs. Frequency

10k
G = 1, LOW BANDWIDTH MODE
G = 10, LOW BANDWIDTH MODE
G = 10, HIGH BANDWIDTH MODE
G = 100, LOW BANDWIDTH MODE
G = 100, HIGH BANDWIDTH MODE
1k
NOISE (nV/√Hz)

100
10289-033

1.5pA/DIV 1s/DIV
10
10289-029

0.1 1 10 100 1k 10k 100k

FREQUENCY (Hz)

Figure 30. Voltage Noise Spectral Density vs. Frequency Figure 33. 0.1 Hz to 10 Hz RTI Current Noise

Rev. 0 | Page 13 of 28
AD8237 Data Sheet
0.010 20
VIN = ±500mV G = 100
0.008
15
0.006
10

NONLINEARITY (ppm)
0.004
GAIN ERROR (%)

5
0.002

0 0

–0.002
–5
–0.004
–10
–0.006
–15
–0.008

–0.010 –20

10289-034

10289-039
–2.5 –2.0 –1.5 –1.0 –0.5 0 0.5 1.0 1.5 2.0 2.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
COMMON-MODE VOLTAGE (V) OUTPUT VOLTAGE (V)

Figure 34. Gain Error vs. Common-Mode Voltage, G = 1 Figure 37. Gain Nonlinearity, G = 100, VS = 5 V, RL = 10 kΩ to Ground

10 50
G=1 G = 1000
8 40

6 30
NONLINEARITY (ppm)

4 NONLINEARITY (ppm) 20

2 10

0 0

–2 –10

–4 –20

–6 –30

–8 –40

–10 –50
10289-037

10289-040
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V)

Figure 35. Gain Nonlinearity, G = 1, VS = 5 V, RL = 10 kΩ to Ground, Figure 38. Gain Nonlinearity, G = 1000, VS = 5 V, RL = 10 kΩ to Ground
Low Bandwidth Mode

10
G=1
G = 10 LOW BANDWIDTH MODE
8

6
NONLINEARITY (ppm)

–2

–4

–6
10289-041

–8
1V/DIV 400µs/DIV
–10
10289-038

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
OUTPUT VOLTAGE (V)

Figure 36. Gain Nonlinearity, G = 10, VS = 5 V, RL = 10 kΩ to Ground Figure 39. Large Signal Pulse Response, Low Bandwidth Mode,
G = 1, RL = 10 kΩ, CL = 10 pF

Rev. 0 | Page 14 of 28
Data Sheet AD8237
G = 10 G = 10
LOW BANDWIDTH MODE HIGH BANDWIDTH MODE

10289-042

10289-045
1V/DIV 400µs/DIV 1V/DIV 400µs/DIV

Figure 40. Large Signal Pulse Response, Low Bandwidth Mode, Figure 43. Large Signal Pulse Response, High Bandwidth Mode,
G = 10, RL = 10 kΩ, CL = 10 pF G = 10, RL = 10 kΩ, CL = 10 pF

G = 100 G = 100
LOW BANDWIDTH MODE HIGH BANDWIDTH MODE
10289-043

10289-046
1V/DIV 400µs/DIV 1V/DIV 400µs/DIV

Figure 44. Large Signal Pulse Response, High Bandwidth Mode,

Figure 41. Large Signal Pulse Response, Low Bandwidth Mode, G = 100, RL = 10 kΩ, CL = 10 pF
G = 100, RL = 10 kΩ, CL = 10 pF
G = 1000
HIGH BANDWIDTH MODE
G = 1000
LOW BANDWIDTH MODE

10289-047

1V/DIV 400µs/DIV
10289-044

1V/DIV 2ms/DIV

Figure 45. Large Signal Pulse Response, High Bandwidth Mode,

Figure 42. Large Signal Pulse Response, Low Bandwidth Mode, G = 1000, RL = 10 kΩ, CL = 10 pF
G = 1000, RL = 10 kΩ, CL = 10 pF

Rev. 0 | Page 15 of 28
AD8237 Data Sheet
G=1 G = 1000
LOW BANDWIDTH MODE LOW BANDWIDTH MODE

10289-048

10289-051
20mV/DIV 10µs/DIV 20mV/DIV 2ms/DIV

Figure 46. Small Signal Pulse Response, G = 1, RL = 10 kΩ, CL = 100 pF, Figure 49. Small Signal Pulse Response, G = 1000, RL = 10 kΩ, CL = 100 pF,
Low Bandwidth Mode Low Bandwidth Mode

G = 10 G=1
LOW BANDWIDTH MODE LOW BANDWIDTH MODE
NO LOAD 100pF
560pF
1nF

fCHOP

10289-052
10289-049

20mV/DIV 50µs/DIV 20mV/DIV 20µs/DIV

Figure 47. Small Signal Pulse Response, G = 10, RL = 10 kΩ, CL = 100 pF, Figure 50. Small Signal Pulse Response with Various Capacitive Loads,
Low Bandwidth Mode G = 1, RL = Infinity, Low Bandwidth Mode

G = 100 G = 10
LOW BANDWIDTH MODE HIGH BANDWIDTH MODE

10289-053
10289-050

20mV/DIV 200µs/DIV 20mV/DIV 10µs/DIV

Figure 51. Small Signal Pulse Response, G = 10, RL = 10 kΩ, CL = 100 pF,
Figure 48. Small Signal Pulse Response, G = 100, RL = 10 kΩ, CL = 100 pF, High Bandwidth Mode
Low Bandwidth Mode

Rev. 0 | Page 16 of 28
Data Sheet AD8237
80
G = 100 NORMALIZED TO 25°C VS = ±2.5V
HIGH BANDWIDTH MODE
60

40

OFFSET VOLTAGE (µV)

20

–20
fCHOP
–40

10289-054
–60
20mV/DIV 100µs/DIV
–80

10289-057
–40 –25 –10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)

Figure 52. Small Signal Pulse Response, G = 100, RL = 10 kΩ, CL = 100 pF, Figure 55. Offset Voltage vs. Temperature
High Bandwidth Mode
50
G = 1000 NORMALIZED TO 25°C
HIGH BANDWIDTH MODE GAIN = 1
40 VS = ±2.5V
VOUT = ±2V
30

20

GAIN ERROR (µV/V)

10

–10

–20

–30
10289-055

–40
20mV/DIV 1ms/DIV
–50

10289-058
–40 –25 –10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)

Figure 53. Small Signal Pulse Response, G = 1000, RL = 10 kΩ, CL = 100 pF, Figure 56. Gain vs. Temperature
High Bandwidth Mode
1.0
G = 10 NORMALIZED TO 25°C G=1
HIGH BANDWIDTH MODE 0.8 VS = ±2.5V
RL = 100kΩ VCM = ±2V
NO LOAD 100pF 0.6
560pF
2nF 0.4
CMRR (µV/V)

0.2

–0.2

–0.4

–0.6
10289-056

–0.8
50mV/DIV 40µs/DIV
–1.0
10289-059

–40 –25 –10 5 20 35 50 65 80 95 110 125

TEMPERATURE (°C)

Figure 54. Small Signal Pulse Response with Various Capacitive Loads, Figure 57. CMRR vs. Temperature
G = 10, RL = 100 kΩ, High Bandwidth Mode

Rev. 0 | Page 17 of 28
AD8237 Data Sheet
500 +VS
REPRESENTATIVE SAMPLE
BIAS CURRENT AND OFFSET CURRENT (pA)

400 –0.2

REFERRED TO SUPPLY VOLTAGES

300 –0.4

OUTPUT VOLTAGE SWING (V)

200 –IN BIAS CURRENT

100
–40°C
+25°C
0 +IN BIAS CURRENT
+85°C
+125°C
–100

–200
INPUT OFFSET CURRENT
–300 +0.4

–400 +0.2

–500 –VS

10289-063
10289-060
–40 –25 –10 5 20 35 50 65 80 95 110 125 1k 10k 100k 1M
TEMPERATURE (°C) LOAD RESISTANCE (Ω)

Figure 58. Input Bias Current and Input Offset Current vs. Temperature Figure 61. Output Voltage Swing vs. Load Resistance, VS = ±2.5 V

500 +VS
REPRESENTATIVE SAMPLE
BIAS CURRENT AND OFFSET CURRENT (pA)

400 –0.1

REFERRED TO SUPPLY VOLTAGES

300 –0.2

OUTPUT VOLTAGE SWING (V)

OFFSET CURRENT
200 –0.3

100 –0.4
–40°C
REF BIAS CURRENT +25°C
0
+85°C
+125°C
–100 +0.4

–200 FB BIAS CURRENT +0.3

–300 +0.2

–400 +0.1

–500 –VS

10289-064
10289-061

–40 –25 –10 5 20 35 50 65 80 95 110 125 1k 10k 100k 1M

TEMPERATURE (°C) LOAD RESISTANCE (Ω)

Figure 59. REF Input Bias Current, FB Input Bias Current, and Offset Current vs. Figure 62. Output Voltage Swing vs. Load Resistance, VS = ±0.9 V
Temperature

+VS +VS

–0.4
–100
REFERRED TO SUPPLY VOLTAGES
REFERRED TO SUPPLY VOLTAGES

RL = 5kΩ
OUTPUT VOLTAGE SWING (mV)

–0.8
OUTPUT VOLTAGE SWING (V)

–200
–1.2
–300
–40°C –40°C
+25°C +25°C
+85°C +85°C
+125°C +125°C
+300
+1.2
+200
+0.8
+100
+0.4

–VS –VS
10289-065
10289-062

0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 0 0.5 1.0 1.5 2.0 2.5 3.0
SUPPLY VOLTAGE (±VS) OUTPUT CURRENT (mA)

Figure 60. Output Voltage Swing vs. Supply Voltage Figure 63. Output Voltage Swing vs. Output Current

Rev. 0 | Page 18 of 28
Data Sheet AD8237
200

180

160
SUPPLY CURRENT (µA)

140 VS = 5V

120

100
VS = 1.8V
80

60

40

20

10289-066
–40 –25 –10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)

Figure 64. Supply Current vs. Temperature, VS = 5 V, VS = 1.8 V

Rev. 0 | Page 19 of 28
AD8237 Data Sheet

THEORY OF OPERATION
INTERNAL
AD8237 IN-AMP
+
TIA VOUT
–
I1 – I2
+VS +VS R2
–IN –
RFI – RFI
+IN FILTER + FB
– TO gm1 FILTER
+
–VS V –VS
ALS VCM = S gm1 I2 gm2 V
VCM = S
ALS
+VS
R1
+VS 2 I1 +
– 2
FB +
RFI + RFI
–IN – REF
FILTER FILTER

10289-067
TO gm2
–VS –VS

Figure 65. Simplified Schematic

ARCHITECTURE The AD8237 includes an RFI filter to remove high frequency out-
The AD8237 is based on an indirect current feedback topology of-band signals without affecting input impedance and CMRR over
consisting of three amplifiers: two matched transconductance frequency. Additionally, there is a bandwidth mode pin to adjust the
amplifiers that convert voltage to current, and one transimpedance compensation. For gains greater than or equal to 10, the bandwidth
amplifier, TIA, that converts current to voltage. mode pin (BW) can be tied to +VS to change the compensation
and increase the gain bandwidth product of the amplifier to 1 MHz.
To understand how the AD8237 works, first consider only the Otherwise, connect BW to −VS for a 200 kHz gain bandwidth
internal in-amp. Assume a positive differential voltage is applied product.
across the inputs of the transconductance amplifier, gm1. This input
voltage is converted into a differential current, I1, by the gm. SETTING THE GAIN
Initially, I2 is zero; therefore, I1 is fed into the TIA, causing the There are several ways to configure the AD8237. The transfer
output to increase. If there is feedback from the output of the TIA function of the AD8237 in the configuration in Figure 65 is
to the negative terminal of gm2, and the positive terminal is held VOUT = G(V+IN − V−IN) + VREF
constant, the increasing output of the TIA causes I2, as shown, to
increase. When it is assumed that the TIA has infinite gain, the where:
loop is satisfied when I2 equals I1. Because the gain of gm1 and gm2 are R2
G =1+
matched, this means that the differential input voltage across gm1 R1
appears across the inputs of gm2. This behavioral model is all that Table 7. Suggested Resistors for Various Gains (1% Resistors)
is needed for proper operation of the AD8237, and the rest of the R1 (kΩ) R2 (kΩ) Gain
circuit is for performance optimization.
None Short 1.00
The AD8237 employs a novel adaptive level shift (ALS) technique. 49.9 49.9 2.00
This switched capacitor method shifts the common-mode level of 20 80.6 5.03
the input signal to the optimal level for the in-amp while preserving 10 90.9 10.09
the differential signal. Once this is accomplished, additional 5 95.3 20.06
performance benefits can be achieved by using the internal in-amp to 2 97.6 49.8
compare +IN to FB and −IN to REF. This is only practical because 1 100 101
the signals emitting from the ALS blocks are all referred to the 1 200 201
same common-mode potential. 1 499 500
In traditional instrumentation amplifiers, the input common- 1 1000 1001
mode voltage can limit the available output swing, typically depicted Whereas the ratio of R2 to R1 sets the gain, the designer determines
in a hexagon plot of the input common-mode vs. the output voltage. the absolute value of the resistors. Larger values reduce power
Because of this limit, very few instrumentation amplifiers can consumption and output loading; smaller values limit the FB input
measure small signals near either supply rail. Using the indirect bias current and input impedance errors. If the parallel combination
current feedback topology and ALS, the AD8237 achieves a truly of R1 and R2 is greater than about 30 kΩ, the resistors start to
rail-to-rail characteristic. This increases power efficiency in many contribute to the noise. For best output swing and linearity, keep
applications by allowing for power supply reduction. (R1 + R2) || RL ≥ 10 kΩ.

Rev. 0 | Page 20 of 28
Data Sheet AD8237
The bias current at the FB pin is dependent on the common-mode For the best performance, keep the two input pairs (+IN and −IN,
and differential input impedance. FB bias current errors from the and FB and REF) at similar dc and ac common-mode potentials. This
common-mode input impedance can be reduced by placing a resistor has two benefits. For dc common-mode, this minimizes the gain
value of R1||R2 in series with the REF terminal, as shown in error of the AD8237. For ac common-mode, this yields improved
Figure 66. At higher gains, this resistor can simply be the same frequency response. There is a maximum rate at which the ALS
value as R1. circuit can shift the common-mode voltage, which is shown in
Figure 27. Because of this limit, the best large signal frequency
+IN
response is achieved when the ac common-mode voltage of the two
IB+ VOUT
input pairs are matched. For example, if the negative input is at
AD8237
IB – FB a fixed voltage and the positive input is driven with a signal, the
–IN REF I BF feedback input moves with the positive input; therefore, the ac
IBR common-mode voltage of the two input pairs is the same. The
+ effect of this is shown in Figure 25 and Figure 26.
R1||R2
G=1+
R2
R1
– R1 R2
CLOCK FEEDTHROUGH
10289-068

VREF
The AD8237 uses nonoverlapping clocks to perform the chopping
and ALS functions. The input voltage-to-current amplifiers are
Figure 66. Cancelling Error from FB Input Bias Current chopped at approximately 27 kHz.
Some applications may be able to take advantage of the symmetry of Although there is internal ripple-suppression circuitry, trace
the input transconductance amplifiers by canceling the differential amounts of these clock frequencies and their harmonics can be
input impedance errors, as shown in Figure 67. If the source resistance observed at the output in some configurations. These ripples are
is well known, setting the parallel combination of R1 and R2 equal to typically 100 µV RTI when the bandwidth is greater than the clock
RS accomplishes this. If practical resistor values force the parallel frequency. They can be larger after a transient pulse but settle back
combination of R1 and R2 to be less than RS, add a series resistor to nominal, which is included in the settling time specifications.
to the FB input to make up for the difference. The amount of feedthrough at the output is dependent upon the
V+IN = VIN ×
RIN gain and bandwidth mode. The worst case is in high bandwidth
RS + RIN
mode when the gain can be almost 40 before the clock ripple is
RS
+IN AD8237 outside the bandwidth of the amplifier. For some applications, it
RIN
VOUT may be necessary to use additional filtering after the AD8237 to
VIN
RIN
remove this ripple.
FB

–IN REF INPUT VOLTAGE RANGE

R1 R2 The allowable input range of the AD8237 is much simpler than
IF R1||R2 = RS, traditional architectures. For the transfer function of the AD8237 to
10289-069

VOUT = VIN × (1 +
R2
R1
) be valid, the input voltage must follow two rules
Figure 67. Canceling Input Impedance Errors • Keep the differential input voltage within the limits shown in
Figure 14; approximately ±(Total Supply Voltage – 1.2) V.
GAIN ACCURACY
• Keep the voltage of the inputs (including the REF and FB pins)
Unlike most instrumentation amplifiers, the relative match of the and the output within the specified voltage range, which are
two gain setting resistors determines the gain accuracy of the AD8237 approximately the supply rails.
rather than a single external resistor. For example, if two resistors have
exactly the same absolute error, there is no error in gain. Conversely, Because the output swing is completely independent of the input
two 1% resistors can cause approximately 2% maximum gain error common-mode voltage, there are no hexagonal figures or complicated
at high gains. Temperature coefficient mismatch of the gain setting formulas to follow, and no limitation for the output swing the
resistors increases the gain drift of the instrumentation amplifier amplifier has for input signals with changing common mode.
circuit according to the gain equation. Because these external resistors
do not have to match any on-chip resistors, resistors with good TCR
tracking can achieve excellent gain drift without the need for a low
absolute TCR.

Rev. 0 | Page 21 of 28
AD8237
INPUT PROTECTION
If no external protection is used, keep the inputs of the AD8237
within the voltages specified in the absolute maximum ratings. If the
application requires voltages beyond these ratings, input protection
resistors can be placed in series with the inputs of the AD8237 to
limit the current to 5 mA. For example, if +VS is 3 V and a 10 V
overload voltage can occur at the inputs, place a protection resistor of
at least (10 V − 3 V)/5 mA = 1.4 kΩ in series with the inputs.
POSITIVE VOLTAGE PROTECTION:
V – +VS
RPROTECT > IN
5mA
Data Sheet
USING THE REFERENCE PIN
In general, instrumentation amplifier reference pins can be useful
for a few reasons. They provide a means of physically separating the
input and output grounds to reject ground bounce common to the
inputs. They can also be used to precisely level shift the output signal.
In the configuration shown in Figure 65 through Figure 67, the gain
of the reference pin to the output is unity, as is common in a typical
in-amp. Because the reference pin is functionally no different from
the positive input, it can be used with gain, as shown in Figure 70.
This configuration can be very useful in certain cases, such as dc

RPROTECT
+VS removal servo loops, which typically use an inverting integrator to
+
drive REF and compensate for a dc offset. This requires special
V+IN
–
attention to the input range (especially at REF) and the output range.
AD8237
All three input voltages are referred to the one ground shown, which
RPROTECT
may need to be a low impedance midsupply.
+
V–IN –VS
– +IN

VOUT
NEGATIVE VOLTAGE PROTECTION:
AD8237
10289-070

–VS – VIN
RPROTECT > FB
5mA
–IN REF
Figure 68. Protection Resistors for Large Input Voltages
R2
R1
FILTERING RADIO FREQUENCY INTERFERENCE
The AD8237 contains an on-chip RFI filter that is sufficient for

10289-072
R2
VOUT = (VREF + V+IN – V–IN) (1 + )
a majority of applications. For applications where additional radio R1

frequency immunity is needed, an external RFI filter can also be Figure 70. Applying Gain to the Reference Voltage
applied as shown in Figure 69. Traditional instrumentation amplifier architectures require the
DIFFERENTIAL FILTER CUTOFF =
1
2 R (2CD + CC)
reference pin to be driven with a low impedance source. In these
1 traditional architectures, impedance at the reference pin degrades
COMMON-MODE FILTER CUTOFF =
2 R CC both CMRR and gain accuracy. With the AD8237 architecture,
+VS resistance at the reference pin has no effect on CMRR.
0.1µF 10µF
CC +IN
R
10kΩ 1nF
1% 5% VOUT
+IN AD8237
CD FB
R
10kΩ 10nF AD8237 REF
–IN
1%
–IN R1 R2
CC RREF
1nF R2 + RREF
5% G=1+
R1
10289-073

VREF
0.1µF 10µF
10289-071

–VS Figure 71. Calculating Gain with Reference Resistance

Figure 69. Adding Extra RFI Filtering

Rev. 0 | Page 22 of 28
Data Sheet AD8237
Resistance at the reference pin does affect the gain of the AD8237; Power Supplies
however, if this resistance is constant, the gain setting resistors can be Use a stable dc voltage to power the instrumentation amplifier.
adjusted to compensate. For example, the AD8237 can be driven Noise on the supply pins can adversely affect performance. For
with a voltage divider, as shown in Figure 72. more information, see the PSRR performance curves in Figure 17
+IN
through Figure 20.
VOUT Place a 0.1 µF capacitor as close as possible to each supply pin.
AD8237 As shown in Figure 73, a 10 µF tantalum capacitor can be used farther
FB
away from the part. This capacitor, which is intended to be effective at
–IN REF
VS
low frequencies, can usually be shared by other precision integrated
R1 R2
circuits. Keep the traces between these integrated circuits short to
R3
R2 + R3||R4 minimize interaction of the trace parasitic inductance with the shared

10289-074
G=1+
R1 R4 capacitor. If a single supply is used, decoupling capacitors at −VS
can be omitted.
Figure 72. Using Voltage Divider to Set Reference Voltage +VS

LAYOUT
Common-Mode Rejection Ratio over Frequency 0.1µF 10µF

Poor layout can cause some of the common-mode signal to be +IN

converted to a differential signal before reaching the in-amp. This VOUT
conversion can occur when the path to the positive input pin has AD8237
FB
a different frequency response than the path to the negative input
REF
pin. For best CMRR vs. frequency performance, closely match the –IN
R1 R2
impedance of each path. Place additional source resistance in the
input path (for example, for input protection) close to the in-amp
inputs to minimize interaction between the resistors and the parasitic 0.1µF 10µF

10289-075
capacitance from the printed circuit board (PCB) traces. –VS

Figure 73. Supply Decoupling, REF, and Output Referred to Local Ground

Reference
The output voltage of the AD8237 is developed with respect to
the potential on the reference terminal. Take care to tie REF to
the appropriate local ground.
INPUT BIAS CURRENT RETURN PATH
The input bias current of the AD8237 must have a return path to
ground. When the source, such as a thermocouple, cannot provide
a return current path, create one, as shown in Figure 74.

Rev. 0 | Page 23 of 28
AD8237 Data Sheet
INCORRECT CORRECT
+VS +VS

VOUT VOUT
AD8237 AD8237

–VS –VS

TRANSFORMER TRANSFORMER

+VS +VS

VOUT VOUT
AD8237 AD8237

10MΩ

–VS –VS

THERMOCOUPLE THERMOCOUPLE

+VS +VS

C C

VOUT 1 VOUT
fHIGH-PASS = 2πRC R
AD8237 AD8237
C C

10289-076
–VS –VS

CAPACITIVELY COUPLED CAPACITIVELY COUPLED

Figure 74. Creating an IBIAS Path

Rev. 0 | Page 24 of 28
Data Sheet AD8237

APPLICATIONS INFORMATION
BATTERY CURRENT MONITOR PROGRAMMABLE GAIN IN-AMP
The micropower current consumption, unique topology, and rail-to- Most integrated circuit instrumentation amplifiers use a single
rail input of the AD8237 make it ideal for battery-powered current resistor to set the gain, which is in a low impedance path. Any
sensing applications. When configured as shown in Figure 75, the component placed between the gain setting pins has current flowing
AD8237 is able to obtain an accurate high-side current measurement through it, which adds to the gain resistance. Typical CMOS switches
for both charging and discharging. Depending on the nature of the have on resistance, RON. RON is not well controlled, is nonlinear with
load, +VS may require RC decoupling. Use Kelvin sensing methods input voltage, and has high drift. This creates large gain errors and
to achieve the most accurate results. distortion at the output of the in-amp. This RON problem has made
VOUT = G(I × RSHUNT ) + VREF
it difficult to build a precision programmable gain in-amp in the
RSHUNT
past. With the AD8237 topology, the switches can be placed in a high
+VS
impedance sense path, eliminating the parasitic resistance effects.
+IN Figure 76 shows one way to accomplish programmable gain. Some
VOUT applications may benefit from using a digital potentiometer instead
AD8237
+
FB
of a multiplexer.
VBAT
REF LOAD
– –IN +IN

–VS
AD8237 VOUT
R1 R2
470pF 2kΩ
–IN G=1
VREF
REF FB 20kΩ
10289-077

200Ω G = 10
2kΩ
ADG604 G = 100
Figure 75. Battery-Powered Current Sense
200Ω
G = 1000
4:1 MUX 22.1Ω

10289-078
Figure 76. Programmable Gain with a Multiplexer

Rev. 0 | Page 25 of 28
AD8237 Data Sheet
AD8237 IN AN ECG FRONT END With this system architecture, large gains can be applied at the in-amp
Electrocardiogram (ECG) circuits must operate with a differential stage, and the requirements of the rest of the system can be greatly
dc offset due to the half-cell potential of the electrodes. The tolerance reduced. This also reduces noise and offset error contributions from
for this over potential is typically ±300 mV; however, it can be a volt devices after the in-amp in the signal path. The circuit in Figure 77
or more in some situations. As ECG circuits move to lower supply illustrates the core concept. Additional op amps can be added for
voltages, the half-cell potential problem becomes more difficult, improved performance, such as input buffering, filtering, and driven
strictly limiting the gain that can be applied in the first stage. The lead, if it is required by the system. Proper decoupling is not shown.
AD8237 architecture provides a unique solution to this problem.
If the REF pin is left unconnected to the gain setting network, a
low frequency inverting integrator can be connected from the output
to the REF pin. Because the AD8237 applies gain to the integrator
output, the integrator only has to swing as far as the dc offset to
compensate for it, rather than the dc offset multiplied by the gain.

INSTRUMENTATION
AMPLIFIER
PATIENT G = +100
PROTECTION +5V

A B
110kΩ
AD8237 ECG OUT
FB 100kΩ 47nF
22nF
REF 1kΩ
+5V
VMID
C
3.3μF
100kΩ +5V
+5V VMID
100kΩ
2MΩ AD8607

10289-079
AD8607

Figure 77. AD8237 in ECG

Rev. 0 | Page 26 of 28
Data Sheet AD8237

OUTLINE DIMENSIONS
3.20
3.00
2.80

8 5 5.15
3.20
4.90
3.00
4.65
2.80 1
4

PIN 1
0.65 BSC
0.95
0.85 1.10 MAX
0.75
0.80
0.15 0.38 8° 0.60
0.23
0.00 0.22 0° 0.40
0.08
COPLANARITY SEATING
0.10 PLANE

COMPLIANT TO JEDEC STANDARDS MO-187-AA

Figure 78. 8-Lead Mini Small Outline Package [MSOP]

(RM-8)
Dimensions shown in millimeters

ORDERING GUIDE
Model 1 Temperature Range Package Description Package Branding
AD8237ARMZ −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP], Tube RM-8 Y4H
AD8237ARMZ-R7 −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP], 7-Inch Tape and Reel RM-8 Y4H
AD8237ARMZ-RL −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP], 13-Inch Tape and Reel RM-8 Y4H
1
Z = RoHS Compliant Part.

Rev. 0 | Page 27 of 28
AD8237 Data Sheet

NOTES

©2012 Analog Devices, Inc. All rights reserved. Trademarks and

registered trademarks are the property of their respective owners.
D10289-0-8/12(0)

Rev. 0 | Page 28 of 28