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697 Hz 1 2 3 A
770 Hz 4 5 6 B
Low frequency
group
852 Hz 7 8 9 C
941 Hz 0 # D
*
8 8 8 8 8 8 8
I/O Ports P0 P1 P2 P3 P4 P5 P6
Watch dog timer (20 bit) Timer CRC operation System clock
circuit A-D converter generator P7
8
DMAC 2 channel 5 x A Timer (16 bit) (10 bit x 8 Xin - Xout
UART / Clock expanded to
channel
6 x B Timer (16 bit) sync. serial I/O Xcin - Xcout
D-A converter 8 bit 2 ch. ch)
(8 bit x 2 channel)
P8
R0H R0L Program Counter PC 8
R0H R0L
R1H R1L Vector Table INTB MEMORY
R2
R3 Flag Register FLG ROM P9
8
Address Reg. A0
Stack Pointer
Address Reg. A1
ISP
Frame Base Reg. FB
USP (User Stack Pointer)
RAM
Static Base Reg. SB P10
8
Multiply circuit
Amplitude_max_lo Amplitude_max_hi
Compute Threshold
for each freq. group
Goertzel depending to
697 Hz Amplitude_max
Goertzel
Thres_lo Thres_hi
770 Hz
Find max.
Goertzel Energy_lo
852 Hz Decision Logic
1. Energies > Treshold
DTMF input
Goertzel frequeny tolearance
LP 941 Hz Lowmax 2. Energy difference
+
4 kHz twist
+ ADC 2 3. Signal duration
Goertzel Highmax
+2.5V DC pause duration
1209 Hz 4. Signal Interruption
Goertzel
1336 Hz Find max.
Energy_hi
Goertzel
Recognized
1477 Hz
DTMF Signal
Goertzel
1633 Hz
Output signalling
1. LED output
2. Serial output
The test results show that the specifications of several standards can be fulfilled.
The parameters can be varied within certain limits. However, the maximum
possible twist (The "twist" describes the difference in level between the two
components of the DTMF signal), for example, is also reduced when the
permissible frequency tolerance is limited. If the level difference increases, more
mismatched detections are detected in the Talk-Off test etc. The 16-bit fixed-point
arithmetic also sets natural limits. In particular, maximum frequency tolerance,
which is not even required in some standards or is significantly higher, requires
considerably higher expenditure. Without this limitation, the FIR filter, for example,
would not necessarily be required and the decision logic would be simplified. The
hardware interface connection also offers scope for optimisation. The OpAmp
limits the signal deviation to Vss=2.6V and thus only half of the 10bit A-D converter
range is used. Table 2 gives an overview of the resources of the M16C for
complete conversion.
Processor load M16C/80: 23% at f(xin)=20MHz, Vcc = 5V During an applied signal
M16C/62: 42% at f(xin)=16MHz, Vcc=5V
M16C/61: 67% at f(xin)=10MHz, Vcc=5V
ROM approx. 4.9kB excludinginitialisation and test routines
RAM approx. 0.9kB
Peripheries 3 Timer, 1 DMA channel, 1 A-D channel Reduction to 1 HW timer, 0 DMA, 1 A-D
channel possible with more software
Literature:
[6] P. Mock:
Add DTMF generation and decoding to DSP-µp designs
EDN, vol. 30, pp. 205-220, 1985
Systementwicklung einer Telekom-Applikation zum Senden und Empfangen von DTMF-Signalen mit dem
Microcontroller MSP-430
Diplomarbeit an der FH Landshut, 1997
Evaluierung von Software-Algorithmen zur Detektion von DTMF-Signalen und optimierte Implementierung auf
einem 16Bit-Microcontroller
Diplomarbeit an der BUGH Wuppertal, 1998