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Practice Questions
Sol.1 (D)
Given : I D 1 μA at 3000 K
V 150 mV; 1 for Ge
VT at 300 K 26 mV
Forward bias current I = I 0 (eV /VT 1)
I I 0 (e150 m/26 m 1)
I 0.319 mA
VT 26 103
AC resistance rac 81.4
I I0 0.319 103 1106
Sol.2 3.32
VD 0.7V
VR E VD 8V 0.7V = 7.3V
VR 7.3V
ID IR = = 3.32 mA Ans.
R 2.2 k
Sol.3 10
Hence, Z AB 10 k
Sol.4 (5)
Sol.5 (C)
Applying super node analysis
Vx 0.7V V0
10 mA 2.2 k 1.2 k V0
Vx V0 0.7 … (i)
Vx V0
10
2.2 1.2
1.2Vx 2.2V0
10
2.2 1.2
1.2Vx 2.2V0 26.4 … (ii)
On solving equation (i) and (ii) we get,
Vx 8.217 V, V0 7.51 V
Sol.6 9.133
Since the cut-in voltage of diode has 0.2V and Si diode has 0.7 V Assume Ge diode is forward biased and
Si diode is reverse biased
Applying KVL
10 3I 0.2 I 0
4I 9.8
9.8
I 2.45 mA
4
3I 0.2 VD 0
VD 3I 0.2
VD 7.55V
Since, VD 0.7 V
So, our assumption is wrong
10 0.7 ( I1 I 2 ) 0
I1 I 2 9.3 …(i)
V
0.7 0.9
Fig. (a)
I0
10V 92k
Fig. (b)
V 0.7 V
V 0.2
rf 1 k
I 0.2
I0 0.7V rf 1 k
10V 92k
10 0.7 9.3
I0 0.1 mA
93 93
Sol.8 (C)
Assume both D1 and D2 ON,
i1 Va i2
0.6V 12 6 0.6V
5.4V 18 5V
Apply KCL at Va ,
Va 5.4 0.6 Va Va 5 0.6
0
12 18 6
1 1 1 4.8 4.4
Va
12 18 6 12 6
Va 3.7097
From figure,
5.4 0.6 3.7097
i1 90.8 mA 0
12
So D1 is ON
5.4 0.6 3.7097
i2 115 mA 0
6
So D2 is ON
Sol.9 (A)
Assume both diode ON
Applying KCL at V0
V0 10 V0 5 V0
0
1 1 9
19
V0 15V V0 7.105V
9
From the above figure,
10 7.105
i1 2.895 A 0, So D1 is ON
1
5 7.105
i2 2.105 A 0, So D2 is OFF
1
So circuit will be
10 9
V0 9V
1 9
Hence, option (A) is correct.
Sol.10 (B)
Assume D1 and D2 ON,
Applying KCL at V0
V0 10 V0 10 V0
0
1 1 9
1
V0 1 1 20 V0 9.4736
9
From the above figure.
10 9.4736
i1 0.526 A 0 So D1 is ON
1
10 9.4736
i2 0.526 A 0 So D2 is ON
1
Sol.11 (C)
Assume both are ON
Apply KCL analysis
V0 5 V0 5 V0
0
1 1 9
1
V0 1 1 0 V0 0
9
From the above figure.
5 0
i1 5 A 0 So D1 is OFF
1
50
i2 5 A0 So D2 is ON
1
So circuit becomes
Sol.12 (B)
Assume D1 and D2 ON
Apply KCL at v0
v0 10 v0 10 v0 5
0
1 1 9
1 5
v0 1 1 10 10 v0 9.737 V
9 9
From the above figure.
10 9.737
i1 0.263 A 0 So D1 is ON
1
10 9.737
i2 0.263 A 0 So D2 is ON
1
Hence v0 9.737 so option (B) is correct.
Sol.13 (C)
Assume D1 and D2 ON
Apply KCL at v0
v0 5 v0 10 v0 5
0
1 1 9
1 5
v0 1 1 10 5 v0 2.63 V
9 9
From the above figure.
5 2.63
i1 7.63 A 0 So D1 is OFF
1
10 2.63
i2 7.37 A 0 So D2 is ON
1
So circuit becomes
10 5
i 0.5 A
1 9
v0 0.5 9 5 9.5 V
Hence option (C) is correct.
Sol.14 (C)
Assume D1 and D2 ON
10 0.7
i1 0.93 mA
10
0.7 0.7 10
i2 2 mA
5
As i2 0 so D2 is ON
Current through D1 i1 i2 0.93 2 1.07 mA
Hence, D1 is OFF
So the circuit becomes
10 0.7 (10)
i 1.287 mA
15 k
v0 5 1.287 10 3.57 V Ans.
As D1 is OFF, so current through D1 ( iD1 ) = 0 A Ans.
Sol.15 (A)
Case 1 : Assume D1 ON.
Then circuit will become
By applying KVL
1 0.7 V 0
V 0.3V
So, D2 should be ON but if D2 is ON then by KVL we get
3 0.7 V 0
V 2.3V
Then V should become 2.3 V which is not possible so our assumption is wrong.
Case 2 : Assume D2 is ON
Then circuit will become
By applying KVL
3 0.7 V 0
V 2.3V Ans.
So D1 should OFF.
2.3 (3)
So our assumption is correct. Then I 2.65 mA Ans.
2
Sol.16 (C)
Diode will be OFF because if it is ON, voltage across it will be zero. The circuit is as follows,
The voltage across diode is
4 10 8 10
VD 2 V
10 10 10 10
Since diode is OFF, current through it is zero.
Sol.17 (A)
The circuit is as follows
For vs small, both diode are OFF. For vs 0.6 V , D1 is ON, for v1 0.6 V both diode will be ON,
vs 0.6 v1 vs v1 v1 v1 0.6
5 5 0.5 0.5
2v 5.4
v1 s 0.6 V
22
vs 3.9 V
Sol.18 (C)
Assume all the diodes are ON
Status of diode
4.4 5 0.6 1.2
iD1 4.8 mA 0 D1 is OFF
0.5
4.4 0.6
iD 2 7.6 mA 0 D2 is ON
0.5
Hence, option (C) is correct.
Sol.19 (C)
Assume both diode ON
10 0.6 5
i 0.44 mA
9.5 0.5
v0 0.6 0.5 0.44 5 5.82 V
Sol.21 (D)
Assume both diode ON
Apply KCL at v0
v0 10 v0 0.6 v0 0.6
0
9.5 0.5 0.5
v0 0.841 volt
From the above figure
v0 0.6 0.841 0.6
i1 i2 0.482 mA 0 so D1 and D2 both is ON
0.5 0.5
Hence v0 0.841 V Ans.
Assignment Questions
Sol.1 (D)
Assume both diode ON
Apply KCL at v0
v0 0.6 v0 10 0.6 v 0
0 0
500 500 9.5 103
v0 4.287 V
From the above figure,
10 0.6 4.287
i1 10.266 mA 0 so D1 is ON
500
0 0.6 4.287
i2 9.774 mA 0 so D2 is OFF
500
So circuit will become
10 0.6
v0 9500 8.93 V Ans.
500 9500
Sol.2 (A)
Assume both the diode ON
Apply KCL at v0
v0 0.6 5 v0 0.6 10 v0 0
0
500 500 9500
v0 6.723 V
From the above figure
10 0.6 6.723
i1 5.354 mA 0 so D1 is ON
500
5 0.6 6.723
i2 4.646 mA 0 so D2 is OFF
500
So circuit will become
10 0.6
v0 9500 8.93 V Ans.
500 9500
Sol.3 (B)
Assume both diode ON.
v0 0 v0 10 0.6 v0 10 0.6
0
9500 500 500
v0 9.159
From the above figure
10 9.159 0.6
i1 i2 4.82 10 4 0 so D1 and D2 both is ON
500
Sol.4 (C)
The Thevenin equivalent circuit for the network to the left of terminal ab is shown below
100
vTH (2 cos t ) 1 0.5cos t V
200
(100)2
RTH 50
200
0.7 0.5
The diode can be modeled with v f 0.5V and rf 50
0.004
vTH v f 1 0.5cos t 0.5
iD 5(1 cos t ) mA
RTH rf 50 50
Sol.5 (A)
vD rf iD v f
50 5(1 cos t ) 103 0.5 0.75 0.25cos t 0.25(3 cos t ) V
Sol.6 (C)
Applying KVL
5 103 ( I 30)100 ( I 35) 100
5000 100I 100I 3000 3500
I 57.5 mA
VD1 57.5 30 100 2750 V
VD 2 57.5 35 100 2250 V
Sol.7 (A)
The diode will be forward biased. The circuit can be redrawn as :
Applying KVL :
10 (4.6 103 ) I 0.7 (2.2 103 I ) 5
I 2.10 mA
V0 2.2 103 2.10 10 3 5
V0 0.38 V
Sol.8 (C)
Applying super node analysis
Vx V0 0.7 …… (i)
Vx V0
10
2.2 1.2
1.2Vx 2.2V0
10
2.2 1.2
1.2Vx 2.2V0 26.4 …….. (ii)
On solving equation (i) and (ii) we get,
Vx 8.217 V, V0 7.51 V