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Fan7340 Slc1012c PWM Backlight Samsung 32 PDF
Fan7340 Slc1012c PWM Backlight Samsung 32 PDF
July 2013
FAN7340
LED Backlight Driving Boost Switch
Features Description
Single-Channel Boost LED Switch The FAN7340 is a single-channel boost controller that
integrates an N-channel power MOSFET for PWM
Internal Power MOSFET for PWM Dimming:
dimming using Fairchild’s proprietary planar Double-
R DS(on) = 3.4 Ω at VGS=10 V, BVDSS=400 V diffused MOS (D MOS) technology.
Current Mode PWM Control The IC operates as a constant-current source for driving
Internal Programmable Slope Compensation high-current LEDs.
Wide Supply Voltage Range: 10 V to 35 V
It uses Current Mode control with programmable slope
LED Current Regulation: ±1% compensation to prevent subharmonic oscillation. The IC
Programmable Switching Frequency provides protections including: open-LED protection,
Analog and PWM Dimming over-voltage protection, and direct-short protection for
high system reliability.
Wide Dimming Ratio: On Time=10 µs to DC
Cycle-by-Cycle Current Limiting The IC internally generates a FAULT signal with delay if
Thermal Shutdown: 150°C an abnormal LED string condition occurs. PWM dimming
and analog dimming functions can be implemented
Open-LED Protection (OLP) independently. Internal soft-start prevents inrush current
Over-Voltage Protection (OVP) flowing into output capacitor at startup.
Over-Current Protection (OCP)
Error Flag Generation (for External Load Switch)
Internal Soft-Start
16-Lead SOIC Package
Applications
LED Backlight for LCD TV
LED Backlight for LCD Monitor
LED Lighting
Ordering Information
Operating
Packaging
Part Number Temperature Package
Method
Range
FAN7340MX -40°C to +125°C 16-Lead, Small-Outline Integrated Circuit (SOIC) Tape & Reel
20µs Delay
3V -
OVP
+
OVP 100mV
FAULT
OLP
TSD
1µs
+ Delay
ADIM*4
S Q
1.4~4V - OCP
R
POR
Current 640µs at 200kHz
Auto-Restart
Sense
PWM
-
gm 1/4
-
ADIM
+
R Dim off
0.3~3V + DRV
Q
S
Gate
PWM Driver
CMP
Slope
100mV 5k Compensation
- CS
Burst
0.5V
+ Operation
CLK+LEB
4V
+
Switch Off
16 Steps -
0.5V
Internal Soft-Start 3ms at 200kHz
Oscillator RT
GND
45µA
Drain
-
UVLO 9V PWM
VCC +
OLPi Dim off
Hys. 1.0V
1.22V -
ENA + BDIM
Hys. 70mV OLP
Current
Sense
BDIM
Figure 1. Internal Block Diagram
VCC 1 16 BDIM
F PXYTT
FAN7340
DRV 2 15 ADIM
GND 3 14 CMP
CS 4 13 OVP
REF 5 12 ENA
FAULT 6
RT 7 10 DRAIN
SENSE 8 9 DRAIN
Pin Definitions
Pin # Name Description
1 VCC This pin is the supply voltage of the IC.
2 DRV This pin is the gate drive signal of the boost switch.
3 GND This pin is the ground of the IC.
This pin is for sensing the current flowing through an external MOSFET. It includes a built-in
300 ns blanking time. The peak of the current flowing through the MOSFET is limited to this
4 CS
pin voltage. Slope compensation of the boost controller can be programmed through the
series resistor of this pin.
5 REF This pin is the 5 V reference voltage pin. Maximum current capability is 3 mA.
This pin is for indicating the fault signal. This pin is connected to the open drain. When OLP
6 FAULT
protection is occurred, the FAULT pin is pulled HIGH.
7 RT Oscillator frequency set of the boost switch (50 kHz ~ 300 kHz).
This pin is for sensing the current flowing through the LEDs. A sensing resistor is connected
8 SENSE from this pin to ground. This pin is connected to the negative input of the internal error
amplifier.
9, 10 DRAIN Drain pin of PWM dimming power MOSFET.
Enable input pin. If voltage of this pin is higher than 1.22 V, IC is starting to operate. If the
12 ENA voltage of this pin is lower than 1.15 V, the IC stops operating.
Over-voltage protection input pin. Output voltage of the boost circuit is connected to this pin
13 OVP
through a resistor divider circuit. If this pin voltage is higher than 3 V, OVP is triggered.
This pin is the error amplifier output. Typically, a compensation capacitor and resistor are
14 CMP
connected to this pin from the ground.
This pin is for setting the current flowing through the LEDs. This pin is connected to the
15 ADIM positive inputs of the internal error amplifier. Linear voltage range of ADIM is 0.3 V~3.0 V.
This pin is for the burst dimming signal. If this pin voltage is HIGH, the internal dimming
16 BDIM
MOSFET is turned on. If this pin voltage is LOW, the dimming MOSFET is turned off.
Note :
1. Pin 11 is a “No Connect” pin (not shown in Figure 2).
9.9 1.7
9.7 1.5
9.5
1.3
9.3
Vth.hys , [V]
9.1 1.1
Vth, [V]
8.9 0.9
8.7
0.7
8.5
0.5
8.3
8.1 0.3
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
Temperature, [℃] Temperature, [℃]
Figure 3. Start Threshold Voltage vs. Temperature Figure 4. Start Threshold Voltage Hysteresis
vs. Temperature
350 4.5
4
300
3.5
250
3
ISD, [mA]
Ist, [uA]
200 2.5
2
150
1.5
100
1
50 0.5
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
Temperature, [℃] Temperature, [℃]
Figure 5. Standby Current vs. Temperature Figure 6. Shutdown Mode Supply Current vs.
Temperature
1.4 1.3
1.35 1.25
1.3
1.2
1.25
Voff, [V]
Von, [V]
1.15
1.2
1.1
1.15
1.1 1.05
1.05 1
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
Temperature, [℃] Temperature, [℃]
Figure 7. On-State Input Voltage vs. Temperature Figure 8. Off-State Input Voltage vs. Temperature
600 14
500 10
6
400
G m, [umho]
Voffset, [mV]
2
300
-2
200
-6
100
-10
0 -14
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
Temperature, [℃] Temperature, [℃]
Figure 9. Error Amplifier Transconductance Figure 10. Input Offset Voltage vs. Temperature
vs. Temperature
350 350
300 300
250 250
Isur, [uA]
Isin, [uA]
200 200
150 150
100 100
50 50
Figure 11. CMP Sink Current vs. Temperature Figure 12. CMP Source Current vs. Temperature
215 96
210 94
205 92
fOSC, [KHz]
Dmax, [%]
200 90
195 88
190 86
185 84
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
Temperature, [℃] Temperature, [℃]
Figure 13. Boost Oscillator Frequenc y vs. Temperature Figure 14. Maximum Duty Cycle vs. Temperature
5.15 1.8
5.1 1.7
5.05 1.6
VPDIM,H, [V]
VREF , [V]
5 1.5
4.95 1.4
4.9 1.3
4.85 1.2
Figure 15. 5V Regulation Voltage vs. Temperature Figure 16. PWM Dimming Input High Voltage
vs. Temperature
1.7 240
220
1.6
200
1.5
RPDIM, [Kohm]
180
VPDIM,L , [V]
1.4 160
140
1.3
120
1.2
100
1.1 80
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
Temperature, [℃] Temperature, [℃]
Figure 17. PWM Dimming Input Low Voltage Figure 18. PWM Dimming Pull-Down Resistance
vs. Temperature vs. Temperature
13.5 300
13
250
12.5
200
Idsin, [mA]
VDRV, [V]
12
150
11.5
100
11
10.5 50
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
Temperature, [℃] Temperature, [℃]
Figure 19. Gate Output Voltage vs. Temperature Figure 20. Gate Output Drive Sink Current
vs. Temperature
55 0.85
0.8
51
0.75
0.7
47
Islope, [uA]
tAR ,[mS]
0.65
43 0.6
0.55
39
0.5
35 0.45
Figure 21. Ramp Generator Current vs. Temperature Figure 22. Auto-Restart Time for OCP
vs. Temperature
3.2
0.2
3.15
3.1 0.16
3.05
Vhys,ovp,[V]
Vth,ovp,[V]
0.12
3
2.95 0.08
2.9
0.04
2.85
2.8 0
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
Temperature, [℃] Temperature, [℃]
Figure 23. OVP Threshold Voltage vs. Temperature Figure 24. OVP Hysteresis Voltage vs. Temperature
55
50
45
td,olp,[mS]
40
35
30
25
-50 -25 0 25 50 75 100 125
Temperature, [℃]
FAN7340 adapts the soft-start function in the boost Dynamic Contrast Ratio
converter stage. During soft-start period, boost switch The Dynamic Contrast Ratio (DCR) means the maximum
turn-on duty is limited by clamped CMP voltage. The contrast ratio achievable by adjusting the amount of light
soft-start period is dependent on boost switching (dimming) of the screen instantaneously using the
frequency, which is decided by the RT resistor (Equation backlight during the extremely short period of time.
(1)). Soft-start period is set to be cumulative time when FAN7340 can normally drive the LED backlight under
the BDIM (PWM dimming) signal is HIGH: 0.1% dimming duty cycle at 200 Hz dimming frequency.
Even operating at 5 µs-dimming FET turn-on time and
(2) extremely low dimming duty, FAN7340 can operate
LEDs with normal peak current level.
When the power converter operates in Continuous The peak voltage level at CS terminal:
Conduction Mode (CCM), the current programmed
controller is inherently unstable when duty is larger than (4)
50%, regardless of the converter topology. The Choose the boost switch current-sensing resistor (RCS):
FAN7340 uses a Peak-Current-Mode control scheme
with programmable slope compensation and includes an (5)
internal transconductance amplifier to accurately control
the output current over all line and load conditions. Open-LED Protection (OLP)
An internal Rslope resistor (5 kΩ) connected to sensing After the first PWM dimming-HIGH signal, the feedback
resistor RS and an external resistor R 1 can control the sensing resistor (RSENSE) starts sensing the LED
slope of VSC for the slope compensation. Although the current. If the feedback voltage of the SENSE pin drops
normal operating mode of the power converter is DCM, below 0.2 V, the OLP triggers to generate an error flag
the boost converter operates in CCM in the case of rapid signal. Because OLP can be detected only in PWM
LED current increas e. As a result, slope compensation dimming-HIGH; if OLP detecting time is over 5 μs, PWM
circuit is an important feature. dimming signal is pulled HIGH internally regardless of
The value of an external series resistor (R1) can be external dimming signal. If OLP signal continues over
programmed by the user. In normal DCM operation, 5 k blanking time, an error flag signal is triggered.
Ω is recommended. OLP blanking time is dependent on boost switch
frequency per Equation (6). FAULT OUT signal is made
through the FO pin, which needs to be connected 5 V
reference voltage through a pull-up resistor. In normal
operation, FO pin voltage is pulled down to ground. In
OLP condition, FO pin voltage is pulled HIGH.
(6)
VADIM=0.8V
OVP
3V
GATE
ROVP2
2.9V
VSENSE=4.0V
Boost
VSENSE
Gate
Time
GATE
Features
High Efficiency
Constant Current Boost Converters
High-Voltage, High-Current LED Driving
D1 CN2
CN1 L1
1 200uH/PC44 1
Vin 2 2 N.C
Vin 3 C1 3 N.C
Vin 4 22uF/160V FFD04H60S 4 VLED
GND 5 5 VLED
GND 6 C2 6 LED1
GND R1 10R LED2
CON6 47uF/400V R2 CON6
R21 300k
330k
0 Q1 D2 1SS355 R9 0R
FDPF7N50F 0
R4 R5
100K IC1 300k
R22
330k VCC 1 16 R6
VCC BDIM BDIM
ENA 300k
R7 OVP
C12 R23 D3 5.1k FAN7340
0.2R/1W
1.2n 11k
3 14
GND CMP
On/Of f
C5
CN3 0 open 4 13 OVP R11
1 CS OVP C6
VCC VCC 15k
2 6.8n
GND 3 C3 C4
FO 4 FO 5 12
1u C7
BDIM 5 10uF/50V REF ENA
ADIM 100n
6 C8 R19
On/Of f 10n 10k
CON6 6
FO FO ENA
TP1 R12
On/Of f 100K 7 10
RT DRAIN
ADIM
R13 3.9K R14 R20
TP 20K 100k 8 9
R15 C10 SENSE DRAIN
220K 1.2n
R16
2.7R/1W FAN7340
BDIM
R17 3.9K
Vin : 120V
R18 C11
1.2n
Vout : 230V
220K
Output current : 250mA
Switching frequency : 200kHz
0
10.00
9.80 A
8.89
16 9
B 1.75
1 8
PIN ONE
INDICATOR 1.27 0.51
0.35 1.27 0.65
(0.30) 0.25 M C B A LAND PATTERN RECOMMENDATION
1.75 MAX
1.50 SEE DETAIL A
1.25
0.25 0.25
C
0.10 0.19
0.10 C
0.50
0.25 X 45°
NOTES: UNLESS OTHERWISE SPECIFIED
(R0.10)
GAGE PLANE A) THIS PACKAGE CONFORMS TO JEDEC
(R0.10) MS-012, VARIATION AC, ISSUE C.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD
8° 0.36
FLASH AND TIE BAR PROTRUSIONS
0° D) CONFORMS TO ASME Y14.5M-1994
E) LANDPATTERN STANDARD: SOIC127P600X175-16AM
F) DRAWING FILE NAME: M16AREV12.
DETAIL A
SCALE: 2:1
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.