PRACTICAL WORK ASSESSMENT DEC3033 COMPUTER ARCHITECTURE & ORGANIZATION PROGRAMME : PRACTICAL WORK NUMBER :5 DATE : LECTURER’S NAME : TITLE : 1. PRACTICAL WORK ASSESSMENT - 100% i, Practical Skill Assessment - 70% .__Lab Report Assessment - 30% 2. GENERIC SKILL ASSESSMENT - 100% ‘Organization - 25% ii, Motivation - 25% ii Resolve conflict - 25% iv. ‘Communication — 25% 4._ PRACTICAL WORK ASSESSMENT ‘A. PRACTICAL SKILL ASSESSMENT B. LAB REPORT No] > FeLonPLOL Lon ATTAINMENT | 8: CAB REPORT, | ATTAINMENT Report Format and | @ 2 O ‘Student able to identity, choose end use ©6000 * | apparetusiequipment's correctly ®92@20 | Organization ‘student able to set and calisate Results Oo ®e0 2. 5 apparatusiequipmantcorecty 3. | Student abie to construct ereut eorecty Analysis bl ood 1g, | Student able to measure equipments conecty Question’ Discussion bb ©aq ‘Student able to take the reeding oo 5. | measurement accuretly pooeae 9, | Student abie to folow instruction ana eoooes |nmusion eee procedure correctly “ 7, | Student able to complete task given within time rame PERCENTAGE = (70%) PERCENTAGE = (30% 2, GENERIC SKILL ASSESSMENT (GSA) aos ATTAINMENT TOTAL TT organization: Able to lead team members 26900 2 | Motivation: Able to motivate team members, 50300 3 | Resolve Confit: Able to resoWve confit. 20020 7] communication: Able fo communicate among team members 20020 Total(100%) ‘Remark: LD Krowiodgo, [D2 Practical Sil, LD3 Communication Skil, Od Crklcal Thinking and Problem Saing Stile {D5 Sosial Skis and Responsibilities. LDS Continous Learning and Informavon Managemen Skis. LOT Managamont and Envoprenoural hile, LD8 Professionalism. Ethics and Moral, LD9 Leadereb and Teamwork Skis PRACTICAL WORK ASSESSMENT] A PRACTICAL Tora. | esa No.| REG.NO. rawecrourmenens | BREN [5 eee | ate) ee es) 0%)PRACTICAL/LAB SHEET EC303 COMPUTER ARCHITECTURE & ORGANIZATION. PRACTICAL LABORATORY NUMBER : 5 TITLE : Half Subtractor & Full Subtractor LEARNING OUTCOME : 1. Construct arithmetic logic and interfacing circuit into the digital circuit ising Programmable Logic Devices (PLD) to simulate and implement logic computer design based on schematic entry. (P4,PLOS) APPARATUS / EQUIPMENT 1. Personal computer (Pentium III (866 MHz or faster)) 2. Altera Quartus I.Version 8 INTRODUCTION / THEORY : The Binary Subtractor is another type of combinational arithmetic cizcuit that is the opposite of the Binary Adder. As their name implies, a Binary Subtractor is a decision making circuit that subtracts two binary numbers from each other, for example, X ~ ¥ to find the resulting difference between the two numbers. Unlike the Binary Adder which produces a SUM and a CARRY bit when two binary numbers are added together, the binary subtractor produces @ DIFFERENCE, D by using a BORROW bit, B from the previous column. Then obviously, the operation of subtraction is the opposite to that of addition. ACTION NAME & DESIGNATION ‘SIGNATURE DATE Prepared by: Approved by:Experiment 5.1 : Half Subtractor Procedure: 1. Create a New Project Wizard. 2. Create a Block Diagram/Schematic file for a half adder as Figure 1. Generate a logic diagram with RTL viewer. 3. Create a vector waveform file and insert a value to the all input Y = 20ns and X =10ns. Arrange the waveform with follow the sequence of X,Y, B and D Full ill the truth table and write down the logic equation. 4. Compare the output result with theory and discuss all find x x DED) Borrow x pom Figure 1: Half subtractor Results 1) Truth table y [x |[D |B o fo o fi 1 [0 1 |i 2) Logic Equation: 3) Schematic circuit with student's name, RTL viewer and Output waveform.Schematic circuit RIL Viewer Output waveformExperiment 4.2 : Full Subtractor Procedure: 1. Create a New Project Wizard. 2. Create a Block Diagram/Schematic file for a half adder as Figure 2. Generate a logic diagram with RTL viewer. 3. Create a vector waveform file and insert a value to the all input Bin ~40 and ¥ =20ns and X = 10ns, Arrange the waveform with follow the sequence of X, Y, Bin,Bout and Diff, Full fill the truth table and write down the equation, 4. Compare the output result with theory and discuss all find On x ie Boor = DIFF. Results: 1) Truth table Bin Y x DIFF Bout 0 0 0 0 i} 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 2) Logic Equation: 3) Schematic circuit with student's name, RTL viewer and Output waveform.Schematic circuit RIL Viewer Output waveformAnalysis & Discussion Conclusion