Professional Documents
Culture Documents
JOS Journal Paper 2017 PDF
JOS Journal Paper 2017 PDF
Abstract: The major purpose of this paper is to find an alternative configuration that not only minimizes the
limitations of single-gate (SG) MOSFETs but also provides the better replacement for future technology. In this
paper, the electrical characteristics of SiGe double-gate N-MOSFET are demonstrated and compared with electrical
characteristics of Si double-gate N-MOSFET. Furthermore, in this paper the electrical characteristics of Si double-
gate N-MOSFET are demonstrated and compared with electrical characteristics of Si single-gate N-MOSFET.
The simulations are carried out for the device at different operational voltages using Cogenda Visual TCAD tool.
Moreover, we have designed its structure and studied both Id –Vg characteristics for different voltages namely 0.05,
0.1, 0.5, 0.8, 1 and 1.5 V and Id –Vd characteristics for different voltages namely 0.1, 0.5, 1 and 1.5 V at work
functions 4.5, 4.6 and 4.8 eV for this structure. The performance parameters investigated in this paper are threshold
voltage, DIBL, subthreshold slope, GIDL, volume inversion and MMCR.
Key words: double gate MOSFET; DIBL; GIDL; volume inversion; SiGe; Genius tool
DOI: 10.1088/1674-4926/38/4/04xxxx PACS: 73.63.-b EEACC: 2570
04xxxx-1
J. Semicond. 2017, 38(4) A. Singh et al.
04xxxx-2
J. Semicond. 2017, 38(4) A. Singh et al.
04xxxx-3
J. Semicond. 2017, 38(4) A. Singh et al.
Fig. 8. Comparison plot of Id –Vg characteristics of SiGe DG- Fig. 9. Comparison plot of Id –Vg characteristics of SiGe DG-
MOSFET at work function equal to 4.8 eV for different values of Vd . MOSFET at Vd D0.05 V for different values of work function.
04xxxx-4
J. Semicond. 2017, 38(4) A. Singh et al.
Fig. 11. Hole mobility variation for SiGe DG-MOSFET at Vd D 0 V Fig. 13. Comparison plot of Id –Vd characteristics of SiGe DG-
and work function equal to 4.8 eV. MOSFET at work function equal to 4.5 eV for different values of Vg .
04xxxx-5
J. Semicond. 2017, 38(4) A. Singh et al.
Table 2. Comparison between various parameters used in N-channel DG-MOSFET using SiGe and N-channel DG-MOSFET using Si.
Parameter SiGe DG-MOSFET Si DG-MOSFET
Channel length (nm) 20 20
Design Doping concentration (cm 3 / 3 1018 1018
Gate oxide thickness (nm) 1 1
0.55 0.35
0.34 0.16
Threshold voltage (V) (L D20, 15, 10 and 7nm) 0.31 0.14
Short channel effects 0.25 0.12
DIBL (mdB) 66.66 80
SS (mV/dB) 86.84 82.23
MMCR 2.7 1010 1.3 108
Table 3. Comparison between various parameters used in N-channel SG-MOSFET using Si and N-channel DG-MOSFET using Si.
Parameter Si DG-MOSFET Si SG-MOSFET
Channel length (nm) 20 20
Design Doping concentration (cm 3 / 1018 1018
Gate oxide thickness (nm) 1 1
0.35 0.2
0.16 0.12
Threshold oltage (V) (L D20nm, 15nm, 10nm and 7nm) 0.14 0.1
Short Channel Effects 0.12 0.07
DIBL (mdB) 80 100
SS (mV/dB) 82.23 87.86
MMCR 1.3 108 7 105
Fig. 15. Comparison plot of Id –Vg characteristics of Si DG-MOSFET Fig. 16. Comparison plot of Id –Vd characteristics of DG-MOSFET
and SiGe DG-MOSFET at Vd D 0.05 V and work function equal to using Si and DG-MOSFET using SiGe at Vg D 1.5 V and work func-
4.8 eV. tion equal to 4.5 eV.
4. Conclusion
The simulation results show that the electrical characteris-
value of resistance because the substrate is available near the tics of double-gate MOSFET using SiGe are better in compari-
channel. son with double-gate MOSFET using Si and electrical charac-
teristics of Si double-gate MOSFET are better in comparison
On analyzing Id –Vg characteristics of Si SG-MOSFET and
with Si single-gate MOSFET. The device exhibits various de-
Si DG-MOSFET, it is concluded that better threshold voltage is
sirable features such as improved ON current, higher thresh-
obtained for DG- MOSFET in comparison with SG-MOSFET
old voltage, lower DIBL, lower GIDL in region of threshold
and is shown below in Fig. 17.
voltage and higher MMCR, whereas subthreshold swing of
Fig. 18 shows Id –Vd characteristics of Si DG-MOSFET SiGe double-gate MOSFET is more than that of Si double-gate
and Si SG-MOSFET. The drain current value is higher for Si MOSFET. Moreover, there is no problem of device burnout
DG-MOSFET in comparison to Si SG-MOSFET as Si SG- in double-gate MOSFET using SiGe as it has larger value of
MOSFET possesses the larger value of resistance because the threshold voltage. It is a low-power device and has better vol-
substrate is available near the channel. ume inversion.
04xxxx-6
J. Semicond. 2017, 38(4) A. Singh et al.
Sci, 2012, 13(2): 436
[3] Roy K, Mukhopadhyay S, Meimand H M. Leakage current
mechanisms and reduction in techniques in deep-sub microme-
ter CMOS circuits. Proc IEEE, 2003, 91(2): 305
[4] Rafhay Q, Xu C, Batude P, et al. Revisited approach for the char-
acterization of gate induced drain leakage. Solid-State Electron,
2012, 71(1): 37
[5] Colinge J P. Multi-gate SOI MOSFETs. Microelectron Eng,
2007, 84(9): 2071
[6] Mohammadi H, Abdullah H, Fu Dee C. A review on modeling
the channel potential in multi-gate MOSFETs. Sains Malaysiana
Publications, 2014, 43(6):861
[7] Ernst T, Cristoloveanu S, Ghibaudo G, et al. Ultimately thin
double-gate SOI MOSFETs. IEEE Trans Electron Devices, 2003,
50(3): 830
[8] Krishnamohan T, Jungemann C, Kim D, et al. High performance,
Fig. 17. Comparison plot of Id –Vg characteristics of double-gate
uniaxially-strained Si and Ge, double-gate P-MOSFETs. Micro-
MOSFET using Si and single-gate MOSFET using Si at Vd D 0.05V
electron Eng, 2007, 84(9): 2063
and work function equal to 4.8 eV. [9] Mani P, Pandey M K. Silicon on insulator MOSFET development
from single-gate to multiple-gate. Int J Adv Res Comput Scie
Softw Eng, 2012, 2(6): 297
[10] Dubey S, Tiwari P K, Jit S. On-current modeling of short-channel
double-gate (DG) MOSFETs with a vertical Gaussian-like dop-
ing profile. J Semicond, 2013, 34(5): 1
[11] Subramaniam S, Wale R N A, Joshi S M. Drain current models for
single-gate MOSFETs and undoped symmetric and asymmetric
double-gate SOI MOSFETs and quantum mechanical effects: a
review. Int J Eng Sci Technol, 2013, 5(1): 96
[12] Wagner M.Simulation of thermoelectric devices. Doctorate of
Philosophy Dissertation, Vienna Univ ersity of Technology, 2007
[13] Kim D. Theoretical performance evaluations of N MOS double
gate FETs with high mobility material: strained III-V, Ge and Si.
Doctorate of Philosophy Dissertation Stanford University, 2009
[14] Sahu D, Tirkey A. Design and simulation of double gate FETs us-
ing ATLAS. Bachelors of Technology Project, National Institute
of Technology, Rourkela, 2014
Fig. 18. Comparison plot of Id –Vd characteristics of Si double-gate
[15] Singh A, Kapoor D, and Sharma R. Review of SiGe double gate
MOSFET and Si single-gate MOSFET at Vg D 1.5 V and work func-
N-MOSFET. Int J Inform Technol Syst, 2015, 4(1): 19
tion equal to 4.5 eV.
[16] Loke A, Wu Z Y, Moallemi R, et al. Constant-current threshold
voltage extraction in HSPICE for nanoscale CMOS analog de-
References sign. Synopsys Users Group (SNUG): Advanced Micro Devices
Inc., Third Edition, 2010
[1] Mehrotra S R. Simulation study of silicon nanowire field effect [17] Boucart K, Ionescu A M. Double-gate tunnel FE T with high-gate
transistors (FETs). Master of Science Dissertation, University of dielectric. IEEE Trans Electron Devices, 2007, 54(7): 17
Delhi, 2007 [18] Sharma R. Analytical modeling of volume inversion and channel
[2] Valinajad H, Hosseini R, Akbari M E. Electrical characteristics length modulation in fully depleted double gate nanoscale SOI
of strained double gate MOSFET. International J Res Rev Appl MOSFETs. J Electron Devices, 2013, 18(2): 1553
04xxxx-7