This document lists 3 analog IC design experiments for students to complete by certain due dates. The experiments are: 1) Extract model parameters of MOS devices and find analog figures of merit. 2) Design a common source amplifier with resistive load to maximize voltage gain using minimum devices. 3) Design a common gate amplifier with an active current mirror load to achieve a voltage gain of 25V/V and input impedance of 50 ohms. Students are to use a 0.18um CMOS technology and any simulator for simulations. Report formats include title, circuit diagram, design calculations, results table, and conclusion.
This document lists 3 analog IC design experiments for students to complete by certain due dates. The experiments are: 1) Extract model parameters of MOS devices and find analog figures of merit. 2) Design a common source amplifier with resistive load to maximize voltage gain using minimum devices. 3) Design a common gate amplifier with an active current mirror load to achieve a voltage gain of 25V/V and input impedance of 50 ohms. Students are to use a 0.18um CMOS technology and any simulator for simulations. Report formats include title, circuit diagram, design calculations, results table, and conclusion.
This document lists 3 analog IC design experiments for students to complete by certain due dates. The experiments are: 1) Extract model parameters of MOS devices and find analog figures of merit. 2) Design a common source amplifier with resistive load to maximize voltage gain using minimum devices. 3) Design a common gate amplifier with an active current mirror load to achieve a voltage gain of 25V/V and input impedance of 50 ohms. Students are to use a 0.18um CMOS technology and any simulator for simulations. Report formats include title, circuit diagram, design calculations, results table, and conclusion.
Hyderabad Campus Department of Electrical and Electronics Engineering
Assignment - 1 List of the Experiments of Analog IC Design (MEL- ZG632)
Instructor: Dr. Saroj Mondal
Sl. Name of the Experiment Last date
No: of Rpt. Sub. 1. Extract the model parameters of NMOS and PMOS devices and find the analog FOM (intrinsic gain and frequency). Use 06/04/2020 minimum device dimensions. 2. Design a resistive load common source amplifier, which shall 06/04/2020 give the maximum voltage gain with minimum device dimension. 3. Design a common gate amplifier with an active load (i.e., current mirror) for a voltage gain of 25 V/V and input 06/04/2020 impedance should be 50 Ω.
*You can use any simulator for simulation purposes.
*Use 0.18 µm CMOS technology node for simulations.
Here is the brief of assignment report format.
1. Title: Title and specification of the experiment. 2. Circuit Diagram: Draw the circuit diagram which you are going to design and simulate. 3. Design: Theoretical calculations and expected values using hand calculations. 4. Results and observation: You can tabulate separate columns for the following: (a) Parameters/figure of merit; (b) Calculated/expected value; (c) Simulated value; Subsequently, you can compare the expected and simulated results, and provide reasons if you find any deviations. 5. End with major conclusion.