ESE-2016

Detailed Exam Solutions

(Objective Paper-II)
Electrical Engineering

solutions
 Explanation of Electrical Engg. Objective Paper-II (ESE - 2016)
SET - A
1. Compared to the salient-pole Hydroelectric 3. A 2000 V/200 V, 20 kVA, two winding, single
generators, the steam and the gas-turbine have phase transformer is reconnected as a step up

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cylindrical rotors for auto-transformer having 200 V/2200 V ratings.
(a) Better air-circulation in the machine Then the power rating for the auto transformer
will be
(b) Reducing the eddy-current losses in the rotor

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(c) Accommodating larger number of turns in (a) 160 kVA (b) 180 kVA
the field winding (c) 200 kVA (d) 220 kVA
(d) Providing higher mechanical strength against
the centrifugal stress Sol. (none)
Sol. (d)
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Steam and Gas turbine generator has high
10 A
speed of rotation. For high speed cylinderical
rotor provides greater mechanical strength 2000V 2200V
 and have more accurate dynamic balancing. Additive
110 A
Polarity
2. Consider the following losses for short circuit 100 A
test on a transformer:
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200V
1. Copper loss
2. Copper and iron losses
3. Eddy current and hysteresis losses For single phase transformer
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4. Friction and windage losses 3

20  10
Current in 2000v winding =  10A
Which of the above is/are correct ? 2000
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(a) 1 only (b) 2 only 3

20  10
Current in 200v winding =  100A
(c) 3 only (d) 2, 3 and 4 2000
Sol. (a) So, Power rating = V.I
Short circuit test is used to find out copper = (2200) (10)
or ohmic losses in a transformer. In short = 22KVA
circuit test rated current flows in the winding
No option is correct.
whereas applied voltage is 2% – 12% of rated
value. As core losses  (voltage)2. So core 4. The regulation of a transformer in which ohmic
losses in a short circuit transformer can be loss is 1% of the output and reactance drop is
neglected. 5% of the voltage, when operating at 0.8 power
factor lagging, is

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 (a) 3.8% (b) 4.8% 6. Consider the following advantages of a
(c) 5.2% (d) 5.8% distributed winding in a rotating machine:
1. Better utilization of core as a number of
Sol. (a)
evenly placed small slots are used
% Voltage regulation = (r cos  x sin )  100 2. Improved waveform as harmonic emf’s are

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reduced
cos  = Power factor
3. Diminished armature reaction and efficient
r = Per unit equivalent resistance or
cooling

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ohmic losses
Which of the above advantages are correct?
x = Per unit reactance drop
(a) 1 and 2 only (b) 1 and 3 only
r = 0.01 (c) 2 and 3 only (d) 1, 2 and 3
x = 0.05
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Sol. (a)
cos  = 0.8 sin  = 0.6 Advantage of distributed winding is slots are:
% Voltage regulation = [(0.01) (0.8) + (0.05) 1. Reduction of harmonics in generated
(0.8)] × 100 = 3.8 % voltage to make it approching to sine wave
5. In a power transformer, the core loss is 50 W 2. Full utilisation of armature iron and copper
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at 40 Hz and 100 W at 60 Hz, under the

condition of same maximum flux density in both 3. Adding rigidity and mechanical strength to
cases. The core loss at 50 Hz will be the windig.

(a) 64 W (b) 73 W 7. The breadth factor for 3rd harmonic emf of a

3-phase, 4-pole, synchronous machine having
(c) 82 W (d) 91 W
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36 stator slots is
Sol. (b)
(a) 0.47 (b) 0.53
Pc
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= a + bf a, b  constant (c) 0.67 (d) 0.73

f
50 Sol. (c)
= a + 40 f
40 Kd = distribution or breadth factor
100
= a + 60 f qn
60 Sin
2
1 20 Kd = n
Solving b = , a = q Sin
48 48 2
Pc at 50 Hz.
Pc 20 50 70 Slots = 36
= + =
50 48 48 48 Phase = 3
So Pc = 73 W
Poles = 4

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 n – nth harmonic 9. A dc motor develops an electromagnetic torque
q = Number of Slots per pole per of 150 N-m in a certain operating condition.
phase From this operating condition, a 10% reduction
in field flux and 50% increase in armature
180 current is made. What will be new value of
 =
slotsper pole electromagnetic torque?
(electrical degrees) (a) 225 N-m (b) 202.5 N-m
(c) 22.5 N-m (d) 20.25 N-m

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36
n = 3, q = = 3
3 4
Sol. (b)
180
Torque in D.C. machine T   Ia

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 = 36 = 20°
4   field flux
Ia  Armature current
(3)(3)(20)
sin So T1 1 Ia
2 sin90
So Kd = (3)(20) = 2 = 0.9 1 ; Ia2 = 1.5 Ia1
3  sin 3 sin30
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2
T2  (0.9) 1 (1.5) Ia1
2
= = 0.67 T2
3
So T1 = 1.35
8. Consider the following factors for a dc machine:
T2 = 1.35 T1 = (1.35) (150)
1. Interpole
T2 = 202.5 N – m
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2. Armature resistance
10. A dc machine, having a symmetrical closed-
3. Reduction in field current circuit armature winding and a sinusoidal air-
Which of the above factors are responsible for gap flux-density distribution, will have a
decrease in terminal voltage of a shunt sinusoidal voltage induced in the individual
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generator? coils. The resultant brush-to-brush voltage will

have a waveform
(a) 1 and 2 only (b) 2 and 3 only
(a) Sinusoidal with the negative-half reversed
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(c) 1 and 3 only (d) 1, 2 and 3 (b) Unidirectional and constant without any
ripples
Sol. (c)
(c) Unidirectional and constant with ripples
 Armature resistance does’t have any impact superimposed
on terminal voltage (d) Sinusoidal positive-half and zero negative-
 Reduction in field current reduces the half, in each cycle
terminal voltage
Sol. (c)
 Interpoles reduces the f lux density in
commutating zone which reduces the Brush to Brush voltage is resultant of voltage
terminal voltage. induced in all coils. So output will be a
Vt = Ea – Iara unidirectional voltage with ripples

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 Consider a generator Rotation

Brush Rotor
Stator
voltage

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t
11. A 3-phase, induction motor operating at a slip
of 5% develops 20 kW rotor power output.

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What is the corresponding rotor copper loss in
with negative  , the electromagnetic torque is
this operating condition?
developed in the direction opposite to rotor
(a) 750 W (b) 900 W rotation and must be balanced by an external
(c) 1050 W (d) 1200 W mechanical torque for the rotor to run at
synchronous speed.
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Sol. (c)
13. In an alternator, the armature winding is kept
Rotor power output = mechanical power stationary while the field winding is kept roating
developed in rotor for the following reasons:
Pm = 20 × 103 Slip s = 0.05
1. Armature handles very large current and
2 (1  s) 2 high voltage
Pm = I2 r2 I2 r2 = Rotor Copper Losses
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s
2. Armature fabrication, involving deep slots
2 (1  0.5) to accommodated large coils, is easy if
20 × 103 = I2 r2 armature is kept stationary
0.5
3 3 3. It is easier to cool the stator than the rotor
(20  10 )(0.5) 10  10
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2
I2 r2 = =  1050 W
0.95 0.95 Which of the above reasons are correct?
So Rotor copper losses = 1050 W. (a) 1 and 2 only (b) 1 and 3 only
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12. W hat are the signs of load angle in an (c) 2 and 3 only (d) 1, 2 and 3
alt ernator during generat or and motor
operations, respectively? Sol. (d)
Advantage of stationary armature winding
(a) Negative, negative
 It is economical and efficient
(b) Positive, negative
 As armature handles large voltage so
(c) Negative, positive
insulation is easy for stationary winding
(d) Positive, positive
 Can be cooled easily
Sol. (c)  Rotor is lighter and low centrifugal forces.
Load angle or Torque angle is negative when Fabrication is easy from mechanical

rotor field leads the resultant field and positive
stability point of view.
when rotor field lags the resultant field.

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14. Increasing the air-gap of a squirrel-cage
induction motor would result in
(a) Increase in no-load speed
(b) Increase in full-load power-factor
17.
(c) Increase in magnetizing current
(d) Maximum available torque
Sol. (c)
If switch fails to open then capacitor will remain
in circuit and high voltage will appear in
capacitor which will damage the capacitor.
For a 3-phase induction motor, what fraction/
multiple of supply voltage is required for a
direct-on-line starting method such that starting

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Sol. (c) current is limited to 5 times the full-load current
and motor develops 1-5 times full-load torque
mmf at starting time?
Flux =

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Reluc tance (a) 1.632 (b) 1.226
for constant flux, if reluctance is high we require (c) 0.816 (d) 0.456
high mmf which implies higher current as mmf
= (N) (I) Sol. (b)

So large air gap implies higher magnetising 2

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Tst  Ist 
current. =   sfl
Tfl  Ifl 
15. A cumulative compound dc motor runs at 1500
rpm on full load. If its series field is short Let reduced terminal voltage = x v
circuited, its speed
V  Full load or Rated voltage
(a) Becomes zero (b) Remains same
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So Ist = x Isc
(c) Increases (d) Decreases
Isc  Direct on line current
Sol. (c)
Isc = 5 Ifl (Given)
For a cumulative compound motor
Assume sfl = 0.04
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1 Tst = 1.5 Tfl

m = K (   ) × [Vt – Ia (ra + rs)]
a sh se
2
Tst 2 I 
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sc
se  flux due to series winding = 0 So = 1.5 = x  I  s f l
T fl  fl 
So m will increase as clear from above
equation. = x2 (5)2 (0.4)
1.5 = x2
16. If the capacitor of a capacitor-start single-phase
motor fails to open when the motor picks up  x = 1.226
speed,
18. What is the material of slip-rings in an induction
(a) The motor will stop
machine?
(b) The auxiliary winding will be damaged
(a) Carbon (b) Nickel
(c) The capacitor will be damaged
(c) Phosphor bronze (d) Manganese
(d) The winding will be damaged

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Sol. (c) Sol. (d)
Slip ring are made up of phosphor Bronze. Electrostatic precipitator is used to collect the
Slip rings are tapped by means of copper - dust particles from the flue gases.
carbon brushes.
22. The load curve is useful in deciding
19. The stator loss of a 3-phase induction motor is

2 kW. If the motor is running with a slip of 4%
and power input of 90 kW, then what is the
rotor mechanical power developed?
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1. The operating schedule of generating units
2. The total installed capacity
Which of the above statement is/are correct?

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(a) 84.48 kW (b) 86.35 kW (a) 1 only (b) 2 only
(c) 89.72 kW (d) 90.52 kW (c) Both 1 and 2 (d) Neither 1 nor 2
Sol. (a) Sol. (c)
Air Gap Power Pg = Power Input-stator losses The load curve indicates average (KW h)
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Pg = 90 × 103 – 2× 103 = 88 × 103 W energy consumption during a given period and
hence it is useful in deciding both the operating
Pm = (1 – s) Pg s = 0.04
schedule of generating units and the total
Pm = (1 – 0.04) (88 × 103) installed capacity.
Pm = 84.48 kW 23. The maximum demand on a steam power
station is 480 MW. If the annual load factor is
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20. In a single-phase capacitor-start induction

40%, then the total energy generated annually
motor, the direction of rotation
is
(a) can be changed by reversing the main
(a) 19819.2×105 kWh
winding terminals
(b) 18819.2×105 kWh
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(b) cannot be changed

(c) 17819.2×105 kWh
(c) is dependent on the size of the capacitor
(d) 16819.2×105 kWh
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(d) can be changed only in large capacity

Sol. (d)
motors.
Maximum demand = 480 MW.
Sol. (a)
Annual load factor = 40%
Direction can be chaged by interchanging the
 Total energy generated anually will be
main winding terminals.
40
21. Air pollution due to smoke around a thermal 480   24  365  10 6
100
power station can be reduced by installing
= 16819.2 × 105 kWh
(a) Induced draft fan
24. To equalize the sending and receiving end
(b) Super heater voltages, impedance is connected at the
(c) Economizer receiving end of a transmission line having the
(d) Electrostatic precipitator following ABCD parameters

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 A = D = 0.9 0° B = 200 90°  (b) Inversely proportional to back emf and
directly proportional to flux
The impedance so connected would be
(c) Directly proportional to back emf as well as
(a) 1000 0°  (b) 1000 90°  to flux
(c) 2000 90°  (d) 200 0°  (d) Inversely proportional to back emf as well
as to flux
Sol. (c)
Sol. (a)

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Using the equation,
Back Emf Eb = Kam
Vs = AVR + BIR
Now, to equalize the sending and receiving end Eb
m =

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voltages Vs = VR. Ka
 VR = AVR  BIR Eb  Back emf
  Flux.
 VR 1  A  = BIR
27. When the sending end voltage and current are
VR B 200 90 numerically equal to the receiving end voltage
= 1  A  1   0.90
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 IR and current respectively, then the line is called
VR 20090 (a) A tuned line (b) A transposed line
 =  200090
IR 0.1
(c) A long line (d) A short line
25. The maximum efficiency in the transmission of Sol. (a)
bulk ac power will be achieved when the power
factor of the load is
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 cosh l ZC sinh l

 VS    VR 
(a) Slightly less than unity lagging   =  1 sinh l cosh l   I 
 IS   ZC   R 
(b) Slightly less than unity leading
Now, for an overhead line, neglecting G and
(c) Unity R.
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 = j LC
(d) Considerably less than unity
 cosh l  cosh jl LC  cos l LC
Sol. (b)
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sinh l  sinh jl LC  jsin l LC

A load with slightly less than Unity Power Hence,
Factor leading will supply the reactive power
requirement of the transmission line. Also  cos l LC jZC sin l LC 
current flow in the line will reduce which VS     VR 
  j  
causes the reduction in losses. Therefore a  IS   sin l LC cos l LC   IR 
slightly leading power factor will help in Z 
efficient transmission of bulk power. If l LC  n; n  1,2,3,....
26. A speed of a dc motor is VS  VR and IS  IR
Then
(a) Directly proportional to back emf and i.e. the receiving-end voltage and current are
inversely proportional to flux numerically equal to the corresponding

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 sending-end waves. Such line is called a tuned Sol. (d)
line.
Change in energy stored in generator
28. If Vm is the peak value of an applied voltage in
a half wave rectifier with a large capacitor 2f
dW = Wo
across the load, then the peak inverse voltage fo

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will be W o  initial energy stored = (H) (Rated MVA)
(a) 0.5 Vm (b) Vm H = 5, (Rated MVA) = 100
(c) 1.5 Vm (d) 2.0 Vm So W o = 500 MJ

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Sol. (d)
dW = (H) (Change in power) = H P
Peak inverse voltage is the maximum voltage
which appears across a diode when it is P = 50 MW (Assume power factor = 1)
under reverse bias. So dW = (5) (50) = 250 MJ
AS
f 0 = 50 Hz.
RL
Vi = Vmsint
C 2 f
 250 =  500
50
During the positive half cycle of V i , the
  f = 12.5 Hz
capacitor C is charged to V m volts. During
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the negative half cycle of V i , the circuit will So frequency at 0.4 sec. is nearly 62 Hz
be as below: (Diode will be reverse biased
Note: Actual equation is
and acts as open circuit).
Q P 2W0
dW = 2
(f  f ) f
f0
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– +
Vm RL
Vm
–
+ We had simplified it by neglecting ( f )2 .
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Voltage across diode during reverse bias V PQ 30. A 25 MVA, 33 kV transformer has a pu
= Vm + Vm = 2 Vm impedance of 0.9. The pu impedance at a new
base 50 MVA at 11 kV would be
 PIV = 2Vm
(a) 10.4 (b) 12.2
29. A 100 MVA generator operates on full-load of
50 Hz frequency. The load is suddenly reduced (c) 14.4 (d) 16.2
to 50 MW. The steam valve begins to close Sol. (d)
only after 0.4s and if the value of the inertia
2
constant H is 5s, then the frequency at 0.4s is Zpu2 = Zpu1. (MVA)2  (KV1 )
nearly (MVA)1 (KV2 )2
(a) 38 Hz (b) 44 Hz
(MVA)1 = 25, KV1 = 33 ZPU1 = 0.9
(c) 51 Hz (d) 62 Hz
(MVA)2 = 50, KV2 = 11

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 2 (c) Regulation of transmission line
50  33 
Zpu2 = (0.9)   (d) Power factor improvement of the system
25  11 
Sol. (a)
= (0.9) (2) (9)
The maximum allowable value of the clearing
ZPU2 = 16.2 time and angle for the system to remain stable
31. Symmetrical components are used in power are known respectively as critical clearing time
system for the analysis of and angle.

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(a) Balanced 3-phases fault 34. A 2-pole, 50 Hz, 11 kV, 100MW alternator has
a moment of inertia of 10,000 kg.m2. The value
(b) Unbalanced 3-phase fault of inertia constant, H is

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(c) Normal power system under steady (a) 3.9 s (b) 4.3 s
conditons
(c) 4.6 s (d) 4.9 s
(d) Stability of system under disturbance
Sol. (d)
Sol. (b)
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Symmetrically components are used in power G
H =
system for the analysis of unbalanced 3-phase M
fault.
32. For V-curves for a synchronous motor the graph 1 2
G = I I  Moment of Inertia
is drawn between 2

(a) Terminal voltage and load factor I = 10,000 kg. m 2 G  Energy stored in
M

(b) Power factor and field current Machine

(c) Field current and armature current M = Rated Power = 100 MVA

(d) Armature current and power factor 1

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4 2
 (10 )(2  50)
Sol. (c) H = 2 6
= 4.93 s
100  10
X – axis  Field Current
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Y – axis  Armature current H = 4.93 sec

Ia 35. Stability of power system can be improved by
1. Using series compensators
2. Using parallel transmission lines
If 3. Reducing voltage of transmission

33. Critical clearing angle is related to Which of the above statements are correct?

(a) Stability study of power system (a) 1 only (b) 2 only

(b) Power flow study of power system (c) 2 and 3 only (d) 1 and 2

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Sol. (d) (iv) No reactive compensation is required.
Stability of a power system can be improved (v) Higher operating voltage is possible
by (vi) No stability problem.
(i) higher system voltage Disadvantages of HVDC systems.
(ii) use of parallel lines to reduce the series

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reactance. (i) Installation of converters and switch gear
makes it expensive.
(iii) Use of high speed circuit breakers and auto-
reclosing breakers. (ii) Harmonic are generated which require filters

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(iv) Reducing the series reactance there by (iii) Voltage transformation is not easy.
increasing Pm and therefore increases the 38. The three sequence voltages at the point of
transient stability limit of a system. fault in a power system are found to be equal.
36. Equal-Area Criterion is employed to determine The nature of the fault is
(a) The steady state stability
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(a) L–G (b) L–L–L
(b) The transient stability (c) L–L (d) L–L–G
(c) The reactive power limit
Sol. (d)
(d) The rating of a circuit breaker
For double line to ground fault
Sol. (b)
Va
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Equal-area criterion is employed to analyse

Va0 = Va1 = Va2 =
the transient stability. 3
37. Consider the following advantages with respect Here phase b and c are shorted to ground.
of HVDC transmission:
39. A distance relay with inherent directional
1. Long distance transmission
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property is known as
2. Low cost of transmission (a) Buchholtz relay
3. Higher efficiency
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(b) Admittance relay

Which of the above advantages are correct? (c) Directional over current relay
(a) 1 and 2 only (b) 1 and 3 only (d) Directional switched relay

(c) 2 and 3 only (d) 1, 2 and 3 Sol. (b)

Sol. (b) Its characteristic (Admittance relay) passes

through origin of R–x diagram and hence
Advantages of HVDC systems.
directional.
(i) Economical for long distance bulk power
40. Consider the following circuit breakers for 220
transmission by overhead lines.
kV substations:
(ii) Greater power per conductor and simpler
1. Air
line construction.
(iii) No skin effect 2. SF6

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 3. Vacuum
Which of the above circuit breakers can be
used in an indoor substation?
(a) 1, 2 and 3 (b) 1 only
(c) 2 only (d) 3 only
Sol. (a)
• Air break circuit breaker : This type of circuit
breaker is employed in both a.c. and d.c.
type of circuits upto 12 KV. These are
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normally indoor type and installed on vertical
panels.
• Vacuum and SF6 gas circuit breakers are
suitable for primary and secondary power
distribution networks upto 40.5KV, 3150A,
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63KA. In particular, SF6 circuit breakers do
not generate operating over voltages and
are suitable for retrofitting, upgrading. Indoor
circuit breakers for secondary distribution
are suitable for use in unmanned MV/LV
transformer substations without auxiliary
M
power supply.
41. A semiconductor differs from a conductor in
that it has
(a) Only one path for the free electrons in the
valence band
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(b) Only one path for holes in the conduction
band
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(c) Two paths followed by free electrons and
holes, one an ordinary path in the conduction
band and the other one an extraordinary
path in the valence band, respectively
(d) Two paths followed by free electrons and
holes, one an extraordinary path in the
conduction band and the other one an
ordinary path in valence band, respectively
Sol. (c)
In a semiconductor, conduction band and
valence band are separated by energy gap. At
room temperature, some of the e– in V.B. gains
enough energy to overcome the energy gap
and move into C.B. leaving behind an empty
space in V.B which is called as Hole. An e– in
the V.B. may fill the hole, leaving another hole
in its place. In this way, a hole appears to
move.
In the presence of electric field e– move in one
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direction and holes appear to move in the
opposite direction and both contribute to
conductivity of the material.
Hence, e– moves in ordinary path in C.B. and
holes move in extra-ordinary path in V.B.
42. Which of the following circuits is used for
converting a sine wave into a square wave?
(a) Monostable multivibrator
(b) Bistable multivibrator
(c) Schmitt trigger circuit
(d) Darlington complementary pair
Sol. (c)
Schmitt Trigger is used as a wave shaping
circuit. It is used to convert a sine wave into
a square wave by fixing the output voltage at
two distinct voltage levels.
43. What is the type of breakdown that occurs in
a Zener diode having breakdown voltage (bV)?
(a) Avalanche breakdown only
(b) Zener breakdown only
(c) Avalanche breakdown where breakdown
voltage is below 6V and Zener breakdown
otherwise
(d) Zener breakdown where breakdown voltage
is below 6V and Avalanche breakdown
otherwise
Sol. (d)
Zener Breakdown occurs in heavily doped
junction which produce narrow depletion
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 region. Under a very high reverse voltage, the
Vm
high electric field break some of the covalent and Vdc = , Ripple frequency = f.

bonds of semiconductor atoms leading to large
number of minority carriers which suddenly Hence, the d.c voltage and ripple frequency
increase the reverse current. This is zener will be lower than the expected value.
effect.

Avalanche breakdown occurs in lightly doped
junctions which has wide depletion layers.
Hence, Avalanche breakdown will occur for
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Surge current is the brief and large current
that exists when the power is first turned on.
It is large because the filter capacitor must
charge to peak voltage during the first few

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reverse voltage greater than zener voltage. For cycles. When one on the diode is defective
a zener diode having breakdown of 6V, in bridge rectifier, surge current increases.
breakdown below 6V is due to zener effect
Hence, 1, 2 & 3 are correct.
and breakdown above 6V is due to Avalanche
effect. 45. The lowest frequency of ac components in the
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outputs of half-wave and full-wave rectifiers are,
44. Consider the following statements:
respectively, (where  is the input frequency)
A power supply uses bridge rectifier with a
capacitor input filter. If one of the diodes is (a) 0.5  and  (b)  and 2 
defective, then
(c) 2  and  (d)  and 3 
1. The dc load voltage will be lower than its
expected value Sol. (b)
M

2. Ripple frequency will be lower than its Input signal:

expected value V2 Frequency = 
3. The surge current will increase considerably
Which of the above statements are correct?
S

t
(a) 1 and 2 only (b) 1 and 3 only
T
(c) 2 and 3 only (d) 1, 2 and 3
IE

Sol. (d) Output of Half wave Rectifier:

A bridge rectifer is a full wave rectifier. If VHW
Frequency = 
the input voltage is V i = Vm sin(2 ft) , then
for a full wave rectifier,
T t
2 Vm
Vdc =

The time period of the output of Half wave
Ripple frequency = 2f rectifier is same as that of input signal. Hence,
If one of the diode is defective, the bridge the lowest frequency in the output is same as
rectifier will now work as a half wave rectifier input frequency i.e. 
Output of full wave rectifier:

, 8010009955
 VFW 47. For a BJT, IC = 5 mA, IB = 50 A and ICBO =
Frequency = 2
0.5 A, then the value of  is
(a) 99 (b) 91
T t
2 (c) 79 (d) 61
Sol. (a)
The time period of the output of full wave The collector current in a BJT is given by:

R
Rectifier is half the period of input wave. Hence,
the lowest frequency in the output is twice the IC =  IB  1   ICBO
input frequency i.e. 2
 IC = IB  ICBO   ICBO

TE
46. A half-wave rectifier circuit using ideal diode
has an input voltage of 20 sin  t Volt. Then
IC  ICBO 
  = I I
average and rms values of output voltage  B CBO 
respectively, are
 5  103  0.5  10 6 
=
10 20  50  106  0.5  106 
AS
(a) V and 5 V (b) V and10 V
 
4999.5
=
20 10 50.5
(c) V and 5 V (d) V and10 V
    = 99
Sol. (b) 48. Which of the following conditions must be
M

satisfied for a transistor to be in saturation?

1. Its collector to base junction should be under
RL forward bias
Vi =20 sin t V0
2. Its collector to base junction should be under
S

reverse bias
3. Its emitter to base junction should be under
V0
reverse bias
20V
IE

4. Its emitter to base junction should be under

forward bias
t Which of the above conditons are correct?
(a) 1 and 3 (b) 2 and 3
For a half wave rectifier: (c) 2 and 4 (d) 1 and 4
Vm 20 Sol. (d)
Average value of voltage =  Volts
  A Transistor is said to be operating in saturation
region if:
Vm 20
R.M.S value of voltage =   10 Volts
2 2 1.Emitter to Base Junction is forward biased

, 8010009955
 2.Collector to Base junction is forward biased 50. Consider the following circuits:
1. Oscillator
Statement 1 & 4 are correct.
2. Emitter follower
49. In an amplifier with a gain of 1000 without 3. Power amplifier
feedback and cut-off frequencies at 2 kHz and
Which of the above circuits employ are

R
20 kHz, negative feedback of 1% is employed.
feedback?
The cut-off frequencies with feedback would
be (a) 1 and 2 only (b) 2 and 3 only
(c) 1 and 3 only (d) 1, 2 and 3

TE
(a) 220 Hz and 22 kHz
Sol. (d)
(b) 182 Hz and 220 kHz
1. W ith the use of positive feedback or
(c) 220 kHz and 220 kHz regenerativ e f eedback in a circuit,
(d) 20 Hz and 22 kHz oscillations will take place and circuit works
as oscillator.
AS
Sol. (b)
For the given amplifier: 2. For the emitter follower circuit shown below,
the feedback signal is the voltage Vf across
Gain (A) = 1000 emitter resistor Re and the sampled signal
Lower cut-off frequency f L = 2kHz Vs is the output voltage across Re. It is a
Higher cut-off frequency f H = 20 kHz case of voltage series feedback.
M

–Vcc
Feedback factor  = 0.01
Rc
In case of negative feedback, the gain of the
amplifier reduces and Bandwidth increases. Rs C
S

The lower cut-off frequency is reduced and is B

given by: + E +
Vs
– Re Vout
IE

3
fL 2  10 –
fL = 
1  A 1  1000  0.01

= 181.8 Hz 3. In a power amplifier ,AC negative feedback

is used to reduce distortion and noise and
 fL = 182 Hz widen bandwidth. Moreover, DC negative
feedback is used to stabilise the DC
The higher cut-off frequency increases and is
biasing.T here i s also some posit iv e
given by:
feedback, ‘BOOTSTRAPPING’ applied to
increase input impedance and improve
fH = 1  A  fH
efficiency. Other essential feature includes
= (1 + 1000 × 0.01) × 20 × 103 the use of diodes to provide thermal stability
and same bias adjustments to give minimum
 fH = 220 kHz distortion.

, 8010009955
51. Three identical amplifiers each having a voltage The operational amplifier circuit shown in figure
gain of 50 are cascaded. The open loop voltage having a voltage gain of unity has
gain of the combined amplifier is (a) High input impedance and high output
(a) 71 dB (b) 82 dB impedance
(c) 91 dB (d) 102 dB (b) High input impedance and low output
Sol. (d) impedance
(c) Low input impedance and low output

R
A1 A2 A3 A 1 A 2A 3 impedance
(d) Low input impedance and high output
Over all voltage gain: AV = A1A2A3 impedance

TE
 AV = 50 × 50 × 50 Sol. (b)

[  Amplifiers are identical] The given circuit is a voltage follower. For a

voltage follower
 AV = 125000
+
 AV = 20 log10 (AV) –
AS
dB vi vo
= 20 log10 (125000)

= 102dB (i) Closed-loop gain, Af = 1

52. A clamper circuit (ii) Closed-loop input impedance, Rinf = A Rin

Rout
M

1. Adds or subtracts a dc voltage to or from a

(iii) Closed-loop output impedance; Routf =
waveform A
2. Does not change the shape of the waveform (iv) Bandwidth with feedback, f f = A f 0
Which of the above statements are correct? where Rin, Rout, A represents open loop gain.
(a) 1 only (b) 2 only
S

From (ii) it is clear that Rinf will be high.

(c) Both 1 and 2 (d) Neither 1 nor 2
Sol. (c) Form (iii) it is clear that Routf will be low.
IE

A clamper circuit can add or subtract the DC
voltage to or from a waveform. The frequency
of the waveform remains unaffected. Moreover,
the shape remains unaltered with the addition
of DC-voltage. Hence, shape of waveform
remains same before and after clamping.
+
– flop to store two bits of information
vi vo
53.
54. Consider the following statements:
1. Race-around condition occurs in a JK flip-
flop when the inputs are 1, 1
2. A flip-flop is used to store one bit of
information
3. A transparent latch consists of D-type flip-
flops
4. Master-slave configuration is used in a flip-
Which of the above statements are correct?
(a) 1, 2 and 3 only (b) 1, 2 and 4 only

, 8010009955
 (c) 3 and 4 only (d) 1, 2, 3 and 4 which cannot modify input signal.
Sol. (a)
Master slave configuration is used to avoid
race around condition. It doesnot store two –
bits of information. Rest statements are correct. Vout

R
Vin +
55. An operational amplifier has slew rate of 2V/
sec. If the peak output is 12 V, what will be the
power bandwidth?

TE
(a) 36.5 kHz (b) 26.5 kHz 57. If a, b, c are 3-input variables, then Boolean
function y = ab + bc + ca represents
(c) 22.5 kHz (d) 12.5 kHz
Sol. (b) 1. A 3-input majority gate

Full power response of an op-amp is given as. 2. A 3-input minority gate

AS
3. Carry output of a full adder
SR max
f max = 2 V 4. Product circuit for a, b and c
Pout
Which of the above statements are correct?
6
2  10 (a) 2 and 3 (b) 2 and 4
 f max = = 26.525 kHz
2 12 (c) 1 and 3 (d) 1 and 4
M

Sol. (c)
 Power Bandwidth; BwP = f max
A majority gate returns true if and only if more
 BwP = 26.5 kHz. than 50% inputs are true
56. A voltage follower is used as Y = ab + bc + ca is a 3 input majority gate
S

1. An isolation amplifier Y is also carry output of full adder

2. A buffer amplifier 58. In a 2-input CMOS logic gate, one input is left
IE

Which of the above statements is/are correct? floating i.e. connected neither ground nor to a
signal. What will be the state of that input?
(a) 1 only (b) 2 only
(a) 1
(c) Both 1 and 2 (d) Neither 1 nor 2
Sol. (c) (b) 0
(c) Same as that of the other input
 An isolation amplifier is an op-amp circuit
which provides isolation of one part of the (d) Indeterminate (neither 1 nor 0)
circuit from another so that power is not
Sol. (d)
used in a part of the circuit hence it is a
voltage amplifier. A floating input for a CMOS gate may be
considered as either of the logic levels.
 A voltage amplifier is also a buffer amplifier
since a buffer is nothing but a storing device 59. The expression for MOD number for a ripple

, 8010009955
 counter with N flip-flops is and ROM. If data is stored in a hard drive, it
will remain on that drive regardless if the power
(a) N (b) 2N is interupted, which is why it is the best place
(c) 2N–1 (d) 2N–1 to store data and documents.
Sol. (b) 62. Consider the following instructions:

The expression for MOD number for a ripple 1. LOCK

counter with N Flip flop is 2N 2. STD

R
3. HLT
60. Why a ROM does not have data inputs?
4. CLI
(a) It does not have a WRITE operation W hich of the above are machine control

TE
instructions?
(b) Data inputs are integrated with data outputs
(a) 1 and 4 (b) 1 and 3
(c) Data inputs are integrated with address
(c) 2 and 3 (d) 2 and 4
inputs
Sol. (b)
(d) ROM is sequentially accessed
Flag Manipulation instruction in 8086
AS
Sol. (a)
CLI
Data cannot be written on ROM chip.
= CLC
Hence it only has data output pins ROM - Read CMC
only memory. STC
61. Consider the following statements: STD
M

STI
1. RAM is a non-volatile memory whereas
CLD
ROM is a volatile memory
Machine control instruction in 8086
2. RAM is a volatile memory whereas ROM is
WAIT
a non-volatile memory
S

HLT
3. Both RAM and ROM are volatile memories NOP
but in ROM data is not when power is
ESC
IE

switched off
LOCK
Which of the above statements are correct?
 Correct option is ‘b’
(a) 1 only (b) 2 only 63. What is the assemble directive statement used
(c) 3 only (d) None of the above to reserve an array of 100 words in memory
and initialize all 100 words with 0000 and give
Sol. (b)
it a name STORAGE?
Non-volatile is a term used to describe any
(a) STORAGE DW 100
memory or storage that is saved regradless if
the power to the computer is on or off. The (b) STORAGE DW 100 DUP (0)
best example of non-volatile memory and (c) STORAGE DW 100 DUP (?)
storage is a computer hard drive, flash memory (d) STORAGE DB 100

, 8010009955
Sol. (b)
STORAGE DW 100 DUP (0)  Reserve an
array of 100 words of memory and initialise all
words with 0000 and giv es it name as
STORAGE.
Speed of stator field winding = Ns
Cause of field in stator  rotor field
So rotor should be rotated such that emf
induced in stator is reduced. Rotor rotates in
direction opposite to that of rotating magnetic

R
DW  This directive is used to define a variable field. so speed of rotating magnetic field w.r.t
of type word or to reserve storage location of stator = Ns – Nr = s Ns
type word in memory. frequency of stator field

TE
DB  This directive is used to declare a byte
f 2 = sf1, s  slip
type variable or to store a byte in memory
location. Option (a) is correct.
66. The reversing of a 3 induction motor is
64. Consider the following statements:
achieved by
1. Auxiliary carry flag is used only by the DAA
AS
(a) Y– starter
and DAS instructions
(b) DOL starter
2. Zero flag is set to 1 if the two operands
compared are equal (c) Auto transformer
(d) Interchanging any two of the supply line
3. All conditional jumps are long-type jumps
Sol. (d)
M

Which of the above statements are correct?

By interchanging any two supply terminal, the
(a) 1, 2 and 3 (b) 1 and 2 only direction of rotating magnetic field produced
(c) 1 and 3 only (d) 2 and 3 only by induction motor is reversed. Which in turns
Sol. (b) reverses the direction of rotation.
S

67. Consider the following interrupts for 8085

 Auxiliary carry flag is used only by the DAA
microprocessor:
and DAS instructions.
1. INTR
IE

 All conditional jumps are short-type jumps. 2. RST 5.5

65. If a 3-phase slip ring induction motor is fed 3. RST 6.5
from the rotor side with stator winding short 4. RST 7.5
circuited, then frequency of currents flowing in 5. TRAP
the short circuited stator is If the interrupt is to be vectored to any memeory
(a) Slip × frequency location then which of the above interrupts is/
are correct?
(b) Supply frequency
(a) 1 and 2 only (b) 1, 2,3 and 4
(c) Frequency corresponding to rotor speed (c) 5 only (d) 1 only
(d) Zero Sol. (d)
Sol. (a) In all five hardware interrupts ie. TRAP, RST
Speed of rotor field initially = Ns 7.5, RST 6.5, RST 5.5 and INTR, only INTR is

, 8010009955
 a non-vectored interrupt. There are 8 numbers Given symbol is,
of CALL-locations for INTR interrupt ie. upto 8
number of I/o devices can be connected to
INTR through an external hardware.
68. The instruction JNC 16 bit refers to Jump to 16
bit address if
(a) Sign flag is set

R
(b) CY flag is reset
(c) Zero flag is set

TE
(d) Parity flag is reset
In a program flow chart, above symbol is
Sol. (b) used to show complex processing steps
JNC (16 bit address) : which may be detailed in a seperate flow-
 The program jumps to the instruction which chart. So, it is used for predefined process
is specified by the address if there is no or for subroutine.
AS
carry (ie. if CY = 0) or if CY flag is reset
70. Which one of the followng statements is correct
 No flags will be affected
regarding the instruction CMP A
 Immediate addressing mode
(a) Compare accumulator with register A
 It takes 2 or 3 machine cycles
(b) Compare accumulator with memory
69. Consider the symbol shown below:
M

(c) Compare accumulator with register H

(d) This instruction does not exist
Sol. (a)
CMPA : - Compare the register A with
S

Accumulator.
In this instruction, the content of register A is
subtracted from the content of the accumulator.
IE

Status flags are set/reset according to the result

of subtraction. The content of accumulator
remains unchanged.
What function does the above symbol represent
in a program flow chart? 71. The instruction RET executes with the following
(a) A process series of machine cycle

(b) Decision making (a) Fetch, read, write

(c) A subroutine (b) Fetch, write, write

(d) Continuation (c) Fetch, read, read
Sol. (c) (d) Fetch, read

, 8010009955
Sol. (c)
RET :
– Return to main program unconditionally.
– Register indirect addressing mode
– 1 Byte instruction
– No flag is affected
– Three machine cycles (Fetch + Read + Read)
TE
When RET instruction is excuted, it takes three
machine cycles. In f irst machine cycle,
microprocessor fetches the opcode, during
second and third machine cycles, it reads the
contents of top of stack.
AS
72. Consider the following circuits :
1. Full adder
2. Half adder
3. JK flip-flop
4. Counter
M
Which of the above circuits are classified as
sequential logic circuits?
(a) 1 and 2 (b) 3 and 4
S
(c) 2 and 3 (d) 1 and 4
Sol. (b)
Full adder and Half adder are combination
IE
circuits, whereas JK Flip Flop and counter are
sequential logic circuit.
73. W hen a peripheral is connected to the
microprocessor in Input Output mode, the data
transfer takes place between.
(a) Any register and I/O device
(b) Memory and I/O device
(c) Accumulator and I/O device
(d) HL register and I/O device
Sol. (c)
W hen a peripheral is connected to the
microprocessor in input/output mode, the data
transfer takes place between. Accumulator and
I/o device. IN and OUT instructions are used
for data transfer.
In port address : The data available on the
port is moved to the accumulator.
R
Out port address : The content of the
accumulator is moved to the port specified by
its address.
74. While execution of IN/OUT instruction takes
place, the 8-bit address of the port is placed
on
(a) Lower address bus
(b) Higher address bus
(c) Data bus
(d) Lower as well as higher order address bus
Sol. (b)
While execution of IN/OUT instruction takes
place, the 8-bit address of the port is placed
on A8 – A15 lines of address bus ie. higher
address bus.
75. The port C of 8255 can be configured to work
in
(a) mode 0, mode 1, mode 2 and BSR
(b) mode 0, mode 1 and mode 2
(c) mode 2 and BSR
(d) BSR mode only
Sol. (a)
The intel 8255 can function brodly in two
modes : The Bit Set/Reset (BSR) mode and
the I/o mode. The BSR mode is used to set or
reset the bits in port C. The I/o mode is further
function in three modes : Mode 0, Mode 1 and
Mode 2. Port C can be configured in all three
modes. Port A can also configured in all three
modes but Port B can configured in only Mode
, 8010009955
 - 0 and Mode - 1 lighting over several years.

76. Consider the following statements : 78.
1. Semiconductor memories are organized as
linear array of memory locations
2. To address a memory location out of N
memory locations, at least log N bits of
A 2400/240 V, 200 kVA, single phase
transformer has a core loss of 1.8 kW at rated
voltage. Its equivalent resistance is 1.1%. Then
the transfer efficiency at 0.9 power factor and
on full load is
(a) 95.60% (b) 96.71%

R
address are required
(c) 97.82% (d) 98.93%
3. 8086 can address 1,048,576 addresses
4. Memory for an 8086 is set up as two banks Sol. (c)

TE
to make it possible to read or write a word
output
with one machine cycle  =  100
Input
Which of the above statements are correct?
(KVA)cos 
(a) 1, 2 and 3 only = (KVA)cos   P  P  100
c o
AS
(b) 1, 2 and 4 only Pc  Core losses = 1.8 × 103 w
(c) 3 and 4 only cos = 0.9
Po  ohmic losses  1.1% equivalent
(d) 1, 2, 3 and 4 resistance
Sol. (c) It implies ohmic losses are 1.1% of full (KVA)
equivalent resistance
M

If we have n bits of address, then 2n locations

can be addressed. So, statement (2) is Ohmic losses at rated load
=  100
wrong. (RatedKVA)
Hence, correct option will be (c). 3
(1.1)(200  10 )
So ohmic losses = = 2.2KW
S

77. The sticker over the EPROM window protects 100

the chip from Output = (KVA) cos = (200 × 103) (0.9) = 180 KW
(a) Infrared light from sunlight
IE

3
180  10
So  = 3 3 3
 100 = 97.82%
(b) UV light from fluorescent lights and sunlight 180  10  2.2  10  1.8  10
(c) Magnetic field 79. The 8259A Programmable Interrupt Controller
(d) Electrostatic field in cascade mode can handle interrupts of
Sol. (b) (a) 8 priority levels
The sticker over the EPROM window protects (b) 16 priority levels
the chip from UV light from fluorescent lights
and sunlight. UV light erases the content of (c) 32 priority levels
EPROM in several minutes; sunlight would
erase EPROM in weeks and indoor fluorscent (d) 64 priority levels

, 8010009955
Sol. (d) D1 = 0

One 8259 A can handle 8 I/o devices to transfer 81. The induced emf in the armature conductor of
data using interrupt technique. If there are more a D.C. machine is
than 8 I/o devices to transfer data using (a) Sinusoidal
interrupt, two 8259 A ICs can be connected in
(b) Trapezoidal

R
series or cascading. Hence, upto 64 I/o devices
or priority levels can be connected employing (c) Rectangular unidirectional
two 8259A. ICs. (d) Triangular

TE
80. 8259A Programmable Interrupt Controller uses Sol. (a)
the following initialization comands :
Induced emf is sinusoidal but output is rectified
1. ICW 1 by commutation action.
2. ICW 2 82. If a carrier of 100% modulated AM is
suppressed before transmission, the power
AS
3. ICW 3
saving is nearly
4. ICW 4
(a) 50% (b) 67%
If 8259A is to be used in cascaded and fully
nested mode, the ICW 1 bits D0 and D1 are (c) 100% (d) 125%

(a) 0 and 0 Sol. (b)

M

(b) 1 and 0 Here, modulation index m = 1

(c) 0 and 1  m2 
Total Power with carrier PT = Pc  1  
(d) 1 and 1  2 
S

Sol. (a) If carrier is suppressed then power will be

The 8259A can be initialised with f our m2
Initialisation Command Words (ICWs); the P1 = Pc
IE

2
first two are essential and other two are
optional based on the modes being used. Power saved PT  P1
These word must be issued in a giv en Power saving = Total Power  P
T
sequence.
The specific EOI Command Format for ICW 1, m2 m2
PC  Pc  PC
2 2  2  2
D7 D6 D5 D4 D3 D2 D1 D0
=  m2  2  m2 2  1
PC  1  
 2 
1 = ICW4 needed
0 = No ICW4 needed 2
=  0.67  67%
1 = Single 3
0 = Cascade Mode
83. An FM Signal is represented by v = 12 sin(6 ×
Hence, D0 = 0

, 8010009955
 108 t + 5 sin 1250t). The carrier frequency f c Where, Kf = Frequency sensitivity,
and frequency deviation  , respectively, are
Am = Modulating Voltage
(a) 191 MHz and 665 Hz
When fm = 2fm
(b) 95.5 MHz and 995 Hz

(c) 191 MHz and 995 Hz K f .A m 

 = 
2fm 2

R
(d) 95.5 MHz and 665 Hz
Sol. (b) Hence, the system is FM.

TE
V  12 sin  6  10 8 t  5 sin1250t 
Comparing with standard equation of FM signal,
85.
s  t   A C sin  c t   sin m t 
Also, modulation index of PM does not depend
upon modulating frequency.
v = A sin (  ct + m sin  m t) is the expression
for

6  108 (a) Amplitude modulated signal

AS
C  6  108  fC   95.54MHz
2 (b) Frequency modulated signal
  5 (Modulation Index) (c) Phase modulated signal
1250 (d) Carrier signal used for modulation
m  1250  fm   199Hz
2
Sol. (c)
M

F re q u e n c y D e v ia tio n 
   M e s s a g e F re q u e n c y  f For a given equation of angle modulated wave,
m it is not possible to determine whether it is FM
     fm or PM signal. However, if both the carrier wave
and message signal are sinusoidal function,
   5  199    995Hz we can determine the nature of modulated
S

84. When the modulating frequency is doubled the signal.

modulation index is halved and the modulating Let, the carrier be Sc(t) = A sin c t
IE

voltage remains constant. This happens when

the modulating system is and message signal be m(t) = A m sin m t
The expression for FM signal will be:
(a) AM (b) PM
 t 
(c) FM (d) Delta Modulation SFM(t) = A sin  c t  k f  m(t)dt 
 
Sol. (c)  0 

t
Modulation Index    in FM is given by :  
= A sin  c t  K f A m  sin m t 

Frequency Deviation K f .A m  0 
 = Message Frequency  f
m
 k f Am 
SFM(t)= A sin  c t –  cos m t 
 m 

, 8010009955
 Where, Kf = Frequency sensitivity of FM which
= A sin  c t  mcos m t 
is constant.
where m = Modulation index of FM
 4.8 3
The expression for PM signal will be:  Kf = A  2.4  10 Hz V
m
SPM(t) = A sin  c t  kpm(t) 
= 2  103 Hz V

R
= A sin  c t  kp A m sin m t  Now, Am = 7.2 V
  = K f A m  2  10 3  7.2 Hz
SPM(t) = A sin  c t  m sin m t 

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
 = 14.4 KHz
Among the given options and assuming both
carrier & message signal to be sine wave, the 88. Modulation is used to
expression is of a phase modulated signal. 1. Separate different transmissions
86. The four basic elements in a PLL are loop filter, 2. Reduce the badwidth requirement
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loop amplifier, VCO and
3. Allow the use of practicable antennas
(a) Up converter
4. Ensure that intelligence may be transmitted
(b) Down converter over long distances
(c) Phase detector Which of the above statements are correct?
(d) Frequency multiplier
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(a) 1, 2 and 3 only

Sol. (c) (b) 1, 3 and 4 only
Basic elements in a phase locked loop are : (c) 2 and 4 only
1. Loop filter
(d) 1, 2, 3 and 4
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2. Loop Amplifier
Sol. (b)
3. Voltage controlled oscillator (VCO)
4. Phase Detector The advantages of modulation are :
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87. In a frequency modulated (FM) system, when 1. Multiplexing / transmission of several

the audio frequency is 500 Hz and audio
frequency voltage is 2.4 V, the frequency
deviation  is 4.8 kHz. If the audio frequency
voltage is now increased to 7.2 V then what is
the new. value of deviation?
(a) 0.6 kHz (b) 3.6 kHz
(c) 12.4 kHz (d) 14.4 kHz
Sol. (d)
f m = 500 Hz, Am = 2.4V,  = 4.8 KHz
 Frequency Deviation   K f .A m
message signal on a given channel. Helpful
in different transmissions.
2. Bandwidth requirement is increased. If a
message signal with a bandwidth of ‘f’ is
amplitude modulated, the bandwidth of the
modulated signal is ‘2f’.
3. It helps in reducing antenna height thereby
allow the use of practical antennas.
4. It helps in transmitting message signal over
long distances. Hence, statement 1, 3 & 4
are correct.

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89. Carson’s rule is (with symbols having their
2. B.W. required in FM is 2    1 fm . Maximum
standard meaning)
B.W. required in AM is = 2f m.
(a) B = 2 DW Hence, more bandwidth is required in case
(b) B = 2 (D + 1)W of FM.
(c) B = 3. In FM, the total power of carrier before
2 (D + 1)W
modulation is same as the total power of
(d) B = 2 DW frequency modulated signal. The power in

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the sideband frequencies appears at the
Sol. (b)
expense of power originally in the carrier.
Carson’s Rul e states t he Bandiwdth Hence, transmitted power is better utilized.

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requirement in wide Band FM is given by 4. Power transmitted in AM is given by :
B = 2(D + 1) W  m2 
PT  PC  1   . As modulation index ‘m’
Where :  2 
B = Bandwidth increases power in AM increases. In FM,
power transmitted is always equal to the
D = Deviation ratio / modulation index
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total power of carrier before modulation.
W = Maximum Modulating Frequency Hence, FM requires lesspower than AM.
Statement 1, 3 and 4 are correct.
90. Consider the following features of FM vis-a-vis
AM : 91. The ideal characteristic of a stabilizer is

1. Better noise immunity is provided (a) Constant output voltage with low internal
resistance
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2. Lower badwidth is required

(b) Constant output current with low internal
3. the transmitted power is better utilized resistance
4. Less modulating power is required (c) Constant output voltage with high internal
Which of the above are advantages of FM over resistance
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AM? (d) Constant internal resistance with variable

(a) 1, 2 and 3 only output voltage
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(b) 1, 3 and 4 only Sol. (a)

(c) 2 and 4 only Voltage stabilizer e.g. a zener diode or other
device which suppresses variation of input
(d) 1, 2, 3 and 4
d.c. voltage is always connected in parallel
Sol. (b) with load to give a constant output voltage.
1. In FM, message is stored in the form of
variation in frequency whereas in AM, it is
stored in the form of amplitude variation.
Vi Load
Noise affects amplitude of a signal the most.
Hence, FM provides better noise immunity. Rz

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 Ideally the internal resistance (RZ) must be zero
for a better output voltage. Hence, internal
resistance must be low.
92. For a d.c. shunt generator to self excite, the
conditions to be satisfied are that there must
Sol. (c)
Pul se code Modul ated signal (PCM
Modulation) is generated by carrying out three
basic operations : sampling, quantizing and
encoding.

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be some residual magnetism in the field Comparator is not used in PCM Modulation.
magnet, it must be in the proper direction and
the shunt field resistant must be 95. The reverse recovery time of a diode is 3 s and

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(a) Above the critical field resistance  di 
rate of fall   is 30 A/ s .
(b) Equal to the critical field resistance  dt 

(c) Less than the armature resistance The store charge of the diode is
(d) Less than the critical field resistance (a) 45  C (b) 135  C
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Sol. (d) (c) 270  C (d) 540  C
Voltage will built up when shunt field resistance
Sol. (b)
is less than critical field resistance.
1 2 di
93. In an IGBT cell the collector and emittter are Stored charge of diode Q R = t rr
respectively 2 dt
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(a) n and p 1 30 A
QR = × (3s)2 ×
(b) n+ and p+ 2 s

(c) p and n = 135 c

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(d) p+ and n+
96. NAND and NOR gates are called ‘Universal’
Sol. (d) gates primarily because
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In IGBT collector is P + and emitter is n+. (a) They are available everywhere
94. The main units in a pulse code modulator are: (b) They are widely used in I.C. packages
1. Sampler (c) They can be combined to produce AND,
OR and NOR gate
2. Quantiser
(d) They can be manufactured easily
3. Encoder
Sol. (c)
4. Comparator
Universal gates are those gates which can
(a) 1 and 2 only
perform the function of AND, OR and NOT
(b) 2 and 3 only gate. NAND and NOR gate can do this, hence
they are called universal gates.
(c) 1, 2 and 3 only
(d) 2 and 4 only 97. If a medium transmission line is represented
by nominal T, the value of B of ABCD constant

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 is Sol. (b)
Time-ratio control (TRC):- In TRC method
 1 
(a) Z (b) Y  1  YZ  the on period of the switch (T on) is varied
 4  keeping the time period (T) constant.

 1   1  frequency = 2 kHz
(c) Z  1  YZ  (d)  1  YZ 
 4   2  1
1
T = = = 0.5 ms
2KHz

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Sol. (c) f
For nominal T Vo = 170 V, Vin = 230 v

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 Yz  Vo Ton
B = z 1 
 4  Vin = T = Duty ratio.

Yz 170 Ton
A = D = 1 =
2 230 0.5ms
C = Y.
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Ton = 0.369 ms
98. To turn-off a GTO what is required at the gate? T off = 0.131 ms
(a) A high amplitude (but low energy) negative 100. A switched-capacitor network is/are
current
1. Time variant sample data network
(b) A low amplitde negative current
2. Non linear network
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(c) A high amplitude negative voltage

3. Linear time invariant network
(d) A low amplitude negative voltage
(a) 1 only (b) 2 only
Sol. (a)
(c) 3 only (d) 1 and 2
For turn-off operation of a GTO, a high-
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negative current pulse is supplied to the gate Sol. (d)

using a driver circuit connected between the A switched capacitor is an electronic circuit
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gate and cathode. el ement used f or di scret e t ime signal

99. A chopper circuit is operating on TRC control
mode at a frequency of 2 kHz on a 230 V dc
supply. For output voltage of 170 V, the
conduction and blocking periods of a thyristor
in each cycle are respectively
processing. It works by moving charges into
and out of capacitors when switches are
opened and closed. Hence, they are time
variant sampled data network. Also, they are
non-linear.

(a) 0.386 ms and 0.114 ms Statements 1 & 2 are correct.

(b) 0.369 ms and 0.131 ms
(c) 0.390 ms and 0.110 ms
(d) 0.131 ms and 0.369 ms
101. A transformer may have negative voltage
regulation if the load power factor (p.f.) is
(a) Leading for some values of p.f.

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 (b) Unity p.f. (a) 1 (b) 2

(c) Lagging but not zero p.f. (c) 3 (d) 4

Sol. (c)
(d) Only zero p.f. lag
In a 3 - phase inverter with 180° conduction
Sol. (a)

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mode at any time 3 switches will be ON and
Voltage regulation negative implies voltage in 120° conduction mode, 2 switches will be
output is more than input. It can occur when ON.
capacitive load is connected to transformer

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105. In the sinusoidal pulse–width modulation
which has leading power factor.
scheme, if the zero of the triangular wave
Mathematically also coincides with the zero of the reference
V.R. = r cos  + x sin  0 sinusoidal, then the number of pulses per half
cycle is
r
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 tan     fc fc
x (a) (b) 1
2f 2f
Negative values indicates a leading power
factor. 2fc fc
(c) (d) 1
102. Current source inverters are suitable for f 2f
supplying power to
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Where f c is the frequency of the carrier wave

(a) R-L loads (b) Inductive loads and f is the frequency of the sinusoid.
(c) All loads (d) Capacitive loads
Sol. (d)
Sol. (c)
when zero of the triangle wave coincides with
A current source inverter is suitable for
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zero of the reference sinusoidal, then there

supplying power to all loads.
f
c 
103. The main application of multilevel inverter is in will be  2f  1 pulses per half cycle and
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 
(a) Reactive power compensation
when triangular carrier wave has its peak
(b) D.C. motor drive coi nci dent wit h zero of t he ref erence
(c) Synchronous Buck-converter fc
sinusoid, there will be pulses per half
(d) Voltage regulator 2f
cycle.
Sol. (a)
Directions:
Multilevel converter connected parallelly will
hav e rea ct i v e power com p ensat i on Each of the next Fifteen (15) items consists of
application. two statements, one labelled as the ‘Statement
(I)’ and the other as ‘Statement (II)’. Examine
104. In a 3–phase inverter with 180º conduction
these two statements carefully and select the
mode the number of switches that is on at any
answers to these items using the codes given
instant of time is
below:

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 Codes:
(a) Both Statement (I) and Statement (II) are
individually true and Statement (II) is the
correct explanation of Statement (I)
(b) Both Statement (I) and Statement (II) are
individually true but Statement (II) is not the
correct explanation of Statement (I)
(c) Statement (I) is true but Statement (II) is
false
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(d) Statement (I) is false but Statement (II) is
true
106. Statement (I) : The armature structures of all
rotating machines are
laminated in order to reduce
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the eddy-current losses.
Statement (II): The armature windings of both
the D.C. and A.C. machines
have to deal with alternating
currents only.
Sol. (a)
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 Lamination reduces the eddy current
losses
 In DC machine also alternating current flow
in armature which by mechanical rectifier
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(commutator) is converted into direct
current with ripples.
107. Statement (I) : The electro-mechanical energy
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conv ersi on princi ples are
dev eloped wit h the ‘f i eld
energy’, being magnetic or
electric, as the basis.
Statement (II): This approach can deal with
only the steady-state analysis
of the electro-mechani cal
energy conversion, but not the
transient-state analysis.
Sol. (c)
Electro-mechanical energy principles are used
for both steady state as well as transient state
of all electromechanical converters.
108. Statement (I) : A Direct-On-Line (DOL) starter
for starting dc motor is used
for reasons of economy
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Statement (II) : DOL starter limits the starting
current to a safe limit.
Sol. (c)
DOL starting causes armature current to be
several times of rated values.
It is generally adopted due to
1. Economic reason
2. Motor starts quickly, Joule input per start
much lesses vis-a-vis resistance start.
109. Statement (I) : For constant applied voltage to
its terminals, the effect of
armature resistance in the
operation of a dc shunt motor,
is to reduce the operating
speed, and cause a ‘drooping’
speed Vs. load characteristic.
Statement (II) : The eff ect or armat ure
dem agnetizat ion with the
decreasing load is to reduce
the drop in operating speed,
and can be designed to give a
‘ri sing’ speed Vs. l oad
characteristic which may result
in a possible ‘runaway’.
Sol. (c)
For a d.c. shunt motor, speed Vs load
characteristics is given as
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 m synchronous machine would
operate as a capacitor.
m0
Sol. (a)
Power factor can be improved by supply
reactiv e power to load. An over-excited

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synchronous machine acts as capacitor which
provides reactive power.
Ia
112. Statement (I) : Stability of a power system can

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Vt  Iara Vt Ir be improved by using parallel
m = = – aa transmission lines.
Ka  Ka  K a
Statement (II): Two transmission li nes in
I r parallel will increase the
 m = m0 – a a
Ka  impedance between sending
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end and recei v ing end
So, effect of ra (Armature resistance) is to
compred to single line.
reduce the overall speed or produce droop.
However with reduction in Ia (load current), Sol. (c)
the factor Iara will reduce which will produce Parallel transmission line are used to enhance
lesser droop. For Ia = 0, m = m0 . So at no stability as it reduces the series reactance and
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increase stability margin

value of Ia, m  m0 . It implies that speed
will not be more than no load speed at any V1 V2
P= sin 
time. x
Statement (II) is false As x (Reactance) is decreases power increases
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Statement (I) is correct and so is the stability margin.

110. Statement (I) : Synchronous motor i s a 113. Statement (I) : When all inputs of a NAND
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constant speed motor. gate are shorted to get a single

Statement (II) : Synchronous motor is not a
self-startint motor.
Sol. (b)
Synchronous motor is not self starting as
average torque over a complete cycle is zero.
111. Statement (I) : A synchronous motor can be
used as an active device to
improve the power factor of a
power system.
input, single output gate, it
becomes an inverter.
Statement (II): When all inputs of a NAND
gate are at logic ‘0’ level, the
output is at logic ‘0’ level.
Sol. (c)
Let us take two input NAND gate
Y = A B

Statement (II) : By ov er-excitation the

if B = A

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 Y = AA microprocessor. After receiving the HOLD
request, the microprocessor sends out HLDA
signal to the device.
Y= A  NOT operation
Hence, statement (I) is wrong but statement
Hence statement ‘I’ is correct and as result (II) is correct.
statement ‘II’ is false.
116. Statement (I) : The direct memory access or

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114. Statement (I) : XOR gate is not a universal DMA mode of data transfer is
gate the f astest among all the
modes of data transfer.
Statement (II): It is not possible to realize all

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Boolean functions using XOR Statement (II) : In DMA mode the dev ice
gates only. directly transfers data to/form
memory without interference
Sol. (a)
from CPU.
Statement I is correct and statement II is correct
Sol. (a)
explanation of I
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The direct memory access (DMA) mode of data
115. Statement (I) : READY is an output signal
transfer is the fastest among all the modes of
used to synchronize slower
data transfer. Because in this mode of data
peripheral.
transfer, data to/from I/o device or memory is
Statement (II): HOLD is acti v ated by an directly occurs between them only without
external signal inference of CPU.
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Sol. (d)
Hence, statement (I) and statement (II) both
Ready is an input signal sent by an input or are correct and statement (II) is correct reason
output device to the microprocessor. This signal for statement (I)
indicates that the input or output device is
117. Statement (I) : Modulation index of AM is
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ready to send or receive data. A slow input or

always kept less than 1.
out put dev ice is connected to the
microprocessor through READY line. The Statement (II) : Modulation index for FM may
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microprocessor examines READY signal be greater than 1.

before it performs data transfer operation.
Sol. (b)
When READY = 1, it indicates that Input or
Output device is ready to send or receive data,
when READY = 0, the microprocessor waits
till READY becomes high.
Hold is an input signal used when another
device of the computer system requires address
and data buses for data transfer. For this,
dev ice send HOLD signal to t he
Modulation index in AM is always kept less
than 1 to avoid distortion or clipping of
message signal. When m > 1, the carrier has
180° phase reversal and the envelope of
modulated signal does not contain actual
message signal.
In FM, modulation index for wide Band FM is
greater than 1 and for Narrow Band FM, it is

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 less than 1. Both statements are individually
correct but statement II is not the correct
explanation for statement I.
118. Statement (I) : The main f unct ion of a
freewheeling diode in Rectifier
circuits is t o prev ent the
reversal of load voltage.
Statement (II) : The f reewheeling diode is
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never connected across the
load.
Sol. (c)
Statement (II) is wrong. A freewheeling diode
is connected across the load. The main
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function of a freewheeling diode are
(1) It prevents the output voltage from becoming
negative
(2) The load current is transferred from the main
thyristors to freewheeling diode, thereby
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allowing all of its thyristers to regain their
blocking states.
119. Statement (I) : In sinusoidal pul se wi dth
modulation, width of each pulse
is v ari ed in proportion to
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amplitude of a sine-wav e
evaluated at the centre of the
same pulse.
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Statement (II): The rms value of output voltage
can be varied by varying the
modulation index.
Sol. (b)
Both statements are true, but statement (II)
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is not the explanation for statement (I). The
width of output pulse in sinusoidal pulse width
modulation is proportional to the magnitude
of sine wave. The output voltage is varied
by varying modulation index (MI) which is
the ratio of V r /Vc .
120. Statement (I) : Equal-area criterion can be
used to determine the stability
of single machine infinite bus
system.
Statement (II): An infinite bus system has
infinite inertia and constant
voltage.
Sol. (a)
Equal area criteria is used to find out stability
of single machine or two machine system also.
There is no need to solve non-linear differential
swing equation to determine stability.
The property of infinite bus are the very basis
of determining stability using equal area criteria.
So, statement (II) explains statement (I)
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