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DLC QB r2013
DLC QB r2013
PART-A
UNIT -I
1. Convert 757.25
10
and 2356
10
to octal
.
2
.
Convert 757.25
10
and 2356
10
to binary.
4. Convert (FACE)
16
to base 8 number.5. Find the decimal equivalent of (123)
9
.
6. Convert the following numbers with the indicated bases to decimal: (4310)
5
and(198)
12
.
7. Convert the Hexadecimal number 68BE to binary and octal.
8. Determine the base of the number for the following operations to be correct 14/2 = 5
9. Perform the hexadecimal addition of i) 1A6 and 4D3 and ii) 1A8 and 67B.
16. Convert 53
10
to excess – 3 code and show that excess-3 code is self complementing or reflecting code.
17. What are the characters that can be encoded using the most common 7 – bitalphanumeric code.
18. How is letter A coded in ASCII code? What bit must be complemented to change anASCII letter from lower
to upper case and vice versa?
22. What are the input and output characteristics of Logic Gates?
Fan out and fan in, current and voltage parameter, noise margin,
propagation delay or gate delay, power dissipation, figure of merit are the
input and output characteristics of Logic Gates.
24. What is the difference between a totem pole and an open collector output?
The operating speed of totem pole output is high while that of a open
collector is low. An external pull up resistor in not required in a totem pole
output where as and external pull up resistor is required for proper
operation of gates in open collector output.
UNIT -II
6. What is multiplexer?
Multiplexer is a digital switch which allows digital information from
several sources to be routed into a single output line. So a multiplexer has
several data input lines and a single output line.
7. What is a Demultiplexer?
Demultiplexer is a digital switch which takes one input and gives it to
many output devices. The selection of specific output line is controlled by the
value of the selection lines.
8. What are called don’t care conditions?
In some logic circuits certain input conditions should not occur,
therefore the corresponding output never appears. In such cases the output
level is not defined, it can be either high or low. These output levels are
indicated by ‘X’ or‘d’ in the truth tables and are called don’t care conditions
or incompletely specified functions.
UNIT –III
UNIT –IV
10. What are the two techniques used to make a critical race free state
assignment?
The two techniques commonly used for making a critical race free state
assignment are
i) shared row state assignment and
ii) one hot state assignment.
UNIT –V
1. What are the steps involved in the design flow of automated design
environment?
The design flow of an automated design begins with specification of
the design at various levels of abstraction and ends with generating net list
for an Application Specific Integrated Circuit(ASIC), layout for a custom IC
or program for a Programmable Logic Device.
3. What are the VHDL operators used for synthesizing logic circuits?
Logical operators, Relational operators, Arithmetic operators,
concatenate operators, Shift & rotate operators and operator precedence are
some of the VHDL operators used for synthesizing logic circuits.
8. What are the various ways in which a sequential circuit can be described in
VHDL?
Basic memory elements at the gate level, memory elements using
procedural statements, flip flop synthesis, synthesis of shifters & counters,
state machine coding , state machine synthesis are some of the ways in which
a sequential circuit can be described in VHDL.
PART-B
UNIT -I
UNIT -II
UNIT –III
5. Show how a Shift registers with parallel load be used to convert serial input
to parallel output and parallel input to serial output.
10. Design a synchronous Gray code up counter. Derive the expressions for the
inputs of JK flip flops.
UNIT –IV
5. What are the steps for the design of asynchronous sequential circuit?
6. Write short notes on shared row state assignment and one hot state
assignment.
9. What is the significance of state assignment and what are the steps for the
design of asynchronous sequential cicuit?
10. What are the steps for the analysis of asynchronous sequential circuit?
15.Explain how multiplexer can be used to implement logic function directly from a
truth table without the need for simplification
using a 5 X 8 X 4 PLA.
17. Design a combinational circuit using a PROM. The circuit accepts 3-bit binary
number and generates its equivalent Excess-3 code.
18. A combinational circuit is defined by the functions
F1=Σm (1, 3, 5)
F2=Σm (2, 3, 5)
Implement the circuit with a PLA having 3 inputs, 3 product terms and two
outputs.
19. Illustrate how a PLA can be used for combinational logic with reference to the
functions
F1(a,b,c) =Σm (0,1, 3, 5)
F2(a,b,c) =Σm (1, 2,3,4, 5)
Realize the same assuming, that a PLA is available.
UNIT –V
2. Explain the various VHDL operators used for synthesizing logic circuits.