1452 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 41, NO.
6, NOVEMBER/DECEMBER 2005
Generator Protection and CT-Saturation
Problems and Solutions
Bogdan Kasztenny, Senior Member, IEEE, and Dale Finney, Member, IEEE
Abstract—This paper presents a new generator relay design,
stator differential function in particular, coping with extreme cases
of current transformer (CT) saturation: both ac saturation under
large currents and/or residual flux; and dc saturation under low
currents but large and long-lasting dc components. The algorithm
is a subcycle algorithm with fastest times reaching half a cycle
including overall response of the relay hardware. Analysis of the
response of a traditional differential function under CT saturation
is included to provide setting guidelines for legacy relays.
Index Terms—Current transformers (CTs), directional com-
parison, generator protection, saturation, saturation detection,
spurious differential current, stator differential protection.
I. I NTRODUCTION
E XTERNAL-FAULT currents combined with long dc time
constants expose current transformers (CTs) of genera-
tor protection to substantial saturation. Still, in many cases,
generator-protection CTs are not selected and/or matched prop-
erly. This is particularly true in industrial applications, where
small machines, cogenerators, or distributed generators use
underrated CTs. This is often driven by economic, not technical,
considerations and calls for better performance of protective re-
lays. In other cases, the trend towards more compact switchgear
does not allow for CTs with a generous rating.
Cases are reported where significant saturation of main CTs
could occur under relatively small currents (as low as twice
the nominal) in as little as a few power-system cycles. Quite
often, different engineering teams select the neutral-side CTs
and terminal-side CTs: not only are the CT characteristics and
burden impedances not matched, but also, the CTs may come
from two different manufacturers. As a result, distant external
faults, transformer inrush currents, or sudden changes in the
load could result in CT saturation and misoperation of stator
differential protection if set too sensitive.
Traditional means of dealing with CT saturation would fail
under such conditions. The currents are small, thus no signifi-
cant restraint is produced. The relay would typically apply the
lower slope of its characteristic and would misoperate even if
only a small spurious differential current is produced by the
saturated CT.
Paper PID-05-09, presented at the 2005 IEEE Pulp and Paper Industry
Conference, Jacksonville, FL, June 19–23, and approved for publication in
the IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS by the Pulp and
Paper Industry Committee of the IEEE Industry Applications Society. Man-
uscript submitted for review June 15, 2005 and released for publication
August 30, 2005.
The authors are with General Electric, Markham, ON L6E 1B3, Canada
(e-mail: Bogdan.Kasztenny@GE.com; Dale.Finney@GE.com).
Digital Object Identifier 10.1109/TIA.2005.858298
0093-9994/$20.00 © 2005 IEEE
CT-saturation mechanisms often built into the differential
protection of more advanced relays would also fail because they
are typically designed to cope with ac saturation under large
through-currents.
This paper presents research and implementation of en-
hanced stator differential protection driven by industrial appli-
cations where the CTs were selected first, and the relays were
selected later, with the primary criterion to handle the grossly
underrated or mismatched CTs.
First, a novel CT-saturation-detection algorithm is imple-
mented. The detection algorithm incorporates two distinctive
parts. One is aimed at identifying ac saturation under large
currents, while the other is aimed at detecting dc saturation
under small currents such as transformer inrush or a sudden
change of load.
Second, a phase-comparison principle is incorporated to
make the protection secure. The phase-comparison algorithm
applies adaptive thresholds in order to ensure good sensitivity.
Third, the three major elements: differential, saturation de-
tection, and directional units are combined using adaptive logic
in order to provide for fast, sensitive, and secure protection.
Sample results of testing of a commercially available relay
incorporating the new algorithm are included.
II. D IFFERENTIAL C HARACTERISTIC
The input currents are sampled at 64 samples per cycle and
prefiltered using an optimized MIMIC filter aimed at removing
the dc component(s) and other low-frequency oscillations. The
optimized filter is a finite-impulse response (FIR) filter with
the window length of approximately one-third of the power-
system cycle.
The digitally prefiltered currents are converted into phasors
by applying the full-cycle Fourier filter. The full-cycle window
combined with the optimized MIMIC filter allows for excellent
filtering (Fig. 1). At the same time, owing to the differential
operating principle and unique definition of the restraining
signal, the differential algorithm responds to internal faults in
less than half a cycle, which meets our design criteria.
The operating current is produced as per the principle of dif-
ferential protection (the entire algorithm is phase segregated—
the phase index is omitted in this paper):
ID = |IT − IN | (1)
where subscripts D, T, and N stand for differential, terminal-
side and neutral-side currents, respectively, and | | stands for
phasor magnitude.
KASZTENNY AND FINNEY: GENERATOR PROTECTION AND CT-SATURATION PROBLEMS AND SOLUTIONS
Fig. 1. Frequency response of the applied phasor-estimation algorithm (upper
envelope only).
Fig. 2. (a) Response to switch-off transients; (b) parameters of the differential
characteristic.
The restraining current is produced as the greater of the two
currents:
IR1 = max (|IT |, |IN |) . (2)
The “maximum of” definition of the restraining current
brings in two advantages. First, during heavy internal faults,
the ratio between the differential and restraining currents is
much higher than 100%, resulting in fast and reliable operation.
Second, during an external fault with saturation of one set of
CTs, the restraining current is not reduced by the saturation as
long as one of the CTs (neutral or terminal) is not saturated.
Differential relays must cope with switch-off transients.
An external fault may saturate one or more CTs and bring
the differential-restraining point close to the operating line
of the characteristic. When the external fault is subsequently
cleared, both the differential and restraining currents start de-
creasing. The resulting switch-off trajectory may temporarily
enter the characteristic and cause misoperation [Fig. 2(a)].
A crude way of preventing this from happening is to delay
intentionally—after detecting a fault but not operating for
it—the operation of the differential function.
As delaying—even conditionally—the operation of protec-
tion is not desired, the algorithm presented in this paper instead
applies additional postfiltering to the raw restraining current in
order to cope with switch-off transients. The effective restrain-
ing current is a maximum instantaneous value in the last power-
system cycle:


IR(k) = max IR1(k−p) , p = 0 . . . 1 cycle. (3)
1453
When clearing an external fault that has just heavily satu-
rated the CTs and thus has produced a spurious differential
current, it will take approximately one full cycle for such
spurious differential current to disappear. During that time, the
restraining current (3)—owing to its one-cycle memory—does
not decrease at all. This results in a well-behaved switch-off
trajectory [Fig. 2(a)].
The presented algorithm uses a dual-slope dual-breakpoint
operating characteristic when comparing the operating signal
(1) with the effective restraining signal (3). Both the slope
lines intersect the origin, and thus are true lines of a constant-
percentage restraint. The transition region between the two
breakpoints and slopes is approximated by a third-order func-
tion [Fig. 2(b)].
The implemented characteristic allows the shaping of the
operate/restrain regions in a flexible way. The following setting
rules apply:
BL lower breakpoint marks the ac-saturation-free region; it
is assumed that below this value, CT saturation will not
occur due to the ac component even with 80% residual
flux (Section VII references a tool for making this deter-
mination);
BH higher breakpoint marks the ac-saturation region; it is
assumed that above this value, CT saturation will occur
due to the ac component alone even with 0% resid-
ual flux (Section VII references a tool for making this
determination);
SL lower slope controls sensitivity of protection under low
currents; it should be set above the maximum spurious
differential current with no CT saturation;
SH higher slope recommended to be set at about 60%; this
value is of secondary importance, as stability of the
algorithm does not depend on the differential character-
istic alone.
III. CT-S ATURATION D ETECTION
CT-saturation detection combines three distinctive parts.
First, fast saturation due to large ac-current components is
detected. Second, slower saturation under small ac currents, but
significant and long-lasting dc currents, is detected. Third, extra
security measures applied after detecting CT saturation are kept
in place for an extended period of time by a dedicated memory
circuit. This is required because the applied CT-saturation-
detection techniques are of a transient nature and will not
latch themselves.
A. Memory of the CT-Saturation-Detection Logic
The saturation flag (SAT) is set by a state machine, as in
Fig. 3. A state machine is a computational model consisting
of a number of states (conditions) and functions that control
the transition between states. In this case, the state machine
controls a flag (SAT) that determines when the differential
principle requires additional security.
Normally, the state machine is operating in the “Normal”
state. A saturation condition (SC) described later causes the
transition to the “External Fault” state. The saturation flag is
1454 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 41, NO. 6, NOVEMBER/DECEMBER 2005
Fig. 3. State machine of the saturation-detection logic.
set at this time. Normally, no CT saturation occurs yet. In order
to reset the “External Fault” state, a RESET-1 condition must
be present for 100 ms. The RESET-1 condition requires the
differential current to be below the lower slope or below the
pickup of the characteristic with no SC asserted:
RESET-1 = {(ID < SL · IR ) OR (ID < P )} AND NOT (SC).
(4)
While in the “External Fault” state, the state machine may
step further into the “External Fault with CT Saturation” state.
This is programmed to occur if the differential characteristic is
entered while in the “External Fault” state. In order to reset the
“External Fault with CT Saturation” state, a RESET-2 condition
must be present for 200 ms. The RESET-2 condition requires
the differential/restraining point to stay outside the differential
characteristic:
RESET-2 = NOT (DIF).
To be effective, the saturation flag (SAT) must be set before
actual CT saturation. Therefore, the flag is set in both the “Ex-
ternal Fault” and “External Fault with CT Saturation” states.
Consequently, the saturation flag is set during all external
faults even if they do not saturate any CTs. If none or moderate
CT saturation occurs, the saturation flag will reset 100 ms after
clearing the external fault. If severe saturation occurs, the flag
will reset approximately 300 ms after clearing the fault.
On the other hand, the saturation flag is not set on any internal
faults, even if some CTs saturate.
B. AC-Saturation Detection
Both ac- and dc-saturation-detection methods employed by
this algorithm are based on the assumption that a given CT
performs well for a short period of time even if it saturates
heavily later on. If so, the differential current will stay low
during the initial period of saturation-free CT operation while
the restraining current develops quickly due to the fault.
Fig. 4. (a) Illustration of the ac-saturation detector; (b) effective logic of the
dc-saturation algorithm.
Unlike busbar protection, where CTs may saturate very
heavily and very quickly, stator differential protection is not ex-
posed to very fast CT saturation. Saturation-detection methods
intended for busbar applications may use short-window filtering
techniques or even current derivatives to cope with very short
periods of saturation-free CT operation [1]. Stator differential
protection may use a much simpler approach such as
SCac = (ID < SL · IR ) AND (IR > BL ). (6)
Equation (6) declares CT saturation due to ac components if
the restraining current is above the lower breakpoint (bound-
ary of guaranteed saturation-free CT operation), while the
differential current is relatively low (no differential pickup).
Graphically, the ac-saturation detection may be illustrated as
a differential/restraining current trajectory flying through a
particular window, as depicted in Fig. 4(a). Under subsequent
CT saturation, condition (6) would reset, hence the need for
the CT-saturation memory circuit discussed above and shown
in Fig. 3.
C. DC-Saturation Detection
DC saturation occurs due to long-lasting dc components in
the currents, even if both the ac and dc components are rela-
tively low. Relative dc components are used in this algorithm as
predictors of CT saturation.
(5)
First, the dc components are calculated over one-cycle win-
dows for both the neutral-side and terminal-side currents:
N −1 
1   

Idc(n) =  i(n−k)  (7)
N  
k=0
where N = 64 s/c.
Second, the presence of significant dc components in the
terminal-side and neutral-side currents is checked using the ac
components as adaptive thresholds:
DCT = (IdcT > D1 · |IT |) AND (|IT | > P ) (8)
DCN = (IdcN > D1 · |IN |) AND (|IN | > P ) . (9)
Significant dc current is detected if the dc component is
higher than a certain portion of the ac magnitude (D1 ) and
the ac magnitude is greater than the pickup threshold of the
differential characteristic. The latter condition is introduced to
prevent the detection of dc components on very low currents
where small dc offset of the relay A/D converter may impact
the algorithm. D1 is a factory constant adjusted at 0.5.
KASZTENNY AND FINNEY: GENERATOR PROTECTION AND CT-SATURATION PROBLEMS AND SOLUTIONS
Fig. 5. Phase-comparison principle: (a) internal fault; (b) external fault;
(c) implementation; (d) final operating logic of the stator differential protection.
As shown in Fig. 4(b), dc saturation is declared a 1.5 power-
system cycle after large dc components are detected and no
significant differential current is present. The 1.5-cycle delay
is introduced to give the algorithm a chance to operate on
internal faults without additional security measures. Owing
to this delay, low-current internal faults are detected with no
degradation in sensitivity before the dc-saturation algorithm
operates. On the other hand, the 1.5-cycle delay sets a limitation
on the security of the algorithm: If CTs saturate faster than in
the 1.5 cycle under very low currents, the saturation will go
undetected and may result in a false trip.
The final SC used by the state machine of Fig. 3 is produced
as follows
SC = SCac OR SCdc .
IV. D IRECTIONAL P RINCIPLE
When CT saturation is detected, the stator differential func-
tion is not blocked or delayed, but extra security measures are
applied. Effectively, the relay switches to a 2-out-of-2 logic
with the differential and phase-comparison protection princi-
ples working in parallel.
The phase-comparison principle checks the relative direction
of the neutral-side and terminal-side currents [Fig. 5(a) and (b)].
Both the currents must be relatively high in order to check
the direction. If at least one current is low, the angle is not
checked and permission to trip is granted. In order to maintain
high sensitivity and avoid user settings that may be difficult to
calculate, the currents are compared in an adaptive way using
the raw restraining current (2) as a base:
If (|IT | > BL OR (|IT | > D2 ·IR1 AND |IT | > P )) AND . . .
(|IN | > BL OR (|IN | > D2 ·IR1 AND |IN | > P ))
then DIR1 := abs (angle(IT ) − angle(IN )) > 90◦
else DIR1 := true
where D2 is a factory constant of 0.25.
The auxiliary directional flag created by (11) is conditioned
with extra logic for solid performance during switch-off tran-
sients and other conditions [Fig. 5(c)].
1455
Fig. 6. Example of dc saturation (load change).
V. A DAPTIVE L OGIC
The algorithm uses adaptive logic to combine the differ-
ential protection principle (DIF flag), the saturation-detection
logic (SAT flag), and the phase-comparison protection principle
(DIR flag). If no CT saturation is detected, the differential prin-
ciple alone is capable of tripping the generator. If CT saturation
is detected, both the differential and directional principles must
pickup in order to trip. The operate flag (OP) is thus set as
shown in Fig. 5(d).
Numerous simulations and the up-to-date filed experience
show that the adaptive logic of Fig. 5(d) ensures an excellent
(10) balance between speed, sensitivity, and security. Nevertheless,
the three critical flags (DIF, DIR, and SAT) are available in user-
programmable logic for custom applications.
VI. S AMPLE T EST R ESULTS
Two field examples collected in North and South America
as an outcome of misoperation of originally installed relays are
presented. Results of waveform playback to the enhanced relay
[2] are discussed below.
A. Example 1—Load Change
Fig. 6 presents a case of load change. The current is at the
level of 0.3 of CT nominal, increasing to about 0.5 of nominal.
The associated dc component was enough to saturate one of
the CTs [Fig. 6(b)] resulting in enough spurious differential
current to cause misoperation of the installed relay. The new al-
gorithm detects CT saturation (SAT) well before the differential
principle misoperates pickup (PKP). The directional element
(11a) restrains on this through-current condition (DIR), and the stator
(11b) differential protection remains stable (OP).
(11c)
B. Example 2—Transformer Inrush
Fig. 7 presents a case of transformer magnetizing inrush. The
fully offset current is at the level of 2.1 of CT nominal. The
associated dc component was enough to saturate one of the CTs
as soon as in two cycles [Fig. 7(b)] resulting in enough spurious
1456 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 41, NO. 6, NOVEMBER/DECEMBER 2005

Fig. 7. Example of dc saturation (transformer inrush current). Fig. 8. Excel setting tool—differential plot.

differential current to cause misoperation of the installed relay.

The new algorithm is stable for this case.

VII. C ONSIDERATIONS FOR S ETTINGS

The previous section demonstrates the performance gains
realized by the new algorithm. These gains present an oppor-
tunity for the protection engineer to either apply more sensitive
settings or to relax the CT requirements. The obvious question
is to what degree.
An excel-based setting tool is presented in order to address
this question. The tool allows the user to specify the key param-
eters of the system into which the relay will be applied. These
include system reactance-to-resistance (X/R) ratio, fault level,
and offset. The protection CTs are also individually modeled Fig. 9. Excel setting tool—time plot.
in the spreadsheet. The CT parameters include the knee-point
voltage, the slope of the saturation region, and secondary bur-
den. Finally, the user can enter the settings (minimum pickup, VIII. C ONCLUSION
slopes, breakpoints, etc.) for the differential element.
A new algorithm for stator differential protection has been
Once the required parameters and settings are entered, the
presented. The algorithm addresses extreme cases of CT satu-
spreadsheet calculates the response of the CTs according to
ration including both ac saturation under large currents and dc
IEEE standards [2]. Next, the resulting currents are sampled
saturation under small but dc-offset currents.
and filtered in a manner to that carried out by the relay. Phasor
While ensuring good sensitivity and excellent security, the
estimation is then performed. Differential and restraint currents
trip time of the actual relay hardware implementing the pre-
are calculated from the phasors. The DIF, SAT, DIR, and OP
sented algorithm is below one power cycle.
flags are generated as described.
The described algorithm is a standard function on com-
The tool then generates a differential plot for the simu-
mercially available generator [3] and motor [4] numerical relays
lated fault (Fig. 8). This plot shows the differential and re-
with more than one 500 unit-years of combined field experience
straint currents superimposed onto the relay characteristic. The
to date.
differential plot tells the user how far the differential locus
intrudes into the operating region and the peak value of the re-
straint current. This provides information on appropriate slope R EFERENCES
and breakpoint settings. [1] B. Kasztenny and G. Brunello, “Modern cost-efficient digital busbar pro-
Additionally, the setting tool provides a time plot of the fault tection solutions,” in Proc. 28th Annu. Western Protective Relay Conf.,
(Fig. 9). This plot shows the two CT secondary currents and Spokane, WA, Oct. 21–24, 2002.
[2] IEEE Power System Relaying Committee Publication, CT Saturation
the relative timing between the DIF, SAT, and DIR flags and Theory and Calculator. [Online]. Available: http://pes-psrc.org/Reports/
the final output (OP). Using this tool, the protection engineer CT_SAT%2010-01-03.zip
can apply a series of faults ranging from the minimum to the [3] G60 Generator Management Relay, GE Publ. GEK-106411A, Markham,
ON, Canada, 2003. Instruction Manual.
maximum expected fault levels and check the performance of [4] M60 Motor Management Relay, GE Publ. GEK-106414A, Markham, ON,
the differential element for each. Canada, 2003. Instruction Manual.
KASZTENNY AND FINNEY: GENERATOR PROTECTION AND CT-SATURATION PROBLEMS AND SOLUTIONS 1457

Bogdan Kasztenny (M’95–SM’98) received the Dale Finney (M’02–A’02–M’03) received the Bach-
M.Sc. degree and the Ph.D. degree in electrical elor of Engineering degree from Lakehead Univer-
engineering from Wroclaw University of Technol- sity, Markham, ON, Canada, in 1988.
ogy, Poland, in 1989 and 1992, respectively. He is He began his career with Ontario Hydro as a
the Protection and System Engineering Manager for Protection & Control Engineer. Currently, he is em-
the protective relaying business of General Electric, ployed as an Applications Engineer with General
Markham, ON, Canada. Prior to joining GE in 1999, Electric Multilin, Markham, ON, Canada.
he taught protection and control courses at Wroclaw
University of Technology, Texas A&M University,
and Southern Illinois University. Between 2000 and
2004, he was heavily involved in the development
of the Universal Relay series of protective IEDs. He has authored more than
140 papers, is the inventor of several patents. He is an active contributor in the
Power System Relaying Committee.
Dr. Kasztenny was awarded a prestigious Senior Fulbright Fellowship in
1997, and he received GE’s Thomas Edison Award for innovation in 2004.