SRI VASAVI COLLEGE, ERODE

(SELF FINANCE WING)

DEPARTMENT OF ELECTORNICS
WORK FROM HOME EXAMINATION - APRIL 2020
III - B.Sc., (Electronics) - Design with PIC microcontrollers

Time: 3Hrs Marks: 75

SECTION – A (10 X 1 = 10)

ANSWER ALL QUESTIONS:

1. How is memory accessed in RISC architecture?

a) load and store instruction b) opcode instruction c) memory instruction d) bus instruction

2. Which of the following statements are true for von Neumann architecture?
a) shared bus between the program memory and data memory
b) separate bus between the program memory and data memory
c) external bus for program memory and data memory
d) external bus for data memory only

3.PREP benchmark circuit has ----------- address decoder.

a) 64 bit b) 16 bit c) 32 bit d) 8 bit

4.The FLEX LE uses a ----------------- input LVT, a flip-flop, cascade logic and carry logic
a) four b) eight c) single d) two

5.In the Xilinx EPLD family, the --------- is a programmable AND array with constant delay from any input to any
output.
a)”Word” line b) Universal Interconnection Module (UIM)
c) “Bit” line d) Basic Logic Cells (BLC)

6. The size of the MAX 9000 LAB arrays varies between ------ (rows / columns) for the EPM 9320
a) 4/5 b) 7/5 c) 4/7 d) 7/4

7. Each ATM cell has 53 bytes

a) A 45-byte header and a 8-byte payload b) A 8-byte header and a 45-byte payload
c) A 5-byte header and a 48-byte payload d) A 15-byte header and a 38-byte payload

8.For a direct current, the mean time to failure(MTTF) due to electromigration is experimentally found to obey the
following equation
a) MTTF = A-2 J e-E/KT b) MTTF = A J-2 e-E/KT c) MTTF = (AJ) e-E/KT d) MTTF = (AJ)-2 e-E/KT

9. What is I 2 C?

10. EEPROM stands for____________________.

1
 SECTION-B (5 X 5 = 25)
ANSWER ALL QUESTIONS.

11.a) CPU registers . (or)

b) Simple operations

12.a) Timer2 use. (or)

b) TIMER 2 SLEEP MODE.

13.a) TIMER BASICS. (or)

b) PORT B CHANGE INTERRUPTS.

14.a) INPUT / OUTPUT PORT EXPANSION:. (or)

b) Difference between I 2 C and SPI Communication.

15.a) I 2 C COMMUNICATION PROTOCOL.

(or)
b) SERIAL EEPROM.

SECTION-C (5 X 8 = 40)

ANSWER ALL QUESTIONS.

16.a) Program Memory Considerations (or)

b) Features of PIC.

17.a) Interrupt Service Routine. (or)

b) T2CON REGISTER.

18.a) PULSE WIDTH MODULATED OUTPUTS.

(or)
b) TIMER1 REGISTERS & Sleep mode.

19.a) LCD Interfacing. (or)

b) EXPANDING THE NUMBER OF OUTPUTS.

20.a) I 2 C COMMUNICATION DEVICE ADDRESSING. (or)

b) TEMPERATURE SENSOR interfacing.

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