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Antennas Host connector

SIM7600 5v
MAIN_ANT
R12
0R
R13
0R
1 J4
Maj version The version resistor forms a voltage divider with a
40.2K resistor on the host board. The host then can
U1A sim7600 D4 IPX 0 Dev read the version as an analog voltage value.

LXES15AAA1-153
J5
LED_B

2
1 Check out the table.

D6 TVS
A 22 82 MAIN_ANT IPX C6 C9 A
SD_DATA0 MAIN__ANT 2 2 2G
23 79 GNSS_ANT DNP DNP
SD_DATA1 GNSS_ANT 3
24 59 AUX_ANT R10 DNP DNP
SD_DATA2 AUX_ANT GND 4 4G
25 470R
SD_DATA3 Test point 5
21
SD_CMD

3
Place close to the chip 6

NMOS
GND GND GND GND WiFi
26

WST3400S
SD_CLK 51 7
48 NETLIGHT
SD_DET 54 TestPoint 1 8
FLIGHTMODE R11
TP2 R14 R15

2
49 9
SIM_IO 17 STATUS 40.2k
USIM_DATA 52 0R 0R

Q1
SIM_RST 18 GPIO41 AUX_ANT 1 J6
USIM_RST 50
SIM_CLK 19 GPIO43 IPX

LXES15AAA1-153
USIM_CLK 33
GPIO3

2
SIM_VCC 20

D7 TVS
USIM_VDD 34 GND C10 C11
53 GPIO6
USIM_DET 87 DNP DNP
GPIO77 VER_1 = 0 R1 R2 VER_2 = 1
DNP DNP J2
VBUS 11 DNP 340k
USB_VBUS Host
D_P 13 45 DNP
USB_DP ISINK 3v3 1 2 VER_1 3v3
D_N 12 47 GND GND GND GND
USB_DN ADC1 3 4 VER_2
16 46 GND
USB_ID ADC2 5v 5 6
83
COEX1 7 8 POWER
UART_RX_1v8 68 84 R16 L1 GND
RXD COEX2 SPI_MISO_3v3 9 10 SPI_CLK_3v3
B 10R 47nH B

GND
UART_TX_1v8 71 86
TXD COEX3 5v SPI_MOSI_3v3 11 12 UART_RX_3v3
67 TP1
CTS UART_TX_3v3 13 14 nCS_WIFI
66 TestPoint
RTS nCS_3G_3v3 15 16 nRST
70 85
DCD BOOT_CFG0
72 42

DNP
C13

C12
DTR NC

DNP
69 33pF C0G
RI
1 1v8 GNSS_ANT 1 J8
J7
Conn_01x04
2 55
SCL
PWRKEY
3
GND
0402CG330J500NT
IPX

Level shifters

2
3 56
SDA 4 L2 L3
DNP 4 RESET
TVS

TVS

DNP DNP

2
30 3v3 level

1.8v <-> 3.3v

Mounting

SDIO_DATA0 Q3 DNP DNP

MP

27 nRST
GND SDIO_DATA1 PMOS
D8

D9

28 6 SPI_CLK_1v8 1
AO3401

ESD5Z3V3
SDIO_DATA2 SPI_CLK

TVS
ESD5Z3V3
ESD5Z3V3

3
GND 31 7 SPI_MISO_1v8 GND GND GND
SDIO_DATA3 SPI_MISO 1v8 3v3
29 8 SPI_MOSI_1v8
SDIO_CMD SPI_MOSI
32 9 SPI_CS_1v8

D5
SDIO_CLK SPI_CS R3 R4

USB

1
GND 4.7k 4.7k
73
PCM_OUT UART_RX_1v8 UART_RX_3v3
74 35 GND GND 2 3
PCM_IN HSIC_STROBE
75 36
C
76
PCM_SYNC
PCM_CLK
HSIC_DATA
(Optional, for FW update) Q4 NMOS
WST3400S
Vth < 1.8v C
D10
SS14 VBUS 1v8 3v3
SS14F

VBUS
J3 5v U2

5
R5 R6
USBLC6-2SC6

1
USB_OTG 4.7k 4.7k
USBLC6-2SC6
1 VBUS UART_TX_1v8 UART_TX_3v3
VBUS D_N IO1 IO2 D_P 2 3
6 4
3 D_P Q2 NMOS Vth < 1.8v
D+ IO1 IO2
2 D_N WST3400S
1 3

Shield
D-

GND
H1 H2 4
ID 1v8 3v3
MountingHole_Pad MountingHole_Pad

GND
6
5

2
R17 R18

1
4.7k 4.7k
SPI_MISO_1v8 SPI_MISO_3v3
GND GND 2 3
Q5 NMOS Vth < 1.8v
WST3400S

D 1v8 3v3 D

R20 R21

1
USIM Card SPI_MOSI_1v8
4.7k

2 3
4.7k
SPI_MOSI_3v3

Power supply
330uF 6.3v C14

330uF 6.3v C15

1uF 16v X5R C16

0.1uF 50v X5R C17

Q6 NMOS Vth < 1.8v

C1 WST3400S
0.1uF 50v X5R
1v8 3v3
22uF 16v X5R C19

GND SIM_VCC 1
VCC R24 R25
suggests 10uF

1
6 8
0.1uF 50v X5R

VPP GND 4.7k 4.7k

SIM_RST R7 22R 2 9
22uF 16v X5R C22

Datasheet

RST GND SPI_CLK_1v8 SPI_CLK_3v3

SIM_IO R8 22R 7 10
U1B I/O GND 2 3
sim7600 SIM_CLK R9 22R 3 11
0.1uF 50v X5R

Datasheet CLK GND Q7 NMOS Vth < 1.8v

5
100pF C0G

suggests 4.7uF V_BATT GND WST3400S

C18

38 1
VBAT GND GND
5v 39 2 P1 GND
VBAT GND
U3 5 SK-C793
C20

L4 GND 1v8 3v3

M3406-ADJ
4

C21

62 10

ESD5Z3V3
ESD5Z3V3
ESD5Z3V3
E 3.3uH 1A VBAT GND E
VIN

3 63 14
SW VBAT GND R26 R27
GND GND

1
POWER 1 37

TVS

TVS

TVS
RUN GND 4.7k 4.7k
33pF C0G

33pF C0G

33pF C0G
FB R19
GND

5 44 40
GND GND R22 VOUT VDD_AUX GND SPI_CS_1v8 nCS_3G_3v3
40.2k 1v8 15 41

D1

D2

D3
40.2k VDD_1V8 GND 2 3
2

43
GND Q8 NMOS Vth < 1.8v
R23 57
GND WST3400S
0.1uF 50v X5R

C2

C4

C3
GND 6.98k GND GND 58
1uF 16v X5R

GND GND
330uF 6.3v

C23 330uF 6.3v

77 60
GND GND GND
78 61
GND GND
GND 80 64
GND GND
Vout = 0.6 * (R1 + R2) / R2 81 65
GND GND
C5

C7

C8

Vout = 0.6 * (40.2 + 6.98) / 6.98

Alexey Zaytsev / Okra Solar
Vout = 4.06
Sheet: /
GND
GND File: cicada-4g.sch
Title: Ciacada 4G
Size: A3 Date: 2019-04-02 Rev: 0.1
KiCad E.D.A. kicad (5.1.0-10-g6006703) Id: 1/1
F F
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