Rajiv Gandhi University of Knowledge Technologies

IIIT SRIKAKULAM

(Department of Electronics and Communication Engineering)

WEEKEND EXAM-2 (A.Y. 2019 – 20)
Year/Sem: E2SEM1 Date: 3rd Aug 2019
Subject: Linear Integrated Circuits Time:
Subject Code:EC 1204 Max. Marks : 10 Marks

SECTION – A

Answer the following question. Each question carries one mark. (10 X 1 = 10 M)

1. Findout the closed loop gainAv when open loop gain is Aod= 999

a. -0.999
b. 0.999
c. 1.001
d. -1.001
2. Findout the voltage gain Av = is______

a. 10
b. -11
c. -10
d. 11
3. For the circuit of figure with an ideal operational amplifier, the maximum phase shift of the
output Vout with reference to the input Vin is

a. O0
b. -900
c. +900
d. 0

4. For the circuit shown below, the value of the output voltage V0 is

a. V0=10Vi1+5V2
b. V0=5Vi1+10V2
c. V0=Vi1+V2
d. V0=15(Vi1-V2 )
5. For the circuit shown below the value of Av=V0/Vi is

a. -10
b. 10
c. -4
d. 4
6. An Op-Amp can be classified as
a. Linear Amplifier
 b. Low rin Amplifier
c. Positive amplifier feedback
d. RC- Coupled amplifier
7. When in a negative scalar, both R1 and Rf are reduced to zero, then the function work as
a. Integrator
b. Subtractor
c. Comparator
d. Unity follower
8. An Op-Amp can amplify
a. DC signals only
b. AC signals only
c. Both AC as well as DC signals
d. Neither DC nor AC signals
9. In the internal circuit of an Op- Amp, collectors are replaced by active loads to
a. Increase differential gain
b. Decrease the common mode gain
c. Increase bandwidth
d. Increase efficiency