Service Manual LG 65ef9500

Internal Use Only
North/Latin America http://aic.lgservice.com

Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com
OLED TV
SERVICE MANUAL
CHASSIS : EA59E
MODEL : 65EF9500 65EF9500-UA

CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL69264602 (1507-REV00) Printed in Korea

CONTENTS
CONTENTS ............................................................................................... 2
SAFETY PRECAUTIONS ......................................................................... 3
SERVICING PRECAUTIONS..................................................................... 4
SPECIFICATION........................................................................................ 6
ADJUSTMENT INSTRUCTION............................................................... 13
BLOCK DIAGRAM .................................................................................. 24
EXPLODED VIEW ................................................................................... 34
SCHEMATIC CIRCUIT DIAGRAM .............................................APPENDIX
TROUBLESHOOTING............................................................... APPENDIN
Copyright © LG Electronics. Inc. All rights reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC Do not use a line Isolation Transformer during this check.
power line. Use a transformer of adequate power rating as this Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
protects the technician from accidents resulting in personal injury between a known good earth ground (Water Pipe, Conduit, etc.)
from electrical shocks. and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
It will also protect the receiver and it's components from being with 1000 ohms/volt or more sensitivity.
damaged by accidental shorts of the circuitry that may be Reverse plug the AC cord into the AC outlet and repeat AC voltage
inadvertently introduced during the service operation. measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
If any fuse (or Fusible Resistor) in this TV receiver is blown, 0.5 mA.
replace it with the specified. In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
When replacing a high wattage resistor (Oxide Metal Film Resistor, repaired before it is returned to the customer.
over 1 W), keep the resistor 10 mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed

metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service 2. After removing an electrical assembly equipped with ES
manual and its supplements and addenda, read and follow the devices, place the assembly on a conductive surface such as
SAFETY PRECAUTIONS on page 3 of this publication. aluminum foil, to prevent electrostatic charge buildup or expo-
NOTE: If unforeseen circumstances create conflict between the sure of the assembly.
following servicing precautions and any of the safety precautions 3. Use only a grounded-tip soldering iron to solder or unsolder ES
on page 3 of this publication, always follow the safety precautions. devices.
Remember: Safety First. 4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as “anti-static” can generate
General Servicing Precautions electrical charges sufficient to damage ES devices.
1. Always unplug the receiver AC power cord from the AC power 5. Do not use freon-propelled chemicals. These can generate
source before; electrical charges sufficient to damage ES devices.
a. Removing or reinstalling any component, circuit board mod- 6. Do not remove a replacement ES device from its protective
ule or any other receiver assembly. package until immediately before you are ready to install it.
b. Disconnecting or reconnecting any receiver electrical plug or (Most replacement ES devices are packaged with leads electri-
other electrical connection. cally shorted together by conductive foam, aluminum foil or
c. Connecting a test substitute in parallel with an electrolytic comparable conductive material).
capacitor in the receiver. 7. Immediately before removing the protective material from the
CAUTION: A wrong part substitution or incorrect polarity leads of a replacement ES device, touch the protective material
installation of electrolytic capacitors may result in an explo- to the chassis or circuit assembly into which the device will be
sion hazard. installed.
2. Test high voltage only by measuring it with an appropriate CAUTION: Be sure no power is applied to the chassis or circuit,
high voltage meter or other voltage measuring device (DVM, and observe all other safety precautions.
FETVOM, etc) equipped with a suitable high voltage probe. 8. Minimize bodily motions when handling unpackaged replace-
Do not test high voltage by "drawing an arc". ment ES devices. (Otherwise harmless motion such as the
3. Do not spray chemicals on or near this receiver or any of its brushing together of your clothes fabric or the lifting of your
assemblies. foot from a carpeted floor can generate static electricity suf-
4. Unless specified otherwise in this service manual, clean ficient to damage an ES device.)
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable General Soldering Guidelines
non-abrasive applicator; 10 % (by volume) Acetone and 90 % 1. Use a grounded-tip, low-wattage soldering iron and appropriate
(by volume) isopropyl alcohol (90 % - 99 % strength) tip size and shape that will maintain tip temperature within the
CAUTION: This is a flammable mixture. range or 500 °F to 600 °F.
Unless specified otherwise in this service manual, lubrication of 2. Use an appropriate gauge of RMA resin-core solder composed
contacts in not required. of 60 parts tin/40 parts lead.
5. Do not defeat any plug/socket B+ voltage interlocks with which 3. Keep the soldering iron tip clean and well tinned.
receivers covered by this service manual might be equipped. 4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
6. Do not apply AC power to this instrument and/or any of its bristle (0.5 inch, or 1.25 cm) brush with a metal handle.
electrical assemblies unless all solid-state device heat sinks are Do not use freon-propelled spray-on cleaners.
correctly installed. 5. Use the following unsoldering technique
7. Always connect the test receiver ground lead to the receiver a. Allow the soldering iron tip to reach normal temperature.
chassis ground before connecting the test receiver positive (500 °F to 600 °F)
lead. b. Heat the component lead until the solder melts.
Always remove the test receiver ground lead last. c. Quickly draw the melted solder with an anti-static, suction-
8. Use with this receiver only the test fixtures specified in this type solder removal device or with solder braid.
service manual. CAUTION: Work quickly to avoid overheating the circuit
CAUTION: Do not connect the test fixture ground strap to any board printed foil.
heat sink in this receiver. 6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
Electrostatically Sensitive (ES) Devices (500 °F to 600 °F)
Some semiconductor (solid-state) devices can be damaged eas- b. First, hold the soldering iron tip and solder the strand against
ily by static electricity. Such components commonly are called the component lead until the solder melts.
Electrostatically Sensitive (ES) Devices. Examples of typical ES c. Quickly move the soldering iron tip to the junction of the
devices are integrated circuits and some field-effect transistors component lead and the printed circuit foil, and hold it there
and semiconductor “chip” components. The following techniques only until the solder flows onto and around both the compo-
should be used to help reduce the incidence of component dam- nent lead and the foil.
age caused by static by static electricity. CAUTION: Work quickly to avoid overheating the circuit
1. Immediately before handling any semiconductor component or board printed foil.
semiconductor-equipped assembly, drain off any electrostatic d. Closely inspect the solder area and remove any excess or
charge on your body by touching a known earth ground. Alter- splashed solder with a small wire-bristle brush.
natively, obtain and wear a commercially available discharging
wrist strap device, which should be removed to prevent poten-
tial shock reasons prior to applying power to the unit under test.
IC Remove/Replacement 3. Solder the connections.
Some chassis circuit boards have slotted holes (oblong) through CAUTION: Maintain original spacing between the replaced
which the IC leads are inserted and then bent flat against the cir- component and adjacent components and the circuit board to
cuit foil. When holes are the slotted type, the following technique prevent excessive component temperatures.
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique Circuit Board Foil Repair
as outlined in paragraphs 5 and 6 above. Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
Removal board causing the foil to separate from or "lift-off" the board. The
1. Desolder and straighten each IC lead in one operation by following guidelines and procedures should be followed whenever
gently prying up on the lead with the soldering iron tip as the this condition is encountered.
solder melts.
2. Draw away the melted solder with an anti-static suction-type At IC Connections
solder removal device (or with solder braid) before removing To repair a defective copper pattern at IC connections use the
the IC. following procedure to install a jumper wire on the copper pattern
Replacement side of the circuit board. (Use this technique only on IC connec-
1. Carefully insert the replacement IC in the circuit board. tions).
2. Carefully bend each IC lead against the circuit foil pad and
solder it. 1. Carefully remove the damaged copper pattern with a sharp
3. Clean the soldered areas with a small wire-bristle brush. knife. (Remove only as much copper as absolutely necessary).
(It is not necessary to reapply acrylic coating to the areas). 2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
"Small-Signal" Discrete Transistor 3. Bend a small "U" in one end of a small gauge jumper wire and
Removal/Replacement carefully crimp it around the IC pin. Solder the IC connection.
1. Remove the defective transistor by clipping its leads as close 4. Route the jumper wire along the path of the out-away copper
as possible to the component body. pattern and let it overlap the previously scraped end of the
2. Bend into a "U" shape the end of each of three leads remaining good copper pattern. Solder the overlapped area and clip off
on the circuit board. any excess jumper wire.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding At Other Connections
leads extending from the circuit board and crimp the "U" with Use the following technique to repair the defective copper pattern
long nose pliers to insure metal to metal contact then solder at connections other than IC Pins. This technique involves the
each connection. installation of a jumper wire on the component side of the circuit
board.
Power Output, Transistor Device
Removal/Replacement 1. Remove the defective copper pattern with a sharp knife.
1. Heat and remove all solder from around the transistor leads. Remove at least 1/4 inch of copper, to ensure that a hazardous
2. Remove the heat sink mounting screw (if so equipped). condition will not exist if the jumper wire opens.
3. Carefully remove the transistor from the heat sink of the circuit 2. Trace along the copper pattern from both sides of the pattern
board. break and locate the nearest component that is directly con-
4. Insert new transistor in the circuit board. nected to the affected copper pattern.
5. Solder each transistor lead, and clip off excess lead. 3. Connect insulated 20-gauge jumper wire from the lead of the
6. Replace heat sink. nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Diode Removal/Replacement Carefully crimp and solder the connections.
1. Remove defective diode by clipping its leads as close as pos- CAUTION: Be sure the insulated jumper wire is dressed so the
sible to diode body. it does not touch components or sharp edges.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor

Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application range
This spec sheet is applied OLED TV with EA59E chassis
2. Test condition
Each part is tested as below without special notice.
(1) Temperature : 25 ºC ± 5 ºC(77 ± 9 ºF) , CST : 40 ºC ± 5 ºC

(2) Relative Humidity: 65 % ± 10 %
(3) Power Voltage
Market Input voltage Frequency Remark
USA 120V 50/60Hz Standard Voltage of each
product is marked by
models
(4) Specification and performance of each parts are followed

each drawing and specification by part number in
accordance with BOM
(5) The receiver must be operated for about 20 minutes prior
to the adjustment
3. Test method
1) Performance: LGE TV test method followed
2) Demanded other specification
Safety : UL, CSA, CE, IEC specification
EMC: FCC, ICES, CE, IEC specification
Wireless : Wireless HD Specification (Option)
4. General Specification
No Item Specification Remark
1 Market USA
2 Receiving System ATSC / NTSC-M / 64 QAM / 256 QAM
3 Program coverage (1) VHF : 02~13
(2) UHF : 14~69
(3) DTV : 02-69
(4) CATV : 01~135
(5) CADTV : 01~135
4 Input Voltage AC 120 ~ 240V 50/60Hz USA (110~240V, 50/60Hz)
5. 2D Mode
5.1. CVBS input
No. Resolution H-freq.(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remarks
1. 720*480i 15.73 59.94 13.50 SDTV, DVD 480I(525I) NTSC-M
2. 720*480i 15.73 60.00 13.51 SDTV, DVD 480I(525I) NTSC-M
5.2. Component input(Y, CB/PB, CR/PR)

No. Resolution H-freq.(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remarks
1. 720*480i 15.73 59.94 13.50 SDTV, DVD 480I(525I)
2 720*480i 15.73 60.00 13.51 SDTV, DVD 480I(525I)
3 720*480p 31.47 59.94 27.00 SDTV 480P
4 720*480p 31.50 60.00 27.03 SDTV 480P
5 1280*720 44.96 59.94 74.18 HDTV 720P
6 1280*720 45.00 60.00 74.25 HDTV 720P
7 1280*720 45.00 50.00 74.25 HDTV 720P 50Hz
8 1920*1080 28.13 50.00 74.25 HDTV 1080I 50Hz,
9 1920*1080 33.72 59.94 74.18 HDTV 1080I
10 1920*1080 33.75 60.00 74.25 HDTV 1080I
11 1920*1080 56.25 50.00 148.50 HDTV 1080P
12 1920*1080 67.50 60.00 148.50 HDTV 1080P
5.3. HDMI Input (DTV)
No Resolution H-freq.(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed
1 640*480 31.46 59.94 25.13 SDTV 480P
2 640*480 31.50 60.00 25.13 SDTV 480P
3 720*480 15.73 59.94 13.50 SDTV, DVD 480I(525I) Spec. out but display
4 720*480 15.75 60.00 13.51 SDTV, DVD 480I(525I)
5 720*576 15.62 50.00 13.50 SDTV, DVD 576I(625I) 50Hz
6 720*480 31.47 59.94 27.00 SDTV 480P
7 720*480 31.50 60.00 27.03 SDTV 480P
8 1280*720 44.96 59.94 74.18 HDTV 720P
9 1280*720 45.00 60.00 74.25 HDTV 720P
10 1920*1080 33.72 59.94 74.18 HDTV 1080I
11 1920*1080 33.75 60.00 74.25 HDTV 1080I
12 1920*1080 26.97 23.97 63.30 HDTV 1080P
13 1920*1080 27.00 24.00 63.36 HDTV 1080P
14 1920*1080 33.71 29.97 79.12 HDTV 1080P
15 1920*1080 33.75 30.00 79.20 HDTV 1080P
16 1920*1080 67.43 59.94 148.35 HDTV 1080P
17 1920*1080 67.50 60.00 148.50 HDTV 1080P
18 3840*2160 53.95 23.98 297.00 UDTV 2160P UHD only
19 3840*2160 54.00 24.00 297.00 UDTV 2160P UHD only
20 3840*2160 56.25 25.00 297.00 UDTV 2160P UHD only
21 3840*2160 61.43 29.97 297.00 UDTV 2160P UHD only
22 3840*2160 67.50 30.00 297.00 UDTV 2160P UHD only
23 3840*2160 135.00 59.94 593.41 UDTV 2160P UHDonly(Port1,2)
-LM15U Only
-LM15U Only
25 4096*2160 53.95 23.98 297.00 UDTV 2160P UHD only
26 4096*2160 54.00 24.00 297.00 UDTV 2160P UHD only
27 4096*2160 56.25 25.00 297.00 UDTV 2160P UHD only
28 4096*2160 61.43 29.97 297.00 UDTV 2160P UHD only
29 4096*2160 67.50 30.00 297.00 UDTV 2160P UHD only
-LM15U Only
-LM15U Only
5.4. HDMI Input (PC)
No Resolution H-freq.(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remarks
1 640*350 31.46 70.09 25.17 EGA
2 720*400 31.46 70.08 28.32 DOS
3 640*480 31.46 59.94 25.17 VESA(VGA)
4 800*600 37.87 60.31 40.00 VESA(SVGA)
5 1024*768 48.36 60.00 65.00 VESA(XGA) FHD only
6 1152*864 54.34 60.05 80.00 VESA
7 1280*1024 63.98 60.02 109.00 VESA(SXGA) FHD only
8 1360*768 47.71 60.01 85.00 VESA(WXGA) UHD only
9 1920*1080 67.50 60.00 158.40 WUXGA(CEA 861D) UHD only
10 3840*2160 67.50 30.00 297.00 UDTV 2160P UHD only
11 3840*2160 56.25 25.00 297.00 UDTV 2160P UHD only
12 3840*2160 54.00 24.00 297.00 UDTV 2160P UHD only
13 4096*2160 53.95 23.97 296.703 UDTV 2160P UHD only
14 4096*2160 54.00 24.00 297.00 UDTV 2160P UHD only
6. 3D Mode(3D supported mode manually)

6.1. RF Input
1 1280*720 37.50 50 74.25 HDTV 720P 2D to 3D, Side by Side, Top & Bottom
2 1920*1080 28.13 50 74.25 HDTV 1080I 2D to 3D, Side by Side, Top & Bottom
6.2. HDMI Input

6.3. HDMI1.4/2.0 (3D supported mode manually)
1 720*480 31.469/31.5/62.938/63 59.94/59.94/60 27.00 /27.03 SDTV 480P 2D to 3D, Side by Side(Half),
2 1280*720 45.00 60.00 74.25 HDTV 720P Top & Bottom, Checker
Board, Row Interleaving,
37.50 50.00 74.25 HDTV 720P Column Interleaving
3 1920*1080 33.75 60.00 74.25 HDTV 1080I 2D to 3D, Side by Side(Half),
28.12 50.00 74.25 HDTV 1080I Top & Bottom
4 1920*1080 27.00 24.00 74.25 HDTV 1080P 2D to 3D, Side by Side(Half),

28.12 25.00 74.25 HDTV 1080P Top & Bottom, Checker
Board, Row Interleaving,
33.75 30.00 74.25 HDTV 1080P Column Interleaving
67.50 60.00 148.50 HDTV 1080P 2D to 3D, Side by Side(Half),
56.25 50.00 148.50 HDTV 1080P Top & Bottom,
Checker Board,Row Inter-
leaving, Column Interleaving
5 3840*2160 53.95 23.98 297.00 HDTV 2160P 2D to 3D,
4096*2160 54.00 24.00 296.70 Top & Bottom(half), Side by
Side(half),
56.25 25.00 297.00
61.43 29.97 297.00
67.50 30.00 296.70
135.00 60.00 594.00
6.4. HDMI 1.4b (3D supported mode automatically)
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) VIC 3D input proposed mode Proposed
1 640*480 31.47 / 31.50 59.94/ 60.00 25.13/25.20 1 Top-and-Bottom Secondary(SDTV 480P)
Side-by-side(half) Secondary(SDTV 480P)
31.47 / 31.50 59.94/ 60.00 50.35/50.40 1 Side-by-side(Full) (SDTV 480P)
62.94 / 63.00 59.94/ 60.00 50.35/50.40 1 Frame packing Secondary(SDTV 480P)
Line alternative (SDTV 480P)
2 720*480 31.47 / 31.50 59.94 / 60.00 27.00/27.03 2,3 Top-and-Bottom Secondary(SDTV 480P)
Side-by-side(half) Secondary(SDTV 480P)
31.47 / 31.50 59.94 / 60.00 54.00/54.06 2,3 Side-by-side(Full) (SDTV 480P)
62.94 /63.00 59.94 / 60.00 54.00/54.06 2,3 Frame packing Secondary(SDTV 480P)
Line alternative (SDTV 480P)
3 1280*720 37.50 50.00 74.25 19 Top-and-Bottom Primary(HDTV 720P)
Side-by-side(half) Primary(HDTV 720P)
37.50 50.00 148.50 19 Side-by-side(Full) (HDTV 720P)
44.96 / 45.00 59.94 / 60.00 74.17/74.25 4 Frame packing Primary(HDTV 720P)
Line alternative Primary(HDTV 720P)
44.96 / 45.00 59.94 / 60.00 148.35/148.50 4 Side-by-side(Full) (HDTV 720P)
75.00 50.00 148.50 19 Frame packing Primary(HDTV 720P)
Line alternative (HDTV 720P)
89.91/90.00 59.94 / 60.00 148.35/148.50 4 Frame packing Primary(HDTV 720P)
4 1920*1080 28.12 50.00 74.25 20 Top-and-Bottom Secondary(HDTV 1080I)
Side-by-side(half) Primary(HDTV 1080I)
28.12 50.00 148.50 20 Side-by-side(Full) (HDTV 1080I)
33.72 / 33.75 59.94 / 60.00 74.17/74.25 5 Top-and-Bottom Secondary(HDTV 1080I)
Side-by-side(half) Primary(HDTV 1080I)
33.72 / 33.75 59.94 / 60.00 148.35/148.50 5 Side-by-side(Full) (HDTV 1080I)
56.25 50.00 148.50 20 Frame packing Primary(HDTV 1080I)
(HDTV 1080I)
67.43/67.50 59.94 / 60.00 148.35/148.50 5 Frame packing Primary(HDTV 1080I)
(HDTV 1080I)
5 1920*1080 26.97 / 27.00 23.97 / 24.00 74.17 / 74.25 32 Top-and-Bottom Primary(HDTV 1080P)
Side-by-side(half) Primary(HDTV 1080P)
26.97 / 27.00 23.97 / 24.00 148.35 / 148.50 32 Side-by-side(Full) (HDTV 1080P)
28.12 25.00 74.25 33 Top-and-Bottom Secondary(HDTV 1080P)
Side-by-side(half) Secondary(HDTV 1080P)
28.12 25.00 148.50 33 Side-by-side(Full) (HDTV 1080P)
33.72 / 33.75 29.98 / 30.00 74.18/74.25 34 Top-and-Bottom Primary(HDTV 1080P)
33.72 / 33.75 29.98 / 30.00 148.35/148.50 34 Side-by-side(Full) (HDTV 1080P)
43.94/54.00 23.97 / 24.00 148.35/148.50 32 Frame packing Primary(HDTV 1080P)
56.25 25.00 148.50 33 Frame packing Secondary(HDTV 1080P)
67.43 / 67.5 29.98 / 30.00 148.35/148.50 34 Frame packing Primary(HDTV 1080P)
56.25 50.00 148.50 31 Top-and-Bottom Primary(HDTV 1080P)
67.43 / 67.50 59.94 / 60.00 148.35/148.50 16 Top-and-Bottom Primary(HDTV 1080P)
Copyright © LG Electronics. Inc. All rights reserved. - 10 - LGE Internal Use Only
6.5. HDMI-PC Input (3D) (3D supported mode manually)
1 1024*768 48.36 60.00 65.00 HDTV 768P 2D to 3D,
Side by Side(half), Top & Bottom
2 1920*1080 67.50 60.00 148.50 HDTV 1080P 2D to 3D,
Side by Side(half), Top & Bottom,
Checker Board,Row Interleaving,
Column Interleaving
3 3840*2160 54.00 24.00 296.70 HDTV 2160P 2D to 3D,
56.25 25.00 297.00 Side by Side(half), Top & Bottom
67.50 30.00 296.70

4 4096*2160 54 24.00 297.00 HDTV 2160P 2D to 3D,
Side by Side(half), Top & Bottom
5 Others 640*350 2D to 3D,
720*400 Side by Side(half), Top & Bottom
640*480
800*600
1152*864
6.6. Component Input ( 3D) (3D supported mode manually)

1 1280*720 37.50 50.00 74.25 HDTV 720P 2D to 3D,
2 1280*720 45.00 60.00 74.25 HDTV 720P Side by Side(half), Top &
Bottom
3 1280*720 44.96 59.94 74.18 HDTV 720P
4 1920*1080 33.75 60.00 74.25 HDTV 1080I
5 1920*1080 33.72 59.94 74.18 HDTV 1080I
6 1920*1080 28.12 50.00 74.25 HDTV 1080I
7 1920*1080 67.50 60.00 148.50 HDTV 1080P
8 1920*1080 67.43 59.94 148.35 HDTV 1080P
9 1920*1080 27.00 24.00 74.25 HDTV 1080P
10 1920*1080 28.12 25.00 74.25 HDTV 1080P
11 1920*1080 56.25 50.00 74.25 HDTV 1080P
12 1920*1080 26.97 23.97 74.18 HDTV 1080P
13 1920*1080 33.75 30.00 74.25 HDTV 1080P
14 1920*1080 33.71 29.97 74.18 HDTV 1080P
6.7. USB – Movie (3D) (3D supported mode manually)
No Resolution H-freq.(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode
1 Under 704x480 - - - 2D to 3D
2 Over 704x480 - - - 2D to 3D, Side by Side(Half), Top & Bottom
Under 1080P
interlaced
3 Over 704x480 - 50 / 60 - 2D to 3D, Side by Side(Half), Top & Bottom,
Under 1080P - others - Checker Board, Row Interleaving, Column
progressive Interleaving
4 Over 2160P - 24/25/30 - 2D to 3D, Side by Side(Half), Top & Bottom
6.8. USB, DLNA -Photo (3D) (3D supported mode manually)

1 Under 320x240 - - - 2D to 3D
2 Over 320x240 - - - 2D to 3D, Side by Side(Half), Top & Bottom
6.9. USB, DLNA (3D) (3D supported mode automatically)

1 1080p 33.75 30.00 74.25 Side by Side(Half), Top & Bottom, Checker Board,
2 2160p 67.50 30.00 297.00 MPO(Photo), JPS(Photo)
6.10. Miracast, Widi (3D supported mode manually)

1 1024X768p - 30 / 60 - 2D to 3D, Side by Side(Half), Top & Bottom
2 1280x720p - 30.00 / 60.00 -
3 1920X1080p 30.00 / 60.00
4 Others 2D to 3D
* Remark: 3D Input mode

No. Side by Side Top & Bottom Checkerboard Frame Packing Line Column Column
Interleaving Interleaving Interleaving
1
ADJUSTMENT INSTRUCTION
1. Application 4. Automatic Adjustment
This spec. sheet applies to EA59E Chassis applied OLED TV 4.1. ADC Calibration
all models manufactured in TV factory (1) Enter the ADC Calibration in ADJ Menu
(2) Check the ‘Internal’ at ADC Type and push Start button.
(3) Check ‘ OK ‘
2. Specification
(1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of
25 ± 5 ºC of temperature and 65±10% of relative humidity if
there is no specific designation
(4) The input voltage of the receiver must keep 100~240V,
50/60Hz
(5) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over
15 ºC
In case of keeping module is in the circumstance of 0°C, it
should be placed in the circumstance of above 15°C for 2
hours
In case of keeping module is in the circumstance of below 4.2. MAC address D/L , CI+ key D/L , Widevine
-20°C, it should be placed in the circumstance of above
15°C for 3 hours. key D/L, ESN D/L, HDCP20 D/L
Connect: USB port
※ Caution Communication Prot connection
When still image is displayed for a period of 20 minutes or ▪ Com 1,2,3,4 and 115200(Baudrate)
longer (especially where W/B scale is strong. Mode check: Online Only
Digital pattern 13ch and/or Cross hatch pattern 09ch), there ▪ check the test process
can some afterimage in the black level area DETECT -> MAC -> ESN -> Widevine -> CI -> HDCP20
▪.Play : Press Enter key
▪. Result: Ready, Test, OK or NG
▪. Printer Out (MAC Address Label)
3. Adjustment items
3.1. Main PCBA Adjustments
▪MAC Address Download
▪ADC adjustment : 480i Comp1, 1920*1080 Comp1
▪EDID/DDC download
- A bove adjustment items can be also performed in Final

Assembly if needed. Adjustment items in both PCBA and
final assembly tages can be checked by using the INSTART
Menu -> 1.ADJUST CHECK
3.2. Final assembly adjustment

▪White Balance adjustment
▪ RS-232C functionality check
▪ PING Test
▪ Factory Option setting per destination
▪ Ship-out mode setting (In-Stop)
▪ GND and HI-POT test
3.3. Etc
▪ Ship-out mode
▪ Service Option Default
▪ USB Download(S/W Update, Option, Service only)
▪ ISP Download(Option)
4.3. LAN Inspection 4.4. LAN PORT INSPECTION(PING TEST)
4.3.1. Equipment & Condition Connect SET -> LAN port == PC -> LAN Port
▪ Each other connection to LAN Port of IP Hub and Jig
SET PC
4.4.1 Equipment setting

(1) Play the LAN Port Test PROGRAM.
(2) Input IP set up for an inspection to Test
Program.
*IP Number : 12.12.2.2
4.3.2. LAN inspection solution 4.4.2. LAN PORT inspection (PING TEST)
▪ LAN Port connection with PCB
(1) Play the LAN Port Test Program.
▪ Network setting at MENU Mode of TV
(2) connect each other LAN Port Jack.
▪ setting automatic IP
(3) Play Test (F9) button and confirm OK Message.
▪ Setting state confirmation
(4) remove LAN CABLE
- If automatic setting is finished, you confirm IP and MAC
Address.
4.5. Model name & Serial number Download

4.3.3. WIDEVINE Key Inspection 4.5.1. Model name & Serial number D/L
▪ WIDEVINE Key Inspection ■ Press “P-ONLY” key of service remocon.(Baud rate : 115200
- Confirm Key input Data at the “IN START” MENU Mode bps)
■ Connect RS-232C Signal to USB Cable to USB.
■ Write Serial number by use USB port.
■ Must check the serial number at Instart menu.
4.5.2. Method & notice

(1) Serial number D/L is using of scan equipment.
(2) S etting of scan equipment operated by Manufacturing
Technology Group.
(3) Serial number D/L must be conformed when it is produced
in production line, because serial number D/L is mandatory
by D-book 4.0
※ Manual Download (Model Name and Serial Number)

If the TV set is downloaded By OTA or Service man,
Sometimes model name or serial number is initialized.( Not
always)
There is impossible to download by bar code scan, so It need
Manual download.
a. Press the ‘instart’ key of ADJ remote controller.
b. Go to the menu ‘7.Model Number D/L’ like below photo.
c. Input the Factory model name or Serial number like photo.

d. C heck the model name Instart menu -> Factory name
displayed
e. Check the Diagnostics (DTV country only) -> Buyer model
displayed
4.6. WIFI MAC ADDRESS CHECK 5.2.4. EDID DATA
■ Using RS232 Command ▪ Reference
Command Set ACK - HDMI1 ~ HDMI3
- In the data of EDID, bellows may be different by Input mode
Transmission [A][l][][Set ID][][20][Cr] [O][K][x] or [N][G]
■ check the menu on in-start
ⓐ Product ID
ⓑ Serial No: Controlled on production line.
5. Manual Adjustment ⓒ Month, Year: Controlled on production line:
5.1.
ADC adjustment is not needed ex) Monthly : ‘01’ -> ‘01’
because of OTP(Auto ADC adjustment) Year : ‘2015’ -> ‘19
ⓓ Model Name(Hex): LGTV
ⓔ Checksum(LG TV): Changeable by total EDID data.
5.2.
EDID (The Extended Display ⓕ Vendor Specific(HDMI)
Identification Data) 5.2.4.1. EDID
/ DDC (Display Data Channel) download ● DTS
#HDMI1 (C/S: 0xA0, 0xE5) - HDMI UHD Deep On Case
EDID Block 0, Bytes 0-127
5.2.1. Overview
It is a VESA regulation. A PC or a MNT will display an optimal EDID Block 0, Bytes 0-127
resolution through information sharing without any necessity of 0 1 2 3 4 5 6 7 8 9 A B C D E F
user input. It is a realization of “Plug and Play”. 00 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 19 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
5.2.2. Equipment 20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
▪ Since embedded EDID data is used, EDID download JIG, 30 01 01 01 01 01 01 08 E8 00 30 F2 70 5A 80 B0 58
HDMI cable and D-sub cable are not need. 40 8A 00 40 84 63 00 00 1E 02 3A 80 18 71 38 2D 40
▪ Adjust remocon 50 58 2C 45 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 88 3C 00 0A 20 20 20 20 20 20 00 00 00 FC
5.2.3. Download method 70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 A0
(1) Press Adj. key on the Adj. R/C, then select “12.EDID D/L”.
By pressing Enter key, enter EDID D/L menu. EDID Block 1, Bytes 128-255
0 1 2 3 4 5 6 7 8 9 A B C D E F
0 02 03 4C F1 50 90 22 20 05 04 03 02 01 61 5D 5E
10 5F 66 62 63 64 29 3D 06 C0 15 07 50 09 57 07 7C
20 03 0C 00 10 00 B8 3C 20 C0 8E 01 02 03 04 01 4F
30 00 FE 08 10 06 10 18 10 28 10 38 10 67 D8 5D C4
40 01 78 80 03 E3 05 C0 00 E3 0F 00 11 66 21 50 B0
50 51 00 1B 30 40 70 36 00 40 84 63 00 00 1E 01 1D
60 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E
70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 E5
(2) Select [Start] button by pressing Enter key, HDMI1 / HDMI2

/ HDMI3 are Writing and display OK or NG.

# HDMI1 (C/S: 0xE6, 0x72) - HDMI UHD Deep Off Case # HDMI2 (C/S: 0xE6, 0x62) - HDMI UHD Deep Off Case
EDID Block 0, Bytes 0-127 EDID Block 0, Bytes 0-127
0 1 2 3 4 5 6 7 8 9 A B C D E F 0 1 2 3 4 5 6 7 8 9 A B C D E F
00 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 00 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 19 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 10 01 19 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80 20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C 30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30 40 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A 50 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC 60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E6 70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E6

0 1 2 3 4 5 6 7 8 9 A B C D E F 0 1 2 3 4 5 6 7 8 9 A B C D E F
0 02 03 38 F1 4E 90 22 20 05 04 03 02 01 5D 5E 5F 0 02 03 38 F1 4E 90 22 20 05 04 03 02 01 5D 5E 5F
10 62 63 64 23 09 57 07 7C 03 0C 00 10 00 B8 3C 20 10 62 63 64 23 09 57 07 7C 03 0C 00 10 00 B8 3C 20
20 C0 8E 01 02 03 04 01 4F 00 FE 08 10 06 10 18 10 20 C0 8E 01 02 03 04 01 4F 00 FE 08 10 06 10 18 10
30 28 10 38 10 E3 0E 61 66 01 1D 80 18 71 1C 16 20 30 28 10 38 10 E3 0E 61 66 01 1D 80 18 71 1C 16 20
40 58 2C 25 00 40 84 63 00 00 9E 01 1D 00 72 51 D0 40 58 2C 25 00 40 84 63 00 00 9E 01 1D 00 72 51 D0
50 1E 20 6E 28 55 00 40 84 63 00 00 1E 00 00 00 00 50 1E 20 6E 28 55 00 40 84 63 00 00 1E 00 00 00 00
60 00 00 00 00 00 0 00 00 00 00 00 00 00 00 00 00 60 00 00 00 00 00 0 00 00 00 00 00 00 00 00 00 00
70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 72 70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 62
# HDMI2 (C/S: 0xA0, 0xD5) - HDMI UHD Deep On Case # HDMI3 (C/S: 0xE6, 0x52) - Not Support HDMI UHD Deep Color
EDID Block 0, Bytes 0-127 Case
0 1 2 3 4 5 6 7 8 9 A B C D E F EDID Block 0, Bytes 0-127
00 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 0 1 2 3 4 5 6 7 8 9 A B C D E F
10 01 19 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 00 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80 10 01 19 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
30 01 01 01 01 01 01 08 E8 00 30 F2 70 5A 80 B0 58 20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
40 8A 00 40 84 63 00 00 1E 02 3A 80 18 71 38 2D 40 30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
50 58 2C 45 00 40 84 63 00 00 1E 00 00 00 FD 00 3A 40 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
60 3E 1E 88 3C 00 0A 20 20 20 20 20 20 00 00 00 FC 50 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 A0 60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E6

0 1 2 3 4 5 6 7 8 9 A B C D E F EDID Block 1, Bytes 128-255
0 02 03 4C F1 50 90 22 20 05 04 03 02 01 61 5D 5E 0 1 2 3 4 5 6 7 8 9 A B C D E F
10 5F 66 62 63 64 29 3D 06 C0 15 07 50 09 57 07 7C 0 02 03 38 F1 4E 90 22 20 05 04 03 02 01 5D 5E 5F
20 03 0C 00 20 00 B8 3C 20 C0 8E 01 02 03 04 01 4F 10 62 63 64 23 09 57 07 7C 03 0C 00 10 00 B8 3C 20
30 00 FE 08 10 06 10 18 10 28 10 38 10 67 D8 5D C4 20 C0 8E 01 02 03 04 01 4F 00 FE 08 10 06 10 18 10
40 01 78 80 03 E3 05 C0 00 E3 0F 00 11 66 21 50 B0 30 28 10 38 10 E3 0E 61 66 01 1D 80 18 71 1C 16 20
50 51 00 1B 30 40 70 36 00 40 84 63 00 00 1E 01 1D 40 58 2C 25 00 40 84 63 00 00 9E 01 1D 00 72 51 D0
60 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 50 1E 20 6E 28 55 00 40 84 63 00 00 1E 00 00 00 00
70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 D5 60 00 00 00 00 00 0 00 00 00 00 00 00 00 00 00 00
70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 52
# HDMI4 (C/S: 0xE6, 0x42) - Not Support HDMI UHD Deep Color # AC3 HDMI2 (C/S: A0,DE)_6G_UHD Deep Color ON
Case $ % & ' ( )
)) )) )) )) )) )) ( '
EDID Block 0, Bytes 0-127 $ $ $ (( $ &
0 1 2 3 4 5 6 7 8 9 A B C D E F ) $
00 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 ( ) $ %
10 01 19 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 $ ( $ '
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80 & ( )' $
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C ( ( & $ )&
40 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30 & $ $
50 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC $ % & ' ( )
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E6 ) ' (
) & &
EDID Block 1, Bytes 128-255 % & & ( ) )(
EDID Block 1, Bytes 128-255 ' ' &
0 1 2 3 4 5 6 7 8 9 A B C D E F ( & ( ) % %
0 02 03 38 F1 4E 90 22 20 05 04 03 02 01 5D 5E 5F ( '
10 62 63 64 23 09 57 07 7C 03 0C 00 10 00 B8 3C 20 ' ( ( (
20 C0 8E 01 02 03 04 01 4F 00 FE 08 10 06 10 18 10 '(
30 28 10 38 10 E3 0E 61 66 01 1D 80 18 71 1C 16 20
40 58 2C 25 00 40 84 63 00 00 9E 01 1D 00 72 51 D0
# AC3 HDMI3 (C/S: A0,CE)_6G_UHD Deep Color ON(*TBD)
50 1E 20 6E 28 55 00 40 84 63 00 00 1E 00 00 00 00
60 00 00 00 00 00 0 00 00 00 00 00 00 00 00 00 00 $ % & ' ( )
70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 52 )) )) )) )) )) )) ( '
$ $ $ (( $ &
) $
※ Checksum (HDMI 1/2/3)
( ) $ %
Input HDMI Deep Color On HDMI Deep Color Off
$ ( $ '
FFh (Checksum) FFh (Checksum)
& ( )' $
HDMI1 A0 E5 E6 72 ( ( & $ )&
HDMI2 A0 D5 E6 62 & $ $
HDMI3 E6 52 E6 52
$ % & ' ( )
# AC3 HDMI1 (C/S: A0,EE)_6G_UHD Deep Color ON ) ' (
) & &
$ % & ' ( )
% & & ( ) )(
)) )) )) )) )) )) ( '
' ' &
$ $ $ (( $ &
( & ( ) % %
) $
( '
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$ ( $ '
&(
& ( )' $
( ( & $ )&
& $ $
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) & &
% & & ( ) )(
' ' &
( & ( ) % %
( '
' ( ( (
((
# AC3 HDMI1 (C/S: E6,7B)_3G_UHD Deep Color OFF # PCM HDMI1 (C/S: A0,60)_6G_UHD Deep Color ON
$ % & ' ( )& $ % & ' ( )
)) )) )) )) )) )) ( ' )) )) )) )) )) )) ( '
$ $ $ (( $ & $ $ $ (( $ &
) $
) $
$ ' &
( ) $ %
( % %
$ ( $ '
( )' $
& ( )' $
( ( $ )&
( ( & $ )&
& $ (
& $ $
$ % & ' ( )
% ) ( ' ( ) $ % & ' ( )
& & ) ' (
% & & ( ) )( ) & & %
( ( ' & & ( ) )(
& & ( ' ' ' & (
' ( ( ( & ( ) % %
( ' ' (
% ( (

# AC3 HDMI2 (C/S: E6,6B)_3G_UHD Deep Color OFF

$ % & ' ( )&
)) )) )) )) )) )) ( ' # PCM HDMI2 (C/S: A0,50)_6G_UHD Deep Color ON
$ $ $ (( $ &
$ % & ' ( )
) $
)) )) )) )) )) )) ( '
$ ' &
$ $ $ (( $ &
( % %
) $
( )' $
( ) $ %
( ( $ )&
$ ( $ '
& $ (
& ( )' $
$ % & ' ( ) ( ( & $ )&
% ) ( ' ( ) & $ $
& &
% & & ( ) )( $ % & ' ( )
( ( ' ) ' (
& & ( ' ) & & %
' ( ( ( & & ( ) )(

' ' & (
%
& ( ) % %
( ' ' (
( (
# AC3 HDMI3 (C/S: E6,5B)_3G_UHD Deep Color OFF

$ % & ' ( )&
)) )) )) )) )) )) ( '
$ $ $ (( $ &
) $
$ ' &
( % %
( )' $
( ( $ )&
& $ (
$ % & ' ( )
% ) ( ' ( )
& &
% & & ( ) )(
( ( '
& & ( '
' ( ( (

%
# PCM HDMI3 (C/S: A0,40)_6G_UHD Deep Color ON(*TBD) # PCM HDMI2 (C/S: E6,DD)_3G_UHD Deep Color OFF
$ % & ' ( ) $ % & ' ( )&
)) )) )) )) )) )) ( ' )) )) )) )) )) )) ( '
$ $ $ (( $ & $ $ $ (( $ &
) $ ) $
( ) $ % $ ' &
$ ( $ ' ( % %
& ( )' $ ( )' $
( ( $ )&
( ( & $ )&
& $ (
& $ $
$ % & ' ( )
$ % & ' ( )
) ( ' ( )
) ' (
& & % &
) & & %
& ( ) )(
& & ( ) )(
( ( ' &
' ' & (
& ( ' '
& ( ) % %
( ( (
( ' ' (

( (
''

# PCM HDMI1 (C/S: E6,ED)_3G_UHD Deep Color OFF # PCM HDMI3 (C/S: E6,CD)_3G_UHD Deep Color OFF
$ % & ' ( )& $ % & ' ( )&
)) )) )) )) )) )) ( ' )) )) )) )) )) )) ( '
$ $ $ (( $ & $ $ $ (( $ &
) $ ) $
$ ' & $ ' &
( % % ( % %
( )' $ ( )' $
( ( $ )& ( ( $ )&
& $ ( & $ (
$ % & ' ( ) $ % & ' ( )

) ( ' ( ) ) ( ' ( )
& & % & & & % &
& ( ) )( & ( ) )(
( ( ' & ( ( ' &
& ( ' ' & ( ' '
( ( ( ( ( (

(' &'
Checksum(HDMI 1/2/3)
DTS AC3 PCM
3D 3G 6G 3G 6G 3G 6G
HDMI1 E6/72 A0/E5 E6/7B A0/EE E6/ED A0/60
HDMI2 E6/62 A0/D5 E6/6B A0/DE E6/DD A0/50
HDMI3 E6/52 A0/C5 E6/5B A0/CE E6/CD A0/40
5.2.5. Green Eye Inspection Guide 5.3.3. Equipment
Step 1. Turn on the TV set. (1) Color Analyzer: CA-210 (NCG: CH 9 / WCG: CH12 / LED:
Step 2.
P ress “EYE” button on the Adjustment remote CH14 / OLED : CH : 17)
controller. (2) A dj. Computer (During auto adj., RS-232C protocol is
needed)
(3) Adjust Remocon
(4) V ideo Signal Generator MSPG-925F 720p/204-Gray
(Model: 217, Pattern: 49)
※ Color Analyzer Matrix should be calibrated using CS-1000
5.3.4. Equipment connection
Co lo r Analyzer
Step 3. Block the Intelligent Sensor module on the front C/A RS -232C
Probe
about 6 seconds. When the “Sensor Data” is lower
Co m p ut er
than 20, you can see the “OK” message => If it doesn’t
RS -232C
show “OK” message, the Sensor Module is defected RS -232C
one. You have to replace that with a good one. Pat t ern Generat o r
Signal Source
* If TV internal pattern is used, not needed
5.3.4. Adjustment Command (Protocol)

(1) RS-232C Command used during auto-adj
RS-232C COMMAND
Explanation
CMD DATA ID
Step 4. After check the “OK” message come out, take out your
Wb 00 00 Begin White Balance adj.
hand from the Sensor module. => Check “Backlight”
value change from “0” to “100” or not. If it doesn’t Wb 00 ff End White Balance adj.
change the value, the sensor is also defected one. (internal pattern disappears )
(2) Adjustment Map

5.3. Manual White balance Adjustment
Command Data Range
5.3.1. W/B adj. Objective & How-it-works (lower case ASCII) (Hex.) Default
(1) Objective: To reduce each Panel’s W/B deviation Adj. item
(Decimal)
(2) How-it-works: When R/G/B gain in the OSD is at 192, it CMD1 CMD2 MIN MAX
means the panel is at its Full Dynamic Range. In order to Cool R Gain j g 00 C0 TBD
prevent saturation of Full Dynamic range and data, one of
G Gain j h 00 C0 TBD
R/G/B is fixed at 192, and the other two is lowered to find
the desired value. B Gain j i 00 C0 TBD
(3) Adj. condition: normal temperature R Cut TBD
1) Surrounding Temperature: 25 ± 5 ºC
2) Warm-up time: About 5 Min G Cut TBD
3) Surrounding Humidity: 20% ~ 80% B Cut TBD
4) Before White balance adjustment, Keep power on status, Medium R Gain j a 00 C0 TBD
don’t power off
G Gain j b 00 C0 TBD
5.3.2. Adj. condition and cautionary items B Gain j c 00 C0 TBD
(1) Lighting condition in surrounding area surrounding lighting R Cut TBD
should be lower 10 lux. Try to isolate adj. area into dark
G Cut TBD
surrounding.
(2) Probe location: Color Analyzer (CA-210) probe should be B Cut TBD
within 10cm and perpendicular of the module surface Warm R Gain j d 00 C0 TBD
(80°~ 100°)
(3) Aging time G Gain j e 00 C0 TBD
1) After Aging Start, Keep the Power ON status during 5 B Gain j f 00 C0 TBD
Minutes. R Cut TBD
2) In case of LCD, Back-light on should be checked using no
signal or Full-white pattern. G Cut TBD
5.3.6. Adjustment method ▪ S tandard color coordinate and temperature using
5.3.6.1. Auto WB calibration CA-210(CH-17)
(1) Set TV in ADJ mode using P-ONLY key (or POWER ON Coordinate
key) Mode Temp △uv
(2) Place optical probe on the center of the display X Y
- It need to check probe condition of zero calibration before Cool 0.277±0.002 0.278±0.002 11000K -0.0030
adjustment. Medium 0.285±0.002 0.293±0.002 9300K 0.0000
(3) Connect RS-232C Cable
(4) Select mode in ADJ Program and begin a adjustment. Warm 0.313±0.002 0.329±0.002 6500K +0.0030
(5) When WB adjustment is completed with OK message,
check adjustment status of pre-set mode (Cool, Medium, ▪ S tandard color coordinate and temperature using
Warm) CA-210(CH-14) – by aging time
(6) Remove probe and RS-232C cable.
▪ W/B Adj. must begin as start command “wb 00 00” , and 5.4. Tool Option setting & Inspection per
finish as end command “wb 00 ff”, and Adj. offset if need
countries
5.3.6.2. OLED White balance table 5.4.1. Overview
(1) Cool Mode (1) Tool option selection is only done for models in Non-USA
- P urpose : Especially B-gain fix adjust leads to the North America due to rating
luminance enhancement. Adjust the color temperature to
reduce the deviation of the module color temperature. 5.4.2. Country Group selection
- P rinciple : To adjust the white balance without the (1) Press ADJ key on the Adj. R/C, and then select Country
saturation, Adjust the B gain more than 192 ( If R gain or G Group Menu
gain is more than 255 , G gain can adjust less than 192 ) (2) Depending on destination, select US, then on the lower
and change the others ( R/G Gain ). Country option, select US, CA, MX.
- Adjustment mode : mode – Cool Selection is done using +, - KEY
(2) Medium
- P urpose : Adjust the color temperature to reduce the 5.5. Magic Motion remote controller Check
deviation of the module color temperature - Equipment : RF Remocon for test, IR-KEY-Code Remocon
- P rinciple : To adjust the white balance without the for test
saturation, Fix the B gain to 192 (default data) and - You must confirm the battery power of RF-Remocon before
decrease the others test
- Adjustment mode : mode – Medium (recommend that change the battery per every lot)
- Sequence (test)
(3) Warm a) If you select the ‘start key(OK)’ on the controller, you can
- P urpose : Adjust the color temperature to reduce the pairing with the TV SET.
deviation of the module color temperature. b) You can check the cursor on the TV Screen, when select
- P rinciple : To adjust the white balance without the the ‘OK Key’ on the controller
saturation, Fix the W gain to 192 (default data) and c) You must remove the pairing with the TV Set by select
decrease the others. ‘Mute + OK Key’ on the controller
- Adjustment mode : mode – Warm
* Applied model
5.3.7. Reference (White Balance Adj. coordinate and Chassis Model Name Magic RF receiver
color temperature) EA59E 55/65EF9500-UA Built-in
(1) Luminance: 204 Gray, 80IRE
(2) Standard color coordinate and temperature using CS-1000 55EG9200-UA
(over 26 inch)
5.3.8. Reference (White Balance Adj. coordinate and

color temperature)
▪ Luminance: 204 Gray
▪ Standard color coordinate and temperature using CS-1000
(over 26 inch)
Coordinate
Mode Temp △uv
X Y
Cool 0.277 0.278 11,000K -0.0030
Medium 0.285 0.293 9300K 0.0000
Warm 0.313 0.329 6500K +0.0030
5.6. 3D pattern test 5.6.1. Overview
(Pattern Generator MSHG-600, MSPG-6100 [SUPPORT ▪ Option selection is only done for models in AJ/JA/IL
HDMI1.4])
* HDMI mode NO. 872 , pattern No.83 5.6.2. Method
1) Press ADJ key on the Adj. R/C, then select Country Group
(1) Please input 3D test pattern like below (HDMI mode NO. Meun
872 , pattern No.83) 2) Depending on destination, select Country Group Code or
Country Group then on the lower Country option, select US,
CA, MX. Selection is done using +, - or ►◄KEY
5.7. HDMI ARC Function Inspection

5.7.1. Test equipment
- Optic Receiver Speaker
- MSHG-600 (SW: 1220 ↑)
- HDMI Cable (for 1.4 version)
5.7.2. Test method

(1) Insert the HDMI Cable to the HDMI ARC port from the
(2) When 3D OSD appear automatically , then select green master equipment (HDMI2)
button.
(2) Check the sound from the TV Set
(3) Don’t wear a 3D Glasses, Check the picture like below
(3) Check the Sound from the Speaker or using AV & Optic
TEST program (It’s connected to MSHG-600)
5.8. Tool Option Inspection

(1) Press Adj. key on the Adj. R/C, and then check Tool option
Model Tool 1 Tool 2 Tool 3 Tool 4 Tool 5 Tool 6 Tool 7 Tool 9
55EF9500- 34790 21524 921 64774 18598 2474 44587 512
UA
65EF9500- 34793 21524 921 64774 18598 2474 44587 512
UA
55EG9200- 33350 21524 897 64774 18598 2474 44587 512
UA
5.9. Ship-out mode check (In-stop)

▪ After final inspection, press In-Stop key of the Adj. R/C and
check that the unit goes to Stand-by mode
6. GND and Internal Pressure check 8. USB S/W Download
6.1. Method (optional, Service only)
1) GND & Internal Pressure auto-check preparation (1) Put the USB Stick to the USB socket
- Check that Power Cord is fully inserted to the SET. (If loose, (2) Automatically detecting update file in USB Stick
re-insert) - If your downloaded program version in USB Stick is lower
2) Perform GND & Internal Pressure auto-check than that of TV set, it didn’t work. Otherwise USB data is
- Unit fully inserted Power cord, Antenna cable and A/V arrive automatically detected.
to the auto-check process. (3) Show the message “Copying files from memory”
- Connect D-terminal to AV JACK TESTER
- Auto CONTROLLER(GWS103-4) ON
- Perform GND TEST
- If NG, Buzzer will sound to inform the operator.
- If OK, changeover to I/P check automatically.
(Remove CORD, A/V form AV JACK BOX)
- Perform I/P test
- If NG, Buzzer will sound to inform the operator.
- If OK, Good lamp will lit up and the stopper will allow the
pallet to move on to next process.
(4) Updating is staring
6.2. Checkpoint
(1) Test voltage
- GND: 1.5KV/min at 100mA
- SIGNAL: 3KV/min at 100mA
(2) TEST time: 1 second
(3) TEST POINT
- GND Test = POWER CORD GND and SIGNAL CABLE
GND.
- Hi-pot Test = POWER CORD GND and LIVE & NEUTRAL.
(4) LEAKAGE CURRENT: At 0.5mArms
(5) Updating Completed, The TV will restart automatically
7. AUDIO output check

No Item Min Typ Max Unit Remark
1 Audio practical 9 10 12 W EQ Off
max Output, L/R AVL Off
(Distortion=10% Clear Voice Off
6.07 8.10 10.8 Vrms
max Output)
2 Speaker 9 10 12 W EQ On
(8Ω Impedance) AVL On
Clear Voice On (6) If your TV is turned on, check your updated version and
Tool option.
*Measurement condition: * If downloading version is more high than your TV have, TV
(1) RF input: Mono, 1KHz sine wave signal, 100% Modulation can lost all channel data. In this case, you have to channel
(2) CVBS, Component: 1KHz sine wave signal (0.4Vrms) recover. If all channel data is cleared, you didn’t have a DTV/
ATV test on production line.
* After downloading, TOOL OPTION setting is needed again.

(1) Push "IN-START" key in service remote controller.
(2) Select "Tool Option 1" and Push “OK” button.
(3) Punch in the number. (Each model has their number.)
BLOCK DIAGRAM
1. LM14A + URSA9 Circuit Block Diagram
2. LM14A + URSA11 I2C Block Diagram
3. URSA11 Block Diagram
4. LM14A + URSA11 Power Block Diagram
5. Tuner/CI Block Diagram
6. Video/Audio In Block Diagram
7. Audio Out Block Diagram
8. HDMI
9. USB / WIFI / M-REMOTE / UART
10. LM14A + URSA11 Internal Block
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
401
710
400
900
810
811
521
540
120
531
121
530
570
821
LV1 LV2
500
820
AG1
A10
200
A22
SPI_CK_SOC COMPENSATION_DONE OLED
LM14A+URSA9 TXVBY1_0N
SPI_DI_SOC FAN_ON LM14A UF68/64
+3.3V_NORMAL SPI_DO_SOC FRC_FLASH_SEL_SOC TXVBY1_0P
CHIP CONFIG NVRAM +3.3V_NORMAL TXVBY1_1N /TU_RESET2
/SPI_CS FRC_FLASH_WP GST_A LM14A UF74
IC101-*1
BR24G256FJ-3 TXVBY1_1P
Atmel_NVRAM TXOSD_3P LOCKAn_OSD GCLK_A
4.7K
4.7K
4.7K
WOL_WAKE_UP_SOC
4.7K
IC101 A0
1 8
VCC
URSA9_CONNECT MCLK_A PMIC_RESET 5V_DET_HDMI_1

TXOSD_3N
AT24C256C-SSHL-T C100 A1
2 7
WP
Data_Format_1
OPT
EO_A
OPT
EAN61133501 0.1uF A2
3 6
SCL
TXOSD_2P DATA_FORMAT_1_SOC LM14A_ONLY LOCKOUT12 /USB_OCD3
GND
4 5
SDA
TXOSD_2N Data_Format_0
R108
R110
R115
DATA_FORMAT_0_SOC USB_CTL3
R122
Rohm_NVRAM
TXOSD_1P URSA_RESET_SoC
A0 VCC HTPDAn_OSD
1 8 L/D_VSYNC_SOC
TXOSD_1N
HTPDAn_Video IC100
Write Protection L/D_CLK_SOC
LED1 A1 WP
TXOSD_0P LGE5332(LM14A)
2 7
TXOSD_0N L/D_DI_SOC
SPI_DI_SOC - Low : Normal Operation IC100
- High : Write Protection EB_DATA[0-7]
LED0 A2
3 A0’h SCL LGE5332(LM14A)
6
EB_DATA[0]
PWM_PM I2C_SCL1
V-BY-ONE AH14
4.7K
4.7K
4.7K
FE_DEMOD1_TS_DATA[0-7]
4.7K
EB_DATA[1] PCM_D[0]/GPIO147 FE_DEMOD1_TS_DATA[0]

GND SDA I2C_SDA1 AG13 AH13
4 5 PCM_D[1]/GPIO148 TS1_D0/GPIO182
EB_DATA[2] FE_DEMOD1_TS_DATA[1]
OPT
OPT
33 D9 AF32 AG12 AG11

AR101 PWM_DIM TXVBY1_0N PCM_D[2]/GPIO149 TS1_D1/GPIO181
PWM0/GPIO152 LVSYNC/[VX1_0-] EB_DATA[3] AK22 AG10 FE_DEMOD1_TS_DATA[2]
F10 AF31
R109
TXVBY1_0P
R111
R116
PWM_DIM2
R123
PWM1/GPIO153 LHSYNC/[VX1_0+] EB_DATA[4] PCM_D[3]/GPIO119 TS1_D2/GPIO180 FE_DEMOD1_TS_DATA[3]

F8 AG32 AK21 AJ11
FAN_ON TXVBY1_1N PCM_D[4]/GPIO120 TS1_D3/GPIO179
PWM2/GPIO154 LDE/[VX1_1-] EB_DATA[5] AL21 AH10 FE_DEMOD1_TS_DATA[4]
E9 AG31 TXVBY1_1P
AMP_RESET_N PWM3/GPIO155 LCK/[VX1_1+] EB_DATA[6] PCM_D[5]/GPIO121 TS1_D4/GPIO178 FE_DEMOD1_TS_DATA[5]
AM23 AJ13
EB_DATA[7] PCM_D[6]/GPIO122 TS1_D5/GPIO177 FE_DEMOD1_TS_DATA[6]
N5 AH31 AH20 AG9
PWM_PM TXVBY1_2N EB_ADDR[0-14] PCM_D[7]/GPIO123 TS1_D6/GPIO176
PWM_PM/GPIO7 R_ODD[7]/LVB0N/[VX1_2-] AH9 FE_DEMOD1_TS_DATA[7]
AH30 TXVBY1_2P
R_ODD[6]/LVB0P/[VX1_2+] EB_ADDR[0] TS1_D7/GPIO175
F4 AJ31 AG14 AH11
TXVBY1_3N PCM_A[0]/GPIO146 TS1_CLK/GPIO172 FE_DEMOD1_TS_CLK
CHIP_CONFIG[3:0] /USB_OCD2 SAR0/GPIO46 R_ODD[5]/LVB1N/[VX1_3-] EB_ADDR[1] AL20 AJ10
G5 AJ32 TXVBY1_3P
{LED1, SPI_DI,LED0, PWM_PM} USB_CTL2 SAR1/GPIO47 R_ODD[4]/LVB1P/[VX1_3+] EB_ADDR[2] PCM_A[1]/GPIO145 TS1_VLD/GPIO174 FE_DEMOD1_TS_VAL
E5 AK32 AG15 AH12
FRC_FLASH_WP TXVBY1_4N PCM_A[2]/GPIO143 TS1_SYNC/GPIO173 FE_DEMOD1_TS_SYNC
Value Mode Description SAR2/GPIO48 R_ODD[3]/LVB2N/[VX1_4-] EB_ADDR[3] AH15
E4 AK31 TXVBY1_4P TPI_DATA[0-7]
4’b1000 SB51_ExtSPI 51 boot from SPI DDTS_TX SAR3/GPIO49 R_ODD[2]/LVB2P/[VX1_4+] EB_ADDR[4] PCM_A[3]/GPIO142 TPI_DATA[0]
4’b1001 HEMCU_ExtSPI ARM boot from SPI G4 AL32 AM19 AK17
TXVBY1_5N PCM_A[4]/GPIO141 TS0_D0/GPIO161
SAR5 R_ODD[1]/LVBCLKN/[VX1_5-] EB_ADDR[5] AJ17 AL18 TPI_DATA[1]
4’b1010 HEMCU_ROM_EMMC ARM boot from ROM; outer storage is eMMC AL31 TXVBY1_5P
4’b1011 HEMCU_ROM_NAND ARM boot from ROM; outer storage is NAND R_ODD[0]/LVBCLKP/[VX1_5+] EB_ADDR[6] PCM_A[5]/GPIO139 TS0_D1/GPIO162 TPI_DATA[2]
AK30 AJ16 AK18
4’b1100 DBUS for test only TXVBY1_6N PCM_A[6]/GPIO138 TS0_D2/GPIO163
G_ODD[7]/LVB3N/[VX1_6-] EB_ADDR[7] AH17 AL15 TPI_DATA[3]
4’b0000 SB51_ExtSPI + Authentication 51 boot from SPI with ARM authentication W5 AL30 TXVBY1_6P
SPI_CK_SOC PM_SPI_CK/GPIO1 G_ODD[6]/LVB3P/[VX1_6+] EB_ADDR[8] PCM_A[7]/GPIO137 TS0_D3 TPI_DATA[4]
4’b0001 SB51_ExtSPI + Authentication HEMCU_ExtSPI + Authentication V4 AK29 AM20 AL16
SPI_DI_SOC TXVBY1_7N PCM_A[8]/GPIO131 TS0_D4/GPIO165
4’b0011 HEMCU_ROM_NAND + Authentication ARM boot from ROM with authentication; PM_SPI_DI/GPIO2 G_ODD[5]/LVB4N/[VX1_7-] EB_ADDR[9] AH19 AK15 TPI_DATA[5]
V5 AL29 TXVBY1_7P
SPI_DO_SOC PM_SPI_DO/GPIO3 G_ODD[4]/LVB4P/[VX1_7+] EB_ADDR[10] PCM_A[9]/GPIO129 TS0_D5/GPIO166 TPI_DATA[6]
Y6 AJ20 AM16
/TU_RESET1 PM_SPI_CZ/GPIO0 EB_ADDR[11] PCM_A[10]/GPIO125 TS0_D6/GPIO167 TPI_DATA[7]
R167 0 Y4 AK28 TXOSD_0N
AK20 AK16
/SPI_CS GPIO_PM[6]/[SPI-CZ1N]/GPIO16 G_ODD[3]/LVA0N/[OSD_0-] EB_ADDR[12] PCM_A[11]/GPIO127 TS0_D7/GPIO168
OPT Y5 AM28 AG17 AL19
TXOSD_0P PCM_A[12]/GPIO136 TS0_CLK/GPIO171 TPI_CLK
GPIO_PM[10]/[SPI-CZ2N]/GPIO20 G_ODD[2]/LVA0P/[OSD_0+] EB_ADDR[13] AJ19 AM17
LM14 HW Option M_RFModule_RESET
G_ODD[0]/LVA1P/[OSD_1+]
AL28
AK27
TXOSD_1N
EB_ADDR[14] AG18
PCM_A[13]/GPIO132 TS0_VLD/GPIO169
AL17
TPI_VAL
TXOSD_1P PCM_A[14]/GPIO133 TS0_SYNC/GPIO170 TPI_SOP
G_ODD[1]/LVA1N/[OSD_1-]
AK26 TXOSD_2N
+3.3V_NORMAL B_ODD[7]/LVA2N/[OSD_2-] AH18 AH23
AL8 AL26 TXOSD_2P
DDCA_CK DDCA_CK/GPIO8 B_ODD[6]/LVA2P/[OSD_2+] SM_Vsel CAM_IREQ_N PCM_IRQA_N/GPIO135 TS3_D0/GPIO206 POL EPI
AK8 AM26 AM22 AH27
DDCA_DA TXOSD_3N SM_CLK EB_OE_N PCM_OE_N/GPIO126 TS3_D1/GPIO207 GST_A GST
DDCA_DA/GPIO9 B_ODD[5]/LVACLKN/[OSD_3-] AG20 AJ23
AK25 TXOSD_3P GCLK
B_ODD[4]/LVACLKP/[OSD_3+] SM_RST EB_BE_N1 PCM_IORD_N/GPIO128 TS3_D2/GPIO208 GCLK_A
AL25 AL22 AG27
B_ODD[3]/LVA3N/[LOCKN] LOCKAn_Video SM_IO /PCM_CE1 PCM_CE_N/GPIO124 TS3_D3/GPIO209 MCLK_A MCLK
AH28 AK24 AK19 AH24
10K
10K
10K
10K
10K
10K
10K
10K
EB_WE_N PCM_WE_N/GPIO134 OPT_P HDMI_SW_SDA

10K
10K
TS3_D4/GPIO210
10K
10K
SOC_TX GPIO3/TX1/GPIO58 B_ODD[2]/LVA3P/[HTPDN] HTPDAn_Video SM_VCC

BIT10_1
BIT2_1
BIT11_1
BIT0_1
BIT1_1
BIT3_1
BIT4_1
BIT5_1
BIT6_1
BIT7_1
BIT8_1
AG21 AH26
BIT9_1
AH29 AL24
SOC_RX GPIO4/RX1 B_ODD[1]/LVA4N/[OSD_LOCKN] LOCKAn_OSD CAM_CD1_N PCM_CD_N/GPIO151 TS3_D5/GPIO211 SOE HDMI_SW_SCL
AA4 AK23 AH16 AJ25
FRC_FLASH_SEL_SOC GPIO23/[TX3]/GPIO78 B_ODD[0]/LVA4P/[OSD_HTPDN] HTPDAn_OSD PCM_RESET PCM_RESET/GPIO150 TS3_D6/GPIO212 FB MN864778_RESET
W6 AJ14 AG26
R112
R119
R125
R128
R132
R135
R138
R140
R142
R146
R105
R148
/TU_RESET2 R172 R173 CAM_REG_N PCM_REG_N/GPIO144 TS3_D7/GPIO213 EO_A E/O

GPIO24/[RX3]/GPIO79 AG19 AH25
F14 10K 10K HTPDAn_OSD_Pull_down
I2C_SCL6 DIM2/TX4/GPIO112 HTPDAn_Video_Pull_down SM_CD EB_BE_N0 PCM_IOWR_N/GPIO130 TS3_CLK/GPIO216 HCONV
F12 AG16 AJ26
BIT0 I2C_SDA6 DIM3/RX4/GPIO113 CAM_WAIT_N PCM_WAIT_N/GPIO140 TS3_VLD/GPIO214 DPM
AG24
BIT1 TS3_SYNC/GPIO215 LOCKOUT12 LOCK
AJ27
CPU_VID1 GPIO2/GPIO57
BIT2
C7
BIT3 BIT0 EMMC_IO15/[GPIO]/GPIO189
C6
BIT1 EMMC_IO17/[GPIO]/GPIO188
BIT4 AE2 C8 AJ28
GPIO_PM[0]/GPIO10 COMP1_DET EMMC_CMD EMMC_IO9/[EMMC_CMD]/GPIO183 GPIO8/[TS4_D[0]]/GPIO63 FE_DEMOD3_TS_DATA
B8 AG28
BIT2 EMMC_IO14/[GPIO]/GPIO185 GPIO5/[TS4_CLK]/GPIO60 FE_DEMOD3_TS_CLK
1K
R176
BIT5 U6 A9 AJ29
GPIO_PM[3]/GPIO13 DDTS_RX EMMC_CLK EMMC_IO10/[EMMC_CLK]/GPIO186 GPIO7/[TS4_VLD]/GPIO62 FE_DEMOD3_TS_VAL
P4 B7 AG29
BIT6 GPIO_PM[4]/GPIO14 PCM_5V_CTL R175 TCON_I2C_EN BIT3 EMMC_IO16/[GPIO]/GPIO187 GPIO6/[TS4_SYNC]/GPIO61 FE_DEMOD3_TS_SYNC
U5 22 B9
GPIO_PM[7]/GPIO17 EMMC_RST EMMC_IO11/[EMMC_RSTN]/GPIO190
AE5 A8
BIT7 PMIC_RESET BIT4 EMMC_IO12/[GPIO]/GPIO184
GPIO_PM[8]/GPIO18 C9
AJ7 AJ5
I2C_SCL3 GPIO28/SCK0/GPIO83 GPIO_PM[9]/GPIO19 COMPENSATION_DONE EMMC_STRB EMMC_IO8/[NAND-DQS]/GPIO191
BIT8 AH8 AG6 B6
I2C_SDA3 EMMC_DATA[0-7] BIT5 EMMC_IO13/[GPIO]/GPIO217
GPIO29/SDA0/GPIO84 GPIO_PM[13]/GPIO23 URSA9_CONNECT
E11
BIT9 I2C_SCL1 DDCR_CK/SCK3/GPIO54 EMMC_DATA[6] C10
E10
I2C_SDA1 DDCR_DA/SDA3/GPIO53 EMMC_DATA[7] EMMC_IO6/[EMMC_D6]/GPIO221
AJ6 B11
I2C_SCL2 GPIO30/SCK4/GPIO85 EMMC_DATA[2] EMMC_IO7/[EMMC_D7]/GPIO220
AG8 A11
I2C_SDA2 GPIO31/SDA4/GPIO86 EMMC_DATA[1] EMMC_IO2/[EMMC_D2]/GPIO219
BIT10 AH7 P5 C11
I2C_SCL5 GPIO32/SCK5/GPIO87 GPIO_PM[1]/PM_UART1/GPIO11 /USB_OCD1 EMMC_DATA[0] EMMC_IO1/[EMMC_D1]/GPIO218
AJ8 P6 A12 AL2
BIT11 I2C_SDA5 GPIO33/SDA5/GPIO88 GPIO_PM[5]/PM_UART1/GPIO15 USB_CTL1 EMMC_DATA[3] EMMC_IO0/[EMMC_D0]/GPIO194 VIFP
AJ4 B12 AM2
GPIO_PM[11]/PM_UART0/GPIO21 DATA_FORMAT_0_SOC EMMC_DATA[4] EMMC_IO3/[EMMC_D3]/GPIO193 VIFM
AH4 C12
GPIO_PM[12]/PM_UART0/GPIO22 DATA_FORMAT_1_SOC EMMC_DATA[5] EMMC_IO4/[EMMC_D4]/GPIO192
B13 AK1 Close to MSTAR DTV_IF
EMMC_IO5/[EMMC_D5]/GPIO222 SIFP
AK2
10K
10K
10K
10K
10K
10K
10K
10K
10K
SIFM
10K
10K
10K
L6 G7 R183 100 C103 0.1uF OPT IF_P

BIT10_0
BIT11_0
BIT2_0
BIT0_0
BIT1_0
BIT7_0
BIT8_0
BIT9_0
BIT3_0
BIT4_0
BIT5_0
BIT6_0
CPU_VID0 VID0/GPIO50 TESTPIN C107

M6 AK3 100pF
CORE_VID0 VID1/GPIO51 IFAGC
AD5
R126
LED0
R106
R129
R133
R136
R139
R141
LED0/GPIO29
R143
R147
R113
R120
R149
AD4
LED1 LED1/GPIO30 R184 100 C104 0.1uF OPT IF_N
AB5 AJ1 C109
WOL_WAKE_UP_SOC WOL_INT_OUT/[GPIO]/GPIO52 TGPIO0/GPIO157 /USB_OCD3 33pF OPT
E13 AJ2 C110
SPI1_DI/GPIO107 HP_DET TGPIO1/GPIO158 USB_CTL3 33pF
D12 R4
SPI1_CK/GPIO106 RF_SWITCH_CTL TGPIO2/SCK1/GPIO159 I2C_SCL7
F11 R5
SPI2_DI/GPIO109 L/D_DI_SOC TGPIO3/SDA1/GPIO160 I2C_SDA7
D11
SPI2_CK/GPIO108 L/D_CLK_SOC
E12
VSYNC_LIKE/GPIO105 L/D_VSYNC_SOC C101 0.1uF R185 47
D14 AM7 TU_SIF
DIM0/GPIO110 SC_DET NC_1 C102 0.1uF R186 47
E14 AL7 R188
DIM1/GPIO111 AV1_CVBS_DET NC_2 C105 300
AM8 1000pF
NC_3 ANALOG SIF OPT OPT
AK7
NC_4 Close to MSTAR
20141113 version AL5
NC_5
+3.3V_NORMAL
BIT(0/1) DVB ATSC JP AM5
GPIO34/GPIO89 CORE_VID1
M7 L100
00 TW/COL US NC_6 PZ1608U121-2R0TF
Low High
01 CN/HK KR JP
10 EU BR T-con I2C R182 C106
BIT8 16Kbit 32Kbit 0.1uF
BIT(2/3) EU/CIS AJJA TW/COL CN/HK KR North.AM BR JP Protocol 10K
11 AJJA CI R187
BIT(6/7) B/E(FRC)
00 T2/C/S2 PIP T2/C PIP T2/C PIP Default ATSC NIM+T2 Default ISDB PIP Default 0
00 BIT9 Division NON_Division 4_Division IF_AGC
Low High LM15U only
01 T2/C/S2 T2/C/S2 T2/C ATSC+T2 ISDB EXT
C108
BIT4 Display LCD OLED 01 URSA9 0.047uF
BIT10 Interface EPI Vx1
10 T/C T T/C ATSC ISDB INT 25V
10 URSA11-P
BIT5 Resolution FHD UHD 11 T2 ATSC PIP BIT11 OS(DDR) WebOS Lite WebOS
11 URSA11
+3.3V_TU
+3.3V_LNA_TU
+3.3V_NORMAL I2C PULL UP
GPIO PULL UP
Mstar Debug RS232C_Debug DDTS_Debug
+3.3V_NORMAL MSTAR_DEBUG_OLD
P101 +3.3V_NORMAL +3.3V_NORMAL
UART_4PIN_WAFER DDTS_Debug
R100
1.8K
R101
1.8K
R102
1.8K
R103
1.8K
R104
1.8K
R114
1.8K
R121
1.8K
R127
1.8K
R130
1.8K
R134
1.8K
R137
1.8K
R189
1.8K
R190
1.8K
R107
1.8K
R124
1.8K
R131
1.8K
MSTAR_DEBUG_NEW
12505WS-04A00
P100 P102 P103
12507WS-04L 12507WS-04L 12507WS-04L
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
HDMI_SW_SDA
10K
10K
1
OPT
HDMI_SW_SCL
OPT
OPT
OPT
I2C_SDA7 1 1
R152
1
R154
R164
R156
R157
R161
R165
R166
R170
I2C for URSA9 (URSA9 Only)

R168
I2C_SCL7 2
R178
R180
I2C_SDA6
I2C for LCD Module 2 2 SOC_RX 2 DDTS_RX
I2C_SCL6
10K
10K
/TU_RESET1 DDCA_CK 3
I2C_SDA1
I2C for NAVRAM
OPT
OPT
I2C_SCL1 RF_SWITCH_CTL 3 3
3
I2C_SDA3 AMP_RESET_N 4
R179
R181
I2C for Micom DDCA_DA
I2C_SCL3 TCON_I2C_EN
4 4 SOC_TX 4
/USB_OCD3 5 DDTS_TX
I2C_SDA4
I2C for Main Amp / Woofer AMP USB_CTL3
I2C_SCL4
5 5 5
I2C_SDA5 /USB_OCD2
I2C for tuner USB_CTL2
I2C_SCL5
M_RFModule_RESET
I2C_SDA2
I2C for tuner&LNB PCM_5V_CTL
I2C_SCL2
AR100
33
I2C_SDA_MICOM I2C_SDA3
I2C_SCL_MICOM I2C_SCL3
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS LM15U 2014-11-22
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN1_SYSTEM 1
Copyright 2015 LG Electronics Inc. All rights reserved. LGE Internal Use Only
IC100
LGE5332(LM14A)
WOL POWER ENABLE CONTROL +1.1V_VDDC_CPU
+1.1V_VDDC +1.1V_VDDC 1st layer 4th layer
+1.1V_Bypass Cap(CLOSE TO CHIP SIDE)
J9 AC17
VDDC_1 VDDC_24
J10 AC18
BOTTOM_CAP_FOR_RIPPLE
+1.1V_VDDC DVDD_DDR11
VDDC_2 VDDC_25 +3.5V_ST
0.1uF
0.1uF
J11 AC19 +3.5V_WOL BOTTOM_CAP_FOR_RIPPLE
0.1uF
10uF
VDDC_3 VDDC_26 IC201 4th layer
J12 AC20 C263 C323 L226
VDDC_4 VDDC_27 AP2151WG-7
J13 AC21 10uF C208 0.1uF PZ1608U121-2R0TF
VDDC_5 VDDC_28 10V 10uF 16V
C322
PZ1608U121-2R0TF
C276
C278
K9 AC22
C299
VDDC_6 VDDC_29 L203 10V
K10 AD17 IN OUT
K11
VDDC_7 VDDC_30
AD18
+3.3V_NORMAL
5 1
2A C324 C257
VDDC_8 VDDC_31 C242 R204
K12 AD19 0.47uF 0.47uF
VDDC_9 VDDC_32 0.1uF GND 10K
K13 AD20 2 6.3V 6.3V
VDDC_10 VDDC_33 R203 OPT
L9 AD21 Close to chip side
VDDC_11 VDDC_34 1K
L10 AD22 WOL_CTL 0 R202 OPT EN FLG
VDDC_12 VDDC_35 4 3
L11 AE19 Close to chip side
VDDC_13 VDDC_36
L12 AE20
VDDC_14 VDDC_37
R11 AE21
VDDC_15 VDDC_38
R12 AE22
VDDC_16 VDDC_39 Close to chip side
R13
VDDC_17 +1.1V_VDDC
T11 AE31
VDDC_18 VDD_SRAM_1
T12 AC24 1st layer 4th layer
VDDC_19 VDD_SRAM_2 AVDDL_MOD11
T13 AD23
VDDC_20 VDD_SRAM_3 4th layer
U11 AVDD_DMPLL
VDDC_21
U12 AE30 L202
0.1uF
0.1uF
0.1uF
VDDC_22 CTRL_SRAMLDO PZ1608U121-2R0TF
10uF
U13 1st layer 4th layer
VDDC_23 C205 C261
10uF 0.1uF
AVDDL_MOD11 A6 AVDD_DMPLL 10V 16V 2A
C250
C230
C234
C235
EMMC_CTRL C320
W21 C238
0.1uF
AVDDL_PREDRV_1 0.47uF 0.47uF
0.1uF
Y21 6.3V
AVDDL_PREDRV_2 6.3V
AD29 V7
AVDDL_PREDRV_3 AVDD_NODIE
0.1uF
AD30
DVDD_DDR11
C244
AVDDL_MOD_1
C245
W20
AVDD15_MOD AVDDL_MOD_2 Close to chip side
Y20 L7
AVDDL_MOD_3 AVDDL_MHL3_1 AVDDP3P3_MHL
U19 N12
C227
AVDD15_MOD_1 AVDDL_MHL3_2 Close to chip side

V19 R7
AVDD15_MOD_2 AVDD3P3_MHL3_1
DVDD_DDR11 AA13 T7
AVDDL_USB3_1 AVDD3P3_MHL3_2 Close to chip side
AF11 AVDD33_ADC
AVDDL_USB3_2 AVDD_DMPLL
U21 Y7
VDDC_CPU_1 AVDD3P3_ETH Close to chip side
U22 AB7
+1.1V_VDDC_CPU VDDC_CPU_2 AVDD3P3_DADC_1
U23 AB8
VDDC_CPU_3 AVDD3P3_DADC_2
U24 AA7 +3.5V_WOL
VDDC_CPU_4 AVDD3P3_ADC_1 AVDD_DMPLL
U25 AA8 IC200
VDDC_CPU_5 AVDD3P3_ADC_2
V23 G9 AP2121N-3.3TRE1
V24
VDDC_CPU_6 AVDD3P3_USB_1
G10
AVDD_DMPLL
+1.5V_Bypass Cap
VDDC_CPU_7 AVDD3P3_USB_2 +1.5V_DDR AVDD_DDR
V25 AB15 VIN 3 2 VOUT
VDDC_CPU_8 AVDD3P3_USB3_1
W23 AF13 AVDD_AU33
VDDC_CPU_9 AVDD3P3_USB3_2 AVDDP3P3 1
W24 AD7 L227
VDDC_CPU_10 AVDD_AU33 GND PZ1608U121-2R0TF
W25 AE7
VDDC_CPU_11 AVDD_EAR33 C246 1st layer 4th layer
Y23 AF8 C243 1uF
VDDC_CPU_12 AVDD3P3_DMPLL 0.1uF AVDD_DDR AVDD15_MOD
Y24 AE15 10V L200
VDDC_CPU_13 VDDP_1 16V
Y25 AF15
2A
0.47uF
VDDC_CPU_14 VDDP_2 PZ1608U121-2R0TF
0.1uF
0.1uF
0.1uF
0.1uF
AA22
0.1uF
0.1uF
0.1uF
VDDC_CPU_15 L224
AA23
AA24
VDDC_CPU_16
V17
4A C207
10uF
C201
10uF
C247
C316
10uF
C223
10uF
C248
0.47uF
C249
0.47uF
AVDD_DMPLL 0.47uF
VDDC_CPU_17 AVDD_MOD_1 10V 10V 6.3V PZ1608U121-2R0TF
C314
0.1uF
10V 10V 6.3V
0.1uF
AA25 V18
C209
C224
C225
C226
6.3V
C203
C204
C287
VDDC_CPU_18 AVDD_MOD_2
AB24 W19 WOL_WAKE_UP
VDDC_CPU_19 AVDD_LPLL_1 R205
AB25 Y19
VDDC_CPU_20 AVDD_LPLL_2 10K
C307
C308
0 R169
AE16 WOL_WAKE_UP WOL_WAKE_UP_SOC
MCP_VDDC_1 WOL_WAKE_UP
AF16 N15
MCP_VDDC_2 AVDD_PLL_A
N16 Close to chip side
AVDD_PLL_B Close to chip side
DVDD_NODIE VDDP_NAND_A VDDP_NAND_C
L13
DVDD_NODIE
DVDD_DDR11 H16
VDDP_3318_A/[3.3V/1.8V]
K21 K16
C200 DVDD_DDR_1 VDDP_3318_C/[3.3V/1.8V]
N21 AVDD_DDR
1uF DVDD_DDR_2
25V
M21 J21
DVDD_DDR_3 AVDD_DDR_A_1
L21 K17
DVDD_DDR_4 AVDD_DDR_A_2
K18
AVDD_DDR_A_3
K19
AVDD_DDR_A_4
L17
AVDD_DDR_A_5
L19
AVDD_DDR_A_6
L20
AVDD_DDR_A_7
AVDD_DDR_B_1
J23
K22 GND JIG POINT +3.3V_Bypass Cap
AVDD_DDR_B_2
K23
AVDD_DDR_B_3
M22
AVDD_DDR_B_4
N22
AVDD_DDR_B_5
4th layer
JP202
JP204
JP205
JP203
N23
AVDD_DDR_B_6 +3.3V_NORMAL AVDDP3P3
P23 +3.3V_NORMAL
AVDD_DDR_B_7
AVDD33_ADC
1st layer 4th layer
L215
L221 PZ1608U121-2R0TF
L18 PZ1608U121-2R0TF
0.1uF
AVDD_DDR_LDO_A
0.47uF
L22
0.1uF
AVDD_DDR_LDO_B C294 C295
AVDD5V_MHL 2A 1uF 1uF
C251
0.47uF
C252
0.47uF
C222
2A C256 C217
25V 25V 6.3V 6.3V 10uF
C268 10uF
10uF
C274
H7 10V 10V
C311
C253
10uF 10V
AVDD_HDMI_5V_PA 10V
R201
0 AVDD_DDR
G8
GND_EFUSE
0.1uF
Close to chip side

C14
C229
AVDD_DDR_VBP_A_1 0.47uF C210

B14 +3.3V_NORMAL VDDP_NAND_C
5V_HDMI_1 AVDD5V_MHL AVDD_DDR_VBP_A_2 0
J17 Close to chip side Close to chip side
AVDD_DDR_VBP_A_3 R207
J18 0.47uF C211 non_HDMI_LEAK
AVDD_DDR_VBP_A_4
0.1uF
R200 4th layer

L208
10 B15 PZ1608U121-2R0TF
AVDD_DDR_VBN_A_1 0.47uF C212
C15 AVDD_AU33
AVDD_DDR_VBN_A_2
C219
J19 +5V_NORMAL 4th layer

AVDD_DDR_VBN_A_3
J20 0.47uF C213 2A C260
C266
0.1uF L219 HDMI_LEAK
AVDD_DDR_VBN_A_4 10uF PZ1608U121-2R0TF R206
BOTTOM_CAP_FOR_RIPPLE 10K AVDDP3P3_MHL
10V
AC30 C292
G
AVDD_DDR_VBP_B_1 0.47uF C214
AVDD_DDR_VBP_B_2
AC31
K24
2A 0.47uF
6.3V
L201
PZ1608U121-2R0TF
AVDD_DDR_VBP_B_3 0.47uF C215
D
L24
AVDD_DDR_VBP_B_4
0.1uF
RUE003N02 C240 C241

0.1uF 0.47uF
AD31 Q200 D
VISHAY_HDMI_LEAK 6.3V
AVDD_DDR_VBN_B_1 ROHM_HDMI_LEAK BOTTOM_CAP_FOR_RIPPLE
AD32 C216 Q200-*1
AVDD_DDR_VBN_B_2 0.47uF VDDP_NAND_A G
C221
L23 SI1012CR-T1-GE3
AVDD_DDR_VBN_B_3 Close to chip side
M24 +1.8V S
AVDD_DDR_VBN_B_4 0.47uF C220
L209
PZ1608U121-2R0TF
Close to chip side
2A C236
C239
0.1uF
10uF
10V

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. BSD-15Y-LM14A-002_00-HD
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS LM14A 2014-12-21
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN2_POWER 2
DDR_VTT DDR_VTT
AR400 AR407
M0_DDR_VREFDQ 56 56
Hynix_DDR3_4Gb_29n Hynix_DDR3_4Gb_29n M0_1_DDR_VREFDQ 1/16W 1/16W
IC400 IC401 C424 0.1uF C453 0.1uF
M0_DDR_A14 M1_DDR_A14
H5TQ4G63AFR-RDC H5TQ4G63AFR-RDC M0_DDR_A8 M1_DDR_A8
M0_DDR_A11 M1_DDR_A11
EAN63053201 EAN63053201 C425 0.1uF C454 0.1uF
M0_DDR_A6 M1_DDR_A6
M0_DDR_A0
N3
A0 DDR3 VREFCA
M8
M0_DDR_A0
N3
A0
DDR3 VREFCA
M8
AR401 AR408
P7 P7 4Gbit 56 56
M0_DDR_A1 A1 4Gbit M0_DDR_A1 A1 1/16W 1/16W
P3 P3
M0_DDR_A2 A2 (x16) M0_DDR_A2 A2 (x16) C426 0.1uF C455 0.1uF
N2 H1 N2 H1 M0_DDR_A1 M1_DDR_A1
M0_DDR_A3 A3 VREFDQ M0_DDR_A3 A3 VREFDQ
P8 P8 M0_DDR_A4 M1_DDR_A4
M0_DDR_A4 A4 M0_DDR_A4 A4
P2 P2 M0_DDR_A12 M1_DDR_A12
M0_DDR_A5 A5 M0_DDR_A5 A5 C427 0.1uF C456 0.1uF
R8 L8 R400 240 R8 L8 R403 240 M0_DDR_BA1 M1_DDR_BA1
M0_DDR_A6 A6 ZQ M0_DDR_A6 A6 ZQ
R2 AVDD_DDR R2 AR402 AR409
M0_DDR_A7 A7 M0_DDR_A7 A7 AVDD_DDR
T8 T8 56 56
M0_DDR_A8 A8 M0_DDR_A8 A8 1/16W 1/16W
R3 B2 R3 B2 C428 0.1uF C457 0.1uF
M0_DDR_A9 A9 VDD_1 M0_DDR_A9 A9 VDD_1
L7 D9 L7 D9
M0_DDR_A10 A10/AP VDD_2 M0_DDR_A10 A10/AP VDD_2 M0_DDR_A13 M1_DDR_A13
R7 G7 R7 G7
DDR3 1.5V bypass Cap - Place these caps near Memory

N7 K2 N7 K2 M0_DDR_A9 M1_DDR_A9
M0_DDR_A12 A12/BC VDD_4 M0_DDR_A12 C429 0.1uF C458 0.1uF
A12/BC VDD_4 M0_DDR_A7 M1_DDR_A7
T3 K8 T3 K8
T7 N1 T7 N1 AR403 AR410
M0_DDR_A14 A14 VDD_6 M0_DDR_A14 A14 VDD_6 56 56
M7 N9 M7 N9 1/16W 1/16W
M0_DDR_A15 NC_5 VDD_7 M0_DDR_A15 NC_5 VDD_7
R1 R1 C430 0.1uF C459 0.1uF
VDD_8 VDD_8 M0_DDR_A2 M1_DDR_A2
M2 R9 M2 R9
M0_DDR_BA0 BA0 VDD_9 M0_DDR_BA0 BA0 VDD_9 M0_DDR_A5 M1_DDR_A5
N8 N8
M0_DDR_BA1 BA1 M0_DDR_BA1 BA1 M0_DDR_A3 M1_DDR_A3
M3 M3 C431 0.1uF C460 0.1uF
M0_DDR_BA2 BA2 M0_DDR_BA2 BA2 M0_DDR_A0 M1_DDR_A0
A1 A1
VDDQ_1 VDDQ_1 AR404 AR411
J7 A8 J7 A8
M0_D_CLK CK VDDQ_2 M0_D_CLK CK VDDQ_2 56 56
K7 C1 K7 C1 1/16W 1/16W
M0_D_CLKN CK VDDQ_3 M0_D_CLKN CK VDDQ_3 C432 0.1uF C461 0.1uF
K9 C9 K9 C9 M0_DDR_BA0 M1_DDR_BA0
M0_DDR_CKE CKE VDDQ_4 M0_DDR_CKE CKE VDDQ_4
D2 D2 M0_DDR_BA2 M1_DDR_BA2
VDDQ_5 VDDQ_5
L2 E9 L2 E9 M0_DDR_A15 M1_DDR_A15
M0_DDR_CS1 CS VDDQ_6 M0_DDR_CS2 CS VDDQ_6 C433 0.1uF C462 0.1uF
K1 F1 K1 F1 M0_DDR_A10 M1_DDR_A10
M0_DDR_ODT ODT VDDQ_7 M0_DDR_ODT ODT VDDQ_7
J3 H2 C410 0.1uF J3 H2 C440 0.1uF
M0_DDR_RASN RAS VDDQ_8 M0_DDR_RASN RAS VDDQ_8 AR405 AR412
K3 H9 C411 0.1uF K3 H9 C441 0.1uF 56 56
M0_DDR_CASN CAS VDDQ_9 M0_DDR_CASN CAS VDDQ_9 1/16W 1/16W
L3 L3
M0_DDR_WEN WE M0_DDR_WEN WE C434 0.1uF C463 0.1uF
J1 J1 M0_DDR_WEN M1_DDR_WEN
NC_1 NC_1
T2 J9 T2 J9 M0_DDR_CASN M1_DDR_CASN
M0_DDR_RESET_N RESET NC_2 M0_DDR_RESET_N RESET NC_2
IC100 L1 L1 M0_DDR_ODT M1_DDR_ODT
NC_3 NC_3 C435 0.1uF C464 0.1uF
LGE5332(LM14A) L9 L9 M0_DDR_RASN M1_DDR_RASN
NC_4 NC_4
F3 F3 AR406 AR413
M0_DDR_DQS0 DQSL SS_DDR3_4Gb_25n Hynix_DDR3_4Gb_25n M0_DDR_DQS2 DQSL SS_DDR3_4Gb_25n
Hynix_DDR3_4Gb_25n
G3 IC400-*1 IC400-*2 G3
IC401-*1
K4B4G1646D-BCMA IC401-*2 SS_DDR3_2Gb
IC401-*3
Hynix_DDR3_2Gb
IC401-*4
56 56
K4B4G1646D-BCMA H5TQ4G63CFR_RDC H5TQ4G63CFR_RDC
M0_DDR_DQS_N0 DQSL M0_DDR_DQS_N2 DQSL EAN63391401 K4B2G1646Q-BCMA H5TQ2G63FFR-RDC 1/16W 1/16W
EAN63391401 EAN63053202 N3 M8 EAN63053202
F17 H28 N3
P7
A0 VREFCA
M8 N3
P7
A0 VREFCA
M8 P7
A0
A1
VREFCA N3
P7
A0 VREFCA
M8
N3
EAN63667401
M8 N3
EAN63648701
M8
C436 0.1uF C465 0.1uF
M0_DDR_A0 IO[3]/A-A0[AB-A0]/A-A6 IO[75]/B-A0[CD-A0]/B-A6 M1_DDR_A0 C7 A9 P3
A1
A2
P3
A1
A2
C7 A9
P3
N2
A2
H1 P3
A1
A2
P7
A0
A1
VREFCA
P7
A0
A1
VREFCA
M0_DDR_CKE M1_DDR_CKE
C17 K31 M0_DDR_DQS1 DQSU
N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1
M0_DDR_DQS3
P8
A3
A4
VREFDQ N2
A3 VREFDQ
H1 P3
A2
P3
A2
M0_DDR_A1 IO[2]/A-A1[AB-A1]/A-A5 IO[80]/B-A1[CD-A1]/B-A5 M1_DDR_A1 VSS_1 P8

P2
A4
P8
P2
A4 DQSU VSS_1 P2
R8
A5
L8
P8
P2
A4
N2
P8
A3 VREFDQ
H1 N2
P8
A3 VREFDQ
H1
E17 J29 B7 B3 R8
A5
A6 ZQ
L8 R8
A5
A6 ZQ
L8 B7 B3 R2
A6
A7
ZQ R8
A5
A6 ZQ
L8 P2
A4
A5
P2
A4
A5
M0_DDR_A2 IO[8]/A-A2[AB-A2]/A-A8 M1_DDR_A2 M0_DDR_DQS_N1 DQSU VSS_2

R2
A7
R2
A7
M0_DDR_DQS_N3 DQSU VSS_2 T8
A8
R2
A7
R8
R2
A6 ZQ
L8 R8
R2
A6 ZQ
L8
M0_D_CLKN M1_D_CLKN
IO[83]/B-A2[CD-A2]/B-A8 E1
T8
R3
A8
B2
T8
R3
A8
B2
E1
R3
L7
A9 VDD_1
B2
D9
T8
R3
A8
B2 T8
A7
T8
A7
F18 K27 L7
A9 VDD_1
D9 L7
A9 VDD_1
D9 R7
A10/AP VDD_2
G7 L7
A9 VDD_1
D9 R3
A8
B2 R3
A8
B2
C437 0.1uF C466 0.1uF
M0_DDR_A3 IO[12]/A-A3[AB-A3]/A-A4 IO[79]/B-A3[CD-A3]/B-A4 M1_DDR_A3 VSS_3 R7
A10/AP
A11
VDD_2
VDD_3
G7 R7
A10/AP
A11
VDD_2
VDD_3
G7
VSS_3 N7
A11
A12/BC
VDD_3
VDD_4
K2 R7
A10/AP
A11
VDD_2
VDD_3
G7 L7
A9
A10/AP
VDD_1
VDD_2
D9 L7
A9
A10/AP
VDD_1
VDD_2
D9
M0_D_CLK M1_D_CLK
B18 K30 E7 G8 N7
T3
A12/BC VDD_4
K2
K8
N7
T3
A12/BC VDD_4
K2
K8 E7 G8 T3
A13 VDD_5
K8
N1
N7
T3
A12/BC VDD_4
K2
K8
R7
N7
A11
A12/BC
VDD_3
VDD_4
G7
K2
R7
N7
A11
A12/BC
VDD_3
VDD_4
G7
K2
M0_DDR_A4 M1_DDR_A4 M0_DDR_DM0 DML VSS_4

A13 VDD_5
VDD_6
N1 T7
A13
A14
VDD_5
VDD_6
N1
M0_DDR_DM2 DML VSS_4 M7
VDD_6
N9 T7
A13
A14
VDD_5
VDD_6
N1 T3
A13 VDD_5
K8 T3
A13 VDD_5
K8
IO[11]/A-A4[AB-A4]/A-BA1 IO[87]/B-A4[CD-A4]/B-BA1 D3 J2
M7
NC_5 VDD_7
N9
R1
M7
NC_5 VDD_7
N9
R1 D3 J2
NC_5 VDD_7
VDD_8
R1 M7
NC_5 VDD_7
N9
R1 M7
VDD_6
N1
N9
T7
M7
A14 VDD_6
N1
N9
E18 J28 M0_DDR_DM1 DMU
M2
VDD_8
R9 M2
VDD_8
R9
M0_DDR_DM3
M2
BA0 VDD_9
R9
M2
VDD_8
R9
NC_5 VDD_7
R1
NC_5 VDD_7
R1
M0_DDR_A5 IO[14]/A-A5[AB-A5]/A-A0 IO[86]/B-A5[CD-A5]/B-A0 M1_DDR_A5 VSS_5 N8

BA0 VDD_9
N8
BA0 VDD_9
DMU VSS_5 N8
M3
BA1 N8
BA0 VDD_9
M2
BA0
VDD_8
VDD_9
R9 M2
BA0
VDD_8
VDD_9
R9
A17 K32 J8 M3
BA1
BA2
A1
M3
BA1
BA2
A1
J8 J7
BA2
VDDQ_1
A1
A8
M3
BA1
BA2
A1
N8
M3
BA1
N8
M3
BA1
M0_DDR_A6 IO[10]/A-A6[AB-A6]/A-A1 IO[90]/B-A6[CD-A6]/B-A1 M1_DDR_A6 VSS_6 J7

CK
VDDQ_1
VDDQ_2
A8 J7
CK
VDDQ_1
VDDQ_2
A8
VSS_6 K7
CK
CK
VDDQ_2
VDDQ_3
C1 J7
CK
VDDQ_1
VDDQ_2
A8
BA2
VDDQ_1
A1
BA2
VDDQ_1
A1
D17 H31 E3 M1 K7
K9
CK VDDQ_3
C1
C9
K7
K9
CK VDDQ_3
C1
C9 E3 M1 K9
CKE VDDQ_4
C9
D2
K7
K9
CK VDDQ_3
C1
C9
J7
K7
CK
CK
VDDQ_2
VDDQ_3
A8
C1
J7
K7
CK
CK
VDDQ_2
VDDQ_3
A8
C1
M0_DDR_A7 M1_DDR_A7 M0_DDR_DQ0 DQL0 VSS_7

CKE VDDQ_4
VDDQ_5
D2
CKE VDDQ_4
VDDQ_5
D2
M0_DDR_DQ16 DQL0 VSS_7 L2
VDDQ_5
E9
CKE VDDQ_4
VDDQ_5
D2 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9
IO[13]/A-A7[AB-A7]/A-A2 IO[78]/B-A7[CD-A7]/B-A2 F7 M9
L2
K1
CS VDDQ_6
E9
F1
L2
K1
CS VDDQ_6
E9
F1 F7 M9
K1
CS
ODT
VDDQ_6
VDDQ_7
F1 L2
K1
CS VDDQ_6
E9
F1 L2
VDDQ_5
D2
E9 L2
VDDQ_5
D2
E9
C16 J32 M0_DDR_DQ1 DQL1
J3
ODT VDDQ_7
H2 J3
ODT VDDQ_7
H2
M0_DDR_DQ17
J3
RAS VDDQ_8
H2
J3
ODT VDDQ_7
H2 K1
CS VDDQ_6
F1 K1
CS VDDQ_6
F1
M0_DDR_A8 IO[0]/A-A8[AB-A8]/A-A9 IO[77]/B-A8[CD-A8]/B-A9 M1_DDR_A8 VSS_8 K3

RAS VDDQ_8
H9 K3
RAS VDDQ_8
H9 DQL1 VSS_8 K3
L3
CAS VDDQ_9
H9
K3
RAS VDDQ_8
H9 J3
ODT VDDQ_7
H2 J3
ODT VDDQ_7
H2
AVDD_DDR
E16 G30 F2 P1 L3
CAS
WE
VDDQ_9
J1
L3
CAS
WE
VDDQ_9
J1
F2 P1 T2
WE
NC_1
J1
J9
L3
CAS
WE
VDDQ_9
J1
K3
L3
RAS
CAS
VDDQ_8
VDDQ_9
H9 K3
L3
RAS
CAS
VDDQ_8
VDDQ_9
H9
M0_DDR_CKE
M0_DDR_A9 M1_DDR_A9 M0_DDR_DQ2 DQL2 VSS_9 T2
NC_1
J9 T2
NC_1
J9 M0_DDR_DQ18 DQL2 VSS_9 RESET NC_2
L1 T2
NC_1
J9
WE
J1
WE
J1
IO[5]/A-A9[AB-A9]/A-A11 IO[73]/B-A9[CD-A9]/B-A11 F8 P9
RESET NC_2
NC_3
L1
RESET NC_2
NC_3
L1
F8 P9
NC_3
L9
RESET NC_2
NC_3
L1 T2
RESET
NC_1
NC_2
J9 T2
RESET
NC_1
NC_2
J9
B19 L30 M0_DDR_DQ3 DQL3

NC_4
L9
NC_4
L9
M0_DDR_DQ19
F3
DQSL
NC_4
NC_6
T7
NC_4
L9
NC_3
L1
NC_3
L1
M0_DDR_A10 IO[9]/A-A10[AB-A10]/A-RASZ IO[93]/B-A10[CD-A10]/B-RASZ M1_DDR_A10 VSS_10 F3

G3
DQSL NC_6
T7 F3
G3
DQSL DQL3 VSS_10 G3
DQSL
F3
G3
DQSL
F3
NC_4
L9
T7 F3
NC_4
L9
H3 T1
1K
R418
B17 J30
DQSL DQSL
H3 T1 C7
DQSU VSS_1
A9
DQSL
G3
DQSL
DQSL
NC_6
G3
DQSL
DQSL
M0_DDR_DQ4 AVDD_DDR
OPT
C7 A9 C7 A9
M0_DDR_DQ20 C7 A9
1K
R405
M0_DDR_A11 IO[6]/A-A11[AB-A11]/A-A7 IO[84]/B-A11[CD-A11]/B-A7 M1_DDR_A11 DQL4 VSS_11 B7
DQSU VSS_1
B3 B7
DQSU VSS_1
B3 DQL4 VSS_11 B7
DQSU VSS_2
B3
E1 B7
DQSU VSS_1
B3 C7
DQSU VSS_1
A9 C7
DQSU VSS_1
A9
AVDD_DDR
D20 L29 H8 T9 E7
DQSU VSS_2
VSS_3
E1
G8 E7
DQSU VSS_2
VSS_3
E1
G8
H8 T9 E7
D3
DML
VSS_3
VSS_4
G8
J2 E7
DQSU VSS_2
VSS_3
E1
G8
B7
DQSU VSS_2
B3
E1
B7
DQSU VSS_2
B3
E1
M0_DDR_A12 IO[26]/A-A12[AB-A12]/A-BG0 M1_DDR_A12 M0_DDR_DQ5 DQL5 VSS_12 D3

DML VSS_4
J2 D3
DML VSS_4
J2 M0_DDR_DQ21 DQL5 VSS_12 DMU VSS_5
J8 D3
DML VSS_4
J2 E7
VSS_3
G8 E7
VSS_3
G8
IO[85]/B-A12[CD-A12]/B-BG0 G2
DMU VSS_5
VSS_6
J8
DMU VSS_5
VSS_6
J8
G2 E3
VSS_6
M1
DMU VSS_5
VSS_6
J8 D3
DML
DMU
VSS_4
VSS_5
J2 D3
DML
DMU
VSS_4
VSS_5
J2
F16 G31 M0_DDR_DQ6 DQL6

E3
DQL0 VSS_7
M1 E3
DQL0 VSS_7
M1
M0_DDR_DQ22
F7
DQL0
DQL1
VSS_7
VSS_8
M9 E3
DQL0 VSS_7
M1
VSS_6
J8
VSS_6
J8
M0_1_DDR_VREFDQ
M0_DDR_A13 IO[4]/A-A13[AB-A13]/A-PARITY IO[74]/B-A13[CD-A13]/B-PARITY M1_DDR_A13
F7
F2
DQL1 VSS_8
M9
P1
F7
F2
DQL1 VSS_8
M9
P1 DQL6 F2
F8
DQL2 VSS_9
P1
P9
F7
F2
DQL1 VSS_8
M9
P1
E3
F7
DQL0 VSS_7
M1
M9
E3
F7
DQL0 VSS_7
M1
M9
B16 J31 H7 F8
DQL2
DQL3
VSS_9
VSS_10
P9 F8
DQL2
DQL3
VSS_9
VSS_10
P9 H7 H3
DQL3
DQL4
VSS_10
VSS_11
T1 F8
DQL2
DQL3
VSS_9
VSS_10
P9 F2
DQL1
DQL2
VSS_8
VSS_9
P1 F2
DQL1
DQL2
VSS_8
VSS_9
P1
M0_DDR_VREFDQ M0_DDR_RESET_N
M0_DDR_A14 IO[7]/A-A14[AB-A14]/A-A13 M1_DDR_A14 M0_DDR_DQ7 DQL7
H3
DQL4 VSS_11
T1 H3
DQL4 VSS_11
T1
M0_DDR_DQ23 DQL7 H8
DQL5 VSS_12
T9 H3
DQL4 VSS_11
T1 F8
H3
DQL3 VSS_10
P9
T1
F8
H3
DQL3 VSS_10
P9
T1
IO[81]/B-A14[CD-A14]/B-A13 B1
H8
G2
DQL5 VSS_12
T9 H8
G2
DQL5 VSS_12
T9
B1
G2
H7
DQL6
H8
G2
DQL5 VSS_12
T9
H8
DQL4 VSS_11
T9 H8
DQL4 VSS_11
T9
E20 M28 DQL5 VSS_12 DQL5 VSS_12
R416
DQL6 DQL6 DQL6
1K 1%
H7 H7 DQL7 H7 G2 G2
B1
M0_DDR_A15 VSSQ_1 DQL7 DQL7

VSSQ_1 VSSQ_1 DQL7 DQL6 DQL6
R410
1K 1%
B1 B1 B1 H7 H7
IO[19]/A-A15[AB-A15]/A-A3 IO[96]/B-A15[CD-A15]/B-A3 M1_DDR_A15 D7 B9 D7

DQU0
VSSQ_1
VSSQ_2
B9 D7
DQU0
VSSQ_1
VSSQ_2
B9
D7 B9
D7
C3
DQU0 VSSQ_2
B9
D1 D7
DQU0
VSSQ_1
VSSQ_2
B9
DQL7
VSSQ_1
B1
DQL7
VSSQ_1
B1 1%
E19 L28 M0_DDR_DQ8 DQU0
C3
DQU1 VSSQ_3
D1 C3
DQU1 VSSQ_3
D1
M0_DDR_DQ24
C8
DQU1
DQU2
VSSQ_3
VSSQ_4
D8 C3
DQU1 VSSQ_3
D1 D7
DQU0 VSSQ_2
B9 D7
DQU0 VSSQ_2
B9
10K
M0_DDR_BA0 IO[24]/A-BA0[AB-BA0]/A-A10 IO[88]/B-BA0[CD-BA0]/B-A10 M1_DDR_BA0 VSSQ_2 C8
C2
DQU2 VSSQ_4
D8
E2
C8
C2
DQU2 VSSQ_4
D8
E2 DQU0 VSSQ_2 C2
A7
DQU3 VSSQ_5
E2
E8
C8
C2
DQU2 VSSQ_4
D8
E2
C3
C8
DQU1 VSSQ_3
D1
D8
C3
C8
DQU1 VSSQ_3
D1
D8
C18 L31 C3 D1 A7
DQU3
DQU4
VSSQ_5
VSSQ_6
E8 A7
DQU3
DQU4
VSSQ_5
VSSQ_6
E8 C3 D1 A2
DQU4
DQU5
VSSQ_6
VSSQ_7
F9 A7
DQU3
DQU4
VSSQ_5
VSSQ_6
E8 C2
DQU2
DQU3
VSSQ_4
VSSQ_5
E2 C2
DQU2
DQU3
VSSQ_4
VSSQ_5
E2
R445
M0_DDR_BA1 M1_DDR_BA1 M0_DDR_DQ9 DQU1 VSSQ_3
A2
DQU5 VSSQ_7
F9 A2
DQU5 VSSQ_7
F9
M0_DDR_DQ25 DQU1 VSSQ_3 B8
DQU6 VSSQ_8
G1 A2
DQU5 VSSQ_7
F9 A7
A2
DQU4 VSSQ_6
E8
F9
A7
A2
DQU4 VSSQ_6
E8
F9
IO[20]/A-BA1[AB-BA1]/A-CASZ IO[92]/B-BA1[CD-BA1]/B-CASZ C8 D8
B8
A3
DQU6 VSSQ_8
G1
G9
B8
A3
DQU6 VSSQ_8
G1
G9
C8 D8
A3
DQU7 VSSQ_9
G9 B8
A3
DQU6 VSSQ_8
G1
G9 B8
DQU5 VSSQ_7
G1 B8
DQU5 VSSQ_7
G1
F19 K28 M0_DDR_DQ10 DQU2

DQU7 VSSQ_9 DQU7 VSSQ_9
M0_DDR_DQ26
DQU7 VSSQ_9
A3
DQU6 VSSQ_8
G9 A3
DQU6 VSSQ_8
G9
M0_DDR_BA2 IO[21]/A-BA2[AB-BA2]/A-BA0 IO[82]/B-BA2[CD-BA2]/B-BA0 M1_DDR_BA2 VSSQ_4 DQU2 VSSQ_4 DQU7 VSSQ_9 DQU7 VSSQ_9
C479
G22 N28 C2 E2 C2 E2 C472 M0_D_CLK
1%
M0_DDR_RASN M1_DDR_RASN M0_DDR_DQ11 DQU3 VSSQ_5 M0_DDR_DQ27 DQU3 VSSQ_5 0.1uF
1%
IO[15]/A-RASZ[AB-RASZ]/A-ODT IO[97]/B-RASZ[CD-RASZ]/B-ODT A7 E8 A7 E8 0.1uF C483 R412
F21 N27
R417
M0_DDR_DQ12 DQU4 VSSQ_6 M0_DDR_DQ28 DQU4 VSSQ_6 C474 56 C477
R411
M0_DDR_CASN IO[17]/A-CASZ[AB-CASZ]/A-WEZ IO[94]/B-CASZ[CD-CASZ]/B-WEZ M1_DDR_CASN A2 F9 A2 F9 1000pF 0.01uF
E21 L27 M0_DDR_DQ13 DQU5 M0_DDR_DQ29 1000pF 50V 1%
M0_DDR_WEN M1_DDR_WEN VSSQ_7 DQU5 VSSQ_7
1K
IO[16]/A-WEZ[AB-WEZ]/A-A12 IO[89]/B-WEZ[CD-WEZ]/B-A12 B8 G1 B8 G1 50V 50V
1K
F20 M27 M0_DDR_DQ14 DQU6 M0_DDR_DQ30
M0_DDR_ODT IO[25]/A-ODT[AB-ODT]/A-ACTZ IO[95]/B-ODT[CD-ODT]/B-ACTZ M1_DDR_ODT VSSQ_8 DQU6 VSSQ_8
C19 M31 A3 G9 A3 G9 R413
M0_DDR_CKE IO[18]/A-CKE[AB-CKE]/A-CKE M1_DDR_CKE M0_DDR_DQ15 DQU7 VSSQ_9 SS_DDR3_2Gb Hynix_DDR3_2Gb M0_DDR_DQ31 DQU7 VSSQ_9 56
IO[91]/B-CKE[CD-CKE]/B-CKE IC400-*3
K4B2G1646Q-BCMA
IC400-*4
H5TQ2G63FFR-RDC
F15 G32 1%
M0_DDR_RESET_N IO[1]/A-RST[AB-RST]/A-RST IO[76]/B-RST[CD-RST]/B-RST M1_DDR_RESET_N N3
EAN63667401
M8 N3
EAN63648701
M8
A20 N32 P7
A0
A1
VREFCA
P7
A0
A1
VREFCA
M0_D_CLK IO[28]/A-MCLK[AB-MCLK]/A-MCLKZ IO[101]/B-MCLK[CD-MCLK]/B-MCLKZ M1_D_CLK P3

N2
A2
H1
P3
N2
A2
H1
B20 M30 P8
P2
A3
A4
VREFDQ
P8
P2
A3
A4
VREFDQ
M0_D_CLKN
M0_D_CLKN IO[27]/A-MCLKZ[AB-MCLKZ]/A-MCLK IO[100]/B-MCLKZ[CD-MCLKZ]/B-MCLK M1_D_CLKN R8
A5
A6 ZQ
L8 R8
A5
A6 ZQ
L8
E15 G29 R2
T8
A7
R2
T8
A7
M0_DDR_CS1 IO[23]/A-CSB1[AB-CSB1]/A-CSB1 IO[99]/B-CSB1[CD-CSB1]/B-CSB1 M1_DDR_CS1 R3

L7
A8
A9 VDD_1
B2
D9
R3
L7
A8
A9 VDD_1
B2
D9
D15 F32 R7
A10/AP
A11
VDD_2
VDD_3
G7 R7
A10/AP
A11
VDD_2
VDD_3
G7
M0_DDR_CS2 IO[22]/A-CSB2[AB-CSB2]/A-CSB2 IO[98]/B-CSB2[CD-CSB2]/B-CSB2 M1_DDR_CS2 N7

T3
A12/BC VDD_4
K2
K8
N7
T3
A12/BC VDD_4
K2
K8
M7
A13
NC_5
VDD_5
VDD_6
VDD_7
N1
N9
T7
M7
A13
A14
NC_5
VDD_5
VDD_6
VDD_7
N1
N9 AVDD_DDR M1_DDR_CKE
R1 R1
VDD_8 VDD_8
M2 R9 M2 R9
BA0 VDD_9 BA0 VDD_9
N8 N8
BA1 BA1
M3 M3
BA2 BA2
A1 A1
C23 T31 J7
CK
VDDQ_1
VDDQ_2
A8 J7
CK
VDDQ_1
VDDQ_2
A8
M0_DDR_DQ0 M1_DDR_DQ0 K7 C1 K7 C1
AVDD_DDR
1K
R433
IO[47]/A-DQ[0][A-DQL0]/A-DQ[0] IO[120]/B-DQ[0][C-DQL0]/B-DQ[0] K9
CK VDDQ_3
C9 K9
CK VDDQ_3
C9 AVDD_DDR
B22 P30 CKE VDDQ_4
VDDQ_5
D2
CKE VDDQ_4
VDDQ_5
D2
M0_DDR_DQ1 IO[31]/A-DQ[1][A-DQL1]/A-DQ[1] IO[104]/B-DQ[1][C-DQL1]/B-DQ[1] M1_DDR_DQ1 L2 E9 L2 E9
+1.5V_Bypass Cap
CS VDDQ_6 CS VDDQ_6
K1 F1 K1 F1
OPT
1K
R422
+1.5V_Bypass Cap
ODT VDDQ_7 ODT VDDQ_7
B24 T30 J3
K3
RAS VDDQ_8
H2
H9
J3
K3
RAS VDDQ_8
H2
H9
M1_1_DDR_VREFDQ
M0_DDR_DQ2 IO[48]/A-DQ[2][A-DQL2]/A-DQ[2] IO[121]/B-DQ[2][C-DQL2]/B-DQ[2] M1_DDR_DQ2 L3
CAS
WE
VDDQ_9
L3
CAS
WE
VDDQ_9
C21 P31 NC_1

J1
NC_1
J1
M1_DDR_VREFDQ
M0_DDR_DQ3
B25
IO[29]/A-DQ[3][A-DQL3]/A-DQ[3] IO[102]/B-DQ[3][C-DQL3]/B-DQ[3]
U30
M1_DDR_DQ3 Close to DDR Power Pin T2
F3
RESET NC_2
NC_3
NC_4
J9
L1
L9
T7
T2
F3
RESET NC_2
NC_3
NC_4
J9
L1
L9
Close to DDR Power Pin
R414
1K 1%
DQSL NC_6 DQSL
R408
1K 1%
M0_DDR_DQ4 IO[50]/A-DQ[4][A-DQL4]/A-DQ[6] IO[123]/B-DQ[4][C-DQL4]/B-DQ[6] M1_DDR_DQ4 G3
DQSL
G3
DQSL
M1_DDR_RESET_N
C20 N31 C7
B7
DQSU VSS_1
A9
B3
C7
B7
DQSU VSS_1
A9
B3
M0_DDR_DQ5 IO[30]/A-DQ[5][A-DQL5]/A-DQ[7] IO[105]/B-DQ[5][C-DQL5]/B-DQ[7] M1_DDR_DQ5 E7
DQSU VSS_2
VSS_3
E1
G8 E7
DQSU VSS_2
VSS_3
E1
G8
C24 U31
R446
DML VSS_4 DML VSS_4
D3 J2 D3 J2
DMU VSS_5 DMU VSS_5
M0_DDR_DQ6 M1_DDR_DQ6
10K
J8 J8
IO[49]/A-DQ[6][A-DQL6]/A-DQ[4] IO[122]/B-DQ[6][C-DQL6]/B-DQ[4] E3
VSS_6
M1 E3
VSS_6
M1
1%
B21 N30 F7
DQL0
DQL1
VSS_7
VSS_8
M9 F7
DQL0
DQL1
VSS_7
VSS_8
M9
AVDD_DDR
M0_DDR_DQ7 IO[32]/A-DQ[7][A-DQL7]/A-DQ[5] IO[103]/B-DQ[7][C-DQL7]/B-DQ[5] M1_DDR_DQ7 AVDD_DDR
F2
F8
DQL2
DQL3
VSS_9
VSS_10
P1
P9
F2
F8
DQL2
DQL3
VSS_9
VSS_10
P1
P9
C22 R31 H3
H8
DQL4 VSS_11
T1
T9
H3
H8
DQL4 VSS_11
T1
T9 C516 C518
1%
M0_DDR_DM0 M1_DDR_DM0 DQL5 VSS_12 DQL5 VSS_12
1%
IO[33]/A-DQM[0][A-DML]/A-DQM[0] IO[106]/B-DQM[0][C-DML]/B-DQM[0] G2
H7
DQL6
G2
H7
DQL6
0.1uF 0.1uF
A23 T32 DQL7
B1
DQL7
B1 C519 M1_D_CLK
R415
C517
R409
VSSQ_1 VSSQ_1
M0_DDR_DQS0 IO[42]/A-DQS[0][A-DQSL]/A-DQS[0] IO[115]/B-DQS[0][C-DQSL]/B-DQS[0] M1_DDR_DQS0 D7
C3
DQU0 VSSQ_2
B9
D1
D7
C3
DQU0 VSSQ_2
B9
D1
1000pF R427
B23 R30 C8
C2
DQU1
DQU2
VSSQ_3
VSSQ_4
D8
E2
C8
C2
DQU1
DQU2
VSSQ_3
VSSQ_4
D8
E2
1000pF C497
M0_DDR_DQS_N0 IO[41]/A-DQSB[0][A-DQSLB]/A-DQSB[0] IO[114]/B-DQSB[0][C-DQSLB]/B-DQSB[0] M1_DDR_DQS_N0 A7
DQU3 VSSQ_5
E8 A7
DQU3 VSSQ_5
E8
50V 50V 56
1K
0.01uF
1K
A2 F9 A2 F9
B8
A3
DQU6
DQU7
VSSQ_8
VSSQ_9
G1
G9
B8
A3
DQU6
DQU7
VSSQ_8
VSSQ_9
G1
G9 1% 50V
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
D23 P27 R428

M0_DDR_DQ8 IO[35]/A-DQ[8][A-DQU0]/A-DQ[15] IO[109]/B-DQ[8][C-DQU0]/B-DQ[15] M1_DDR_DQ8 56
D26 U29 1%
M0_DDR_DQ9 IO[45]/A-DQ[9][A-DQU1]/A-DQ[10] IO[116]/B-DQ[9][C-DQU1]/B-DQ[10] M1_DDR_DQ9
E22 P28
C403
C404
C405
C400
C401
C402
D27 U27 M1_D_CLKN

M0_DDR_DQ11 IO[46]/A-DQ[11][A-DQU3]/A-DQM[1] IO[119]/B-DQ[11][C-DQU3]/B-DQM[1] M1_DDR_DQ11
F23 R28
E26 V28
D22 P29
E25 U28
E24 T28
M0_DDR_DM1 IO[37]/A-DQM[1][A-DMU]/A-DQ[14] IO[110]/B-DQM[1][C-DMU]/B-DQ[14] M1_DDR_DM1
D24 T27
M0_DDR_DQS1 IO[40]/A-DQS[1][A-DQSU]/A-DQS[1] IO[113]/B-DQS[1][C-DQSU]/B-DQS[1] M1_DDR_DQS1
E23 R27
M0_DDR_DQS_N1 IO[39]/A-DQSB[1][A-DQSUB]/A-DQSB[1] IO[112]/B-DQSB[1][C-DQSUB]/B-DQSB[1] M1_DDR_DQS_N1
M1_DDR_VREFDQ Hynix_DDR3_4Gb_29n
Hynix_DDR3_4Gb_29n M1_1_DDR_VREFDQ
C28 AA31 IC403 IC404
M0_DDR_DQ16 IO[69]/A-DQ[16][B-DQL0]/A-DQ[16] IO[145]/B-DQ[16][D-DQL0]/B-DQ[16] M1_DDR_DQ16 H5TQ4G63AFR-RDC H5TQ4G63AFR-RDC
C26 W31
M0_DDR_DQ17 IO[53]/A-DQ[17][B-DQL1]/A-DQ[17] IO[126]/B-DQ[17][D-DQL1]/B-DQ[17] M1_DDR_DQ17
B29 AA30
M0_DDR_DQ18 IO[70]/A-DQ[18][B-DQL2]/A-DQ[18] IO[143]/B-DQ[18][D-DQL2]/B-DQ[18] M1_DDR_DQ18 EAN63053201 EAN63053201
A26 W32
M0_DDR_DQ19 IO[54]/A-DQ[19][B-DQL3]/A-DQ[19] IO[127]/B-DQ[19][D-DQL3]/B-DQ[19] M1_DDR_DQ19
C29 AB31 M1_DDR_A0
N3
A0 DDR3 VREFCA
M8
M1_DDR_A0
N3
A0
DDR3 VREFCA
M8
M0_DDR_DQ20 IO[72]/A-DQ[20][B-DQL4]/A-DQ[22] IO[142]/B-DQ[20][D-DQL4]/B-DQ[22] M1_DDR_DQ20 P7 P7 4Gbit
M0_DDR_DQ21
C25
IO[52]/A-DQ[21][B-DQL5]/A-DQ[23] IO[124]/B-DQ[21][D-DQL5]/B-DQ[23]
V31
M1_DDR_DQ21 M1_DDR_A1 A1 4Gbit M1_DDR_A1 A1
P3 P3
M0_DDR_DQ22
A29
IO[71]/A-DQ[22][B-DQL6]/A-DQ[20] IO[144]/B-DQ[22][D-DQL6]/B-DQ[20]
AB32
M1_DDR_DQ22 M1_DDR_A2 A2 (x16) M1_DDR_A2 A2 (x16)
B26 V30 N2 H1 N2 H1
M0_DDR_DQ23 M1_DDR_DQ23 M1_DDR_A3 A3 VREFDQ M1_DDR_A3 A3 VREFDQ
IO[51]/A-DQ[23][B-DQL7]/A-DQ[21] IO[125]/B-DQ[23][D-DQL7]/B-DQ[21] P8 P8
B27 W30 M1_DDR_A4 A4 M1_DDR_A4
M0_DDR_DM2 IO[55]/A-DQM[2][B-DML]/A-DQM[2] IO[128]/B-DQM[2][D-DML]/B-DQM[2] M1_DDR_DM2 A4
B28 Y30 P2 P2
M0_DDR_DQS2 M1_DDR_DQS2 M1_DDR_A5 A5 M1_DDR_A5 A5
IO[64]/A-DQS[2][B-DQSL]/A-DQS[2] IO[137]/B-DQS[2][D-DQSL]/B-DQS[2] R8 L8 R404 R8 L8 R419
C27 Y31 M1_DDR_A6 240 M1_DDR_A6 240
M0_DDR_DQS_N2 IO[63]/A-DQSB[2]/[B-DQSLB]/A-DQSB[2] IO[136]/B-DQSB[2][D-DQSLB]/B-DQSB[2] M1_DDR_DQS_N2 A6 ZQ A6 ZQ
R2 AVDD_DDR R2

T8 T8 AVDD_DDR
E29 Y28 R3 B2 R3 B2
M0_DDR_DQ24 M1_DDR_DQ24 M1_DDR_A9 A9 VDD_1 M1_DDR_A9 A9 VDD_1
IO[58]/A-DQ[24][B-DQU0]/A-DQ[31] IO[131]/B-DQ[24][D-DQU0]/B-DQ[31] L7 D9 L7 D9
C31 AB27 M1_DDR_A10 A10/AP VDD_2 M1_DDR_A10
M0_DDR_DQ25 IO[67]/A-DQ[25][B-DQU1]/A-DQ[26] IO[141]/B-DQ[25][D-DQU1]/B-DQ[26] M1_DDR_DQ25 A10/AP VDD_2
R7 G7 R7 G7
E27 V27 M1_DDR_A11 A11 VDD_3 M1_DDR_A11

M0_DDR_DQ26 IO[56]/A-DQ[26][B-DQU2]/A-DQ[29] IO[130]_/B-DQ[26][D-DQU2]/B-DQ[29] M1_DDR_DQ26 A11 VDD_3
D31 AB29 N7 K2 N7 K2
M0_DDR_DQ27 M1_DDR_DQ27 M1_DDR_A12 A12/BC VDD_4 M1_DDR_A12 A12/BC VDD_4
IO[66]/A-DQ[27][B-DQU3]/A-DQM[3] IO[140]/B-DQ[27][D-DQU3]/B-DQM[3] T3 K8 T3 K8
D29 W28 M1_DDR_A13 A13 VDD_5 M1_DDR_A13
M0_DDR_DQ28 IO[59]/A-DQ[28][B-DQU4]/A-DQ[25] IO[129]/B-DQ[28][D-DQU4]/B-DQ[25] M1_DDR_DQ28 A13 VDD_5
D30 AB28 T7 N1 T7 N1
M0_DDR_DQ29 M1_DDR_DQ29 M1_DDR_A14 A14 VDD_6 M1_DDR_A14 A14 VDD_6
IO[65]/A-DQ[29][B-DQU5]/A-DQ[28] IO[139]/B-DQ[29][D-DQU5]/B-DQ[28] M7 N9 M7 N9
E28 W27 M1_DDR_A15 NC_5 VDD_7 M1_DDR_A15
M0_DDR_DQ30 IO[57]/A-DQ[30][B-DQU6]/A-DQ[27] IO[132]/B-DQ[30][D-DQU6]/B-DQ[27] M1_DDR_DQ30 NC_5 VDD_7
C30 AA27 R1 R1
M0_DDR_DQ31 IO[60]/A-DQ[31][B-DQU7]/A-DQ[24] IO[138]/B-DQ[31][D-DQU7]/B-DQ[24] M1_DDR_DQ31 VDD_8 VDD_8
B31 Y27 M2 R9 M2 R9
M0_DDR_DM3 M1_DDR_DM3 M1_DDR_BA0 BA0 VDD_9 M1_DDR_BA0 BA0 VDD_9
IO[68]/A-DQM[3][B-DMU]/A-DQ[30] IO[133]/B-DQM[3][D-DMU]/B-DQ[30] N8 N8
A31 AA28 M1_DDR_BA1 BA1 M1_DDR_BA1
M0_DDR_DQS3 IO[62]/A-DQS[3][B-DQSU]/A-DQS[3] IO[135]/B-DQS[3][D-DQSU]/B-DQS[3] M1_DDR_DQS3 BA1
B30 Y29 M3 M3
M0_DDR_DQS_N3 M1_DDR_DQS_N3 M1_DDR_BA2 BA2 M1_DDR_BA2 BA2
IO[61]/A-DQSB[3][B-DQSUB]/A-DQSB[3] IO[134]/B-DQSB[3][D-DQSUB]/B-DQSB[3] A1 A1
VDDQ_1 VDDQ_1
J7 A8 J7 A8
M1_D_CLK CK VDDQ_2 M1_D_CLK CK VDDQ_2
K7 C1 K7 C1
M1_D_CLKN CK VDDQ_3 M1_D_CLKN CK VDDQ_3
K9 C9 K9 C9
M1_DDR_CKE CKE VDDQ_4 M1_DDR_CKE CKE VDDQ_4
D2 D2
VDDQ_5 VDDQ_5
L2 E9 L2 E9
M1_DDR_CS1 CS VDDQ_6 M1_DDR_CS2 CS VDDQ_6
K1 F1 K1 F1
M1_DDR_ODT ODT VDDQ_7 M1_DDR_ODT ODT VDDQ_7
J3 H2 C468 0.1uF J3 H2 C490 0.1uF
M1_DDR_RASN RAS VDDQ_8 M1_DDR_RASN RAS VDDQ_8
K3 H9 C469 0.1uF K3 H9 C491 0.1uF
M1_DDR_CASN CAS VDDQ_9 M1_DDR_CASN CAS VDDQ_9
L3 L3
M1_DDR_WEN WE M1_DDR_WEN WE
J1 J1 * DDR_VTT
NC_1 NC_1
T2 J9 T2 J9
M1_DDR_RESET_N RESET NC_2 M1_DDR_RESET_N RESET NC_2
L1 L1
NC_3 NC_3
L9 L9 SS_DDR3_4Gb_25n
IC404-*1
Hynix_DDR3_4Gb_25n
IC404-*2
SS_DDR3_2Gb
IC404-*3
Hynix_DDR3_2Gb
IC404-*4
NC_4 NC_4 K4B4G1646D-BCMA H5TQ4G63CFR_RDC K4B2G1646Q-BCMA H5TQ2G63FFR-RDC
F3 F3 EAN63391401 EAN63053202 EAN63667401 EAN63648701
M1_DDR_DQS0 DQSL SS_DDR3_4Gb_25n

IC403-*1
Hynix_DDR3_4Gb_25n
IC403-*2
SS_DDR3_2Gb Hynix_DDR3_2Gb M1_DDR_DQS2 DQSL N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8
AVDD_DDR
G3 K4B4G1646D-BCMA H5TQ4G63CFR_RDC
IC403-*3
K4B2G1646Q-BCMA
IC403-*4
H5TQ2G63FFR-RDC G3 P7
P3
A1
A2
P7
P3
A1
A2
P7
P3
A1
A2
P7
P3
A1
A2
+3.3V_NORMAL
M1_DDR_DQS_N0 DQSL EAN63391401 EAN63053202 EAN63667401 EAN63648701 M1_DDR_DQS_N2 DQSL N2
P8
A3
A4
VREFDQ
H1 N2
P8
A3
A4
VREFDQ
H1 N2
P8
A3
A4
VREFDQ
H1 N2
P8
A3
A4
VREFDQ
H1
N3 M8 N3 M8 N3 M8 N3 M8 P2 P2 P2 P2
A0 VREFCA A0 VREFCA A0 VREFCA A0 VREFCA A5 A5 A5 A5
P7 P7 P7 P7 R8 L8 R8 L8 R8 L8 R8 L8
C7 A9
P3
N2
P8
A1
A2
A3 VREFDQ
H1
P3
N2
P8
A1
A2
A3 VREFDQ
H1
P3
N2
P8
A1
A2
A3 VREFDQ
H1
P3
N2
P8
A1
A2
A3 VREFDQ
H1
C7 A9
R2
T8
R3
A6
A7
A8
ZQ
B2
R2
T8
R3
A6
A7
A8
ZQ
B2
R2
T8
R3
A6
A7
A8
ZQ
B2
R2
T8
R3
A6
A7
A8
ZQ
B2
IC402
M1_DDR_DQS1 DQSU VSS_1 P2
R8
A4
A5
L8
P2
R8
A4
A5
L8
P2
A4
A5
P2
A4
A5 M1_DDR_DQS3 DQSU VSS_1 L7
A9
A10/AP
VDD_1
VDD_2
D9 L7
A9
A10/AP
VDD_1
VDD_2
D9 L7
A9
A10/AP
VDD_1
VDD_2
D9 L7
A9
A10/AP
VDD_1
VDD_2
D9
AP2303MPTR-G1 [EP]
B7 B3 R2
A6
A7
ZQ
R2
A6
A7
ZQ
R8
R2
A6
A7
ZQ
L8 R8
R2
A6
A7
ZQ
L8
B7 B3 R7
N7
A11
A12/BC
VDD_3
VDD_4
G7
K2
R7
N7
A11
A12/BC
VDD_3
VDD_4
G7
K2
R7
N7
A11
A12/BC
VDD_3
VDD_4
G7
K2
R7
N7
A11
A12/BC
VDD_3
VDD_4
G7
K2
M1_DDR_DQS_N1 DQSU VSS_2 T8 T8 T8 T8

M1_DDR_DQS_N3 DQSU VSS_2 T3 K8 T3 K8 T3 K8 T3 K8
CIS21J121
A8 A8 A8 A8 A13 VDD_5 A13 VDD_5 A13 VDD_5 A13 VDD_5
R3 B2 R3 B2 R3 B2 R3 B2 N1 T7 N1 N1 T7 N1
E1 L7
R7
A9
A10/AP
VDD_1
VDD_2
D9
G7
L7
R7
A9
A10/AP
VDD_1
VDD_2
D9
G7
L7
R7
A9
A10/AP
VDD_1
VDD_2
D9
G7
L7
R7
A9
A10/AP
VDD_1
VDD_2
D9
G7
E1 M7
NC_5
VDD_6
VDD_7
N9
R1
M7
A14
NC_5
VDD_6
VDD_7
N9
R1
M7
NC_5
VDD_6
VDD_7
N9
R1
M7
A14
NC_5
VDD_6
VDD_7
N9
R1
VSS_3 N7
A11 VDD_3
K2 N7
A11 VDD_3
K2 N7
A11 VDD_3
K2 N7
A11 VDD_3
K2 VSS_3 M2
VDD_8
R9 M2
VDD_8
R9 M2
VDD_8
R9 M2
VDD_8
R9
C544
L401
A12/BC VDD_4 A12/BC VDD_4 A12/BC VDD_4 A12/BC VDD_4 BA0 VDD_9 BA0 VDD_9 BA0 VDD_9 BA0 VDD_9
E7 G8 T3
A13 VDD_5
K8
N1
T3
T7
A13 VDD_5
K8
N1
T3
A13 VDD_5
K8
N1
T3
T7
A13 VDD_5
K8
N1
E7 G8 N8
M3
BA1
N8
M3
BA1
N8
M3
BA1
N8
M3
BA1
VIN NC_3
M1_DDR_DM0 DML VSS_4 M7
NC_5
VDD_6
VDD_7
N9
R1
M7
A14
NC_5
VDD_6
VDD_7
N9
R1
M7
NC_5
VDD_6
VDD_7
N9 M7
A14
NC_5
VDD_6
VDD_7
N9
M1_DDR_DM2 DML VSS_4 BA2
VDDQ_1
A1
BA2
VDDQ_1
A1
BA2
VDDQ_1
A1
BA2
VDDQ_1
A1
1 8 10uF
D3 J2 M2
BA0
VDD_8
VDD_9
R9 M2
BA0
VDD_8
VDD_9
R9 M2
BA0
VDD_8
VDD_9
R1
R9 M2
BA0
VDD_8
VDD_9
R1
R9 D3 J2 J7
K7
CK
CK
VDDQ_2
VDDQ_3
A8
C1
J7
K7
CK
CK
VDDQ_2
VDDQ_3
A8
C1
J7
K7
CK
CK
VDDQ_2
VDDQ_3
A8
C1
J7
K7
CK
CK
VDDQ_2
VDDQ_3
A8
C1
10V
M1_DDR_DM1 DMU VSS_5 N8 N8 N8 N8
M1_DDR_DM3 DMU VSS_5 K9 C9 K9 C9 K9 C9 K9 C9
C421
THERMAL
BA1 BA1 BA1 BA1 CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4
M3 M3 M3 M3 D2 D2 D2 D2
J8 J7
BA2
VDDQ_1
A1
A8 J7
BA2
VDDQ_1
A1
A8 J7
BA2
VDDQ_1
A1
A8 J7
BA2
VDDQ_1
A1
A8
J8 L2
K1
CS
VDDQ_5
VDDQ_6
E9
F1
L2
K1
CS
VDDQ_5
VDDQ_6
E9
F1
L2
K1
CS
VDDQ_5
VDDQ_6
E9
F1
L2
K1
CS
VDDQ_5
VDDQ_6
E9
F1 10uF
VSS_6 K7
CK
CK
VDDQ_2
VDDQ_3
C1 K7
CK
CK
VDDQ_2
VDDQ_3
C1 K7
CK
CK
VDDQ_2
VDDQ_3
C1 K7
CK
CK
VDDQ_2
VDDQ_3
C1 VSS_6 J3
ODT
RAS
VDDQ_7
VDDQ_8
H2 J3
ODT
RAS
VDDQ_7
VDDQ_8
H2 J3
ODT
RAS
VDDQ_7
VDDQ_8
H2 J3
ODT
RAS
VDDQ_7
VDDQ_8
H2
GND NC_2
9
E3 M1 K9
CKE VDDQ_4
C9
D2
K9
CKE VDDQ_4
C9
D2
K9
CKE VDDQ_4
C9
D2
K9
CKE VDDQ_4
C9
D2
E3 M1 K3
L3
CAS VDDQ_9
H9 K3
L3
CAS VDDQ_9
H9 K3
L3
CAS VDDQ_9
H9 K3
L3
CAS VDDQ_9
H9
10V 2 7
M1_DDR_DQ0 DQL0 VSS_7 L2
K1
CS
VDDQ_5
VDDQ_6
E9
F1
L2
K1
CS
VDDQ_5
VDDQ_6
E9
F1
L2
CS
VDDQ_5
VDDQ_6
E9 L2
CS
VDDQ_5
VDDQ_6
E9
M1_DDR_DQ16 DQL0 VSS_7 WE
NC_1
J1
WE
NC_1
J1
WE
NC_1
J1
WE
NC_1
J1
F7 M9 J3
ODT
RAS
VDDQ_7
VDDQ_8
H2 J3
ODT
RAS
VDDQ_7
VDDQ_8
H2
K1
J3
ODT
RAS
VDDQ_7
VDDQ_8
F1
H2
K1
J3
ODT
RAS
VDDQ_7
VDDQ_8
F1
H2 F7 M9 T2
RESET NC_2
NC_3
J9
L1
T2
RESET NC_2
NC_3
J9
L1
T2
RESET NC_2
NC_3
J9
L1
T2
RESET NC_2
NC_3
J9
L1 DDR_VTT
M1_DDR_DQ1 DQL1 VSS_8 K3
L3
CAS VDDQ_9
H9 K3
L3
CAS VDDQ_9
H9 K3
L3
CAS VDDQ_9
H9 K3
L3
CAS VDDQ_9
H9
M1_DDR_DQ17 DQL1 VSS_8 F3
NC_4
L9
T7 F3
NC_4
L9
F3
NC_4
L9
T7 F3
NC_4
L9
R443
F2 P1 WE
NC_1
J1
WE
NC_1
J1 WE
J1
WE
J1
F2 P1 G3
DQSL NC_6
G3
DQSL
G3
DQSL NC_6
G3
DQSL
VREFEN VCNTL
M1_DDR_DQ2 DQL2 VSS_9
T2
RESET NC_2
J9
L1
T2
RESET NC_2
J9
L1
T2
RESET
NC_1
NC_2
J9 T2
RESET
NC_1
NC_2
J9
M1_DDR_DQ18 DQL2 VSS_9
DQSL DQSL DQSL DQSL
10K
F8 P9
NC_3
L9
NC_3
L9 NC_3
L1
L9
NC_3
L1
L9
F8 P9
C7
B7
DQSU VSS_1
A9
B3
C7
B7
DQSU VSS_1
A9
B3
C7
B7
DQSU VSS_1
A9
B3
C7
B7
DQSU VSS_1
A9
B3 3 6
CIS21J121
NC_4 NC_4 NC_4 NC_4 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2
F3 T7 F3 F3 T7 F3 E1 E1 E1 E1
M1_DDR_DQ3 DQL3 VSS_10 G3
DQSL
DQSL
NC_6
G3
DQSL
DQSL
G3
DQSL
DQSL
NC_6
G3
DQSL
DQSL M1_DDR_DQ19 DQL3 VSS_10 E7
DML
VSS_3
VSS_4
G8 E7
DML
VSS_3
VSS_4
G8 E7
DML
VSS_3
VSS_4
G8 E7
DML
VSS_3
VSS_4
G8
1/16W
H3 T1 C7 A9 C7 A9 H3 T1 D3
DMU VSS_5
J2 D3
DMU VSS_5
J2 D3
DMU VSS_5
J2 D3
DMU VSS_5
J2
L400
C7 A9 C7 A9 J8 J8 J8 J8
DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 VSS_6 VSS_6 VSS_6 VSS_6
M1_DDR_DQ4 DQL4 VSS_11 B7
DQSU VSS_2
B3
E1
B7
DQSU VSS_2
B3
E1
B7
DQSU VSS_2
B3
E1
B7
DQSU VSS_2
B3
E1
M1_DDR_DQ20 DQL4 VSS_11 E3
F7
DQL0 VSS_7
M1
M9
E3
F7
DQL0 VSS_7
M1
M9
E3
F7
DQL0 VSS_7
M1
M9
E3
F7
DQL0 VSS_7
M1
M9
1% VOUT NC_1
H8 T9 E7
D3
DML
VSS_3
VSS_4
G8
J2
E7
D3
DML
VSS_3
VSS_4
G8
J2
E7
DML
VSS_3
VSS_4
G8 E7
DML
VSS_3
VSS_4
G8
H8 T9 F2
DQL1
DQL2
VSS_8
VSS_9
P1 F2
DQL1
DQL2
VSS_8
VSS_9
P1 F2
DQL1
DQL2
VSS_8
VSS_9
P1 F2
DQL1
DQL2
VSS_8
VSS_9
P1
4 5
M1_DDR_DQ5 DQL5 VSS_12 DMU VSS_5
VSS_6
J8
DMU VSS_5
VSS_6
J8
D3
DMU VSS_5
VSS_6
J2
J8
D3
DMU VSS_5
VSS_6
J2
J8 M1_DDR_DQ21 DQL5 VSS_12
F8
H3
DQL3
DQL4
VSS_10
VSS_11
P9
T1
F8
H3
DQL3
DQL4
VSS_10
VSS_11
P9
T1
F8
H3
DQL3
DQL4
VSS_10
VSS_11
P9
T1
F8
H3
DQL3
DQL4
VSS_10
VSS_11
P9
T1
G2 E3
F7
DQL0 VSS_7
M1
M9
E3
F7
DQL0 VSS_7
M1
M9
E3
F7
DQL0 VSS_7
M1
M9
E3
F7
DQL0 VSS_7
M1
M9 G2 H8
G2
DQL5 VSS_12
T9 H8
G2
DQL5 VSS_12
T9 H8
G2
DQL5 VSS_12
T9 H8
G2
DQL5 VSS_12
T9
M1_DDR_DQ6 DQL6 F2
F8
DQL1
DQL2
VSS_8
VSS_9
P1
P9
F2
F8
DQL1
DQL2
VSS_8
VSS_9
P1
P9
F2
DQL1
DQL2
VSS_8
VSS_9
P1 F2
DQL1
DQL2
VSS_8
VSS_9
P1
M1_DDR_DQ22 DQL6 H7
DQL6
DQL7
H7
DQL6
DQL7
H7
DQL6
DQL7
H7
DQL6
DQL7
H7 H3
DQL3
DQL4
VSS_10
VSS_11
T1 H3
DQL3
DQL4
VSS_10
VSS_11
T1
F8
H3
DQL3
DQL4
VSS_10
VSS_11
P9
T1
F8
H3
DQL3
DQL4
VSS_10
VSS_11
P9
T1 H7 D7
DQU0
VSSQ_1
VSSQ_2
B1
B9 D7
DQU0
VSSQ_1
VSSQ_2
B1
B9 D7
DQU0
VSSQ_1
VSSQ_2
B1
B9 D7
DQU0
VSSQ_1
VSSQ_2
B1
B9
M1_DDR_DQ7 DQL7 H8
G2
DQL5 VSS_12
T9 H8
G2
DQL5 VSS_12
T9 H8
G2
DQL5 VSS_12
T9 H8
G2
DQL5 VSS_12
T9
M1_DDR_DQ23 DQL7 C3
C8
DQU1 VSSQ_3
D1
D8
C3
C8
DQU1 VSSQ_3
D1
D8
C3
C8
DQU1 VSSQ_3
D1
D8
C3
C8
DQU1 VSSQ_3
D1
D8
B1 H7
DQL6
DQL7
B1
H7
DQL6
DQL7
B1
H7
DQL6
DQL7
B1
H7
DQL6
DQL7
B1
B1 C2
A7
DQU2
DQU3
VSSQ_4
VSSQ_5
E2
E8
C2
A7
DQU2
DQU3
VSSQ_4
VSSQ_5
E2
E8
C2
A7
DQU2
DQU3
VSSQ_4
VSSQ_5
E2
E8
C2
A7
DQU2
DQU3
VSSQ_4
VSSQ_5
E2
E8
VSSQ_1 D7
DQU0
VSSQ_1
VSSQ_2
B9 D7
DQU0
VSSQ_1
VSSQ_2
B9 D7
DQU0
VSSQ_1
VSSQ_2
B9 D7
DQU0
VSSQ_1
VSSQ_2
B9 VSSQ_1 A2
DQU4
DQU5
VSSQ_6
VSSQ_7
F9 A2
DQU4
DQU5
VSSQ_6
VSSQ_7
F9 A2
DQU4
DQU5
VSSQ_6
VSSQ_7
F9 A2
DQU4
DQU5
VSSQ_6
VSSQ_7
F9
D7 B9 C3
C8
DQU1 VSSQ_3
D1
D8
C3
C8
DQU1 VSSQ_3
D1
D8
C3
C8
DQU1 VSSQ_3
D1
D8
C3
C8
DQU1 VSSQ_3
D1
D8 D7 B9 B8
A3
DQU6 VSSQ_8
G1
G9
B8
A3
DQU6 VSSQ_8
G1
G9
B8
A3
DQU6 VSSQ_8
G1
G9
B8
A3
DQU6 VSSQ_8
G1
G9
M1_DDR_DQ8 DQU0 VSSQ_2 C2
A7
DQU2
DQU3
VSSQ_4
VSSQ_5
E2
E8
C2
A7
DQU2
DQU3
VSSQ_4
VSSQ_5
E2
E8
C2
DQU2
DQU3
VSSQ_4
VSSQ_5
E2 C2
DQU2
DQU3
VSSQ_4
VSSQ_5
E2
M1_DDR_DQ24 DQU0 VSSQ_2 DQU7 VSSQ_9 DQU7 VSSQ_9 DQU7 VSSQ_9 DQU7 VSSQ_9
C414 C417 C535

C3 D1 A2
DQU4
DQU5
VSSQ_6
VSSQ_7
F9 A2
DQU4
DQU5
VSSQ_6
VSSQ_7
F9
A7
A2
DQU4
DQU5
VSSQ_6
VSSQ_7
E8
F9
A7
A2
DQU4
DQU5
VSSQ_6
VSSQ_7
E8
F9 C3 D1
M1_DDR_DQ9 DQU1 VSSQ_3 B8
A3
DQU6 VSSQ_8
G1
G9
B8
A3
DQU6 VSSQ_8
G1
G9
B8
A3
DQU6 VSSQ_8
G1
G9
B8
A3
DQU6 VSSQ_8
G1
G9 M1_DDR_DQ25 DQU1 VSSQ_3 10uF 10uF 10uF
C8 D8 DQU7 VSSQ_9 DQU7 VSSQ_9 DQU7 VSSQ_9 DQU7 VSSQ_9
C8 D8 10V 10V 10V
M1_DDR_DQ10 DQU2 VSSQ_4 M1_DDR_DQ26 DQU2 VSSQ_4 C543
1%
1/16W
10K
R444
C2 E2 C2 E2
M1_DDR_DQ11 DQU3 VSSQ_5 M1_DDR_DQ27 DQU3 VSSQ_5 0.1uF
A7 E8 A7 E8 16V
M1_DDR_DQ12 DQU4 VSSQ_6 M1_DDR_DQ28 DQU4 VSSQ_6
A2 F9 A2 F9
B8 G1 B8 G1
A3 G9 A3 G9
+1.5V_Bypass Cap +1.5V_Bypass Cap

Close to DDR Power Pin Close to DDR Power Pin
AVDD_DDR
AVDD_DDR
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
C475
C480
C476
C444
C445
C446

FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 2014-12-30
LM14A
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. LM14A DDR 04
lm14a_crystal_5pF
COMPENSATION_DONE_1 OLED_FW_EMERGENCY
Clock for MSD808KWD
DPC_CTRL
+3.3V_NORMAL
ON_RF_DONE MAIN Clock(24Mhz)
Jtag I/F
X-TAL_1
HP_LOUT 5pF
GND_1
XIN_MAIN
HP_ROUT C600 For Main C614
R612 JTAG
R614 JTAG
R616 JTAG
0.1uF
OLED C614-*1 C615-*1
R635
JTAG
24MHz
2pF 2pF
X600
1M
1K
1K
1K
SW600
lm14a_crystal_5pF
JS2235S P600 lm14a_crystal_2pF lm14a_crystal_2pF
4
12505WS-10A00
X-TAL_2
GND_2
JTAG
1
5pF
TRST_N0 XOUT_MAIN
TDI0 1 6 TDO0
2
C615
R602 R604 TDI0
0 0
3
OPT OPT TDO0
TDI0_1 2 5 TDO0_1 System Clock for Analog block(24Mhz)
4
R603 JTAG R605 TMS0
0 0
OPT OPT 5
TCK0
3 4
6
SOC_RESET
7
JTAG
1K
R609
8
10
11
IC100
LGE5332(LM14A) IC100
LGE5332(LM14A)
R624 33 0.047uF C620

T2 AF6 SC_R
HDMI_0_RX0- A_RX0N LINEIN_L0 COMP1/AV1/DVI_L_IN AA2 B1
T3 AE6 2.2uF C601 RIN0P TN EPHY_TDN
HDMI_0_RX0+ A_RX0P LINEIN_R0 COMP1/AV1/DVI_R_IN R625 68 0.047uF C621 AA1 C1
U1 AF2 2.2uF C602 GIN0M TP EPHY_TDP
HDMI_0_RX1- A_RX1N LINEIN_L1 SC_L_IN Y3 A2
V2 AF1 2.2uF C603 R626 33 C622 GIN0P RN EPHY_RDN
HDMI_0_RX1+ A_RX1P LINEIN_R1 SC_R_IN 0.047uF B2
V3 AG5 2.2uF C604 SC_G
HDMI_0_RX2- RP EPHY_RDP
A_RX2N LINEIN_L2 Y1
W2 AG4 BIN0P
HDMI_0_RX2+ A_RX2P LINEIN_R2 R628 33 0.047uF C624
R1 SC_B
HDMI_0_CLK- A_RXCN AA6
R2 SC_ID HSYNC0
HDMI_0_CLK+ A_RXCP AA5 D4
R6 SC_FB VSYNC0 GPIO19/[LED0]/GPIO74 I2C_SCL4
TX0SCL DDCDA_CK/GPIO38 T6
T5 AF3 GPIO20/[LED1]/GPIO75 I2C_SDA4
HDMI 1.4b &2.0 TX0SDA DDCDA_DA/GPIO39 MICCM0
MHL OPT Y2 AG1
HDMI_HPD_1 HOTPLUGA MICIN0 R630 33 0.047uF C627 AA3
V6 AH2 COMP1_Pr 0.047uF RIN1P
CEC0/GPIO5 LINEOUT_L2 SCART_Lout R631 68 C628 AC1
URSA_RESET_SoC U4 AH3
5V_DET_HDMI_1 SCART_Rout R632 33 0.047uF C629 GIN1M
HOTPLUGA_HDMI20_5V/GPIO34 LINEOUT_R2 COMP1_Y AC2
GIN1P
L1 AF4
B_RX0N EARPHONE_OUTL HP_LOUT R634 33 0.047uF C631 AB2
M2 AF5 COMP1_Pb BIN1P
B_RX0P EARPHONE_OUTR HP_ROUT 1000pF C632 AB3
M3 SOGIN1
B_RX1N C605 1uF
N2 P3
B_RX1P ARC0/GPIO6 HDMI_ARC
P2
B_RX2N AD3 D5
P1 RIN2P RESET SOC_RESET
B_RX2P AD2
K2 AG3 GIN2M
HDMI2 DELETE B_RXCN VAG AD1 AM4
K3 AG2 C606 L600 GIN2P XTAL_IN XIN_MAIN
B_RXCP AVSS_VRM_ADC 1uF AK4
0 L4 10uF PZ1608U121-2R0TF
R636 C609 XTAL_OUT XOUT_MAIN
0 DDCDB_CK/GPIO40 10V AC3
HDMI2_DDC DELETE R637 L5 BIN2P
DDCDB_DA/GPIO41 F5
M4 IRIN/GPIO4 BIT11
HDMI_HPD_2 HOTPLUGB/GPIO31
M5 D8
5V_DET_HDMI_2 HOTPLUGB_HDMI20_5V/GPIO35 I2S_IN_BCK/GPIO94 TRST_N0
D6 JTAG 0 R606
47K
+3.3V_NORMAL
JTAG
R615
I2S_IN_SD/GPIO95 TCK0 A4
D2 C5 JTAG 1K R608 DM_P0 WIFI_DM
C_RX0N I2S_IN_WS/GPIO93 B4
D3 R610 DP_P0 WIFI_DP
C_RX0P 22 C4
E2 G6 R619 68 DM_P1
C_RX1N I2S_OUT_BCK/GPIO100 AUD_SCK C613 0.047uF AD6 B3
E3 E6 R611 VCOM DP_P1
C_RX1P I2S_OUT_MCK/GPIO99 22 AL6
F2 F6 R618 DM_P2 USB_DM3
C_RX2N I2S_OUT_WS/GPIO98 AUD_LRCK R620 33 C616 0.047uF AC6 AK6
F1 E8 22 TU_CVBS USB_DP3
AUD_LRCH CVBS0 DP_P2 AC-coupling CAP
C_RX2P I2S_OUT_SD/GPIO101 R621 33 C617 0.047uF AC5 AM14 C633 0.1uF
C3 F9 AV1_CVBS_IN CVBS1 SSUSB_TXP SSUSB_TXP
C_RXCN I2S_OUT_SD1/GPIO102 BIT10 R622 33 C618 0.047uF AB6 AL14 C634 0.1uF Place near by MST
D1 E7 C607 SC_CVBS_IN CVBS2 SSUSB_TXN SSUSB_TXN
C_RXCP I2S_OUT_SD2/GPIO103 DPC_CTRL AM13
H6 F7 22pF DM_PSS USB_DM1
BIT6 DDCDC_CK/GPIO42 I2S_OUT_SD3/GPIO104 ON_RF_DONE AK13
H5 DP_PSS USB_DP1
BIT7 DDCDC_DA/GPIO43 C608 C611 C612 AK12
K6 AG7 R638 0 22pF 22pF 1000pF SSUSB_RXP SSUSB_RXP
BIT8 HOTPLUGC/GPIO32 GPIO_PM[14]/GPIO24 HDMI_EN 50V AL13
J6 AH6 OPT SSUSB_RXN SSUSB_RXN
BIT9 HOTPLUGC_HDMI20_5V/GPIO36 GPIO_PM[15]/GPIO25 COMPENSATION_DONE_1 AK9
AH5 SSUSB_TXP1
GPIO_PM[16]/GPIO26 OLED_FW_EMERGENCY AL10
G2 SSUSB_TXN1
D_RX0N AM10
G3 DM_PSS1 USB_DM2
D_RX0P AC4 AK10
H2 DTV/MNT_V_OUT CVBS_OUT1 DP_PSS1 USB_DP2
D_RX1N JTAG AM11
H3 SSUSB_RXP1
D_RX1P R613 AL11
HDMI3 DELETE J2 0 SSUSB_RXN1
D_RX2N TDO0_1
J1
D_RX2P
F3
D_RXCN
G1
D_RXCP
J4
DDC_SCL_HDMI3_MN864788 DDCDD_CK/GPIO44
DDC_SDA_HDMI3_MN864788
K5
H4
DDCDD_DA/GPIO45 HDMI 5V DET : Select TR or DIODE
HDMI_HPD_3 HOTPLUGD/GPIO33
J5
5V_DET_HDMI_3 HOTPLUGD_HDMI20_5V/GPIO37
R600 JTAG
0
TMS0 B5
SPDIF_IN/GPIO96 +5V_NORMAL
A5
SPDIF_OUT SPDIF_OUT/GPIO97
HDMI_EN_PULLUP
JTAG
R601
0 R640 5V_DET_HDMI_1
TDI0_1
3.3K
R642 0
C HDMI_EN_PULLUP
R641 33 B
HDMI_EN
Q601
HDMI_EN_TR MMBT3904(NXP)
E HDMI_EN_TR
R643 0
HDMI_EN_DIODE
HDMI_EN_DIODE

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN4_EXT_IN/OUTPUT 04
IC100
LGE5332(LM14A)
A15 T23
GND_1 GND_171
A18 T24
GND_2 GND_172
A21 T25
GND_3 GND_173
A24 T26
GND_4 GND_174
A27 U2
GND_5 GND_175
A30 U3
GND_6 GND_176
B10 U8
GND_7 GND_177
B32 U9
GND_8 GND_178
C2 U10
GND_9 GND_179
C13 U14
GND_10 GND_180
C32 U15
GND_11 GND_181
D18 U16
GND_12 GND_182
D21 U17
GND_13 GND_183
D25 U18
GND_14 GND_184
D28 U20
GND_15 GND_185
D32 U26
GND_16 GND_186
E30 V1
GND_17 GND_187
E31 V8
GND_18 GND_188
E32 V9
GND_19 GND_189
F22 V10
GND_20 GND_190
F24 V11
GND_21 GND_191
F25 V12
GND_22 GND_192
F26 V13
GND_23 GND_193
F27 V14
GND_24 GND_194
F28 V15
GND_25 GND_195
F29 V16
GND_26 GND_196
F30 V20
GND_27 GND_197
F31 V21
GND_28 GND_198
G11 V22
GND_29 GND_199
G12 V26
GND_30 GND_200
G13 V29
GND_31 GND_201
G14 V32
GND_32 GND_202
G15 W3
GND_33 GND_203
G16 W8
GND_34 GND_204
G17 W9
GND_35 GND_205
G18 W10
GND_36 GND_206
G19 W11
GND_37 GND_207
G20 W12
GND_38 GND_208
G21 W13
GND_39 GND_209
G23 W14
GND_40 GND_210
G24 W15
GND_41 GND_211
G25 W16
GND_42 GND_212
G26 W17
GND_43 GND_213
G27 W18
GND_44 GND_214
G28 W22
GND_45 GND_215
H8 W26
GND_46 GND_216
H9 Y8
GND_47 GND_217
H10 Y9
GND_48 GND_218
H11 Y10
GND_49 GND_219
H12 Y11
GND_50 GND_220
H13 Y12
GND_51 GND_221
H14 Y13
GND_52 GND_222
H15 Y14
GND_53 GND_223
H17 Y15
GND_54 GND_224
H18 Y16
GND_55 GND_225
H19 Y17
GND_56 GND_226
H20 Y18
GND_57 GND_227
H21 Y22
GND_58 GND_228
H22 Y26
GND_59 GND_229
H23 AA9
GND_60 GND_230
H24 AA10
GND_61 GND_231
H25 AA11
GND_62 GND_232
H26 AA12
GND_63 GND_233
H27 AA14
GND_64 GND_234
H30 AA15
GND_65 GND_235
J3 AA16
GND_66 GND_236
J7 AA17
GND_67 GND_237
J8 AA18
GND_68 GND_238
J14 AA21
GND_69 GND_239
J15 AA26
GND_70 GND_240
J16 AA29
GND_71 GND_241
J22 AA32
GND_72 GND_242
J24 AB9
GND_73 GND_243
J25 AB10
GND_74 GND_244
J26 AB11
GND_75 GND_245
J27 AB12
GND_76 GND_246
K7 AB13
GND_77 GND_247
K8 AB14
GND_78 GND_248
K14 AB16
GND_79 GND_249
K15 AB17
GND_80 GND_250
K25 AB18
GND_81 GND_251
K26 AB19
GND_82 GND_252
L2 AB20
GND_83 GND_253
L3 AB21
GND_84 GND_254
L8 AB22
GND_85 GND_255
L14 AB23
GND_86 GND_256
L15 AB26
GND_87 GND_257
L16 AB30
GND_88 GND_258
L25 AC7
GND_89 GND_259
L26 AC8
GND_90 GND_260
M1 AC9
GND_91 GND_261
M8 AC10
GND_92 GND_262
M9 AC11
GND_93 GND_263
M10 AC12
GND_94 GND_264
M11 AC13
GND_95 GND_265
M12 AC16
GND_96 GND_266
M13 AC23
GND_97 GND_267
M14 AC25
GND_98 GND_268
M15 AC26
GND_99 GND_269
M16 AC27
GND_100 GND_270
M17 AC28
GND_101 GND_271
M18 AD8
GND_102 GND_272
M19 AD9
GND_103 GND_273
M20 AD10
GND_104 GND_274
M25 AD11
GND_105 GND_275
M26 AD12
GND_106 GND_276
M29 AD13
GND_107 GND_277
M32 AD14
GND_108 GND_278
N3 AD15
GND_109 GND_279
N7 AD16
GND_110 GND_280
N8 AD24
GND_111 GND_281
N9 AD25
GND_112 GND_282
N10 AD26
GND_113 GND_283
N11 AD27
GND_114 GND_284
N13 AD28
GND_115 GND_285
N14 AE3
GND_116 GND_286
N17 AE8
GND_117 GND_287
N18 AE9
GND_118 GND_288
N19 AE10
GND_119 GND_289
N20 AE11
GND_120 GND_290
N24 AE12
GND_121 GND_291
N25 AE13
GND_122 GND_292
N26 AE14
GND_123 GND_293
P8 AE17
GND_124 GND_294
P9 AE18
GND_125 GND_295
P10 AE23
GND_126 GND_296
P11 AE24
GND_127 GND_297
P12 AE25
GND_128 GND_298
P13 AE26
GND_129 GND_299
P14 AE27
GND_130 GND_300
P15 AE28
GND_131 GND_301
P16 AE29
GND_132 GND_302
P17 AF9
GND_133 GND_303
P18 AF10
GND_134 GND_304
P19 AF17
GND_135 GND_305
P20 AF18
GND_136 GND_306
P24 AF19
GND_137 GND_307
P25 AF20
GND_138 GND_308
P26 AF21
GND_139 GND_309
R3 AF22
GND_140 GND_310
R8 AF23
GND_141 GND_311
R9 AF24
GND_142 GND_312
R10 AF25
GND_143 GND_313
R14 AF26
GND_144 GND_314
R15 AF27
GND_145 GND_315
R16 AF28
GND_146 GND_316
R17 AF29
GND_147 GND_317
R18 AF30
GND_148 GND_318
R19 AG22
GND_149 GND_319
R20 AG23
GND_150 GND_320
R21 AG30
GND_151 GND_321
R22 AH21
GND_152 GND_322
R23 AH22
GND_153 GND_323
R24 AJ3
GND_154 GND_324
R25 AJ22
GND_155 GND_325
R26 AJ30
GND_156 GND_326
R29 AK5
GND_157 GND_327
R32 AK11
GND_158 GND_328
T8 AK14
GND_159 GND_329
T9 AL1
GND_160 GND_330
T10 AL3
GND_161 GND_331
T14 AL4
GND_162 GND_332
T15 AL9
GND_163 GND_333
T16 AL12
GND_164 GND_334
T17 AL23
GND_165 GND_335
T18 AL27
GND_166 GND_336
T19 AM25
GND_167 GND_337
T20 AM29
GND_168 GND_338
T21 AM31
GND_169 GND_339
T22
GND_170

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. LM14A_GND 07
CI Region * Option name of this page : CI_SLOT
(because of Hong Kong)
CI SLOT
+5V_CI_ON
CI_DATA[0-7]
CI TS INPUT
CI_SLOT
FE_DEMOD1_TS_DATA[0-7]
+5V_NORMAL CI_SLOT AR903 33
C902 FE_DEMOD1_TS_DATA[7]
10uF CI_MDI[7] FE_DEMOD1_TS_DATA[6]
CI_SLOT 10V CI_MDI[6]
@netLa
FE_DEMOD1_TS_DATA[5]
R906
CI_MDI[5] FE_DEMOD1_TS_DATA[4]
10K
CI_SLOT CI_MDI[4]
/CI_CD1 JK900
10125901-015LF CI_SLOT
CI_SLOT AR902 33
R912 FE_DEMOD1_TS_DATA[3]
35 1 CI_MDI[3]
100 CI_DATA[3] FE_DEMOD1_TS_DATA[2]
CI_SLOT 36 2
AR901 CI_DATA[4] CI_MDI[2] FE_DEMOD1_TS_DATA[1]
33 37 3 CI_MDI[1]
CI_DATA[5] R916 FE_DEMOD1_TS_DATA[0]
TPI_DATA[4] 38 4 10K CI_MDI[0]
CI_DATA[6]
TPI_DATA[5] 39 5
CI_DATA[7]
TPI_DATA[6] 40 6 FE_DEMOD1_TS_DATA[0-7]
TPI_DATA[7] 41 7 R914 47 CI_SLOT R918 33 CI_SLOT
CI_ADDR[10] /PCM_CE1 CI_MISTRT FE_DEMOD1_TS_SYNC
42 8 R919 33 CI_SLOT
CI_MIVAL_ERR FE_DEMOD1_TS_VAL
CI_SLOT R908 10K 43 9 R920 100 CI_SLOT
CI_ADDR[11] CI_OE CI_MCLKI FE_DEMOD1_TS_CLK
CI_IORD 44 10 +5V_NORMAL
CI_ADDR[9]
CI_IOWR 45 11
CI_ADDR[8]
46 12 R917
CI_ADDR[13] 10K
CI_MDI[0] 47 13
CI_ADDR[14]
CI_MDI[1] 48 14 CI_SLOT
CI_MDI[2] 49 15 CI_WE
50 16 R915 100
CI_MDI[3] CAM_IREQ_N
CI_SLOT CI_SLOT
51 17
CI_MDI[4]
GND
C901
0.1uF
52
53
18
19
C903
0.1uF
C904
0.1uF
CI HOST I/F
CI_SLOT GND CI_SLOT
CI_MDI[5] 54 20
+5V_NORMAL CI_ADDR[12]
CI_MDI[6] 55 21 CLOSE TO MSTAR
CI_ADDR[7]
R900 56 22 GND
CI_MDI[7] R909 10K CI_ADDR[6]
10K CI_SLOT CI_SLOT
57 23
CI_ADDR[5] AR906
CI_SLOT R901 47 CI_SLOT 58 24
PCM_RESET CI_ADDR[4] 33
R902 47 CI_SLOT 59 25
CAM_WAIT_N CI_ADDR[3] CI_ADDR[0] EB_ADDR[0]
CLOSE TO MSTAR REG 60 26 EB_ADDR[1]
CI_ADDR[2] CI_ADDR[1]
R903 33 CI_SLOT 61 27
TPI_CLK CI_ADDR[1] CI_ADDR[2] EB_ADDR[2]
R904 33 CI_SLOT 62 28
TPI_VAL CI_ADDR[3] EB_ADDR[3]
R905 33 CI_SLOT CI_ADDR[0]
TPI_SOP 63 29
CI_DATA[0]
CI_SLOT 64 30
AR900 33 CI_DATA[1]
65 31 CI_ADDR[0-14]
TPI_DATA[0] CI_DATA[2]
66 32 CI_SLOT
TPI_DATA[1] 67 33 AR907
TPI_DATA[2] 68 34 33
TPI_DATA[3]
CI_ADDR[4] EB_ADDR[4]
G2 69 G1
R910 CI_ADDR[5] EB_ADDR[5]
100 CI_ADDR[6] EB_ADDR[6]
/CI_CD2
+5V_NORMAL CI_SLOT GND
CI_SLOT
CI_SLOT GND AR908 33
C900
2pF CI_ADDR[8] EB_ADDR[8]
R907
50V CI_ADDR[9] EB_ADDR[9]
10K GND
CLOSE TO MSTAR CI_SLOT
CI_SLOT
CI_MISTRT AR909 33
CI_MIVAL_ERR CI_ADDR[12] EB_ADDR[12]
CI_MCLKI CI_ADDR[14] EB_ADDR[14]
REG CAM_REG_N
CI_SLOT
AR913 33
CI_OE EB_OE_N
CI_WE EB_WE_N
CI_IORD EB_BE_N1
CI DETECT +3.3V_NORMAL
CI_IOWR EB_BE_N0
CI_SLOT
IC900
74LVC1G32GW +3.3V_NORMAL
B 1 5 VCC
/CI_CD2
CI_SLOT
A 2
/CI_CD1 AR904 33
GND 3 4 Y R911 CI_DATA[0] EB_DATA[0]
10K CI_DATA[1] EB_DATA[1]
CI_DATA[2] EB_DATA[2]
OR_GATE_CI_TI OR_GATE_CI_TOSHIBA CI_DATA[3] EB_DATA[3]
IC900-*1 IC900-*2
SN74LVC1G32DCKR TOSHIBA ELECTRONICS KOREA CORPORATION
EB_DATA[0-7]
@netLa
A VCC IN_B VCC
CI_SLOT
1 5 1 5
CAM_CD1_N AR905 33
B IN_A R913 CI_DATA[4] EB_DATA[4]
2 2
47 CI_DATA[5] EB_DATA[5]
GND Y GND OUT_Y
3 4 3 4
CI_DATA[0-7]
CI POWER ENABLE CONTROL EB_DATA[0-7]
IC901
+5V_NORMAL AP2151WG-7 +5V_CI_ON
IN OUT
5 1
C905 CI_SLOT
0.1uF C906
50V GND
2 1uF
CI_SLOT R923
25V
CI_SLOT 10K
R922
100 EN FLG CI_SLOT
PCM_5V_CTL 4 3
R921
10K
CI_SLOT

FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS UF71/7500 2014-07-24
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. PCMCI 9
PCMCI
[EG92 ONLY] PWR
+12V
RESET_IC_DIODES(MAIN)
IC2307-*1
C2396
10uF
C2397
10uF
C2398
10uF
12V_ON,PAENL_CTL IS FOR OLED QSM
Power_DET APX803E29
MMBT3906(NXP)
16V 16V 16V VCC 3 2 RESET
+3.5V_ST 1
MMBT3906(NXP)
GND EAN61829902
+3.5V_ST PD_20_24V_DIODES
+12V +3.5V_ST +3.5V_ST IC2308-*1
R2349
100K APX803D29
10K
R2391
1
R2389 PD_+12V PD_+3.5V R2354 RESET VCC
10K
R2347
RESET_IC_ROHM(SUB) 2 3
Q2398
RL_ON 10K
1
R2335 R2343 IC2307 10K

R2390 2.7K 0 1
OPT
Q2303
2
10K 1% 5% BD48K28G GND
DPC_CTRL +3.3V_NORMAL
3
2
P2399 POWER_DET
R2394 VDD 3 2 VOUT
SMAW200-H24S5 OLED_AC_DET
3
1K
C2350 1
OLED_AC_DET PD_+12V
R2393 0.1uF GND
PWR ON INV CTL 22 INV_CTL R2336 16V
+3.5V_ST L2395 1 2 1.2K
PWR_DET_MERGE
DPC PDIM#2 0 C2364
UBW2012-121F 3 4 1%
OLED_AC_DET 0.1uF
3.5V GND
R2355
5 6 PD_OLED_AC
3.5V_Diode
3.5V_Diode
3.5V_Diode
3.5V_Diode
PD_OLED_AC 16V
R2392 R2395
ZD2309
ZD2308
ZD2307
ZD2306
3.5V 3.5V
ZD2305
C2395 7 8 22K PD_20_24V not to RESET

5V
5V
5V
5V
0
0.1uF GND GND 1%
5V
9 10 100 +24V R2348 at 8kV ESD

16V 12V 12V 100K
11 12
12V 12V R2300 PANEL_CTL C2365
UBW2012-121F 13 14
PD_20_24V_ROHM
12V GND 0.1uF PWR_DET_SEPARATE
15 16 L2398 +24V
+12V PD_20V PD_24V IC2308 16V
GND 12V_ON UBW2012-121F PD_UHD_24V
L2396 17 18 R2340-*1 R2340 BD48K28G
R2340-*2
24V 19 20 24V 9.1K 5.6K 8.2K
UBW2012-121F 1% 1% 1% R2356 POWER_DET_1
24V 21 22 24V L2399 C2399 0
C2394 VDD 3 2 VOUT
GND GND UBW2012-121F 0.1uF
0.1uF 23 24 50V
D2399 L2397 1 PWR_DET_SEPARATE
50V PD_20V PD_24V
PTVS13VS1UR PD_UHD_24V C2351
23.2V R2341-*1 R2341 0.1uF GND
R2341-*2
25
1.6K 1.3K 1.5K 16V 24V-->3.48V
1% 1% 1% PD_20_24V 20V-->3.51V
12V-->3.58V
L/D_DI ST_3.5V-->3.5V
PANEL_CTL
L/D_CLK
L/D_VSYNC
PWM_DIM
PWM_DIM2
+12V
+5.0V normal & USB
1%
R2342150K 1%
DDR +1.5V R2
R2337 16K 1%
C2347 OPT
2200pF C2349 C2352
R2339 16K
+1.5V_DDR 50V
1%
1/16W
+3.3V - eMMC +12V 100pF 0.047uF
6.8K
R2351
L2309 POWER_ON/OFF2_3 R2344 50V 25V
PZ1608U121-2R0TF 10K
TI_TPS54327_1.5V_DDR_DCDC
C2359 C2362 C2363
+3.3V_NORMAL IC2303-*1
RSET2
RSET1
+3.3V_NORMAL 3.3V_EMMC +1.8V DVDD18_EMMC TPS54327DDAR [EP]GND 22uF 22uF 10uF
[EP]
AGND
RLIM
COMP
C2324 C2357 R1 10V 10V 10V
+3.3V_LED
C2322
FB
SS
0.1uF ROHM_BD9D321_1.5V_DDR_DCDC EN
1 8
VIN L2314
10uF 120-ohm 82pF
THERMAL
1%
1/16W
51K
16V VFB VBST 50V
LD2300
R2352
2 7
IC2303
28
27
26
25
24
23
22
L2304 L2305 R2326 VREG5 SW VIN_1 LX_3
PZ1608U121-2R0TF PZ1608U121-2R0TF BD9D321EFJ [EP] 3 6 1 21 L2313
10K 4.7uH
SS GND THERMAL
4 5 VIN_2 2 20 LX_2
29
+3.3V_LED
R2315
DCDC_DIODE_0DTKE00018A(KEC)
EN VIN
3.3K
C2308 C2307 1 8 C2340 C2341 C2344 VIN_3 3 19 LX_1 C2355
0DTKE00018A
0.1uF
C2309
0.1uF
C2312
16V 10uF 10uF 0.1uF
IC2305
0.047uF +5V_NORMAL
THERMAL
22uF 22uF 50V PGND_1
ZD2304
16V 16V 0.1uF 35V 35V 4 18 BST 25V
10V 10V R2320 R2321 FB BOOT C2336 SN1302001(TPS65286RHDR)
9
2 7 OPT
PGND_2 5 17 SW_IN2
R1 18K 4.7K L2312 C2360
R2350
1/16W
1% 1%
100K
100K
R2353
2.2uH PGND_3 SW_IN1
1/16W
VREG SW 6 16 1uF
5%
5%
DCDC_DIODE_0DR050008AA(SEMTECH)
1.0V_DCDC_TI
C2325
100pF
50V
3 6
PS064T-2R2MS
DCDC_DIODE
V7V 7 6A 15 NFAULT1
10V 0DR050008AA
ZD2304-*1
/USB_OCD2
SS GND
25V
1uF
C2343
10
11
12
13
14
4
3A 5 C2339
9
C2332-*1 C2338 ZD2302
3300pF 22uF 22uF 2.5V
R2322 10V
MODE/SYNC
EN
SW_OUT2
SW_OUT1
SW_EN2
SW_EN1
NFAULT2
50V 22K 10V
C2328 C2332
1% 1uF 2200pF
+1.8V - LM15U, eMMC 10V 50V
1.0V_DCDC_ROHM
Switching freq: 700K R2
& Vx1 pull-up Vout=0.6*(1+R1/R2)
/USB_OCD3
C2346
+5V_USB_3
+5V_USB_2
Vout=0.765*(1+R1/R2)=1.554V
USB_CTL3
USB_CTL2
R2338
10K
0.0068uF
POWER_ON/OFF1
50V
5.1V:R1-51K, R2-6.8K
+1.8V
+3.3V_NORMAL
IC2301
AZ1117EH-ADJTRG1
+2.5V
IN OUT TU_JP
TU_JP +2.5V_Normal
DCDC_DIODE
ADJ/GND
R2309 IC2300
1 R2312
ZD2303
TJ4220GDP-ADJ [EP]GND
1%
1/16W
75
2.5V
R2307
POWER_ON/OFF2_3
10K TU_JP TU_JP
R2316
C2310 C2311 C2321 22K
R2
1 8
10uF 10uF 0.1uF 1%
1%
1/16W
33
THERMAL
+3.3V_NORMAL NC_1 GND

R2308
10V 10V
TU_JP
9
2 7 R2317
ADJ/SENSE 47K R1
EN2
1%
3 6
TU_JP
C2320
VIN3 VOUT LM15 Power SEQUENCE
0.1uF
16V
4 2A 5
NC4 NC_2 TU_JP
TU_JP
EAN62206201 C2323
ZD2301
POWER_ON/OFF1(5V)
10uF
10V
0DR050008AA
5V
0DTKE00018A
MAX A TU_JP_DCDC_DIODE(KEC)
+3.3V_NORMAL ZD2301-*1 POWER_ON/OFF2_1(3.3V)
+12V
+3.3V_NORMAL
Vout=0.6*(1+R1/R2)
POWER_ON/OFF2_3(1.5V, 2.5V)
L2300
BLM18PG121SN1D
POWER_ON/OFF2_4(1.1V)
Placed on SMD-TOP
C2300 C2301 C2303

+24V AUDIO AMP
10uF 10uF 0.1uF
16V 16V 16V
0DTKE00018A
OPT IC2302
ZD2300
TPS54427DDA [EP]GND
R2303 +24V +24V_AMP

10K EN VIN
1 8
16V L2310
THERMAL
POWER_ON/OFF2_1 0.1uF
1% C2314 UBW2012-121F
VFB VBST
9
2 7
PS064T-2R2MS
R2302 L2306
R1 2.2uH
51K VREG5 SW
3 6
C2305
100pF
50V
SS GND
R2305
4
4A 5 C2326
22uF
10V
C2329
22uF
10V
C2333
100uF
C2334
10uF
10V
15K C2306 C2313
1uF 0.015uF
10V 50V
1% DCDC_DIODE_0DR050008AA(SEMTECH)
Switching freq: 700K R2 0DR050008AA
ZD2300-*1
Vout=0.765*(1+R1/R2)
MAX 3A
LM14A CPU +1.1V_VDDC_CPU LM14A CORE
+12V
L2502
PZ1608U121-2R0TF
+1.1V_VDDC
Placed on SMD-TOP +12V
UF64/68 UF64/68 UF77 UF77
C2510-*1 C2512-*1 C2510 C2512 C2513
10uF 10uF 10uF 0.1uF
10uF 16V 16V 16V R1 IC2502
IC2501 L2501
25V BD86106EFJ
R2521
25V OPT C2514 L2500
0DTKE00018A
TPS54427DDA 2uH
5.6K
[EP]GND EAN62653301
100pF [EP]
10K PZ1608U121-2R0TF
ZD2501
1%
50V R2524 EN
1 8
VIN 16V PGND SW_2
0.1uF 1 8
THERMAL
C2517
THERMAL
POWER_ON/OFF2_4 VFB VBST Placed on SMD-TOP
9
2 7 L2503 VIN SW_1

OPT OPT OPT
9
2 7
2.2uH R2510
VREG5 SW OPT C2504 C2505 C2506 C2507 C2508 C2509 15K R1
R2 3 6
C2500 C2501 C2502
AGND
3 6
EN
0.0068uF 10uF 10uF 100uF 10uF 10uF 1%
PS064T-2R2MS R2500 50V
R2522
SS GND 10uF 10uF 0.1uF 6.8K 10V 10V 10V 10V C2511
4
4A
5 FB
4
6A 5
COMP
47pF
11K
R2519-*1 25V 25V 25V 50V

1%
C2518 C2519
0DTKE00018A
27K 22uF
22uF
ZD2500
10V 10V
R2523
CPU_VID_LM14_A0
1/16W
10K
POWER_ON/OFF2_4
1%
1%
R2-1.13V
R2511
1/16W
R2501
CPU_VID_LM14_A1
R2515
R2519
1/16W
56K
C2503 10K
1%
LM14A_A0_ONLY
22K
75K
0.1uF
1/16W
R2504
1%
1%
KEC_CPU_CORE_VID_FET(MAIN)
KEC_CPU_CORE_VID_FET(MAIN)
DCDC_DIODE_0DR050008AA(SEMTECH) 16V 15K
R2512
1/16W
0DR050008AA
6.2K
+3.3V_NORMAL +3.3V_NORMAL C2515 C2516 1%
ZD2501-*1 R2
KEC_CPU_CORE_VID_FET
R2516
1%
R2520
1uF 2200pF
1.6K
75K
10V 50V
1%
1%
LM14A_A0_ONLY
1/16W
+3.3V_NORMAL R2505
56K
R2513 D R2517 D 1%
2N7002KA
2N7002KA
10K 10K LM14A_A0_ONLY

R2502 D
R2514 R2518
2N7002KA
Q2502
Q2503
G G 10K DCDC_DIODE_0DR050008AA(SEMTECH)
CPU_VID0 CPU_VID1 0DR050008AA
S S R2503
Q2500
0 5% 0 5% G ZD2500-*1
CORE_VID0
D D 0 5% S
Q2502-*1 Q2503-*1 LM14A_A0_ONLY
G G
2N7002K 2N7002K
S S LM14_A1
DIODEDS_CPU_CORE_VID_FET(SUB) DIODEDS_CPU_CORE_VID_FET(SUB) R2-1 R2-2 LM14_A0 LM14_A1 LM14_A0
V_out V_out V_out V_out
Delete this part when LM14A0 used all.
Boot High High 1.06 1.163
Boot 0.98 1.15
Kernel High Low 1.01 1.013 D
Kernel Q2500-*1
0.98 0.98 G
Kernel Low Low 0.96 0.969 2N7002K
S
DIODEDS_CPU_CORE_VID_FET
LM14A1 CORE_VID1 NOT USE.
Vout=0.765*(1+R1/R2) Vout=0.8*(1+R1/R2) CORE_VID1
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES BSD-15Y-LM14A-025_00-HD

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. LM15U_PWR_2_ALL 25
Renesas MICOM
For Debug EPSON_MICOM_CRYSTAL(MAIN)

C3002-*1
+3.5V_ST EAW30067102 18pF
X3000-*1
50V
EPSON_MICOM_CRYSTAL(MAIN)
32.768KHz C3003-*1
EPSON_MICOM_CRYSTAL(MAIN) 15pF
50V
MICOM_DEBUG
DAISHINKU_MICOM_CRYSTAL(SUB)
R3016 1K
R3014 10K
MICOM_DEBUG Don’t remove R3016,

P3000
12507WS-04L
not making float P40 50V 50V
12pF 12pF
C3002 C3003 LOGO_LIGHT
MICOM_DEBUG
1
LOGO_LIGHT
MICOM_RESET
2
MICOM_DEBUG EAW58239602
X3000
WIFI_EN
3
4
MICOM_RESET 32.768KHz +3.5V_ST
5
HDMI_WAUP:HDMI_INIT R3028
4.7M
MHL_DET_LM15 OPT
0 R3037
MHL_DET_LM15
10K
POWER_DET_1
R3032
10K
R3030
MICOM_RESET_SW
GND
MICOM_RESET_22OHM
SW3000
JTP-1127WEM
2 1
33
R3031
1%
1/16W
270K
OPT
C3004
P124/XT2/EXCLKS
0.47uF
0.1uF
+3.5V_ST 4 3
16V
R3029
P122/X2/EXCLK
P41/TI07/TO07
C3001
P137/INTP0
P120/ANI19
P40/TOOL0
P123/XT1
C3000
P121/X1
0.1uF MICOM_RESET_33OHM
R3029-*1 33
RESET
+3.5V_ST
REGC
VDD
VSS
R3021-*1
LCD
OLED
R3021
LM14A Power SEQUENCE
1K
10K 5%
1/16W
48
47
46
45
44
43
42
41
40
39
38
37
POWER_ON/OFF1(5V) P60/SCLA0 1 36 P140/PCLBUZ0/INTP6 RL_ON
SCART_MUTE
I2C_SCL_MICOM
P61/SDAA0 2 35 P00/TI00/TXD1 POWER_ON/OFF2_4
I2C_SDA_MICOM SCART_MUTE
P62 3 34 P01/TO00/RXD1
3D&L_DIM_EN POWER_ON/OFF2_4
P63 4 33 P130
PANEL_CTL
P31/TI03/TO03/INTP4 IC3000 P20/ANI0/AVREFP
POWER_ON/OFF2_1
WOL/WIFI_POWER_ON 5 32 KEY2
IR
P75/KR5/INTP9/SCK01/SCL01 6 R5F100GEAFB#30 31 P21/ANI1/AVREFM
KEY1
R3000
100 P74/KR4/INTP8/SI01/SDA01 7 30 P22/ANI2
HDMI_CEC_MICOM
POWER_ON/OFF2_4(1.1V) P73/KR3/SO01 8 29 P23/ANI3

MODEL1_OPT_3
POWER_ON/OFF2_3
P72/KR2/SO21 9 28 P24/ANI4
MODEL1_OPT_0
P71/KR1/SI21/SDA21 10 27 P25/ANI5
SOC_RESET EYE_SDA SIDE_HP_MUTE
P70/KR0/SCK21/SCL21 11 26 P26/ANI6
EYE_SCL MHL_EN MHL_EN
P30/INTP3/RTC1HZ/SCK11/SCL11 12 25 P27/ANI7
MODEL1_OPT_1
13
14
15
16
17
18
19
20
21
22
23
24
AR3000
3.3K
EYE_Q
+3.5V_ST
P50/INTP1/SI11/SDA11
P51/INTP2/SO11
P17/TI02/TO02
P16/TI01/TO01/INTP5
P15/PCLBUZ1/SCK20/SCL20
P14/RXD2/SI20/SDA20
P13/TXD2/SO20
P12/SO00/TXD0/TOOLTXD
P11/SI00/RXD0/TOOLRXD/SDA00
P10/SCK00/SCL00
P146
P147/ANI18
MICOM MODEL OPTION
+3.5V_ST
MICOM MODEL OPTION

10K
10K
10K
MICOM_OLED
MICOM_LOGO
MICOM_H15
R3006
R3008
R3013
0 1
MODEL_OPT_0 NON LOGO LOGO
MODEL1_OPT_0 MODEL_OPT_1 LCD OLED

MODEL1_OPT_1
MODEL1_OPT_3
MODEL_OPT_3 LM15U/LM14A H15
SOC_RX
POWER_DET
EDID_WP
URSA_RESET_MICOM
URSA_RESET_MICOM
AMP_MUTE
WOL_WAKE_UP
INV_CTL
MICOM_LM15U/LM14A
POWER_ON/OFF1
WOL_CTL
SOC_TX
LED_R
MICOM_NON_LOGO
10K
10K
10K
MICOM_LCD
R3009
R3012
R3004
For CEC
R3015
10K +3.5V_ST
CEC_DIODE(SUB)
MICOM_LM14A
EAH62792701
LED_R
SOC_RESET
D3000-*1
30V
BAT54_TSC
R3033 R3034
27K 120K
LM14A : Active high reset
G
D3000
BAT54_SUZHO
CEC_REMOTE HDMI_CEC_MICOM
S
CEC_DIODE(MAIN)
EAH61433701 Q3001
RUE003N02
G
ROHM_CEC_FET(MAIN) Q3001-*1
EBK61731401 SI1012CR-T1-GE3
D
VISHAY_CEC_FET(SUB)
EBK61731301
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MICOM 30
EDID external EEPROM +5V_NORMAL
E
5V_HDMI_3
FAN_ON
+5V_NORMAL
MMBT3904(NXP)
Q3302-*1 B
A1
A2
C 5V_HDMI_3
5V_HDMI_1 5V_DET_HDMI_1 MMBD6100
NXP_HDMI_EXT_EDID_TR D3302 +5V_NORMAL
5V_HDMI_3
HDMI_EXT_EDID
R3324
HDMI_EN_DIODE
CNPLUS_HDMI_JACK CNPLUS_HDMI_JACK CNPLUS_HDMI_JACK
5V_DET_HDMI_3 JK3300-*1 JK3301-*1 +5V_NORMAL
A1
A2
JK3302-*1
MMBD6100
R3309 1.8K
5501-56219 5501-56219
E
R3320
5501-56219
D3303
ESD_HDMI
OPT OPT KEC_HDMI_EXT_EDID_TR
R3335
R3316
VA3308
1.8K
10K
3.3K
R3336
ESD_HDMI
TMDS_DATA2+
1K R3319 1 TMDS_DATA2+ TMDS_DATA2+ 2N3904S
R3388
OPT EDID_WP
R3312
R3302 ROHM_HDMI_EXT_EDID
VA3300
1 1
33 TMDS_DATA2_SHIELD
3.3K
1K R3337 R3305 4.7K 2 TMDS_DATA2_SHIELD

2 TMDS_DATA2_SHIELD
IC3301 Q3302 B
OPT
C
2
33 TMDS_DATA2-
R3379
R3384
OPT 10K
3 TMDS_DATA2- TMDS_DATA2-
R3378
4.7K 3 3
R3386
BR24G02FJ-3GTE2
0
TMDS_DATA1+ C
OPT
C TMDS_DATA1+
10K
OPT 4 4 TMDS_DATA1+
10K
OPT
OPT
NON_HDMI_EXT_EDID 4
47K
Q3300 C TMDS_DATA1_SHIELD
5 TMDS_DATA1_SHIELD TMDS_DATA1_SHIELD
B 1K
5
R3370 OPT 0
5
2N3904S BODY_SHIELD R3315 Q3303 R3318 TMDS_DATA1- TMDS_DATA1-
HDMI_HPD_3 6 TMDS_DATA1-
B 1K
6
R3376 OPT 0
6
BODY_SHIELD R3300 R3303 100K 2N3904S HDMI_HPD_1
TMDS_DATA0+
7 TMDS_DATA0+ TMDS_DATA0+ A0 VCC HDMI_EXT_EDID
G
7 7
100K R3339 R3371 0 20 TMDS_DATA0_SHIELD 1 8
4.7K HDMI_HPD_3_788 8 TMDS_DATA0_SHIELD
8 TMDS_DATA0_SHIELD
8
HDMI_EXT_EDID_FET
E TMDS_DATA0-
ESD_HDMI
TMDS_DATA0-
20 R3377 0 9 TMDS_DATA0-
R3326 0
VA3312
9
HDMI_EXT_EDID E HDMI_HPD_1_788 TMDS_CLK+ TMDS_CLK+
9
R3323 AR3401
ESD_HDMI
10 TMDS_CLK+
10 A1 WP
VA3302
10
19 4.7K
D
TMDS_CLK_SHIELD
HOT_PLUG_DETECT 11 TMDS_CLK_SHIELD
11 TMDS_CLK_SHIELD
11
2 7 1/16W HDMI_EXT_EDID
19 AR3304 TMDS_CLK-
12 TMDS_CLK-
12 TMDS_CLK- 47K DDC_SCL_HDMI3 Q3305 DDC_SCL_HDMI3_MN864788
HOT_PLUG_DETECT 33 DDC_SDA_HDMI3 18 CEC CEC
12
2N7002KA
13 CEC
VDD[+5V] 13 13
A2 SCL
18 AR3308
RESERVED
14 RESERVED RESERVED R3314
VDD[+5V] 17 SCL
14 14 3 6
DDC/CEC_GND 33 15 SCL
15 SCL
15
17 DDC_SCL_HDMI3 DDC_SDA_HDMI1_MN864788
SDA
16 SDA
16 SDA 33 OPT
DDC/CEC_GND 16 DDC/CEC_GND
16
R3380
R3381
R3385
SDA 17 DDC/CEC_GND
17 DDC/CEC_GND GND SDA +5V_NORMAL
16 DDC_SCL_HDMI1_MN864788 VDD[+5V] VDD[+5V]
17
4 5
18 VDD[+5V]
SDA VA3304 VA3306 15 HOT_PLUG_DETECT
18 18
HOT_PLUG_DETECT
ESD_HDMI VA3311 19 HOT_PLUG_DETECT
0
ESD_HDMI SCL 19 19
5V_HDMI_3
15 R3321
SCL 14 ESD_HDMI 20 20 20 22
RESERVED VA3309 BODY_SHIELD
+5V_NORMAL
14 CEC_REMOTE
BODY_SHIELD BODY_SHIELD
HDMI_EXT_EDID
RESERVED 13 ESD_HDMI HDMI_EXT_EDID
CEC_REMOTE CEC DDC_SCL_HDMI3
A1
A2
R3322
MMBD6100
13 AR3306
R3317
22
D3304
CEC AR3301 12 5.1
10K
5.1 TMDS_CLK- 1/16W
12 HDMI_EXT_EDID
TMDS_CLK- 1/16W 11 DDC_SDA_HDMI3
CK-_HDMI1_MN864788
C
TMDS_CLK_SHIELD
11 CK-_HDMI3_MN864788
TMDS_CLK_SHIELD CK+_HDMI1_MN864788
R3387
10
CK+_HDMI3_MN864788 TMDS_CLK+
OPT
D0-_HDMI1_MN864788
47K
10
TMDS_CLK+ D0-_HDMI3_MN864788 9 D0+_HDMI1_MN864788
TMDS_DATA0- HDMI_EXT_EDID_FET
G
9 D0+_HDMI3_MN864788
TMDS_DATA0- 8
TMDS_DATA0_SHIELD R3325 0
8
TMDS_DATA0_SHIELD
DDC pull-up
7
TMDS_DATA0+
D
7 AR3307 HDMI_EXT_EDID
TMDS_DATA0+ 6 5.1 Q3306 DDC_SDA_HDMI3_MN864788
TMDS_DATA1- 1/16W DDC_SDA_HDMI3 2N7002KA
6 5V_HDMI_1
TMDS_DATA1- 5 5V_HDMI_2 +5V_NORMAL ATMEL_HDMI_EXT_EDID
TMDS_DATA1_SHIELD D1-_HDMI1_MN864788 R3313
5
TMDS_DATA1_SHIELD 4
D1+_HDMI1_MN864788 +5V_NORMAL IC3301-*1
TMDS_DATA1+ 33 OPT
4 AR3300 D2-_HDMI1_MN864788 AT24C02C-SSHM-T
TMDS_DATA1+
A1
A2
5.1 3
A1
A2
TMDS_DATA2- D2+_HDMI1_MN864788
3 1/16W
TMDS_DATA2- MMBD6100 MMBD6100
2 A0 VCC
D1-_HDMI3_MN864788 TMDS_DATA2_SHIELD D3300 D3301
2 1 8
C
TMDS_DATA2_SHIELD D1+_HDMI3_MN864788 1
C
TMDS_DATA2+
1 D2-_HDMI3_MN864788
TMDS_DATA2+ A1 WP
D2+_HDMI3_MN864788 2 7
AR3309
DAADR019A
AR3400
1/16W
1/16W
DAADR019A A2 SCL
JK3302
47K
3 6
47K
JK3301
FOOSUNG_HDMI_JACK HDMI3 FOOSUNG_HDMI_JACK HDMI1 GND SDA
DDC_SDA_HDMI2_MN864788 4 5
DDC_SDA_HDMI1_MN864788
DDC_SCL_HDMI2_MN864788
5V_HDMI_2
5V_DET_HDMI_2
R3308
1.8K
ESD_HDMI
R3304 OPT OPT

R3310
VA3301
3.3K
1K R3338 R3307
33
4.7K
C
Q3301 R3306
2N3904S B 1K R3372 OPT 0
BODY_SHIELD HDMI_HPD_2
R3301 C3357
100K
20 E R3373 0 P_XOUT
HDMI_HPD_2_788
X3300
I2C_SDA2
20pF
ESD_HDMI
AR3305
VA3303
MN864778_RESET
I2C_SCL2
33 DDC_SDA_HDMI2_MN864788 27MHz
19 X-TAL_1 GND_2 P_VDD33
R3357
HOT_PLUG_DETECT
2.2M
1 4
HDMI_SW_SDA
HDMI_SW_SCL
18 GND_1 X-TAL_2
VDD[+5V] TX0SDA 2 3
17 +1.10V_VDDC_MN864778 P_VDD33 +5V_NORMAL
P_XOUT
DDC/CEC_GND VA3305 VA3307
C3358
P_XIN
ESD_HDMI ESD_HDMI TX0SCL
16 P_XIN
SDA
HDMI_HPD_2_788
+1.10V_VDDC_MN864778
HDMI_HPD_1_788
R3349
R3350
R3351
R3352
TX1SDA 20pF
1.8K
1.8K
1.8K
1.8K
15 P_AVDDH11
R3382
SCL R3374 0
HDMI_ARC_788
HDMI_ARC TX1SCL
14
RESERVED L3305
R3383
CEC_REMOTE R3375 OPT 0 C3311 C3317
HDMI_ARC_788 0.33uF BLM18PG121SN1D
OPT
13 22uF
10K
OPT
CEC R3353 0
AR3302 10V TX0SDA
0
0
0
0
0
12 5.1
10K
R3358
10K
R3359
TMDS_CLK- 1/16W C3334 R3354 0
TX0SCL
11 4.7uF R3355 OPT 0
R3361
R3362
R3363
R3360
TMDS_CLK_SHIELD CK-_HDMI2_MN864788 10V TX1SDA
10 CK+_HDMI2_MN864788 R3356 OPT 0
TMDS_CLK+ TX1SCL
D0-_HDMI2_MN864788
9 HDMI_HPD_3_788
TMDS_DATA0- D0+_HDMI2_MN864788
MOSI/LPSA0
SCLK/LPSA1
8
P_AVDDH33 P_AVDDH11
CH0ALRCLK
SYSCLK/XI
TMDS_DATA0_SHIELD
10K
CH0ABCLK
CH0AMCLK
TX0ARCIN
TX1ARCIN
7 R3311
VDD33_4
VDD11_9
CH0ASD0
CH0ASD1
CH0ASD2
CH0ASD3
VDD33IO
VDD11_8
VDD11_7
VDD33_3
VDD11_6
TMDS_DATA0+ C3363 10uF10V
AR3303
TX0SCL
TX1HPD
TX1SDA
TX1SCL
VSS_12
VSS_11
VSS_10
NRESET
6 5.1
VSS_9
NC/XO
HSDA0
HSCL0
NTEST
TMDS_DATA1- 1/16W
[EP]
MISO
+1.10V_VDDC_MN864778 P_VDD11 +1.10V_VDDC_MN864778 P_AVDD11 C3364 10uF10V
NCS
CEC
5 P_VDD11
TMDS_DATA1_SHIELD D1-_HDMI2_MN864788
NC
D1+_HDMI2_MN864788 P_AVDD33
4
TMDS_DATA1+ L3302 L3306
D2-_HDMI2_MN864788 BLM18PG121SN1D BLM18PG121SN1D
P_AVDD11
3
D2+_HDMI2_MN864788
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
1000pF
1000pF
1000pF
1000pF
1000pF
TMDS_DATA2-
1000pF
1000pF
4.7uF
0.1uF
2
TMDS_DATA2_SHIELD TX0SDA 1 108 RX0SCL
1 C3325
TMDS_DATA2+ 4.7uF
TX0HPD 2 107 RX0SDA
THERMAL DDC_SDA_HDMI1_MN864788
HDMI2
C3308
C3312
C3315
C3320
C3323
C3329
C3331
C3335
C3338
10V
CH1ASD0 RX1SCL
OPT
3 106
OPT
OPT
OPT
OPT
145
OPT
OPT
C3341 10uF10V DDC_SCL_HDMI2_MN864788

DAADR019A CH1ALRCLK 4 105 RX1SDA
JK3300 DDC_SDA_HDMI2_MN864788
FOOSUNG_HDMI_JACK C3342 10uF10V CH1ABCLK 5 104 VSS_8
HDMI2 with ARC
VSS_1 6 103 P0RX2P
HDMI1
D2+_HDMI1_MN864788
VDD11_1 7 102 P0RX2M
D2-_HDMI1_MN864788
P1TX2P 8 101 AVDD11RX0_3 C3365 0.1uF
C3343 0.1uF AVDD11TX_1 9 100 P0RX1P

D1+_HDMI1_MN864788
P1TX2M 10 99 P0RX1M
D1-_HDMI1_MN864788
IC3300
HDMI TX port 1
HDMI_3.3V P_VDD33 HDMI_3.3V P_AVDD33 P1TX1P 11 98 AVDD11RX0_2 C3366 0.1uF
L3303 L3307
C3344 0.1uF AVDD11TX_2 12 97 P0RX0P
D0+_HDMI1_MN864788
BLM18PG121SN1D BLM18PG121SN1D
P1TX1M P0RX0M
HDMI 5V_DET(DIODE SW) 13 96
0.33uF
D0-_HDMI1_MN864788
0.33uF
0.33uF
0.33uF
0.33uF
0.1uF
0.1uF
4.7uF
4.7uF
P1TX0P 14 95 AVDD11RX0_1 C3367 0.1uF
C3345 0.1uF AVDD33TX_1 15 94 P0RXCP

CK+_HDMI1_MN864788
P1TX0M
MN864788 P0RXCM
C3309
C3313
C3318
C3321
C3330
C3333
C3337
C3340
C3339
5V_HDMI_1 5V_HDMI_2 16 93
5V_HDMI_3 CK-_HDMI1_MN864788
P1TXCP 17 92 AVDD33RX0 C3368 0.1uF
HDMI_EN_DIODE
C3346 0.1uF AVDD11TX_3 18 91 VSS_7

A1
A2
MMBD6100 P1TXCM 19 90 P1RX2P
HDMI2
D3305 D2+_HDMI2_MN864788
VSS_2 P1RX2M
HDMI_EN_DIODE
C
20 89 D2-_HDMI2_MN864788
VDD11_2 AVDD11RX1_3 C3369 0.1uF
A1
A2
HDMI_3.3V HDMI_3.3V 21 88
MMBD6100 P_AVDDH33 P_PVDD33
D3306
P0TX2P 22 87 P1RX1P
HDMI_0_RX2+ D1+_HDMI2_MN864788
C
L3304
BLM18PG121SN1D
L3308 C3347 0.1uF AVDD11TX_4 23 86 P1RX1M
BLM18PG121SN1D D1-_HDMI2_MN864788
P0TX2M AVDD11RX1_2 C3370 0.1uF
0.33uF
HDMI_EN_DIODE
C3326 0.33uF
C3328 0.33uF
24 85
C3332 0.33uF
0.1uF
0.1uF
0.1uF
4.7uF
HDMI TX port 0
HDMI_0_RX2-
P0TX1P 25 84 P1RX0P
1.8K HDMI_0_RX1+ D0+_HDMI2_MN864788
R3389
C3348 0.1uF AVDD11TX_5 26 83 P1RX0M
C3314
C3324
C3322
C3319
C3336
D0-_HDMI2_MN864788
P0TX1M 27 82 AVDD11RX1_1 C3371 0.1uF
HDMI_0_RX1-
HDMI_EN_DIODE P0TX0P 28 81 P1RXCP
HDMI_0_RX0+ CK+_HDMI2_MN864788
C3349 0.1uF AVDD33TX_2 29 80 P1RXCM
CK-_HDMI2_MN864788
P0TX0M 30 79 AVDD33RX1 C3372 0.1uF
HDMI_0_RX0-
P0TXCP 31 78 VDD11_5
HDMI_0_CLK+
C3350 0.1uF AVDD11TX_6 32 77 RX2SCL
DDC_SCL_HDMI3
P0TXCM 33 76 RX2SDA
HDMI_0_CLK- DDC_SDA_HDMI3
VSS_3 34 75 RX3SCL P_VDD33
VDD11_3 35 74 RX3SDA
NIRQA1 RX0P5V AR3402
+1.10V_VDDC_MN864778 36 73 47K
1/16W
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
+12V
TYPICAL 1100mA +1.10V_VDDC_MN864778
NIRQA0
VDD33_1
PVDD33
VSS_4
AVDD33RX3
P3RXCM
P3RXCP
AVDD11RX3_1
P3RX0M
P3RX0P
AVDD11RX3_2
P3RX1M
P3RX1P
AVDD11RX3_3
P3RX2M
P3RX2P
VSS_5
AVDD33RX2
P2RXCM
P2RXCP
AVDD11RX2_1
P2RX0M
P2RX0P
AVDD11RX2_2
P2RX1M
P2RX1P
AVDD11RX2_3
P2RX2M
P2RX2P
VSS_6
VDD11_4
NIRQ1
VDD33_2
RX3P5V
RX2P5V
RX1P5V
L3300 3.3V Power Separation P_PVDD33
BLM18PG121SN1D
5V_HDMI_2 5V_HDMI_1
+3.3V_NORMAL +5V_NORMAL HDMI_3.3V
R3365 R3369
P_VDD33 10 10
+12V
R3346
C3300
10uF IC3302 R3367 R3368
10K
10K 47K 47K

16V R3344 TPS54327DDAR [EP]GND
POWER_ON/OFF1 OPT
HDMI3.3_FET_AOS(MULTI)
G
R3342 C3303
10K R3345 EN VIN
330K 0.1uF 1 8
R1 OPT
10uF10V
10uF10V
16V
THERMAL
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
R3340 R3341
0.1uF
3.9K 2.7K VFB VBST C3305 AO3438

9
2 7
C3316 Q3304
1% 1% 0.1uF L3301 C3310 5V_HDMI_3
100uF 22uF C3327
16V 3.6uH 10uF
VREG5 SW
C3356
C3359
C3360
6.3V 10V
C3352
C3354
C3353
C3355
C3351
R3366
C3362
C3361
3 6 10V
G
10
C3301 LPH6050T-3R6N-R
100pF SS GND
Place between
C3306 C3307 R3364
4
3A 5 ZD3300 PIN 57,60,63 47K
S
22uF 22uF
50V 2.5V
R2 10V 10V NTR4501NT1G
R3343
14K
Q3304-*1
C3302 C3304
1%
HDMI3.3_FET_ONSEMI(MULTI)
1uF 3300pF Place between
10V 50V
D2-_HDMI3_MN864788
D2+_HDMI3_MN864788
PIN 44,47,50
D1-_HDMI3_MN864788
D1+_HDMI3_MN864788
D0+_HDMI3_MN864788
CK-_HDMI3_MN864788
CK+_HDMI3_MN864788
D0-_HDMI3_MN864788
Switching freq: 700K Vout=0.765*(1+R1/R2)
HDMI3
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. HDMI 10
COMPONENT 1 PHONE JACK CVBS 1 PHONE JACK
C3822 R3814
VA3808 0.01uF
25V 470K
5.6V
1608 sizs For EMI

R3822
R3819 10K
1608 sizs For EMI
COMP1/AV1/DVI_L_IN
0 R3805
COMP1_Y 0
R3809
C3816 C3819
R3808
C3802 0 R3825
C3805 C3808
1/4W
560pF 100pF 12K
VA3803 150pF 27pF 100pF C3811
50V 50V
75
1%
5.5V OPT 50V 50V 47pF +3.3V_NORMAL
50V OPT OPT
OPT OPT
+3.3V_NORMAL
JK3801
PEJ038-4G6
5 M5_GND R3815
JK3803
R3801 47K
10K PEJ038-4Y6
4 M4 5 M5_GND
E
R3802 Q3801
3 M3_DETECT 1K
4 M4
COMP1_DET
B
1 M1 VA3804 3 M3_DETECT C
5.6V
AV1_CVBS_DET
6 M6 1 M1 VA3807 R3816
5.6V C3824 10K
EAG61030012 6 M6 0.1uF
1608 sizs For EMI
50V
0 R3804
COMP1_Pb_1 COMP1_Pb 1608 sizs For EMI
EAG61030011 R3824
R3820 10K
C3804 C3806
VA3801 R3806 C3810 COMP1/AV1/DVI_R_IN
27pF 27pF 0
5.5V 50V 50V 75 10pF
OPT OPT 1% 50V VA3809 C3823 R3817 C3817 C3820
5.6V 0.01uF R3826
25V 470K 560pF 100pF 12K
VA3802 50V 50V
5.5V OPT OPT
1608 sizs For EMI

0 R3803 COMP1_Pr
1uH
C3803 L3803 R3823
C3807 R3807 C3809 CM2012F1R0KT
27pF 0
27pF 75 10pF
50V 50V 50V AV1_CVBS_IN
OPT 1%
OPT
R3821
C3814 C3815 C3818
1/4W
VA3806 150pF 150pF 150pF C3821
75
1%
5.5V OPT 50V 50V 47pF
50V
FOR S2A
Solteam
JK3802-*1
JSTIB15
VIN A
HP OUT
Fiber Optic
VCC B
GND C
4
SHIELD
foxconn
JK3802
+3.3V_NORMAL 2F11TC1-EM52-4F HP_OUT
HP_OUT
L3801 R3829
VIN PZ1608U121-2R0TF 150
SPDIF OUT A HP_OUT
Fiber Optic
HP_LOUT_AMP HP_OUT 1/10W JK3805

C3825 5% +3.3V_NORMAL PJ752-F04L3BE-A
VCC B 0.22uF
3 3
25V
R3800 R3827
33 GND C 2 2
SPDIF_OUT HP_OUT 10K
VA3800 C3801 4 R3828 HP_OUT
C3800 5.5V 0.1uF 100 4 4
18pF 16V HP_DET
SHIELD
50V 1/16W
OPT HP_OUT HP_OUT 5% 1 1
L3802 R3830
ADUC 5S 02 0R5L PZ1608U121-2R0TF 150
HP_ROUT_AMP HP_OUT 1/10W

C2386 5%
0.22uF VA3810
25V 5.6V
HP_OUT
RS232C
HP_LOUT_MAIN
R3831
OPTC3827
22K
AR3800
100 0.01uF
OPT
1/16W
RS232C
RIN1 HP_LOUT
HP_ROUT
R 1
JP3814
DOUT1
JP3813
HP_ROUT_MAIN
R3832
DETECT 3 OPT
C3828
22K
0.01uF
OPT
L 4
DOUT1
GND 5
RIN1
PEJ038-3B6
JP3815
JK3804
Close to Main soc

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. JACK_COMMON_V 38 01
JACK_COMMON_V
[EF95 ONLY] IR/COMBO
WIFI POWER ENABLE CONTROL
P4101
12507WR-08L
+3.5V_WIFI
+3.5V_ST IC4100
1 AP2191WG-7
R4101 0.1uF
100 C4101 IN OUT
2 M_RFModule_RESET
5 1
C4112
3 0.1uF GND
2
4 WIFI_EN R4115 33 EN FLG

WOL/WIFI_POWER_ON 4 3
100
R4100 C4100 R4114
5 0.1uF
10K
R4103 OPT
JP4111 10
WIFI_DM
6
RCLAMP0502BA
R4104
10
7 Place Near Wafer WIFI_DP
D4100
C4104 C4105
5pF 5pF
8 50V 50V
WIFI_DMDP_ESD
9
+3.5V_WIFI
50V 10V
3300pF 0.1uF 22uF L4100
C4102 C4103 C4107 BLM18PG121SN1D
P4100
12507WR-10L
+3.5V_ST
1 R4110 R4111
10K 10K
1% 1% R4112
100
2
KEY1
R4113
100
3
KEY2
+3.5V_ST C4110 C4111
0.1uF 0.1uF
4 OPT
OPT
C4106
5 1000pF
JP4112 50V
OPT
6 JP4113
+3.5V_ST
7
10K
LOGO_LIGHT R4106
OPT
C
8 LOGO_LIGHT
B
LOGO_LIGHT
LOGO_LIGHT
R4107
Q4100 1K C4109
10K
9 E MMBT3904(NXP) R4102 0.1uF

LOGO_LIGHT 16V
10
11
IR
C4108 R4105 5%
100pF
50V 10K
+3.5V_ST
EYE_SCL
100
R4109
EYE_SDA
100
R4108

FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
[OLED]MULTI JACK
+5V_USB FOR USB1
+5V_USB_3
USB3
OCP USB1 MAX 1.0A
JK4302
3AU04S-305-ZC-(LG)
+5V_USB_1
USB DOWN STREAM

+3.3V_NORMAL R4300
+5V_NORMAL 2.2
2
USB_DM3
IC4300
BD2242G R4301
2.2
3
USB_DP3
USB_ESD(SD05)
RCLAMP0502BA
0DR050008AA
R4305 VIN VOUT
4.7K 1 6 C4322 C4323
D4301
D4302
4
USB_ESD(KEC) 22uF
5V
10uF
C4300 GND ILIM 0DTKE00018A 10V
10V
5
0.1uF 2 5 D4301-*1
16V
14K
R4306
1%
EN OC
/USB_OCD1 3 4
EAH61515101
SEMTECH_USB_DMDP_ESD(MAIN)
USB_CTL1
D4302-*1
R4304 DF3D6.8MS
10K
EAH62735601
TOSHIBA_USB_DMDP_ESD(SUB)
+5V_USB_2
USB2
MAX 1.0A
JK4300
3AU04S-305-ZC-(LG)
USB DOWN STREAM
R4302
2.2
2
USB_DM2
R4303
2.2
3
USB_DP2
SEMTECH_USB_DMDP_ESD(MAIN)
RCLAMP0502BA
EAH61515101
USB_ESD(SD05)
0DR050008AA
D4300
C4310
4
C4311
D4303
5V
10uF 22uF
5
10V 10V
USB_ESD(KEC)
0DTKE00018A
D4303-*1
D4300-*1
DF3D6.8MS
EAH62735601
TOSHIBA_USB_DMDP_ESD(SUB)
+5V_USB_1
USB1 (3.0)
USB_ESD(SD05) MAX 1.2A
ZD4302
0DR050008AA
5V CNPLUS CO., LTD

C4312 C4313
22uF 10uF JK4301
USB_ESD(KEC)
10V 10V 0DTKE00018A 5205-56209
ZD4302-*1
EAG63374203
USB3.0_TVS VBUS
1
D4304
D-
USB_DM1 RCLAMP0544T.TCT 2
6.5VTO11.0V D+
USB_DP1 1 8 3
2 7 GND
4
3 6 STDA_SSRX-
SSUSB_RXP 5
4 5
STDA_SSRX+
SSUSB_RXN 6
9 GND_DRAIN
7
USB3.0_TVS
STDA_SSTX-
D4305 8
RCLAMP0544T.TCT STDA_SSTX+
9
6.5VTO11.0V
1 8 10
2 7 SHIELD
3 6
SSUSB_TXP 4 5
SSUSB_TXN
9

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. USB 43
Full Scart(18 Pin Gender)
+3.3V_NORMAL
EU
R4601 CLOSE TO JUNCTION
10K
EU
R4602
100
SC_DET
EU
C4604
VA4601 0.1uF
5.6V
FOR S2A
EU
EU
L4602
1uH
SC_CVBS_IN
R4606 C4605 C4606

EU 150pF 150pF
VA4607 75 50V 50V
SHIELD 5.5V EU EU
EU
EU
19
R4614
AV_DET 0
18
COM_GND
VA4608 EU DTV/MNT_V_OUT
5.5V R4600 EU 68pF 68pF OPT
17
SYNC_IN EU 75 C4612 C4613
16
SYNC_OUT
15
SYNC_GND EU
R4608
14 22
RGB_IO
13 SC_FB
R_OUT VA4602
12 5.6V EU
R_GND EU R4603
11 75
G_OUT
10
G_GND
9 SC_R
ID
8 VA4603
B_OUT EU
5.5V R4604
7
AUDIO_L_IN EU 75
6
B_GND
5 JP4613
SC_G
AUDIO_GND
4 VA4604
AUDIO_L_OUT
5.5V EU
3
AUDIO_R_IN EU R4605
75
2
AUDIO_R_OUT
1
SC_B
VA4605
5.5V EU
DA1R018H91E R4607
EU
JK4600 75
EU
EU R4615
15K
SC_ID
VA4600 R4616
EU
20V 3.9K
EU
EU
R4619
10K
SC_L_IN
VA4609 EU EU
5.6V R4620 R4618
EU 470K 12K
EU
R4622
10K
SC_R_IN
EU EU
VA4606 R4623 R4621
5.6V 470K 12K
EU
BLM18PG121SN1D
L4600
DTV/MNT_L_OUT
VA4610 EU EU EU
5.6V C4600 C4602
EU 1000pF 4700pF
50V
BLM18PG121SN1D
L4601
DTV/MNT_R_OUT
EU EU
VA4611 EU C4603
5.6V C4601 4700pF
EU 1000pF
50V

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. SCART_JACK_V 46 01
SCART_JACK_V
Ethernet Block
LAN_JACK_POWER
C5000 C5001 C5002 C5003

0.1uF 0.01uF 0.1uF 0.01uF
16V 50V 16V 50V
JK5000
BS-RSD0303
P1[CT]
R1
P2[TD+]
R2
EPHY_TDP
P3[TD-]
R3
EPHY_TDN
P4[RD+]
R4
EPHY_RDP
P5[RD-]
R5
EPHY_RDN
P6[CT] VA5000 VA5001 VA5002 VA5003

R6
5.5V 5.5V 5.5V 5.5V
LAN_ESD(MAIN) LAN_ESD(MAIN)
LAN_ESD(MAIN)
LAN_ESD(MAIN)
P7
R7
P8
R8
9
R9 EMI
R5000
ICVS0518150FR_
ICVS0518150FR_
ICVS0518150FR_
ICVS0518150FR_
P10[GND] 0
LAN_ESD(SUB)
LAN_ESD(SUB)
LAN_ESD(SUB)
LAN_ESD(SUB)
R10
VA5000-*1
VA5001-*1
VA5002-*1
VA5003-*1
P11
R11
YL_C
P1
YL_A
P2
GN_C
P3
GN_A
P4
16
SHIELD

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. LAN_V 50 01
LAN_V
AUDIO AMP(NTP7515) SM-6045-100
GET_AMP_COIL
L5802-*1
10.0uH
+3.3V_NORMAL
R5805
AMP_RESET_N 100
TAIYO_AMP_COIL
NRS6045T100MMGK
1/16W
R5806 C5806 L5802
L5801 10.0uH
4.7K 1000pF
PZ1608U121-2R0TF 50V SPK_L+
50V
AUD_SCK
+24V_AMP
22000pF
R5807
1/10W
C5807
3.3
R5811
5%
C5821
C5805 0.1uF 4.7K
50V
[EP]GND
0.1uF C5813
C5809 390pF
VDD_IO
GND_IO
PGND1A
PVDD1A
PVDD1B
16V 10uF 50V
CLK_I
RESET
BST1A
OUT1A
35V
C5819
0.47uF
50V
AD
C5814
390pF
50V C5822 R5812
R5808
1/10W
TAIYO_AMP_COIL
0.1uF SPEAKER_L
3.3
50V 4.7K
5%
NRS6045T100MMGK
40
39
38
37
36
35
34
33
32
31
L5805
NC_1 1 30 OUT1B 10.0uH
SPK_L-
VDD_PLL 2 29 PGND1B C5811

THERMAL 22000pF SM-6045-100
NC_2 3 41 28 BST1B 50V GET_AMP_COIL
C5800
1uF L5805-*1
10V GND 4 27 VDR1 10.0uH
NC_3 5 IC5800 26 NC_5

C5801
1uF
10V
DVDD 6 NTP7515 25 AGND
AUD_LRCH
SDATA 7 24 VDR2
WCK 0x54 BST2A
C5817
1uF
C5818
1uF SM-6045-100
AUD_LRCK 8 23 10V 10V GET_AMP_COIL
NC_4 9 22 PGND2A C5812 L5803-*1

10.0uH
22000pF
AR5800
100 SDA 10 21 OUT2A 50V
I2C_SDA4
11
12
13
14
15
16
17
18
19
I2C_SCL4
20
TAIYO_AMP_COIL
NRS6045T100MMGK
C5802 C5804
33pF 33pF L5803
50V 50V 10.0uH
SCL
FAULT
MONITOR_0
MONITOR_1
MONITOR_2
BST2B
PGND2B
OUT2B
PVDD2B
PVDD2A
SPK_R+
+3.3V_NORMAL
R5809
1/10W
+24V_AMP
3.3
5%
C5823 R5813
R5801 0.1uF 4.7K
10K C5815 C5820 50V
390pF 0.47uF
R5804 C5810 50V
C5816
50V
SPEAKER_R
C 100 10uF 390pF
35V 50V TAIYO_AMP_COIL
R5800 C5803 C5824 R5814
R5810
1/10W
B Q5800 C5808 NRS6045T100MMGK
AMP_MUTE 1000pF 0.1uF 4.7K
3.3
2N3904S 50V
5%
10K 22000pF L5804 50V
E KEC_AMP_MUTE_TR
WOOFER_MUTE
50V 10.0uH
I2S_AMP
SPK_R-
SM-6045-100
GET_AMP_COIL
L5804-*1
C 10.0uH 4P Box type
B WAFER-ANGLE
Q5800-*1
MMBT3904(NXP)
NXP_AMP_MUTE_TR
E
TP5801 WOOFER_MUTE SPK_L+
4
TP5802 I2S_AMP
SPK_L-
3
SPK_R+
2
SPK_R-
1
P5800

NTP_AMP 58
+12V
EU
L6000
IC6000
AUD_OUT >> EU/CHINA_HOTEL_OPT AZ4580MTR-E1 EU
C6004
EU EU 0.1uF
C6000 50V
DTV/MNT_L_OUT
R6000 OUT1
1 8 VCC
EU
[SCART AUDIO MUTE]
10uF 2.2K EU
OPT OPT EU R6011 C6008
C6002 R6002 R6004 33K IN1- 7 OUT2 SIGN600007 2.2K
2 DTV/MNT_R_OUT DTV/MNT_L_OUT
6800pF 470K
C6003 33pF 10uF
EU
IN1+ EU 6 IN2- R6008
EU
33K
OPT
R6010
OPT
3 C6007
470K EU
C6005 33pF 6800pF C
R6013
VEE 5 IN2+ Q6000 B 1K
4 EU
MMBT3904(NXP) EU_SCART_MUTE_ISAHAYA
SCART_AMP_L_FB
E EU Q6002
RT1P141C-T112
R6007
1/16W
E
100K
EU SCART_AMP_R_FB SCART_MUTE
OPT
5%
EU
R6012
1/16W
R6006 R6020
100K
5.6K 0
OPT
B
SCART_Lout
5%
EU
1/16W EU
R6009
1/16W
R6021 R6016
100K
330pF 220K 5% DTV/MNT_R_OUT PDTA114ET

OPT
C6009 R6005 0 5.6K

5%
Q6002-*1
EU EU SCART_Rout
E
EU
R6015
1/16W
1/16W
100K
5% EU EU C
OPT
R6017 C6012 R6014

5%
220K 330pF Q6001 B 1K
B
MMBT3904(NXP)
EU_SCART_MUTE_NXP
CLOSE TO MSTAR E EU
CLOSE TO MSTAR
Near Place Scart AMP

EU
R6019
0 EU
SCART_AMP_R_FB
1/16W 10K
5% R6003
EU
R6018
0 EU
SCART_AMP_L_FB
1/16W 10K
5% R6001

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. SCART AMP
EARPHONE AMP
HP_OUT_2.2uF(CN_DRA)
HP_OUT_2.2uF(CN_DRA) IC6100 C6101-*1
TPA6138A2 2.2uF
C6100-*1
2.2uF 10V
10V HP_OUT +INR +INL HP_OUT
HP_OUT_1uF C6104 1 14 C6109 HP_OUT_1uF
HP_OUT
C6100 HP_OUT 18pF HP_OUT HP_OUT 18pF HP_OUT C6101
1uF R6100 R6106 R6104 R6101 1uF
10V 10K 43K HP_OUT -INR -INL HP_OUT 43K 10K 10V
2 13
HP_ROUT_MAIN HP_LOUT_MAIN
HP_OUT
R6103
HP_OUT
R6102
HP_BYPASS 1% C6108 C6106 1% HP_BYPASS
43K
43K
R6107 10pF
1%
1%
OUTR OUTL 10pF 0
0 50V 3 12 50V R6108
HP_LOUT_AMP
HP_ROUT_AMP
+3.3V_NORMAL GND_1 UVP
4 11
HP_OUT MUTE GND_2 +3.3V_NORMAL

4.7K 5 10
R6105
SIDE_HP_MUTE VSS VDD

6 9
HP_OUT HP_OUT
HP_OUT
C6105 C6107
C6102 CN CP 1uF 0.1uF
1uF 7 8
10V 16V
10V
C6103
1uF
10V
HP_OUT

HEADPHONE AMP
B-CAS (SMART CARD) INTERFACE
+3.3V_NORMAL INT CMDVCC : STATUS

+3.3V_NORMAL ---------------------------------
HIGH HIGH CARD PRESENT
LOW HIGH CARD not PRESENT
SIGN630003
IC6300
TDA8024TT
2.7K
2.7K
R6301
R6303
R6305
JAPAN
JAPAN
CLKDIV1 CLKDIV2 : F_CRD_CLK

OPT
-----------------------------
1 0 CLKIN CLKDIV1 AUX2UC
1 28
JAPAN
JAPAN
JAPAN
R6317
R6318
R6315
R6319
R6316
OPT
OPT
1.2K
1.2K
1.2K
1.2K
1.2K
CLKDIV2 AUX1UC
2 27
R6300 33 5V/3V I/OUC

3 26
SMARTCARD_PWR_SEL CAM_IREQ_N
2.7K
JAPAN
R6302
R6304
R6306
JAPAN
OPT
OPT
PGND XTAL2
+5V_NORMAL 4 25
R6307 33 JAPAN
S2 XTAL1 /PCM_CE1 SMARTCARD_DATA
JAPAN 5 24 R6308 33 JAPAN
EB_OE_N SMARTCARD_CLK
L6300 R6309 33 JAPAN
EB_BE_N0 SMARTCARD_DET
BLM18PG121SN1D VDDP OFF R6310 33 JAPAN
JAPAN 6 23 EB_BE_N1 SMARTCARD_RST
JAPAN
C6301 C6303
10uF 0.1uF S1 GND JAPAN
10V 16V 7 22 R6311 33 EB_WE_N SMARTCARD_VCC
L6301 JAPAN
+3.3V_NORMAL
JAPAN
VUP VDD BLM18PG121SN1D
8 21
JAPAN
JAPAN JAPAN
C6302 PRES RSTIN C6305 C6306
0.1uF 9 20 0.1uF 0.1uF
16V 16V 16V
B-CAS SLOT
PRES CMDVCC
10 19
P6300
I/O PORADJ 10057542-1311FLF(B CAS Slot)
11 18
AUX2 VCC JAPAN VCC

12 17 C1
C6307
0.33uF
AUX1 RST 16V RST
13 16 C2
CGND CLK Place CLK C3 far from C2,C7,C4 and C8 CLK

14 15 C3
JAPAN
C6304 RESERVED_1
0.1uF C4
16V
GND
C5
VPP JAPAN
C6
JAPAN
R6313
75 I/O
C7
75 ohm in I/O is for short circuit Protection
RESERVED
C8
SW1
S1
+3.3V_NORMAL
JAPAN
JAPAN
10K
R6312
R6314
1K SW2
S2
JAPAN_DIODE(SD05) JAPAN_DIODE(SD05)
0DR050008AA 0DR050008AA
ZD6300 ZD6301
5V 5V
JAPAN_DIODE(KEC)
0DTKE00018A
ZD6300-*1
JAPAN_DIODE(KEC)
0DTKE00018A
ZD6301-*1

FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS JAPAN B-CAS
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 63
FE_DEMOD1_TS_ERROR
FE_DEMOD2_TS_ERROR
FE_DEMOD3_TS_CLK
1. should be guarded by ground FE_DEMOD3_TS_SYNC
2. No via on both of them FE_DEMOD3_TS_VAL
3. Signal Width >= 12mils FE_DEMOD3_TS_ERROR
close to Tuner Signal to Signal Width = 12mils FE_DEMOD3_TS_DATA
+3.3V_TUNER Ground Width >= 24mils
L6500
PZ1608U121-2R0TF close to TUNER
1 +3.3V_LNA_TU C6501
0.1uF TU_K/M/W_TW/BR/CO R6507 1K
TU_K/M/W_TW/BR/CO TU_K/M/W_TW/BR/CO
2 RF_SWITCH_CTL_TU RF_SWITCH_CTL
C6504 R6503
0.1uF 10K
TU_ALL_IntDemod
R6506 1K
3 IF_AGC_TU IF_AGC
C6502 close to Tuner TU_ALL_IntDemod
0.1uF
16V TU_W_BR/TW
TU_ALL AR6500-*1
AR6500
33 200
1/16W +3.3V_NORMAL
PZ1608U121-2R0TF
4 I2C_SCL5_TU I2C_SCL5
C6505
I2C_SDA5 +3.3V_TUNER
47pF
L6504
5 50V
I2C_SDA5_TU +3.3V_TUNER 1608 perallel
C6503 OPT
because of derating
47pF
50V
OPT TU_ALL_2178B TU_SIF TU_ALL_2178B
TU_ALL_2178B
R6513 0 R6516 R6517
R6504 200 200
10
6 IF_P_TU
TU_ALL_IntDemod C6519 IF_P C6517 C6508
33pF L6502 TU_CVBS 22uF 0.1uF
should be guarded by ground,Match GND VIA R6505 OPT 10V 16V
10 TU_H/M_EU/BR/TW/CO/KR E
7 IF_N_TU C6520 IF_N
TU_ALL_IntDemod 33pF 0TR390609DC
KEC_TU_ALL_2178B_TR(SUB)
TU_H/M_EU/BR/TW/CO/KR B Q6502
2N3906S-RTK
8 TU_SIF_TU C
E
TU_M_KR/EU/CN // W_ALL
9 TU_CVBS_TU NXP_TU_ALL_2178B_TR(MAIN)
L6501 +3.3V_TUNER B Q6502-*1
Global F/E Option Name PZ1608U121-2R0TF MMBT3906(NXP)
1. TU C EBK61012701
10
2. Tuner Name = TDJ’H’,TDj’M’... C6510
3. Country Name = KR,US,BR,EU ... 0.1uF
11 +3.3V_TU
TU_M_KR/EU/CN // W_ALL
T2 : Max 1.7A
Example of Option name else : Max 0.7A
12 FE_DEMOD1_TS_ERROR close to Tuner
TU_ALL_IntDemod = All Tuner type for Internal demod
TU_M/W = apply TDSM&TDSW Type Tuner FE_DEMOD1_TS_ERROR TU_M/W_BCD_LDO(MAIN)
TU_M/W_1.2V
14 FE_DEMOD1_TS_CLK FE_DEMOD1_TS_CLK IC6500 Demod_Core
AP2132MP-2.5TRG1
R6519-*1 R6521-*1
TU_M/W_1.1V TU_M/W_1.1V
14’ Tuner Type for Global BCD
[EP]
TDJ’H’-G101D : Half NIM for EU,AJJA 15 FE_DEMOD1_TS_SYNC FE_DEMOD1_TS_SYNC
18K
10K
R6521
TDJ’H’-H101F : Half NIM for US, KR
TDJ’K’-T101F : Half NIM for TW FE_DEMOD1_TS_VAL FE_DEMOD1_TS_VAL TU_M/W PG GND R2
16 1 8
TDJ’M’-C301D,F : FULL NIM for China
THERMAL
+3.3V_NORMAL C6516
10.5K
R6519
TU_M/W_1.2V
TDJ’M’-B101F : Brazil NIM with Isolater Type 0.1uF
16K
EN ADJ
9
17 FE_DEMOD1_TS_DATA[0] 2 7
TDJ’M’-K101F : colombia NIM R1
R6500
TU_M/W
10K
TDJ’M’-G101D,G105D,G151D : EU Combo&Full NIM VIN VOUT
18 FE_DEMOD1_TS_DATA[1] FE_DEMOD1_TS_DATA[0-7]
TDJ’M’-H101F,H151F : Korea PIP tuner 3 6
TDJ’W’-A151D : AJJA T2 PIP @netLa
19 FE_DEMOD1_TS_DATA[2] @netLa +5V_NORMAL
VCTRL
4 2A 5
NC
@netLa ESD_TU_M/W TU_M/W TU_M/W

FE_DEMOD1_TS_DATA[3] 5V ZD6501 EAN61387601
20 FE_DEMOD1_TS_DATA[3] C6500 C6518
0.1uF 10uF
@netLa 16V 10V
FE_DEMOD1_TS_DATA[4] TU_M/W
21 @netLa
C6515
@netLa 1uF
FE_DEMOD1_TS_DATA[5] @netLa 25V
22
TU_M/W_HTC_LDO(SUB)
23 FE_DEMOD1_TS_DATA[6]
Vout=0.6*(1+R1/R2) IC6500-*1
TJ2132GDP
TAEJIN TECHNOLOGY CO., LTD.
24 FE_DEMOD1_TS_DATA[7]
TU_M/W [EP]GND
R6501
TU_M/W 100 /TU_RESET1 +3.3V_TUNER
25 /TU_RESET1_TU
C6507
TU_M/W
L6503 POK GND
16V PZ1608U121-2R0TF 1 8
0.1uF
THERMAL
26 +3.3V_DEMOD_TU
C6511 TU_M/W EN FB
9
2 7
0.1uF
27 I2C_SCL2_TU TU_M/W TU_K/M/W_NON_JP 0 R6502
L6505 AR6501 FE_DEMOD1_TS_CLK_1 FE_DEMOD1_TS_CLK IN OUT
33 TU_M/W TU_K/M/W_NON_JP 0 R6511
PZ1608U121-2R0TF FE_DEMOD1_TS_SYNC_1 FE_DEMOD1_TS_SYNC 3 6
Demod_Core OPT TU_K/M/W_NON_JP 0 R6512
28 D_Demod_Core
C6513 I2C_SCL2 FE_DEMOD1_TS_VAL_1 FE_DEMOD1_TS_VAL
TU_M/W 18pF I2C_SDA2 TU_K/M/W_NON_JP 0 R6514 BIAS SS
C6506 50V FE_DEMOD1_TS_DATA0_1 FE_DEMOD1_TS_DATA[0] 4 5
0.1uF OPT
29 LNB_TX LNB_TX
C6512 EAN63492001
18pF
50V
30 I2C_SDA2_TU
31 LNB_OUT LNB_OUT TU_JP 0 R6515

FE_DEMOD2_TS_CLK TU_JP 0 R6518
FE_DEMOD2_TS_SYNC TU_JP 0 R6520
34 FE_DEMOD2_TS_ERROR FE_DEMOD2_TS_ERROR FE_DEMOD2_TS_VAL
TU_JP 0 R6522
FE_DEMOD2_TS_DATA
36 FE_DEMOD2_TS_SYNC FE_DEMOD2_TS_SYNC
37 FE_DEMOD2_TS_CLK FE_DEMOD2_TS_CLK
L6506 +2.5V_Normal
BLM18PG121SN1D Close to Tuner
38 +2.5V_DEMOD
C6509 TU_JP
0.1uF
39 FE_DEMOD2_TS_VAL FE_DEMOD2_TS_VAL
TU_JP
40 FE_DEMOD2_TS_DATA FE_DEMOD2_TS_DATA
R6527
100 /TU_RESET2
45 /TU_RESET2_TU
C6514 TU_JP
16V
0.1uF
TU_JP

FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS LM14A
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. TU_CIRCUIT
TU_K_BR
TU_H_US TU_M_T2_KR TU_M_EU TU_W_JP
TU6706 TU6705 TU6704 TU6702 TU6703
TDJK-T351F TDJH-H351F TDJM-H451F TDJM-G351D TDJW-J351F
B[3.3V] +3.3V +3.3V B1[+3.3V] +3.3V_LNA

1 1 1 1 1 +3.3V_LNA_TU 1
NC NC_1 NC_1 NC_1
2 2 2 2 RF_SWITCH_CTL_TU 2
IF_AGC DIF_AGC DIFAGC AIF_AGC NC_2
3 3 3 3 3 IF_AGC_TU 3
SCL SCL_RF SCL_RF SCL_RF SCL_RF
4 4 4 4 4 I2C_SCL5_TU 4
SDA SDA_RF SDA_RF SDA_RF SDA_RF
5 5 5 5 5 I2C_SDA5_TU 5
IF[P] DIF[P] DIF[P] AIF[P] NC_3
6 6 6 6 6 IF_P_TU 6
IF[N] DIF[N] DIF[N] AIF[N] NC_4
7 7 7 7 7 IF_N_TU 7
SIF SIF SIF SIF NC_5
8 8 8 8 8 TU_SIF_TU 8
CVBS CVBS CVBS CVBS NC_6
9 9 9 9 9 TU_CVBS_TU 9
NC_2 NC_2 NC_7
10 10 10 10
A1 B1 A1 B1 +3.3V_RF B2[+3.3V] +3.3V_RF
A1 B1 A1 B1 11 11 11 +3.3V_TU 11
TU_GND_B
47 47 ERROR ERROR NC_8
TU_GND_A
12 12 12
TU_GND_B
FE_DEMOD1_TS_ERROR 12
TU_GND_A
GND GROUND GND_1

SHIELD SHIELD 13 13 13 13
MCLK MCKL
14 14 FE_DEMOD1_TS_CLK_1 14
SYNC SYNC
15 15 FE_DEMOD1_TS_SYNC_1
VALID VALID
16 16 FE_DEMOD1_TS_VAL_1 16
DATA DATA0
17 17 FE_DEMOD1_TS_DATA0_1 17
NC_3 DATA1
18 18 FE_DEMOD1_TS_DATA[1] 18
NC_4 DATA2
NC_5 DATA3
NC_6 DATA4
NC_7 DATA5
NC_8 DATA6
EMS Improvement NC_9 DATA7
TU_GND_A
C6704 C6705 RESET_DEMOD RESET_DEMOD RESET_M_DEMOD
3300pF 3300pF 25 25 25 /TU_RESET1_TU 25
630V 630V
TU_GND_B +3.3V_DEMOD B3[+3.3V] +3.3V_DEMOD
26 26 26 +3.3V_DEMOD_TU 26
SCL_DEMOD. SCL_DEMOD SCL_DEMOD
27 27 27 I2C_SCL2_TU 27
+1.2V_DEMOD B4[+1.2V] +1.2V_DEMOD
28 28 28
TUNER EMS GND SEPERATION 29
NC_10
29
F22_OUTPUT
29
NC_9
D_Demod_Core
LNB_TX
SDA_DEMOD SDA_DEMOD SDA_DEMOD
30 30 30 I2C_SDA2_TU 30
TU_GND_A
TU_GND_B
DVB ESD LNB LNB

31 31 LNB_OUT 31
Improvement
A1 B1 GND GND_2
A1 B1 32 32 32
C6700
47 NC_10
C6703 C6707
TU_GND_A
33 33
0 R6705
0 R6706
0 R6707
TU_GND_B
TU_M_EU
TU_M_EU
TU_M_EU
1000pF 1000pF 1000pF

630V 630V A1 B1 M_ERROR
C6706 R6700 630V C6708
TU_GND_A3_1nF TU_GND_B1_1nF TU_GND_B3_1nF SHIELD A1 B1 34 34
0.022uF 0 1000pF FE_DEMOD2_TS_ERROR
R6708
630V R6703 R6704 630V
TU_GND_A2_0ohm
22 22 0 TU_GND_B4_1nF 47 GND_3
TU_GND_A
TU_GND_A1_22nF TU_GND_B5_0ohm 35 35
TU_GND_B
TU_GND_A4_22ohm TU_GND_B2_22ohm
M_SYNC
C6703-*1 C6707-*1 C6708-*1 SHIELD 36
0.022uF 0.022uF 0.022uF FE_DEMOD2_TS_SYNC 36
C6706-*1 R6700-*1 630V 630V 630V M_MCLK
1000pF C6700-*1 TU_GND_B1_22nF TU_GND_B4_22nF
0.022uF
0.022uF
TU_GND_B3_22nF 37 FE_DEMOD2_TS_CLK
630V 630V
630V 1st layer R6704-*1 R6704-*2 R6708-*1
22
TU_GND_A1_1nF TU_GND_A2_22nF
TU_GND_A3_22nF
0 10 +2.5V_DEMOD
38 +2.5V_DEMOD
4th Layer TU_GND_B2_0ohm TU_GND_B2_10ohm TU_GND_B5_22ohm
M_VALID
39 FE_DEMOD2_TS_VAL
GND_A GND_B M_DATA
40 FE_DEMOD2_TS_DATA 40
S_ERROR
41 FE_DEMOD3_TS_ERROR 41
S_SYNC
42 FE_DEMOD3_TS_SYNC 42
TU_GND_A EU/CIS AJJA TW/COL CN/HK KR North.AM BR JP S_MCLK
TU_M_TW/CO
TU_M_AJ/JA TU_M_CN 43 FE_DEMOD3_TS_CLK 43
TU6704-*2 TU6704-*1
TU6704-*3
TDJM-C451D
TDJM-K351F TDJM-G355D S_VALID
GND A_1 X X 22 nF X 22 nF 1 nF B1[+3.3V] 44 FE_DEMOD3_TS_VAL 44
B1[+3.3V] B1[+3.3V] 1
1 1
NC_1
2
NC_1 2
NC_2 S_RESET_DEMOD
GND A_2 X 22 nF 0 ohm 3
NC_1 3
AIF_AGC 3
45 /TU_RESET2_TU 45
0 ohm 0 ohm 0 ohm 4
SCL_RF 4
SCL_RF 4
SCL_RF
SDA_RF
5
SDA_RF 5
SDA_RF 5
NC_3 S_DATA
22 nF 6
NC_2 6
AIF[P] 6
NC_4 46 FE_DEMOD3_TS_DATA 46
GND A_3 1 nF X X 22 nF 1 nF 7
NC_3 7
AIF[N] 7
SIF
SIF SIF 8
8 8
CVBS
CVBS 9
9
CVBS
NC_4
9
NC_2 10
NC_5 47
10 10
NC_6
GND A_4 22 ohm X 22 ohm X 22 ohm 22 ohm 11

NC_5 11
B2[+3.3V] 11
ERROR A1 B1
12
ERROR 12
ERROR
GND
12
13
GROUND A1 B1 48
GND 13
13 MCLK
14
MCLK 14
MCLK 14
SYNC 47
15
SYNC 15
SYNC 15
VALID
49
TU_GND_B EU/CIS AJJA TW/COL CN/HK KR North.AM BR JP VALID VALID 16
TU_GND_A
16 16
DATA0
TU_GND_B
DATA0 DATA0 17
17 17
DATA1
18
DATA1 18
DATA1
DATA2
18
19
DATA2 SHIELD
DATA2 19
GND B_1 19 DATA3
1 nF X 1 nF X 22 nF X 20
DATA3 20
DATA3
DATA4
20
21
DATA4
DATA4 21
21 DATA5
DATA5 DATA5 22
22 22
DATA6
DATA6 DATA6 23
GND B_2 10 ohm X 22 ohm X 22 ohm X
23
24
DATA7
23
24
DATA7 24
DATA7
RESET_DEMOD
RESET_DEMOD RESET_DEMOD 25
25 25
B2[+3.3V]
B2[+3.3V] B3[+3.3V] 26
26
22 nF 22 nF 1 nF
26
SCL_DEMOD 27
SCL_DEMOD
GND B_3 1 nF 1 nF 1 nF 27
SCL_DEMOD
B3[+1.2V]
27
28
B4[+1.2V] 28
B3[+1.2V]
28 NC_7
NC_6 NC_3 29
29 29
SDA_DEMOD
SDA_DEMOD SDA_DEMOD 30
30 30
GND B_4 1 nF 22 nF
1 nF 1 nF 22 nF 1 nF A1 B1 A1 B1
A1
A1 B1
B1
A1 B1 A1 B1
47
47 47
SHIELD
SHIELD SHIELD

FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 2014-08-11
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. TU_SYMBOL_V_DVB 67_01
DVB-S2 LNB Part Allegro
(Option:LNB)
Input trace widths should be sized to conduct at least 3A
Ouput trace widths should be sized to conduct at least 2A
3A
+12V
2A
D6904-*1
Max 1.3A
LNB
40V
LPH6050T-150M-R
LNB_TSC LNB_SX34 L6900
D6902-*1 D6902
3.5A
SS23L LNB_ONSEMI D6904
30V 40V 15uH

30V
LNB_SMAB34
C6909
10uF
C6903 C6905 C6906 C6907 25V
0.01uF 10uF 10uF 10uF LNB
50V 25V 25V 25V
LNB LNB LNB LNB
C6908 0.1uF
close to Boost pin(#1) A_GND
A_GND
LNB
30V
[EP]GND
close to VIN pin(#15) Caution!! need isolated GND
BOOST
GNDLX
R6904
NC_3
NC_2
SS23L C6910 0
A_GND
LX
D6901-*1 0.1uF
LNB_TSC 50V
20
19
18
17
16
LNB
D6901 VCP 1 15 VIN
MBR230LSFT1G THERMAL A_GND
LNB 2 14 GND
LNB_OUT 21
30V LNB
D6903 NC_1 3 13 VREG
LNB_ONSEMI C6904
0.1uF LNB_SMAB34 IC6900 R6903
C6900 C6901 R6900 TDI ISET 39K
2.2K LNB 50V 40V A8303SESTR-T
4 12
0.1uF 33pF
D6900 1W LNB 1/16W
LNB LNB C6902 TDO 5 11 TCAP C6912
LNB LNB 0.22uF 1%
LNB 25V D6903-*1
10
LNB
LNB_SX34
6
9
0.1uF
40V
BOOST
[EP]
NC_4
NC_3
PGND
IRQ
SCL
SDA
ADD
TONECTRL
0.22uF
LX
20
19
18
17
16
Close to Tuner A_GND NC_1 1 15 VIN +3.3V_NORMAL

A_GND THERMAL
Surge protectioin LNB 2 21 14 GND
NC_2 3 13 VREG
IC6900-*1
LNB
TDI 4 DT1803 12 ISET
R6907
LNB_DMBT
3.3K
TDO TCAP
C6911
5 11
OPT
10
6
9
IRQ
SCL
SDA
ADD
TONECTRL
R6906
LNB
0
AR6900
LNB
33
EU/CIS
R6905
R6908
JAPAN
0
0
I2C_SCL2
I2C_SDA2
LNB_TX

ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR 69
LNB
[51P Vx1
output wafer]
51pin_Wafer
P7100
FI-RE51S-HF-J-R1500
+3.3V_NORMAL
2 TXDAP7_L
LOCKAn_HTPDAn_3.3VPullup
3 TXDAN7_L LOCKAn_HTPDAn_3.3VPullup R7121
4 +1.8V R7115 10K
10K LOCKAn
5 TXDAP6_L LOCKAn_HTPDAn_3.3VPullup
R7118 C
6 10K
TXDAN6_L LOCKAn_HTPDAn_3.3VPullup B Q7105
R7109 MMBT3904(NXP)
7
10K LOCKAn_HTPDAn_3.3VPullup
E
C
9 R7111
TXDAN5_L 100 B Q7101
10 MMBT3904(NXP)
LOCKAn_IN
11 E LOCKAn_HTPDAn_3.3VPullup
TXDAP4_L
12 TXDAN4_L
13
14 TXDAP3_L
+3.3V_NORMAL
15 TXDAN3_L
16
17 TXDAP2_L
LOCKAn_HTPDAn_3.3VPullup
18 TXDAN2_L LOCKAn_HTPDAn_3.3VPullup R7120
19 +1.8V R7114 10K
10K HTPDAn
R7117 C
21 10K
TXDAN1_L LOCKAn_HTPDAn_3.3VPullup B Q7104
22 R7108 MMBT3904(NXP)
10K LOCKAn_HTPDAn_3.3VPullup
E
C
24 TXDAN0_L R7110
+3.3V_NORMAL 100 B Q7100
25 MMBT3904(NXP)
HTPDAn_IN
26 E LOCKAn_HTPDAn_3.3VPullup
LOCKAn_IN
R7125
10K
27 HTPDAn_IN
28
D
29 R7103 G Q7102-*1
0 +3.3V_NORMAL 2N7002K
30 POWER_DET_1
EL_VDD_DETECT_22V TCON_I2C_EN S
31 JP7101 R7106 DIODE_FET
G
4.7K KEC_FET
32 EL_VDD_DETECT_22V OPT
R7112 0 R7122 0
I2C_SCL6
33
S
Q7102
34 2N7002KA
R7116
35
33 OPT D
36 +3.3V_NORMAL
G Q7103-*1
2N7002K
37 TCON_I2C_EN
R7107 S
KEC_FET
G
4.7K DIODE_FET
38
OPT R7123 0
R7113 0
39 I2C_SDA6
S
JP7102
40 T_CON_SYS_POWER_OFF Q7103
2N7002KA
0 R7104
41 INV_CTL R7119
0 R7105
42 COMPENSATION_DONE 33 OPT
R7124
43 0
COMPENSATION_DONE_1
44 OPT
45 CONPENSATION_DONE -> TEMP USE(HDMI ARC PROBLEM)

CONPENSATION_DONE1 -> FINAL USE
46
47
48 R7101
100
LED_R
49
R7100
T_CON_SYS_POWER_OFF
C7100
10K
50 0.1uF
16V
51
52
Data_Format_0
Data_Format_1
3D&L_DIM_EN

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Vx1 51P 21
[41P Vx1
output wafer]
41pin_Wafer
P7200
FI-RE41S-HF-J-R1500
OPT
R7200 0
1 OLED_FW_EMERGENCY
R7201 0
2 ON_RF_DONE
OPT
3
10
11
12
13
14
15
16
17
18 TXDBP7_L
19 TXDBN7_L
20
21 TXDBP6_L
22 TXDBN6_L
23
24 TXDBP5_L
25 TXDBN5_L
26
27 TXDBP4_L
28 TXDBN4_L
29
30 TXDBP3_L
31 TXDBN3_L
32
33 TXDBP2_L
34 TXDBN2_L
35
36 TXDBP1_L
37 TXDBN1_L
38
39 TXDBP0_L
40 TXDBN0_L
41
42

FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS UF71/7500 14/07/19
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Vx1 41P 22
eMMC I/F
DVDD18_EMMC 3.3v power delete, 131120
R8116
R8117
1/16W
10K
AR8104
1/16W
10K
AR8103
10K
10K
SAMSUNG ELECTRONIC CO.,LTD
EAN63829501
IC8100 IC8100-*1 IC8100-*2
IC8100-*3
THGBMBG5D1KBAIL THGBMBG6D1KBAIL H26M41103HPR
EMMC_DATA[0-7] KLM4G1FEPD-B031
AR8100
EMMC_DATA[0] 0
1/16W
EMMC_DATA[1] A3 C8 A3 C8 A3 C7
EMMC_DATA[2] DAT0 NC_23 DAT6 DAT0 NC_23 DAT0 NC_22 A3 C7
A4 C9 A4 C9 A4 C8 DAT0 NC_22
DAT1 NC_24 DAT1 NC_24 DAT1 NC_23 A4 C8
EMMC_DATA[3] A5 C10 A5 C10 A5 C9 DAT1 NC_23
DAT2 NC_25 DAT2 NC_25 DAT2 NC_24 A5 C9
EMMC_DATA[4] B2 C11 B2 C11 B2 C10 DAT2 NC_24
DAT3 NC_26 DAT3 NC_26 DAT3 NC_25 B2 C10
B5 C14 B5 C14 B5 C13 DAT5 NC_27
EMMC_DATA[7] DAT6 NC_29 DAT6 NC_29 DAT6 NC_28 B5 C13
B6 D1 B6 D1 B6 C14 DAT6 NC_28
DAT7 NC_30 DAT5 DAT7 NC_30 DAT7 NC_29 B6 C14
D2 D2 D1 DAT7 NC_29
0 R8104 NC_31 NC_31 NC_30 D1
D3 D3 D2 NC_30
0 R8105 NC_32 NC_32 NC_31 D2
M6 D4 M6 D4 M6 D3 NC_31
0 R8106 CLK NC_33 CLK NC_33 CLK NC_32 M6 D3
M5 D12 M5 D12 M5 D4 CLK NC_32
0 R8107 CMD NC_34 CMD NC_34 CMD NC_33 M5 D4
D13 D13 D12 CMD NC_33
eMMC V5.0 GND NC_35 NC_35 NC_34 D12
D14 D14 D13 NC_34
NC_36 NC_36 NC_35 D13
A6 E1 A6 E1 A7 D14 NC_35
VSS_1 NC_37 VSS_1 NC_37 RFU_1 NC_36 A7 D14
A7 E2 A7 E2 E5 E1 RFU_1 NC_36
RFU_2 NC_38 RFU_2 NC_38 RFU_2 NC_37 E5 E1
C5 E3 C5 E3 G3 E2 RFU_2 NC_37
NC_21 NC_39 NC_21 NC_39 RFU_3 NC_38 G3 E2
AR8102 E5 E12 E5 E12 K6 E3 RFU_3 NC_38
RFU_4 NC_40 RFU_4 NC_40 RFU_4 NC_39 K6 E3
0 1/16W E8 E13 E8 E13 K7 E12 RFU_4 NC_39
RFU_5 NC_41 RFU_5 NC_41 RFU_5 NC_40 K7 E12
E9 E14 E9 E14 E8 E13 RFU_5 NC_40
EMMC_CLK VSF_1 NC_42 VSF_1 NC_42 VSF_1 NC_41 E8 E13
E10 F1 E10 F1 E9 E14 RFU_6 NC_41
DAT7
EMMC_CMD VSF_2 NC_43 VSF_2 NC_43 VSF_2 NC_42 E9 E14
F10 F2 F10 F2 E10 F1 RFU_7 NC_42
EMMC_RST VSF_3 NC_44 VSF_3 NC_44 VSF_3 NC_43 E10 F1
G3 F3 G3 F3 F10 F2 RFU_8 NC_43
RFU_9 NC_45 RFU_9 NC_45 VSF_4 NC_44 F10 F2
G10 F12 G10 F12 G10 F3 RFU_9 NC_44
RFU_10 NC_46 RFU_10 NC_46 VSF_5 NC_45 G10 F3
H5 F13 H5 F13 K10 F12 RFU_10 NC_45
DS NC_47 DS NC_47 VSF_6 NC_46 K10 F12
J5 F14 J5 F14 P10 F13 RFU_11 NC_46
C8107 VSS_5 NC_48 VSS_5 NC_48 VSF_7 NC_47 P10 F13
OPT 10pF K6 G1 K6 G1 H5 F14 RFU_13 NC_47
RFU_13 NC_49 RFU_13 NC_49 DS NC_48 H5 F14
50V K7 G2 K7 G2 G1 DS NC_48
RFU_14 NC_50 RFU_14 NC_50 NC_49 G1
EMMC_STRB K10 G12 K10 G12 G2 NC_49
RFU_15 NC_51 RFU_15 NC_51 NC_50 G2
P7 G13 P7 G13 G12 NC_50
R8103
RFU_16 NC_52 RFU_16 NC_52 NC_51 G12
P10 G14 P10 G14 G13 NC_51
10K
RFU_17 NC_53 RFU_17 NC_53 NC_52 G13
H1 H1 G14 NC_52
NC_54 EMMC_STRB NC_54 NC_53 G14
H2 H2 H1 NC_53
NC_55 NC_55 NC_54 H1
K5 H3 K5 H3 K5 H2 NC_54
RSTN NC_56 RSTN NC_56 RSTN NC_55 K5 H2
H12 H12 H3 RSTN NC_55
C8100 DVDD18_EMMC H3
EMMC5.0_4G_TOSHIBA
NC_57 NC_57 NC_56
H13 H13 H12
EMMC5.0_8G_TOSHIBA
OPT 0.1uF NC_56
NC_58 NC_58 NC_57 H12
16V C6 H14 C6 H14 C6 H13 NC_57
VCCQ_1 NC_59 VCCQ_1 NC_59 VCCQ_1 NC_58 C6 H13
3.3V_EMMC M4 J1 M4 J1 M4 H14 VDD_1 NC_58
VCCQ_2 NC_60 VCCQ_2 NC_60 VCCQ_2 NC_59 M4 H14
N4 J2 N4 J2 N4 J1 VDD_2 NC_59
EMMC5.0_8G_HYNIX
VCCQ_3 NC_61 VCCQ_3 NC_61 VCCQ_3 NC_60 N4 J1
P3 J3 P3 J3 P3 J2 VDD_3 NC_60
VCCQ_4 NC_62 VCCQ_4 NC_62 VCCQ_4 NC_61 P3 J2
Bottom P5 J12 P5 J12 P5 J3 VDD_4 NC_61
VCCQ_5 NC_63 VCCQ_5 NC_63 VCCQ_5 NC_62 P5 J3
DAT3
DAT4
DAT5
DAT6
EMMC_CLK_BALL
EMMC_CMD_BALL
EMMC_RESET_BALL
OPT OPT J13 J13 J12 VDD_5 NC_62

C8108 C8109 C8105 C8106 NC_64 NC_64 NC_63 J12
0.1uF 2.2uF 0.1uF 2.2uF J14 EMMC_RESET_BALL J14 J13 NC_63
EMMC5.0_4G_SAMSUNG
NC_65 NC_65 NC_64 J13
16V 10V 16V 10V E6 K1 E6 K1 E6 J14 NC_64
VCC_1 NC_66 VCC_1 NC_66 VCC_1 NC_65 E6 J14
F5 K2 F5 K2 F5 K1 VDDF_1 NC_65
VCC_2 NC_67 VCC_2 NC_67 VCC_2 NC_66 F5 K1
J10 K3 J10 K3 J10 K2 VDDF_2 NC_66
VCC_3 NC_68 VCC_3 NC_68 VCC_3 NC_67 J10 K2
K9 K12 K9 K12 K9 K3 VDDF_3 NC_67
VCC_4 NC_69 VCC_4 NC_69 VCC_4 NC_68 K9 K3
K13 K13 K12 VDDF_4 NC_68
NC_70 NC_70 NC_69 K12
EMMC_VDDI K14 K14 K13 NC_69
Bottom pattern 0.2mm NC_71 NC_71 NC_70 K13
C2 L1 C2 L1 C2 K14 NC_70
VDDI NC_72 VDDI NC_72 VDDI NC_71 C2 K14
OPT L2 L2 L1 VDDI NC_71
C8101 C8104 NC_73 NC_73 NC_72 L1
1uF 2.2uF L3 L3 L2 NC_72
NC_74 NC_74 NC_73 L2
10V 10V E7 L12 E7 L12 C4 L3 NC_73
VSS_2 NC_75 VSS_2 NC_75 VSSQ_1 NC_74 C4 L3
G5 L13 G5 L13 N2 L12 VSS_1 NC_74
VSS_3 NC_76 VSS_3 NC_76 VSSQ_2 NC_75 N2 L12
H10 L14 H10 L14 N5 L13 VSS_2 NC_75
VSS_4 NC_77 VSS_4 NC_77 VSSQ_3 NC_76 N5 L13
K8 M1 K8 M1 P4 L14 VSS_3 NC_76
VSS_6 NC_78 VSS_6 NC_78 VSSQ_4 NC_77 P4 L14
C8102 C8103 C8111 C4 M2 C4 M2 P6 M1 VSS_4 NC_77
0.1uF 2.2uF 4.7uF VSSQ_1 NC_79 VSSQ_1 NC_79 VSSQ_5 NC_78 P6 M1
N2 M3 EMMC_CLK_BALL N2 M3 A6 M2 VSS_5 NC_78
16V 10V 10V VSSQ_2 NC_80 VSSQ_2 NC_80 VSS_1 NC_79 A6 M2
OPT N5 M7 N5 M7 E7 M3 VSS_6 NC_79
VSSQ_3 NC_81 VSSQ_3 NC_81 VSS_2 NC_80 E7 M3
P4 M8 P4 M8 G5 M7 VSS_7 NC_80
VSSQ_4 NC_82 VSSQ_4 NC_82 VSS_3 NC_81 G5 M7
P6 M9 P6 M9 H10 M8 VSS_8 NC_81
VSSQ_5 NC_83 VSSQ_5 NC_83 VSS_4 NC_82 H10 M8
M10 M10 J5 M9 VSS_9 NC_82
NC_84 NC_84 VSS_5 NC_83 J5 M9
M11 M11 K8 M10 VSS_10 NC_83
NC_85 NC_85 VSS_6 NC_84 K8 M10
M12 M12 M11 VSS_11 NC_84
NC_86 NC_86 NC_85 M11
A1 M13 A1 M13 M12 NC_85
DAT3 NC_1 NC_87 NC_1 NC_87 NC_86 M12
A2 M14 A2 M14 A1 M13 NC_86
DAT4 NC_2 NC_88 NC_2 NC_88 NC_1 NC_87 A1 M13
A8 N1 A8 N1 A2 M14 NC_1 NC_87
DAT7 NC_3 NC_89 NC_3 NC_89 NC_2 NC_88 A2 M14
A9 N3 EMMC_CMD_BALL A9 N3 A8 N1 NC_2 NC_88
NC_4 NC_90 NC_4 NC_90 NC_3 NC_89 A8 N1
A10 N6 A10 N6 A9 N3 NC_3 NC_89
NC_5 NC_91 NC_5 NC_91 NC_4 NC_90 A9 N3
A11 N7 A11 N7 A10 N6 NC_4 NC_90
NC_6 NC_92 NC_6 NC_92 NC_5 NC_91 A10 N6
A12 N8 A12 N8 A11 N7 NC_5 NC_91
NC_7 NC_93 NC_7 NC_93 NC_6 NC_92 A11 N7
A13 N9 A13 N9 A12 N8 NC_6 NC_92
NC_8 NC_94 NC_8 NC_94 NC_7 NC_93 A12 N8
A14 N10 A14 N10 A13 N9 NC_7 NC_93
NC_9 NC_95 NC_9 NC_95 NC_8 NC_94 A13 N9
B1 N11 B1 N11 A14 N10 NC_8 NC_94
NC_10 NC_96 NC_10 NC_96 NC_9 NC_95 A14 N10
B7 N12 B7 N12 B1 N11 NC_9 NC_95
NC_11 NC_97 NC_11 NC_97 NC_10 NC_96 B1 N11
B8 N13 B8 N13 B7 N12 NC_10 NC_96
NC_12 NC_98 NC_12 NC_98 NC_11 NC_97 B7 N12
B9 N14 B9 N14 B8 N13 NC_11 NC_97
DAT6 NC_13 NC_99 NC_13 NC_99 NC_12 NC_98 B8 N13
B10 P1 B10 P1 B9 N14 NC_12 NC_98
NC_14 NC_100 NC_14 NC_100 NC_13 NC_99 B9 N14
B11 P2 B11 P2 B10 P1 NC_13 NC_99
NC_15 NC_101 NC_15 NC_101 NC_14 NC_100 B10 P1
B12 P8 B12 P8 B11 P2 NC_14 NC_100
Don’t Connect Power At VDDI EMMC_VDDI DVDD18_EMMC B13
B14
NC_16
NC_17
NC_102
NC_103
P9
P11
B13
B14
NC_16
NC_17
NC_102
NC_103
P9
P11
B12
B13
NC_15
NC_16
NC_101
NC_102
P7
P8
B11
B12
NC_15
NC_16
NC_101
RFU_12
P2
P7
NC_18 NC_104 NC_18 NC_104 NC_17 NC_103 B13 P8
C1 P12 C1 P12 B14 P9 NC_17 NC_102
(Just Interal LDO Capacitor) DAT5
C3
NC_19
NC_20
NC_105
NC_106
P13 C3
NC_19
NC_20
NC_105
NC_106
P13 C1
NC_18
NC_19
NC_104
NC_105
P11
B14
C1
NC_18 NC_103
P9
P11
C7 P14 C7 P14 C3 P12 NC_19 NC_104
NC_22 NC_107 NC_22 NC_107 NC_20 NC_106 C3 P12
C5 P13 NC_20 NC_105
NC_21 NC_107 C5 P13
P14 NC_21 NC_106
NC_108 P14
NC_107

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. eMMC
RS-232C Control INTERFACE
RS232C
R6820
100
+3.5V_ST DOUT1
RS232C
R6821
100
RIN1
OPT OPT
ZD6802 ZD6803
ADUC 20S 02 010L ADUC 20S 02 010L
RS232C 20V 20V
RS232C C6813
0.1uF
IC6801
MAX3232CDR
RS232C C1+ VCC

1 16
C6808
0.1uF V+ GND
RS232C 2 15
C6809
0.1uF C1- DOUT1
3 14
C2+ RIN1
RS232C 4 13
C6810
0.1uF C2- ROUT1
5 12 SOC_RX
RS232C V- DIN1
6 11 SOC_TX
C6811
0.1uF DOUT2 DIN2
7 10
RIN2 ROUT2
8 9
EAN41348201

RS232C 22
LM14A+URSA
CLIP Top Side for Covershield
EAG64250901 EAG64250901 EAG64250901 EAG64250901

M13501 CLIP1 M13502 CLIP2 M13503 CLIP4 M13504 CLIP3
CLIP 1 - PUSH TYPE
SMD Top Side for Covershield 7.5T
M13510 EMI_SMD_1 M13511 EMI_SMD_2 M13512 EMI_SMD_3 M13538 EMI_SMD_25
MDS62110216 MDS62110216 MDS62110216 MDS62110216
8.5T 8.5T 8.5T 8.5T
M13516 EMI_SMD_4 M13517 EMI_SMD_5 ESD_USB3.0_SMD EMI_SMD_10

M13518 EMI_SMD_6 M13519 EMI_SMD_7
MDS62110216 MDS62110216 M13520 EMI_SMD_8 M13521 M13522 EMI_SMD_9 M13531
MDS62110216 MDS62110216 M13532 EMI_SMD_11
MDS62110216 MDS62110216 MDS62110221 MDS62110221
8.5T MDS62110228
8.5T
8.5T 8.5T
8.5T 8.5T 13.5T 11.5T
13.5T
EMI_SMD_13
M13523 EMI_SMD_12 M13524 M13525 EMI_SMD_14 M13526 EMI_SMD_15 M13527 EMI_SMD_16 M13528 EMI_SMD_17 M13529 EMI_SMD_18 M13530
MDS62110217 MDS62110228 MDS62110228 MDS62110228 MDS62110221 MDS62110221 MDS62110228 MDS62110228
13.5T
12.5T 11.5T
11.5T 11.5T 13.5T 11.5T 11.5T
M13536 EMI_SMD_23 M13537 EMI_SMD_24

M13533 EMI_SMD_20 M13534 EMI_SMD_21 M13535 EMI_SMD_22 MDS62110228 MDS62110228
MDS62110217 MDS62110221 MDS62110221 11.5T 11.5T
12.5T 13.5T 13.5T

FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 14.06.10
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. CLIP TYPE
IC12800 IC12800
LGE5352(URSA11) LGE5352(URSA11)
N3
AH5 PAD_RXCP_P0
PAD_RA0N M2
AG5 PAD_RXCN_P0
PAD_RA0P P1
AF5 PAD_RX0P_P0
PAD_RA1N N1
AG6 PAD_RX0N_P0
PAD_RA1P R2
AF6 PAD_RX1P_P0
PAD_RA2N R3
AG7 PAD_RX1N_P0
PAD_RA2P T1
AH7 PAD_RX2P_P0
PAD_RACKN T2
AF7 L1 PAD_RX2N_P0
PAD_RACKP PAD_A0P/VBY0-
AH8 L3
PAD_RA3N PAD_A0M/VBY0+
AG8 K2
PAD_RA3P PAD_A1P/VBY1-
AF8 K3
PAD_RA4N PAD_A1M/VBY1+
AG9 J3
PAD_RA4P PAD_A2P/VBY2- U2
H2 PAD_RXCP_P1
PAD_A2M/VBY2+ U1
H3 PAD_RXCN_P1
PAD_ACKP/VBY3- W3
AF9 G1 PAD_RX0P_P1
PAD_RB0N PAD_ACKM/VBY3+ V2
AG10 G3 0.1uF R12804 TXDAN0_L PAD_RX0N_P1
PAD_RB0P PAD_A3P/VBY4- Y1
AH10 F2 0.1uF R12805 TXDAP0_L PAD_RX1P_P1
PAD_RB1N PAD_A3M/VBY4+ W1
AF10 E2 0.1uF R12806 TXDAN1_L PAD_RX1N_P1
PAD_RB1P PAD_A4P/VBY5- AA2
AH11 E1 0.1uF R12807 TXDAP1_L PAD_RX2P_P1
PAD_RB2N PAD_A4M/VBY5+ AA3
AG11 D1 0.1uF R12808 TXDAN2_L PAD_RX2N_P1
PAD_RB2P PAD_B0P/VBY6-
AF11 D2 0.1uF R12809 TXDAP2_L
PAD_RBCKN PAD_B0M/VBY6+
AG12 C2 0.1uF R12810 TXDAN3_L
PAD_RBCKP PAD_B1P/VBY7- AA6
AF12 C3 0.1uF R12811 TXDAP3_L NC_9
PAD_RB3N PAD_B1M/VBY7+
AG13
PAD_RB3P
AH13
PAD_RB4N
AF13 K5
PAD_RB4P PAD_MOD_GPIO0
K4
PAD_MOD_GPIO1 AF4
L5 PAD_HDMI_SCL_P0/[TX]
PAD_B2P AE4
L6 PAD_HDMI_SDA_P0/[TX]
PAD_B2M AC1
J6 PAD_TXCP_P0
PAD_BCKP AB1
H6 PAD_TXCN_P0
PAD_BCKM AD2
J5 PAD_TX0P_P0
PAD_B3P AD3
J4 PAD_TX0N_P0
PAD_B3M AE1
G5 PAD_TX1P_P0
PAD_B4P AE2
G4 PAD_TX1N_P0
PAD_B4M AF2
H5 PAD_TX2P_P0
PAD_C0P AF1
G6 PAD_TX2N_P0
PAD_C0M
B3 0.1uF C12824 TXDAN4_L

PAD_E0P/VBY8-
A3 0.1uF C12825 TXDAP4_L
PAD_E0M/VBY8+
A4 0.1uF C12826 TXDAN5_L
PAD_E1P/VBY9-
B4 0.1uF C12827 TXDAP5_L
PAD_E1M/VBY9+
B5 0.1uF C12828 TXDAN6_L
PAD_E2P/VBY10-
0.1uF C12822 AH14 C5 0.1uF C12829 TXDAP6_L
TXVBY1_0N PADA_VBY1_RXM[0] PAD_E2M/VBY10+
0.1uF C12823 AG14 A6 0.1uF C12830 TXDAN7_L
TXVBY1_0P PADA_VBY1_RXP[0] PAD_ECKP/VBY11-
0.1uF C12820 AF14 C6 0.1uF C12831 TXDAP7_L
TXVBY1_1N PADA_VBY1_RXM[1] PAD_ECKM/VBY11+
0.1uF C12821 AG15 B7 TXDBN0_L_URSA11
TXVBY1_1P PADA_VBY1_RXP[1] PAD_E3P/VBY12- TXDBN0_L_URSA11
0.1uF C12818 AG16 C7 TXDBP0_L_URSA11 FOR 120Hz ONLY
VIDEO
TXVBY1_2N PADA_VBY1_RXM[2] PAD_E3M/VBY12+ TXDBP0_L_URSA11

0.1uF C12819 AH16 C8 TXDBN1_L_URSA11
TXVBY1_2P PADA_VBY1_RXP[2] PAD_E4P/VBY13- TXDBN1_L_URSA11
AF16 B9
TXVBY1_3N 0.1uF
0.1uF
C12816
C12817 AH17
PADA_VBY1_RXM[3] PAD_E4M/VBY13+
C9
TXDBP1_L_URSA11
TXDBN2_L_URSA11
TXDBP1_L_URSA11 CAP MOVE
TXVBY1_3P PADA_VBY1_RXP[3] PAD_F0P/VBY14- TXDBN2_L_URSA11
PAD_F0M/VBY14+
A10 TXDBP2_L_URSA11 TXDBP2_L_URSA11 TO SHT 143
0.1uF C12814 AF17 C10 TXDBN3_L_URSA11
TXVBY1_4N PADA_VBY1_RXM[4] PAD_F1P/VBY15- TXDBN3_L_URSA11
0.1uF C12815 AG18 B11 TXDBP3_L_URSA11
TXVBY1_4P PADA_VBY1_RXP[4] PAD_F1M/VBY15+ TXDBP3_L_URSA11
0.1uF C12812 AF18 B12 TXDBN4_L_URSA11
TXVBY1_5N PADA_VBY1_RXM[5] PAD_MOD_GPIO8/VBY16- TXDBN4_L_URSA11
0.1uF C12813 AG19 A12 TXDBP4_L_URSA11
TXVBY1_5P PADA_VBY1_RXP[5] PAD_MOD_GPIO9/VBY16+ TXDBP4_L_URSA11
0.1uF C12810 AF19 A13 TXDBN5_L_URSA11
TXVBY1_6N PADA_VBY1_RXM[6] PAD_F2P/VBY17- TXDBN5_L_URSA11
0.1uF C12811 AH20 B13 TXDBP5_L_URSA11
TXVBY1_6P PADA_VBY1_RXP[6] PAD_F2M/VBY17+ TXDBP5_L_URSA11
0.1uF C12808 AG20 B14 TXDBN6_L_URSA11
TXVBY1_7N PADA_VBY1_RXM[7] PAD_FCKP/VBY18- TXDBN6_L_URSA11
0.1uF C12809 AF20 C14 TXDBP6_L_URSA11
TXVBY1_7P PADA_VBY1_RXP[7] PAD_FCKM/VBY18+ TXDBP6_L_URSA11
A15 TXDBN7_L_URSA11
PAD_F3P/VBY19- TXDBN7_L_URSA11
0.1uF C12806 AF21 C15 TXDBP7_L_URSA11
TXOSD_0N PADA_VBY1_RXM[8] PAD_F3M/VBY19+ TXDBP7_L_URSA11
0.1uF C12807 AG22
TXOSD_0P PADA_VBY1_RXP[8]
AH22
OSD
TXOSD_1N 0.1uF C12804

PADA_VBY1_RXM[9]
0.1uF C12805 AF22 E9
TXOSD_1P PADA_VBY1_RXP[9] PAD_F4P
0.1uF C12802 AG23 D9
TXOSD_2N PADA_VBY1_RXM[10] PAD_F4M
0.1uF C12803 AF23 F8
TXOSD_2P PADA_VBY1_RXP[10] PAD_G0P
0.1uF C12800 AG24 F9
TXOSD_3N PADA_VBY1_RXM[11] PAD_G0M
0.1uF C12801 AF24
TXOSD_3P PADA_VBY1_RXP[11]
U11 ONLY, NC FOR U11P
AH25
PADA_VBY1_RXM[12]
AF25
RESERVED FOR U11P TEST
PADA_VBY1_RXP[12]
AG26 F10
AF26
PADA_VBY1_RXM[13] PAD_E0P/[TEST]
E11 URSA9 VIDEO/OSD LOCKn
PADA_VBY1_RXP[13] PAD_E0M/[TEST]
AF27 E10
PADA_VBY1_RXM[14] PAD_E1P
AF28 D10 (DELETE_MP)NXP_VBY1_LOCK_LED_TR
PADA_VBY1_RXP[14] PAD_E1M Q14000-*1
AE27 E12 C
PADA_VBY1_RXM[15] PAD_E2P/[TEST] MMBT3906(NXP)
AE28 D12
PADA_VBY1_RXP[15] PAD_E2M B
F11
(DELETE_MP)VBY1_LOCK_LED
PAD_ECKP/[TEST]
F12
PAD_ECKM E
19-21/R6C-FR1S1L/3T
+3.3V_NORMAL
LOCKAn_Video LOCKAn_Video
LD14000
10K
+3.3V_NORMAL
R12800
R14000
10K
B
Q14000
C 2N3906S-RTK
(DELETE_MP)KEC_VBY1_LOCK_LED_TR
LOCKAn_OSD LOCKAn_OSD
R12801 10K
(DELETE_MP)_VB1_LOCK_LED
+3.3V_NORMAL
R12802
22
SML-512UW
LD12800
R12803
10K
B
C C
Q12800 B Q12800-*1
2N3906S-RTK
MMBT3906(NXP)
(DELETE_MP)NXP_BY1_LOCK_LED E (DELETE_MP)KEC_VBY1_LOCK_LED

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. URSA11 INPUT
IC12800
LGE5352(URSA11)
E24
PAD_IO[78]/B-A0/[CD-A0] A_DDR3_A[0]
G27
F25
G23
G26
F24
G28
E27
F28
D26
H26
F26
H25
D27
F27
J24
H24
PAD_IO[85]/B-BA0/[CD-BA0] A_DDR3_BA[0]
H27
G24
K24
PAD_IO[97]/B-RASZ/[CD-RASZ] A_DDR3_RASZ
K23
PAD_IO[94]/B-CASZ/[CD-CASZ] A_DDR3_CASZ
H23
PAD_IO[79]/B-WEZ/[CD-WEZ] A_DDR3_WEZ
J23
PAD_IO[95]/B-ODT/[CD-ODT] A_DDR3_ODT
J27
PAD_IO[91]/B-CKE/[CD-CKE] A_DDR3_CKE
D28
PAD_IO[76]/B-RST/[CD-RST] A_DDR3_RESET
K28
PAD_IO[101]/B-MCLK/[CD-MCLK] A_DDR3_MCLK
MIU1 (U11 ONLY)

J26
PAD_IO[100]/B-MCLKZ/[CD-MCLKZ] A_DDR3_MCLKZ
D25
PAD_IO[99]/B-CSB1/[C-CSB1] A_DDR3_CSB1
C28
PAD_IO[98]/B-CSB2/[D-CSB2] A_DDR3_CSB2
A_DDR3_DQ[0-15]
N27 A_DDR3_DQ[0]
PAD_IO[121]/B-DQ[0]/[C-DQL0]
L26 A_DDR3_DQ[1]
N26 A_DDR3_DQ[2]
L27 A_DDR3_DQ[3]
P26 A_DDR3_DQ[4]
K27 A_DDR3_DQ[5]
P27 A_DDR3_DQ[6]
K26 A_DDR3_DQ[7]
L23 A_DDR3_DQ[8]
PAD_IO[110]/B-DQ[8]/[C-DQU0]
P25 A_DDR3_DQ[9]
PAD_IO[117]/B-DQ[9]/[C-DQU1] +1.5V_U_DDR
L24 A_DDR3_DQ[10] A-MVREFDQ_U
P23 A_DDR3_DQ[11]
M24 A_DDR3_DQ[12]
R24 A_DDR3_DQ[13]
R13007
L25 A_DDR3_DQ[14] 1K
PAD_IO[109]/B-DQ[14]/[C-DQU6] 1%
P24 A_DDR3_DQ[15]
M27
PAD_IO[106]/B-DQM[0]/[C-DML] A_DDR3_DM0
N24
A-MVREFDQ_U PAD_IO[108]/B-DQM[1]/[C-DMU] A_DDR3_DM1 R13008 C13054 C13058
1K 0.1uF 1000pF
N28 1%
PAD_IO[115]/B-DQS[0]/[C-DQSL] A_DDR3_DQS0
B19 M26
DRAM_VREF_A PAD_IO[114]/B-DQSB[0]/[C-DQSLB] A_DDR3_DQS0B
N23
PAD_IO[113]/B-DQS[1]/[C-DQSU] A_DDR3_DQS1
240 R13000 A19 M23
DRAM_ZQ_A PAD_IO[112]/B-DQSB[1]/[C-DQSUB] A_DDR3_DQS1B
1%
A_DDR3_DQ[16-31]
V27 A_DDR3_DQ[16] +1.5V_U_DDR B-MVREFDQ_U
PAD_IO[143]/B-DQ[16]/[D-DQL0]
T27 A_DDR3_DQ[17]
V26 A_DDR3_DQ[18]
T28 A_DDR3_DQ[19] URSA11P
PAD_IO[127]/B-DQ[19]/[D-DQL3] R13005
W27 A_DDR3_DQ[20]
1K
R27 A_DDR3_DQ[21] 1%
W28 A_DDR3_DQ[22]
R26 A_DDR3_DQ[23] URSA11P URSA11P URSA11P
PAD_IO[124]/B-DQ[23]/[D-DQL7] R13006 C13053 C13057
U24 A_DDR3_DQ[24]
PAD_IO[129]/B-DQ[24]/[D-DQU0] 1K 0.1uF 1000pF
W23 A_DDR3_DQ[25] 1%
PAD_IO[141]/B-DQ[25]/[D-DQU1]
R23 A_DDR3_DQ[26]
PAD_IO[139]_/B-DQ[26]/[D-DQU2]
W25 A_DDR3_DQ[27]
T24 A_DDR3_DQ[28]
NPAD_IO[130]/B-DQ[28]/[D-DQU4]
W24 A_DDR3_DQ[29]
T23 A_DDR3_DQ[30]
V23 A_DDR3_DQ[31]
T26
PAD_IO[128]/B-DQM[2]/[D-DML] A_DDR3_DM2
U23
PAD_IO[131]/B-DQM[3]/[D-DMU] A_DDR3_DM3
U26
PAD_IO[137]/B-DQS[2]/[D-DQSL] A_DDR3_DQS2
U27
PAD_IO[136]/B-DQSB[2]/[D-DQSLB] A_DDR3_DQS2B
V24
PAD_IO[135]/B-DQS[3]/[D-DQSU] A_DDR3_DQS3
U25
PAD_IO[134]/B-DQSB[3]/[D-DQSUB] A_DDR3_DQS3B
B-MVREFDQ_U
B25
DRAM_VREF_B
A25 R13003 240

DRAM_ZQ_B
1%
BSD-15Y-LM14A-142_00-HD
URSA11_DDR
15/01/21
DDR_VTT_URSA_1
URSA11_DDR_SAMSUNG
URSA11_DDR_SAMSUNG
AR13000 AR13001 AR13002 AR13003 AR13004 AR13005 AR13006
IC13001 56 56 56 56 56 56 56 URSA11_DDR_NANYA
K4B1G1646G-BCMA IC13002 URSA11_DDR_NANYA
U_MVREFCA_A0 K4B1G1646G-BCMA IC13001-*1 IC13002-*1
U_MVREFCA_A1
NT5CB64M16FP-EK NT5CB64M16FP-EK
N3 M8
A_DDR3_A[0] A0 VREFCA N3 M8
P7 A_DDR3_A[0] A0 VREFCA
A_DDR3_A[1] A1 P7 N3 M8 N3 M8
P3 A_DDR3_A[1] A1 A0 VREFCA A0 VREFCA
A_DDR3_A[2] A2 P3 P7 P7
N2 H1 A_DDR3_A[2] A2 A1 A1
A_DDR3_A[3] A3 VREFDQ N2 H1 P3 P3
P8 A_DDR3_A[3] A3 VREFDQ A2 A2
A_DDR3_A[4] A4 P8 N2 H1 N2 H1
P2 A_DDR3_A[4] A4 A3 VREFDQ A3 VREFDQ
A_DDR3_A[5] A5 P2 P8 P8
R8 L8 R13016 240
A_DDR3_A[5] A5 A4 A4
A_DDR3_A[6] A6 ZQ R8 L8 R13017 240 P2 P2
R2 1%
A_DDR3_A[6] A6 ZQ A5 A5
A_DDR3_A[7] A7 R2 1% +1.5V_U_DDR R8 L8 R8 L8
T8 +1.5V_U_DDR A_DDR3_A[7] A6 ZQ A6 ZQ
A_DDR3_A[8] A7
A8 T8 R2 R2
R3 B2 A_DDR3_A[8] A8 A7 A7
A_DDR3_A[9] A9 VDD_1 R3 B2 T8 T8
L7 D9 A_DDR3_A[9] A9 VDD_1 A8 A8
A_DDR3_A[10] A10/AP VDD_2 L7 D9 R3 B2 R3 B2
R7 G7 A_DDR3_A[10] A10/AP VDD_2 A9 VDD_1 A9 VDD_1
A_DDR3_A[11] A11 VDD_3 R7 G7 L7 D9 L7 D9
N7 K2 A_DDR3_A[11] A11 VDD_3 A10/AP VDD_2 A10/AP VDD_2
A_DDR3_A[12] A12/BC VDD_4 N7 K2 R7 G7 R7 G7
T3 K8 A_DDR3_A[12] A12/BC VDD_4 A11 VDD_3 A11 VDD_3
A_DDR3_A[13] A13 VDD_5 T3 K8 N7 K2 N7 K2
N1 A_DDR3_A[13] A13 VDD_5 A12/BC VDD_4 A12/BC VDD_4
VDD_6 N1 T3 K8 T3 K8
M7 N9 A_DDR3_A[14] VDD_6 NC_6 VDD_5 NC_6 VDD_5
A_DDR3_A[15] NC_5 VDD_7 M7 N9 N1 N1
R1 A_DDR3_A[15] NC_5 VDD_7 VDD_6 VDD_6
VDD_8 R1 M7 N9 M7 N9
M2 R9 VDD_8 NC_5 VDD_7 NC_5 VDD_7
A_DDR3_BA[0] BA0 VDD_9 M2 R9 R1 R1
N8 A_DDR3_BA[0] BA0 VDD_9 VDD_8 VDD_8
A_DDR3_BA[1] BA1 +1.5V_U_DDR N8 M2 R9 M2 R9
M3 +1.5V_U_DDR
R13015R13014
A_DDR3_MCLK A_DDR3_BA[1] BA1 BA0 VDD_9 BA0 VDD_9

A_DDR3_BA[2] BA2 M3 N8 N8
56
C13062 A1 A_DDR3_BA[2] BA2 BA1 BA1

VDDQ_1 A1 M3 M3
0.01uF J7 A8 VDDQ_1 BA2 BA2
56
CK VDDQ_2 J7 A8 A1 A1
K7 C1 A_DDR3_MCLK CK VDDQ_2 VDDQ_1 VDDQ_1
A_DDR3_MCLKZ CK VDDQ_3 K7 C1 J7 A8 J7 A8
K9 C9 A_DDR3_MCLKZ CK VDDQ_3 CK VDDQ_2 CK VDDQ_2
A_DDR3_CKE CKE VDDQ_4 K9 C9 K7 C1 K7 C1
D2 A_DDR3_CKE CKE VDDQ_4 CK VDDQ_3 CK VDDQ_3
VDDQ_5 D2 K9 C9 K9 C9
L2 E9 VDDQ_5 CKE VDDQ_4 CKE VDDQ_4
A_DDR3_CSB1 CS VDDQ_6 L2 E9 D2 D2
K1 F1 A_DDR3_CSB2 CS VDDQ_6 VDDQ_5 VDDQ_5
A_DDR3_ODT ODT VDDQ_7 K1 F1 L2 E9 L2 E9
J3 H2 A_DDR3_ODT ODT VDDQ_7 CS VDDQ_6 CS VDDQ_6
A_DDR3_RASZ RAS VDDQ_8 J3 H2 K1 F1 K1 F1
K3 H9 A_DDR3_RASZ RAS VDDQ_8 ODT VDDQ_7 ODT VDDQ_7
A_DDR3_CASZ CAS VDDQ_9 K3 H9 J3 H2 J3 H2
L3 A_DDR3_CASZ CAS VDDQ_9 RAS VDDQ_8 RAS VDDQ_8
A_DDR3_WEZ WE L3 K3 H9 K3 H9
J1 A_DDR3_WEZ WE CAS VDDQ_9 CAS VDDQ_9
NC_1 J1 L3 L3
T2 J9 NC_1 WE WE
A_DDR3_RESET RESET NC_2 T2 J9 J1 J1
L1 A_DDR3_RESET RESET NC_2 NC_1 NC_1
NC_3 L1 T2 J9 T2 J9
L9 NC_3 RESET NC_2 RESET NC_2
NC_4 L9 L1 L1
F3 T7 NC_4 NC_3 NC_3
A_DDR3_DQS0 DQSL NC_6 A_DDR3_A[14] F3 T7 L9 L9
G3 A_DDR3_DQS2 DQSL NC_6 A_DDR3_A[14] NC_4 NC_4
A_DDR3_DQS0B DQSL G3 F3 T7 F3 T7
A_DDR3_DQS2B DQSL DQSL NC_7 DQSL NC_7
G3 G3
C7 A9 DQSL DQSL
A_DDR3_DQS1 DQSU VSS_1 C7 A9
B7 B3 A_DDR3_DQS3 DQSU VSS_1
A_DDR3_DQS1B DQSU VSS_2 B7 B3 C7 A9 C7 A9
E1 A_DDR3_DQS3B DQSU VSS_2 DQSU VSS_1 DQSU VSS_1
VSS_3 E1 B7 B3 B7 B3
E7 G8 VSS_3 DQSU VSS_2 DQSU VSS_2
A_DDR3_DM0 DML VSS_4 E7 G8 E1 E1
D3 J2 A_DDR3_DM2 DML VSS_4 VSS_3 VSS_3
A_DDR3_DM1 DMU VSS_5 D3 J2 E7 G8 E7 G8
J8 A_DDR3_DM3 DMU VSS_5 DML VSS_4 DML VSS_4
A_DDR3_DQ[0-15] VSS_6 J8 D3 J2 D3 J2
A_DDR3_DQ[0] E3 M1 A_DDR3_DQ[16-31] VSS_6 DMU VSS_5 DMU VSS_5
DQL0 VSS_7 A_DDR3_DQ[16] E3 M1 J8 J8
A_DDR3_DQ[1] F7 M9 DQL0 VSS_7 VSS_6 VSS_6
DQL1 VSS_8 A_DDR3_DQ[17] F7 M9 E3 M1 E3 M1
A_DDR3_DQ[2] F2 P1 DQL1 VSS_8 DQL0 VSS_7 DQL0 VSS_7
DQL2 VSS_9 A_DDR3_DQ[18] F2 P1 F7 M9 F7 M9
A_DDR3_DQ[3] F8 P9 DQL2 VSS_9 DQL1 VSS_8 DQL1 VSS_8
DQL3 VSS_10 A_DDR3_DQ[19] F8 P9 F2 P1 F2 P1
A_DDR3_DQ[4] H3 T1 DQL3 VSS_10 DQL2 VSS_9 DQL2 VSS_9
DQL4 VSS_11 A_DDR3_DQ[20] H3 T1 F8 P9 F8 P9
A_DDR3_DQ[5] H8 T9 DQL4 VSS_11 DQL3 VSS_10 DQL3 VSS_10
DQL5 VSS_12 A_DDR3_DQ[21] H8 T9 H3 T1 H3 T1
A_DDR3_DQ[6] G2 DQL5 VSS_12 DQL4 VSS_11 DQL4 VSS_11
DQL6 A_DDR3_DQ[22] G2 H8 T9 H8 T9
A_DDR3_DQ[7] H7 DQL6 DQL5 VSS_12 DQL5 VSS_12
DQL7 A_DDR3_DQ[23] H7 G2 G2
B1 DQL7 DQL6 DQL6
VSSQ_1 B1 H7 H7
A_DDR3_DQ[8] D7 B9 VSSQ_1 DQL7 DQL7
DQU0 VSSQ_2 A_DDR3_DQ[24] D7 B9 B1 B1
A_DDR3_DQ[9] C3 D1 DQU0 VSSQ_2 VSSQ_1 VSSQ_1
DQU1 VSSQ_3 A_DDR3_DQ[25] C3 D1 D7 B9 D7 B9
A_DDR3_DQ[10] C8 D8 DQU1 VSSQ_3 DQU0 VSSQ_2 DQU0 VSSQ_2
DQU2 VSSQ_4 A_DDR3_DQ[26] C8 D8 C3 D1 C3 D1
A_DDR3_DQ[11] C2 E2 DQU2 VSSQ_4 DQU1 VSSQ_3 DQU1 VSSQ_3
DQU3 VSSQ_5 A_DDR3_DQ[27] C2 E2 C8 D8 C8 D8
A_DDR3_DQ[12] A7 E8 DQU3 VSSQ_5 DQU2 VSSQ_4 DQU2 VSSQ_4
DQU4 VSSQ_6 A_DDR3_DQ[28] A7 E8 C2 E2 C2 E2
A_DDR3_DQ[13] A2 F9 DQU4 VSSQ_6 DQU3 VSSQ_5 DQU3 VSSQ_5
DQU5 VSSQ_7 A_DDR3_DQ[29] A2 F9 A7 E8 A7 E8
A_DDR3_DQ[14] B8 G1 DQU5 VSSQ_7 DQU4 VSSQ_6 DQU4 VSSQ_6
DQU6 VSSQ_8 A_DDR3_DQ[30] B8 G1 A2 F9 A2 F9
A_DDR3_DQ[15] A3 G9 DQU6 VSSQ_8 DQU5 VSSQ_7 DQU5 VSSQ_7
DQU7 VSSQ_9 A_DDR3_DQ[31] A3 G9 B8 G1 B8 G1
DQU7 VSSQ_9 DQU6 VSSQ_8 DQU6 VSSQ_8
A3 G9 A3 G9
For 120Hz Vb1

TXDBN0_L_URSA11 0.1uF C12832 TXDBN0_L
TXDBP0_L_URSA11 0.1uF C12833 TXDBP0_L
TXDBP1_L_URSA11 0.1uF C12835 TXDBP1_L
DDR PHY VREF TXDBN2_L_URSA11 0.1uF C12836 TXDBN2_L
0.1uF C12837 TXDBP2_L
* DDR_VTT TXDBP2_L_URSA11
+1.5V_U_DDR +1.5V_U_DDR TXDBN3_L_URSA11 0.1uF C12838 TXDBN3_L
U_MVREFCA_A0 U_MVREFCA_A1 TXDBP3_L_URSA11 0.1uF C12839 TXDBP3_L
+1.5V_U_DDR +3.3V_NORMAL 0.1uF C12841 TXDBP4_L
TXDBP4_L_URSA11
IC13000 TXDBN5_L_URSA11 0.1uF C12842 TXDBN5_L
AP2303MPTR-G1 [EP] 0.1uF C12843 TXDBP5_L
R13009 R13012 TXDBP5_L_URSA11
0.1uF C12844 TXDBN6_L
C13039 1K 1K TXDBN6_L_URSA11
L13001 10uF 0.1uF C12845 TXDBP6_L
VIN NC_3 CIS21J121 1% 1% TXDBP6_L_URSA11
10V 0.1uF C12846 TXDBN7_L
1 8 TXDBN7_L_URSA11
C13019 0.1uF C12847 TXDBP7_L
THERMAL
TXDBP7_L_URSA11
DDR_VTT_URSA 10uF
GND NC_2
9
10V 2 7
R13010 C13055 C13059 R13013 C13060 C13061
VREFEN VCNTL 1K 0.1uF 1000pF 1K
L13000 3 6 0.1uF 1000pF
CIS21J121 1% 1%
1% 100K
R13001 VOUT NC_1
4 5
1% 100K
R13002
C13004 C13009 C13014

C13020
0.1uF
10uF 10uF 10uF

16V
10V 10V 10V
+1.5V_U_DDR
Decap removed
C13000 C13005 C13010 C13015 C13022 C13025 C13029 DDR_VTT_URSA DDR_VTT_URSA_1
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF L13002
BLM18PG121SN1D
C13049 C13050 C13051 C13052 C13056

1uF 0.1uF 0.1uF 0.1uF 0.1uF
10V 16V 16V 16V 16V
Close to DDR POWER PIN
+1.5V_U_DDR
+1.5V_U_DDR A_DDR3_CKE
C13001 C13006 C13011 C13016 C13023 C13026 C13030 C13033 C13036

0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF R13011
OPT
R13004
1K 1K
A_DDR3_RESET
R14200
1/16W
10K

1%
+1.5V_U_DDR
C13003 C13007 C13012 C13017 C13021 C13027 C13031 C13034 C13037 C13040 C13042 C13044 C13046 C13048
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
16V 16V 16V 16V 16V 16V 16V 16V

+1.5V_U_DDR
C13002 C13008 C13013 C13018 C13024 C13028 C13032 C13035 C13038 C13041 C13043 C13045 C13047
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
BSD-15Y-LM14A-143_00-HD
UF77 ONLY
URSA11_DDR
15/01/21
IC13200-*1
W25Q32FVSSIG +3.3V_NORMAL
URSA_PQ_DEBUG
WINBOND ELECTRONICS CORP.
URSA11_SERIAL_FLASH_MEMORY_WINBOND(SUB) P13201
EAN62459301
12507WS-04L
R13263
IC12800 URSA_PQ_DEBUG
LGE5352(URSA11) CS VCC 10K
SPI Flash 1 8
1
DO[IO1] HOLD_OR_RESET[IO3]
AD26 2 7
2 R13269 33 URSA_UART2_RX
URSA_RESET PAD_RESET
AD11
PAD_I2C_HSC_SDA/[VSYNC_LIKE_SPI2] WP[IO2] CLK URSA_PQ_DEBUG
AH4 AC10 3 6
XIN_URSA AH3
PAD_XOUT PAD_I2C_HSC_SCL/[VSYNC_LIKE_SPI3] URSA11_SERIAL_FLASH_MEMORY_MXIC(MAIN) 3
XO_URSA PAD_XIN
AE9
PAD_SPI1_CK/GPIO58
AC23
AD24
URSA_OPT_0 IC13200 GND
4 5
DI[IO0]
R13268 33
4 URSA_UART2_TX
I2CS_SDA AR13200 AD9
PAD_I2C_S_SDA PAD_SPI1_DI/GPIO59
AD23
Div_BIT0
Div_BIT1
MX25L3235E URSA_PQ_DEBUG
I2CS_SCL 33 PAD_I2C_S_SCL PAD_SPI2_CK/GPIO56
AC22
C13200 C13201 PAD_SPI2_DI/GPIO57 URSA_OPT_4 URSA_L/D_ctrl EAN62459501 +3.3V_NORMAL 5 C13212
AD10 AE24 R13228 33 0.1uF
56pF 56pF PAD_I2C_M_SDA PAD_SPI3_CK/GPIO54 L/D_CLK
50V 50V AE10 AE22 URSA_L/D_ctrl R13229 33 MACRONIX INTERNATIONAL CO., LTD. 16V
OPT PAD_I2C_M_SCL/[VSYNC_LIKE_SP1]PAD_SPI3_DI/GPIO55 L/D_DI URSA_PQ_DEBUG
OPT AD22
URSA_UART2_TX PAD_SPI4_CK/GPIO52 URSA_OPT_5
E8 AC21
PAD_GPIO00/[UART2_TX] PAD_SPI4_DI/GPIO53 URSA_OPT_6
F7 URSA_L/D_ctrl
PAD_GPIO01/[UART2_RX] R13215 33 CS VCC
AC24 C13209
URSA_UART2_RX PAD_VSYNC_LIKE/GPIO40 L/D_VSYNC 1 8 0.1uF
E7
PAD_GPIO02/[UART1_TX]
C13214
5pF
C13215
5pF C13216
SPI_CZ 16V
OPT OPT OPT F6
URSA_UART1_TX PAD_GPIO03/[CHIP_VDET] 50V 50V 5pF +3.3V_NORMAL
0.01uF 0.01uF 0.01uF AE13 DIM0 50V
25V 25V 25V PAD_DIM00/GPIO32
AD13 R13245 33 SO/SIO1 HOLD/SIO3 +3.3V_NORMAL
C13217 C13218 C13219 DIM1 OPT 2 7
AD27
PAD_DIM01/GPIO33
AC13 DIM2 R13226 SPI_DO URSA_SYS_DEBUG
SPI_CZ R14402 33 AC27
PAD_SPI_CZ PAD_DIM02/GPIO34
AE15
10K 10K R13255 P13202
PAD_SPI_CK PAD_DIM03/GPIO35 12507WS-04L
SPI_CK R14403 33 AC28 AC14 FLASH_WP_URSA 1K WP/SIO2 SCLK R13260
SPI_DI AC26
PAD_SPI_DI PAD_DIM04/GPIO36
AD14
URSA_OPT_1
R13227 R13244 3 6 SPI_CK 10K
PAD_SPI_DO PAD_DIM05/GPIO37 URSA_BIT0 10K +3.3V_NORMAL
SPI_DO AD15 URSA_SYS_DEBUG
PAD_DIM06/GPIO38 URSA_BIT1 U_SPI_WP_f_URSA
AE25 AC15 1
PAD_INTERUPT_R21 PAD_DIM07/GPIO39 URSA_BIT2
AD25 FRC_FLASH_WP R14400
10K
1K
GND SI/SIO0
PAD_INTERUPT_R20
OPT R13248 4 5 SPI_DI 2 R13267 33 URSA_UART1_RX
URSA_UART1_RX E4
OPT PAD_TCON0/STV2 R14401 URSA_SYS_DEBUG
0.01uF PAD_TCON1/OE
D5 10K
U_SPI_WP_f_SoC
U_SPI_WP_f_SoC R13250
D7 E6 3
25V PAD_IRE/[UART1_RX] PAD_TCON2/YV1C 10K
C13220 E5
PAD_TCON3/CPV
F5
OPT R13266 33
PAD_TCON4/STV1
4 URSA_UART1_TX
F4
R13211 0 PAD_TCON5/SFT URSA_SYS_DEBUG
AC25 D6 5
PAD_TESTPIN PAD_TCON6/TPV
AC9 D4
GND_EFUSE PAD_TCON7/POL C13211
R13212 0 0.1uF
AC4 16V
PAD_TCON8/[VX1T_HTPDN] HTPDAn URSA_SYS_DEBUG
OPT R13200 10K AC19 AD4
GPIO[09] PAD_TCON9/[VX1T_LOCKN]
OPT R13201 10K AD19 AA4
GPIO[08] PAD_TCON10/[HDMI_R_DDC_CLK3] R13243
AC18 AB5 10K
VID1 GPIO[07] PAD_TCON11/[HDMI_R_DDC_DAT3]
AB4
PAD_TCON12/[HDMI_R_HP3]
AE19 AA5
VID0 GPIO[06] PAD_TCON13/[HDMI_R_CEC3]
AD5
GPIO (RESERVED FOR U11)
PAD_TCON14/[HDMI_T_CEC]
AD7 AE5
U11 ONLY, NC FOR U11P
OPTR13202
OPTR13203
33
33 AE7
AC7
GPIO[64]
GPIO[65]
PAD_TCON15/[HDMI_T_HPD]
AD21
LOCKAn Clock for URSA11 URSA Reset
OPTR13204 33
GPIO[66] PAD_GPIO04 Data_Format_1 +3.3V_NORMAL
AD8 AD20
OPTR13205 33
C13207
GPIO[67] PAD_GPIO05 Data_Format_0
AC6 +3.3V_NORMAL
GPIO[74] 0.01uF 0.01uF
AC8 AC5 25V 25V
OPTR13206 33
8pF
50V
GPIO[63] GPIO[75] C13202 C13205 +3.3V_NORMAL
GPIO[76]
AB7 SW13200
AB6 1 2
X-TAL_1
GPIO[69]
AE21 C13210
R13241
PAD_GPIO10 XIN_URSA
GND_1
AC20
1uF
22
PAD_GPIO11 URSA_RX_Vx1_HTPDn R13264
AE12 R13218 10K 3 4 10K
PAD_GPIO12/[VX1_RX_HTPD_O]
URSA_RX_Vx1_HTPDn
10V
AD12 OPT
R13254
M4
PAD_GPIO13/[VX1_RX_HTPD_V]
AD18 R13219 10K OPT
OPTR13207 33
GPIO[70] PAD_GPIO14 URSA9_CONNECT SML-512UW URSA_RESET
1
M5 AC11
X13200
LD13200
OPTR13208 33
24MHz
GPIO[72] PAD_GPIO15/[VX1_RX_LOCK_O] LOCKAn_OSD
N4 AC12 0
1M
OPTR13209 33
GPIO[73] PAD_GPIO16/[VX1_RX_LOCK_V] LOCKAn_Video
R13259
C13208
N5 AE18
OPTR13210 33
GPIO[71] PAD_GPIO17 FLASH_WP_URSA R13238
10K
D13200 URSA_RESET_MICOM
R13258
4
8pF
50V
R13242
1N4148W 0
B1 470K
X-TAL_2
GND_2
100V
10K
NC_3
AG1 OPT R13265
NC_4 XO_URSA OPT URSA_RESET_SoC
AE6 AH2
NC_1 NC_5
AH27
NC_6
AD6 B28 C13204 C13203 C13213 E Q13200
NC_2 NC_7 C13206
AG28 0.01uF 0.01uF 0.01uF 0.01uF MMBT3906(NXP)
NC_8 25V 25V 25V 25V B NXP_LOCKAN_LED_TR
E Q13200-*1
2N3906S-RTK
KEC_LOCKAN_LED_TR
B
C
+3.3V_NORMAL
URSA Option
URSA_OPT_0_1
URSA_RX_LVDS
URSA_OPT_1_1
URSA_OPT_6_1
URSA_OPT_5_1
URSA_OPT_4_1
URSA_BIT0_1
LGD_Module
URSA_BIT1_1
URSA_BIT2_1
Div_BIT1_1
Div_BIT0_1
R13233 10K
R13234 10K
R13236 10K
R13239 10K
R13224 10K
R13230 10K
R13216 10K
R13222 10K
R13213 10K
R13220 10K
Low High
Chip Config Debugging for URSA11
URSA_OPT_0 Rx_Vx1 Rx_LVDS
URSA_OPT_6
Reserved Debug/ISP ADDR
URSA_OPT_1 OS_Moudule LGD_Module Reserved Slave (Debug Port:0XB4,ISP:0X98)
URSA_OPT_5
CHIP_CONF:{DIM2,DIM1,DIM0}
URSA_OPT_4 PRINT_ON PRINT_OFF URSA_OPT_4 CHIP_CONF=3’d7:111:boot from SPI Flash I2C_S Port
Div_BIT0 P13200
URSA_OPT_5 Reserverd Reserverd Division Type
12507WS-04L
Div_BIT1
WAFER-STRAIGHT
URSA_OPT_6 Reserverd Reserverd URSA_OPT_0 URSA_DEBUG
Rx Interface +3.3V_NORMAL SW13201
URSA_OPT_1
DIM0 1
JS2235S
Module Type
BIT [2/1/0] Tx Lane URSA_BIT0

Tx Lane OPT 10K 2
URSA_BIT1 I2C_SCL7 1 6 I2C_SDA7
0/0/0 4K@120 (4 DDR) 10K R13253 R13261 R13270
DIM1 R13257 33 0
0/0/1 URSA_BIT2 R13249 3 SCL2_+3.3V_DB 0
4k@60 (2 DDR) URSA_MP URSA_MP
URSA_DEBUG 2 5
I2CS_SCL I2CS_SDA
URSA_BIT1_0
URSA_BIT2_0
0/1/0 4K@120 8K(98UF8K 4DDR) OPT 10K

URSA_OPT_0_0
URSA_BIT0_0
10K
URSA_RX_Vx1
10K
R13262 URSA_DEBUG R13271

URSA_OPT_4_0
R13231 10K
R13235 10K
R13256 33
Div_BIT1_0
URSA_OPT_1_0
URSA_OPT_6_0
URSA_OPT_5_0
0 0
Div_BIT0_0
R13225 10K
4
OS_Module
OLED 4K@120(4 DDR)

R13223 10K
0/1/1 SDA2_+3.3V_DB
R13217 10K
R13221 10K
10K
OPT OPT
R13214 10K
BIT [1/0] Module Division 10K R13252 URSA_DEBUG

SCL2_+3.3V_DB
3 4 SDA2_+3.3V_DB
FHD@120 (4 DDR)
R13237
1/0/0
R13240
R13247 DIM2 5
0/0 Non Division
R13232
1/0/1 FHD@60 (2 DDR)

0/1 2 Division
1/1/0 FHD@60 (4 DDR) OPT 10K
1/0 4 Division
Reserved
1/1/1
4K@60(4 DDR) 1/1 8 Division 10K R13251
R13246

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. URSA11_GPIO
MAX 4.7A
+12V
+1.5V URSA DDR +0.95V URSA11 Core

+1.5V_U_DDR
L13411 POWER_ON/OFF2_1
BLM18PG121SN1D
R13404
UF77 10K
C13443 C13617
10uF 0.1uF R13407
R13408
1/16W
25V 16V 39K
IC13403
10K
R13424 R1
1%
BD9D321EFJ [EP] 1/16W
UF64/68 10K 5%
1%
1/16W
91K
R13406
C13617-*1
0.1uF
C13403
VID_CTRL
R13411R13409
[EP]
GND2
GND1
NC_3
TRIP
25V EN VIN
1/16W 1/16W
1 8 1000pF
5.1K 12K
VO
16V 50V R2
1%
1/16W
27K
R13405
THERMAL
1%
R13410
0.1uF
1%
1/16W
20K
R13421 R13422 FB BOOT C13447
28
27
26
25
24
9
2 7
RF 1 23 FB
R1
1%
18K 3.6K L13412
1% 1% 2.2uH THERMAL
VREG SW PGOOD 2 29 22 GND
3 6 +12V
C13444 R13401 1K
100pF PS064T-2R2MS EN 3 21 MODE
50V POWER_ON/OFF2_3 16V
SS GND 0.1uF IC13402
4
3A 5 C13448
22uF
C13449
22uF
ZD13401 VBST 4
TPS53513RVER
20 VREG L13402
R13403
10V 10V 2.5V
R13423 C13405 NC_1 VDD
OPT 5 19
4.7
22K C13445 C13446 C13402 R13400
1uF 2200pF 2K SW_1 NC_2
1% 6 18
10V 50V
0.1uF 1/16W C13408 C13407 C13409
SW_2 7 17 VIN_3
R2 16V 5% 1uF 10uF 10uF
VDDC
25V 25V 25V
L13403 SW_3 8 16 VIN_2
Vout=0.765*(1+R1/R2)=1.516V 1.0uH
SW_4 9
8A 15 VIN_1
R13402
10
11
12
13
14
1/10W
C13451
ZD13400
3.3
C13450 C13400 C13401 C13411
5%
C13406
PGND_1
PGND_2
PGND_3
PGND_4
PGND_5
2.5V
0.1uF 22uF 22uF
OPT
22uF 2200pF
150uF 50V
6.3V
C13404
470pF
50V
Vout=0.6*(1+R1/R2)=0.98V_FOR 0.95V at URSA11 VIA
VID_CTRL
VID_CTRL
URSA11_VID URSA11_VID
+3.3V_NORMAL
URSA11_VID URSA11_VID
R13414
R13412
1/16W
1/16W
100K
D
100K
EBK62072501
1%
1%
Q13401-*1
G 2N7002KA
R13415
S URSA11_VID_FET_DIODES(SUB)
R13413
1/16W
1/16W
20K
20K
R13420
1%
R13418
1%
OPT
OPT
10K
10K
Q13401
D 2N7002KA
URSA11_VID_FET_KEC(MAIN)
G EBK62072501 R13416 0
VID0
S URSA11_VID
D EBK62072501
Q13400
2N7002KA
G URSA11_VID_FET_KEC(MAIN) R13417 0
VID1
S URSA11_VID
D
EBK62072501
Q13400-*1
G R13419 R13425
2N7002KA 10K 10K
S URSA11_VID_FET_DIODES(SUB)
R1:10K/R2:17.1K, V=0.95V(VID0=L,VID1=L) URSA11_VID_PULLDOWN URSA11_VID_PULLDOWN
R1:10K/R2:17.1K//120K, V=1.008V(VID0=H,VID1=L)
R1:10K/R2:17.1K//120K, V=1.008V(VID0=L,VID1=H)
R1:10K/R2:17.1K//120K//120K, V=1.05V(VID0=H,VID1=H)

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. URSA11_DCDC
15/01/21
VDDC VDDC
VDDC IC12800 IC12800
LGE5352(URSA11) LGE5352(URSA11)
N7 H1 C11
C14800 C14821 C14832 C14852 C14856 C14858 C14863 C14868 C14872 C14876 C14878 N8
VDDC_1 GND_1
K1 G11
GND_73
10uF 10uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF 10uF 0.1uF 1uF 10uF P7
VDDC_2 GND_2
A2 H11
GND_74
C19
10V 10V VDDC_3 GND_3 GND_75 GND_199
10V 10V 10V 16V 16V 16V 16V 10V 16V P8 B2 J11 D19
VDDC_4 GND_4 GND_76 GND_200
P9 G2 K11 E19
R5 J2 L11 F19
R6 L2 M11 G19
AVDDL_DRV_MOD 4th Layer R7
VDDC_7 GND_7
N2 N11
GND_79 GND_203
H19
R8 P2 P11 J19
L14804
Close to Chip side R9
T5
VDDC_9
VDDC_10
GND_9
GND_10
W2
Y2
R11
T11
GND_81
GND_82
GND_205
GND_206
K19
L19
BLM18PG121SN1D VDDC_11 GND_11 GND_83 GND_207
T6 AB2 U11 M19
T7 AC2 V11 N19
C14807 C14827 C14835 C14857 T8 AG2 W11 AB19
C14818 C14843 C14850 C14904 VDDC_14 GND_14 GND_86 GND_210
T9 Y11 AH19
10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.47uF VDDC_15 GND_87 GND_211
0.1uF T10 AA11
10V 16V 16V 16V 16V 16V 6.3V VDDC_16 GND_88
OPT 16V U4 AB11
VDDC_17 GND_89
U5 D3 C12 C20
U6 E3 G12 D20
4th Layer VDDC_19 GND_16 GND_91 GND_213
U7 F3 H12 E20
U8 T3 N12 F20
Close to Chip side AVDDL_DVI_RX U9
U10
VDDC_21
VDDC_22
GND_18
GND_19
U3
V3
P12
R12
GND_93
GND_94
GND_215
GND_216
G20
H20
Y3 T12 J20
GND_21 GND_96 GND_218
M3 AE3 U12 K20
AVDDL_HDMIRX_1 GND_22 GND_97 GND_219
W6 AF3 V12 L20
W7 AG3 AB12 M20
C14888 AVDDL_HDMITX W8
AVDDL_HDMIRX_4
C13
GND_100 GND_222
N20
0.1uF C4
GND_25
AB3 D13
16V AVDDL_HDMITX_4 GND_101
Y7 P4 E13
AVDDL_HDMITX_1 GND_26 GND_102
Y8 R4 F13 U20
AVDDL_HDMITX_2 GND_27 GND_103 GND_223
C14890 Y9
AVDDL_HDMITX_3 GND_28
T4 G13
GND_104 GND_224
V20
0.1uF H13 AB20
GND_105 GND_225
W9 J13
16V AVDDL_LVDSRX/AVDDL_VBY1RX_1 GND_106
DVDD_DDR W10 K13
AVDDL_LVDSRX/AVDDL_VBY1RX_2 GND_107
Y10 L13
AVDDL_DRV_MOD AVDDL_LVDSRX/AVDDL_VBY1RX_3 GND_108
M13 A21
L14805 GND_109 GND_226
BLM18PG121SN1D J8 V4 N13 B21
AVDDL_MOD_1 GND_29 GND_110 GND_227
J9 W4 T13 C21
AVDDL_MOD_2 GND_30 GND_111 GND_228
C14860 J10 U13 D21
C14808 C14816 C14824 C14830 C14839 C14848 C14854 C14864 K8
AVDDL_MOD_3
AG4 V13
GND_112 GND_229
E21
10uF 1uF AVDDL_MOD_4 GND_31 GND_113 GND_230
0.1uF 0.1uF 10uF 0.1uF 1uF 0.1uF 0.1uF K9 W13 F21
10V 10V AVDDL_MOD_5 GND_114 GND_231
16V 16V 10V 16V 10V 16V 16V K10 AB13 G21
OPT AVDDL_PREDRV_1 GND_115 GND_232
L8 H21
AVDDL_PREDRV_2 GND_233
L9 D14 J21
AVDDL_PREDRV_3 GND_116 GND_234
L10 P5 E14 K21
4th Layer AVDDL_PREDRV_4 GND_32 GND_117 GND_235
DVDD_DDR M10 V5 F14 L21
AVDDL_PREDRV_5 GND_33 GND_118 GND_236
W5 G14 M21
T16 H14 N21
AVDDL_DVI_RX
Close to Chip side U16
U17
DVDD_DDR_1
DVDD_DDR_3
J14
K14
GND_120
GND_121
GND_238
GND_239
P21
R21
DVDD_DDR_4 GND_122 GND_240
L14807 T17 L14 T21
BLM18PG121SN1D DVDD_DDR_2 GND_123 GND_241
B6 M14 U21
K6 N14 V21
+1.5V_U_DDR M6 T14 W21
C14809 C14817 C14822 C14833 C14844 C14853 GND_37
N6 U14
GND_126 GND_244
Y21
0.1uF 0.1uF 10uF 0.1uF 0.1uF 0.47uF GND_38
P6 V14
GND_127 GND_245
AA21
16V GND_39 GND_128 GND_246
16V 16V 10V 16V 6.3V P15 V6 W14 AB21
OPT AVDD_DDR0_1 GND_40 GND_129 GND_247
P16 AB14 AG21
AVDD_DDR0_2 GND_130 GND_248
P17 A7
AVDD_DDR0_3 GND_41
4th Layer R15 G7 B15
R16 H7 D15 A22
AVDD_DDR0_5 GND_43 GND_132 GND_249
AVDDL_HDMITX Close to Chip side R17
P19
AVDD_DDR0_6 GND_44
J7
K7
E15
F15
GND_133 GND_250
B22
C22
P20 L7 G15 D22
L14806 R19 M7 H15 E22
BLM18PG121SN1D AVDD_DDR1_3 GND_47 GND_136 GND_253
R20 V7 J15 F22
T19 K15 G22
T20 L15 H22
C14810 C14819 C14828 C14846 AVDD_DDR1_6
M15
GND_139 GND_256
J22
0.1uF 10uF 0.1uF 0.1uF AVDD_15_MOD GND_140 GND_257
NC FOR U11P
J12 B8 N15 K22
AVDD_15_MOD_1 GND_49 GND_141 GND_258
U11 ONLY
16V 10V 16V 16V K12 G8 T15 L22
OPT AVDD_15_MOD_2 GND_50 GND_142 GND_259
L12 H8 U15 M22
AVDD_15_MOD_3 GND_51 GND_143 GND_260
M12 M8 V15 N22
4th Layer AVDD_15_MOD_4 GND_52 GND_144 GND_261
V8 W15 P22
AA8 AB15 R22
Close to Chip side AVDD_MOD
Y14
AVDD_MOD_1
GND_54
GND_55
AB8 AF15
GND_146
GND_147
GND_263
GND_264
T22
Y15 U22
AVDD_MOD_2 GND_265
AA14 C16 V22
VDDP_AVDD_PLL AVDD_MOD_3 GND_148 GND_266
AA15 A9 D16 W22
AVDD_MOD_4 GND_56 GND_149 GND_267
G9 E16 Y22
W20 H9 F16 AA22
VDDP_1 GND_58 GND_151 GND_269
Y20 M9 G16 AB22
VDDP_2 GND_59 GND_152 GND_270
AA20 N9 H16
VDDP_3 GND_60 GND_153
V9 J16 A23
AVDD_HDMITX GND_61 GND_154 GND_271
AA9 K16 B23
AC3 AB9 L16 C23
AVDD_HDMITX_1 GND_63 GND_156 GND_273
AVDD_DVI_ALLRX Y13 M16 D23
AVDD_HDMITX_2 GND_157 GND_274
AA13 N16 E23
AVDD_HDMITX_3 GND_158 GND_275
P3 V16 F23
AVDD_HDMIRX_1 GND_159 GND_276
C14885 W12
AVDD_HDMIRX_2 GND_64
B10 W16
GND_160 GND_277
Y23
0.1uF Y12 G10 AB16 AA23
AVDD_HDMIRX_3 GND_65 GND_161 GND_278
AA12 H10 AC16 AB23
16V AVDD_HDMIRX_4 GND_66 GND_162 GND_279
N10 AD16 AH23
C14889 AA19
GND_67
P10 AE16
GND_163 GND_280
+3.3V_NORMAL 0.1uF W19
AVDD_XTAL GND_68
R10 B17
GND_164
A24
VDDP_AVDD_PLL 16V AVDD_PLL_1 GND_69 GND_165 GND_281
Y19 V10 C17 B24
AVDD_PLL_2 GND_70 GND_166 GND_282
AA10 D17 C24
L14800 AB10 E17 D24
BLM18PG121SN1D Y16 F17 Y24
AVDD_LVDSRX/AVDD_VBY1RX_1 GND_169 GND_285
AA16 G17 AA24
AA17 H17 AB24
C14803 C14814 C14823 C14831 C14837 C14845 C14851 C14855 +1.5V_U_DDR J17
C14859 C14862 GND_172
10uF 10uF 10uF 1uF 0.1uF 0.1uF 0.1uF 0.47uF K17 C25
GND_173 GND_288
10V 10V 10V 10V 16V 16V 16V 6.3V 10uF 0.47uF +1.5V_U_DDR L17 J25
C14886 0.1uF 16V C14891 0.47uF 6.3V GND_174 GND_289
10V 6.3V A18
AVDD_DDR_VBP_A_1
M17 M25
GND_175 GND_290
B18 N17 R25
4th Layer C14892 0.22uF 16V OPT AVDD_DDR_VBP_A_2 GND_176 GND_291
R13 V17 V25
AVDD_DDR_VBP_A_3 C14899 0.1uF 16V GND_177 GND_292
R14 A20 W17 Y25
C14893 0.47uF 6.3V AVDD_DDR_VBP_A_4 DRAM_VDD_A_1 GND_178 GND_293
Close to Chip side A16 B20 Y17 AA25
U11 MIU POWER ONLY

4th Layer B16
AVDD_DDR_VBN_A_1 DRAM_VDD_A_2
AB17
GND_179 GND_294
AB25
4th Layer C14894 0.22uF 16V OPT AVDD_DDR_VBN_A_2 R14800 GND_180 GND_295
P13 AC17 AG25
AVDD_DDR_VBN_A_3 GND_181 GND_296
P14 URSA11P0 AD17
POWER ONLY
AVDD_DDR_VBN_A_4 GND_182
U11P MIU
A26 C14900 0.1uF 16V AG17
C14887 0.1uF 16V C14895 0.22uF 16V OPT DRAM_VDD_B_1 GND_183
U18 B26 C18 C26
AVDD_DDR_VBP_B_1 DRAM_VDD_B_2 URSA11P GND_184 GND_297
4th Layer U19 D18 E26
C14896 0.47uF 6.3V AVDD_DDR_VBP_B_2 GND_185 GND_298
Y27 E18 W26
AVDD_DDR_VBP_B_3 GND_186 GND_299
C14897 0.22uF 16V OPT
Y28
V18
AVDD_DDR_VBP_B_4 Close to Chip F18
G18
GND_187 GND_300
Y26
AA26
AVDD_DDR_VBN_B_1 GND_188 GND_301
4th Layer V19 H18 AB26
C14898 0.47uF 6.3V AVDD_DDR_VBN_B_2 GND_189 GND_302
AB27 J18 AE26
AVDD_DDR_VBN_B_3 GND_190 GND_303
AB28 K18
AVDD_DDR_VBN_B_4 GND_191
L18 A27
GND_192 GND_304
M18 B27
GND_193 GND_305
N18 C27
GND_194 GND_306
AA27
GND_307
AG27
GND_308
AVDD_MOD J28
GND_309
W18 M28
L14801 GND_195 GND_310
BLM18PG121SN1D Y18 R28
GND_196 GND_311
AA18 V28
GND_197 GND_312
AB18
GND_198
C14802 C14811 C14820 C14829 C14836 C14842 C14849
10uF 10uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF
10V
10V 10V 16V 16V 16V 16V
+1.5V_U_DDR
AVDD_DVI_ALLRX
L14802
C14867 C14869 C14871 C14873 C14875 C14879 C14880
BLM18PG121SN1D 10uF 10uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF
10V 10V 10V 16V 16V 16V 16V
C14804 C14812 C14825 C14834 C14840 C14905

10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.47uF
10V 6.3V
16V 16V 16V 16V
4th Layer
Close to Chip side +1.5V_U_DDR AVDD_15_MOD

AVDD_HDMITX
L14803
BLM18PG121SN1D L14808
BLM18PG121SN1D
C14805 C14826 URSA11

C14813 C14841
10uF 0.1uF C14870 C14874
0.1uF 0.1uF C14877 C14881
10V 16V 10uF 0.1uF
16V 16V 0.1uF 0.1uF C14882 C14883 C14884
OPT 10V 16V
16V 16V 0.47uF 10uF 0.1uF
4th Layer 6.3V 10V 16V
Close to Chip side 4th Layer
Close to Chip side

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. URSA11_Power
Contents of LCD TV Standard Repair Process
No. Error symptom (High category) Error symptom (Mid category) Page Remarks
1 No video/Normal audio 1
2 No video/No audio 2
3 A. Video error Picture broken/ Freezing 3
4 Color error 4
Vertical/Horizontal bar, residual image,

5 5
light spot, external device color error
6 No power 6
B. Power error Off when on, off while viewing, power
7 7
auto on/off
8 No audio/Normal video 8
C. Audio error
9 Wrecked audio/discontinuation/noise 9
10 Remote control & Local switch checking 10
11 MR13 operating checking 11
12 D. Function error Wifi operating checking 12

13 Camera operating checking 13
14 External device recognition error 14
15 E. Noise Circuit noise, mechanical noise 15
16 F. Exterior error Exterior defect 16

First of all, Check whether there is SVC Bulletin in GCSC System for these model.
Standard Repair Process
Established
Error A. Video error date 2013.01.31
LCD TV symptom
No video/ Normal audio Revised date 1/16
First of all, Check whether all of cables between board is inserted properly or not.
(Main B/D↔ Power B/D, LVDS Cable, Speaker Cable, IR B/D Cable,,,)
☞A1 ☞A9
No video Normal Y Check Back Light Y Check Power Normal Y Replace T-con/Main
Normal audio On Board or module
audio On with naked eye Board voltage
24V, 12V,3.5V etc. And Adjust VCOM
N N N
Move to No
☞A9 Check Power Board 24V output Repair Power
video/No audio Board or parts
Replace Inverter
Normal Y
or module
voltage
End
N
Repair Power
Board or parts
※Precaution ☞A4 & A2

Always check & record S/W Version and White
Replace Main Board Re-enter White Balance value
Balance value before replacing the Main Board
Only for training and service purposes 1
Established
LCD TV symptom
No video/ No audio Revised date 2/16
☞A9
Check various Check and
Normal Y
No Video/ voltages of Power replace
No audio Board ( 3.5V,12V,20V voltage?
MAIN B/D
or 24V…)
N End
Replace Power
Board and repair
parts
Established
LCD TV symptom
Picture broken/ Freezing Revised date 3/16
. By using Digital signal level meter

☞ A3
. By using Diagnostics menu on OSD
Check RF Signal level ( Setting→ Quick Setting → Programmes → Programme Tuning → Manual Tuning → Check the Signal )
- Signal strength (Normal : over 50%)
- Signal Quality (Normal: over 50%)
Y Check whether other equipments have problem or not.

Normal
(By connecting RF Cable at other equipment)
Signal?
→ DVD Player ,Set-Top-Box, Different maker TV etc`
N
☞ A4
Check RF Cable
Normal Y Check SVC N Check Y
Connection Close
1. Reconnection Picture? S/W Version Bulletin? Tuner soldering
2. Install Booster N
Y
N
S/W Upgrade
N Contact with signal distributor
Normal
Picture? or broadcaster (Cable or Air)
Normal N
Y Picture? Replace
Main B/D
Y
Close
Close
Established
LCD TV symptom
Color error Revised date 4/16
☞A6 ☞ A7
※ Check Y
Check color by input
and replace
-External Input Y Y
Color Link Cable Color Color
-COMPONENT Replace Main B/D Replace module
error? (V by one) error? error?
-AV
and contact
-HDMI N N N
condition
Check error End

color input
mode
Check
External Input/ External device Y
external
Component /Cable Replace Main/T-con B/D
device and
error normal
cable
N
Request repair
for external
device/cable
Check external External device Y

HDMI device and /Cable Replace Main/T-con B/D
error cable normal
A. Video error Established

Error date 2013.01.31
LCD TV symptom Vertical / Horizontal bar, residual image,
light spot, external device color error Revised date 5/16
Vertical/Horizontal bar, residual image, light spot Replace

Module
☞A6
☞ A7 N
Check color condition by input Check external
Check and
-External Input Screen Y device Y Screen N Screen
-Component Normal? replace Link Replace Main/T-con B/D
normal? connection normal? (adjust VCOM) normal?
-HDMI Cable
condition
N N For LGD panel Y
Y
Replace Main B/D
Replace Request repair End End
module for external
device
For other panel
External device screen error-Color error

Check screen
condition by input
-External Input External
Check S/W Version Check N
-Component Input Connect other external N
version
-HDMI/DVI error device and cable Screen Replace
(Check normal operation of normal? Main/T-con
Y External Input, Component, B/D
Component RGB and HDMI/DVI by
error Y
S/W Upgrade connecting Jig, pattern
Generator ,Set-top Box etc.
Request repair for
external device
Y
Connect other external
Normal N HDMI/
device and cable N
screen? DVI Screen Replace
(Check normal operation of
External Input, Component, normal? Main /T-con
Y RGB and HDMI/DVI by B/D
connecting Jig, pattern
Generator ,Set-top Box etc.
Copyright 2015 LG Electronics End
Inc. All rights reserved. LGE Internal Use Only
Established
Error B. Power error date 2013.01.31
LCD TV symptom
No power Revised date 6/16
☞A8 ☞A9
DC Power on Replace
Check Power LED Y Normal N Check Power Y
by pressing Power Key OK? Power
Logo LED On? operation? On ‘”High”
On Remote control B/D
. Stand-By: Red or Turn On
N Y
. Operating: Turn Off
Check Power cord Replace Main B/D
was inserted properly
☞A9
N Measure voltage of each output of Power B/D
Normal?
Y
Y Y
※ Normal
voltage?
Replace Main B/D
Close Normal
Check ST-BY 3.5V
Y
voltage? N
☞A9 Replace Power B/D
N
Replace Power
B/D
Established
Error B. Power error date 2013.01.31
LCD TV symptom
Off when on, off while viewing, power auto on/off Revised date 7/16
Check outlet
☞A10
N Y
Check A/C cord Error? Check Power Off CPU Normal? End
Replace Main B/D
Mode Abnormal
N
Check for all 3- phase
power out Y Abnormal Replace Power B/D
1
Fix A/C cord & Outlet ☞A9

and check each 3
(If Power Off mode
phase out
is not displayed) Normal Y
Replace Main B/D
Check Power B/D voltage?
voltage
N
※ Caution
Check and fix exterior Replace Power B/D
of Power B/D Part
* Please refer to the all cases which Status Power off List Explanation
"POWEROFF_REMOTEKEY" Power off by REMOTE CONTROL
can be displayed on power off mode.
"POWEROFF_OFFTIMER" Power off by OFF TIMER
"POWEROFF_SLEEPTIMER" Power off by SLEEP TIMER
"POWEROFF_INSTOP" Power off by INSTOP KEY
"POWEROFF_AUTOOFF" Power off by AUTO OFF
Normal "POWEROFF_ONTIMER" Power off by ON TIMER
"POWEROFF_RS232C" Power off by RS232C
"POWEROFF_RESREC" Power off by Reservated Record
"POWEROFF_RECEND" Power off by End of Recording
"POWEROFF_SWDOWN" Power off by S/W Download
"POWEROFF_UNKNOWN" Power off by unknown status except listed case
"POWEROFF_ABNORMAL1" Power off by abnormal status except CPU trouble
Abnormal
"POWEROFF_CPUABNORMAL" Power off by CPU Abnormal
Established
Error C. Audio error date 2013.01.31
LCD TV symptom
No audio/ Normal video Revised date 8/16
☞A11 ☞A12+A9
Check user N Check audio B+ Y
No audio Normal
menu > Off 24V of Power
Screen normal voltage
Speaker off Board
Y N
Cancel OFF Replace Power Board and repair parts
Check N
Disconnection Replace MAIN Board End
Speaker
disconnection
Y
Replace Speaker
Established
Error C. Audio error date 2013.01.31
LCD TV symptom
Wrecked audio/ discontinuation/noise Revised date 9/16
→ abnormal audio/discontinuation/noise is same after “Check input signal” compared to No audio
Wrecked audio/
☞A12+A9
Check and replace
Discontinuation/ Check audio
speaker and
Noise for B+ Voltage (24V)
connector
Check input all audio
signal Y Y
Signal
-RF
normal? Wrecked audio/
-External Input Normal
signal Discontinuation/
N Replace Main B/D voltage?
Noise only
for D-TV
N
Wrecked audio/
Discontinuation/
Replace Power B/D
Noise only
for Analog
(When RF signal is not
received)
Request repair to external Wrecked audio/ Replace Main B/D End
cable/ANT provider Discontinuation/
Noise only
for External Input
(In case of N
External Input Connect and check Normal
signal error) other external audio?
Check and fix device
external device Y
Check and fix external device
D. Function error Established

LCD TV symptom
MR15/P operating checking Revised date 11/15
2. MR15 (Magic Remocon) operating error

☞A4
Check the N Check MR15
RF Receiver ver Normal Y Press the Is show ok N Turn off/on the
INSTART menu is “00.00”? itself Operation operating? set and press
wheel message?
the wheel
N
Y
Y
☞A14
Check & Replace Close
Check & Repair Battery of MR15
RF assy
connection
Normal Y
☞A4 operating? Close
Is show ok N Press the back
RF Receiver ver N message? key about 5sec
Close N
is “00.00”?
Y
Replace
MR15
Y Close
Down load the Firmware

* If you conduct the loop at 3times, change the M4.
* INSTART MENU14.RF
Remocon Test3. Firmware
download

LCD TV symptom
Remote control & Local switch checking Revised date 10/16
1. Remote control(R/C) operating error Replace

Main B/D
☞A13 ☞A13 ☞A13
Check & Repair N Check B+ Y Y
Check R/C itself Normal Y Normal Normal Check IR Normal
operating? Cable connection operating? 3.5V Voltage? Signal?
Operation Output signal
Connector solder On Main B/D
N
Y N N
☞A9
Check R/C Operating Check & Replace Close Check 3.5v on Power B/D Repair/Replace
When turn off light Baterry of R/C Replace Power B/D or IR B/D
in room Replace Main B/D
(Power B/D don’t have problem)
If R/C operate, Normal Y
operating? Close
Explain the customer
cause is interference
from light in room. N
Replace R/C

LCD TV symptom
Wifi operating checking Revised date 12/16
3.Wifi operating error
☞A4 ☞A15
Check the Wi-Fi Mac value N Check the Wifi wafer Normal N Replace
INSTART menu is “NG”? Voltage?
1pin Main B/D
Y
☞A15 Y
Check & Repair Close

Wifi cable
connection
☞A4
Wi-Fi Mac value N
is “NG”? Close
Change the Wifi

assy
Established
Error D. Function error date 2013.01.31
LCD TV symptom
External device recognition error Revised date 14/16
Y Check technical
Check External Input and
Signal information Technical N
input Component Replace Main B/D
input? - Fix information information?
Recognition error
signal
- S/W Version
N Y
HDMI/
Check and fix DVI, Optical
Fix in Replace Main B/D
external device/cable Recognition error
accordance
with technical
information
Established
Error E. Noise date 2013.01.31
LCD TV symptom
Circuit noise, mechanical noise Revised date 15/16
Identify Check
Circuit
nose location of Replace PSU
noise
type noise
Mechanical Check location of

noise noise
※ When the nose is severe, replace the module

(For models with fix information, upgrade the
S/W or provide the description)
※ Mechanical noise is a natural OR
phenomenon, and apply the 1st level ※ If there is a “Tak Tak” noise from the
description. When the customer does not cabinet, refer to the KMS fix information and
agree, apply the process by stage. then proceed as shown in the solution manual
※ Describe the basis of the description OR
(For models without any fix information,
in “Part related to nose” in the Owner’s provide the description)
Manual.
Established
Error F. Exterior defect date 2013.01.31
LCD TV symptom
Exterior defect Revised date 16/16
Zoom part with Module

Replace module
exterior damage damage
Cabinet
Replace cabinet
damage
Remote
controller Replace remote controller
damage
Stand
Replace stand
dent
Contents of LCD TV Standard Repair Process Detail Technical Manual
No. Error symptom Content Page Remarks

1 A. Video error_ No video/Normal Check LCD back light with naked eye A1
2 audio Check White Balance value A2
TUNER input signal strength checking

3 A3
method
A. Video error_ video error /Video
4 lag/stop LCD-TV Version checking method A4
5 Tuner Checking Part A5
A. Video error _Vertical/Horizontal bar,
6 LCD TV connection diagram A6
residual image, light spot
Check Link Cable (EPI) reconnection
7 A. Video error_ Color error A7
condition
<Appendix> Exchange Module (1) A-1/2
8 Defected Type caused by T-Con/
Inverter/ Module Exchange Module (2) A-2/2
Copyright 2015 LG Electronics Inc. All rights reserved. Continue to theLGEnext

Internalpage
Use Only
Contents of LCD TV Standard Repair Process Detail Technical Manual
Continued from previous page
No. Error symptom Content Page Remarks

9 Check front display Logo A8
B. Power error_ No power
10 Check power input Voltage & ST-BY 3.5V A9
B. Power error_Off when on, off
11 POWER OFF MODE checking method A10
while viewing
Checking method in menu when there is
12 A11
C. Audio error_ No audio/Normal no audio
video Voltage and speaker checking method
13 A12
when there is no audio
Remote controller operation checking
14 A13
method
D. Function error Motion Remote operation checking
15 A14
method
16 Wifi operation checking method A15
17 E. Etc Tool option changing method A16
Standard Repair Process Detail Technical Manual
Error Established
symptom A. Video error_No video/Normal audio date
2014.12.31
LCD TV Revised
Content Check LCD back light with naked eye A1
date
After Remove the Rear Cover, turning on the power and check with the naked eye,
Whether you can see video
Only for training and service purposes A1
Error Established
symptom A. Video error_No video/Normal audio date
2014.12.31
LCD TV Revised
Content Check White Balance value A2
date
Entry method
1. Press the ADJ button on the remote controller for adjustment.
2. Enter into White Balance of item 10.
3. After recording the R, G, B (GAIN, Cut) value of Color Temp

(Cool/Medium/Warm), re-enter the value after replacing the MAIN BOARD.
Error Established
A. Video error_Video error, video lag/stop 2014.12.31
symptom date
LCD TV Revised
Content TUNER input signal strength checking method A3
date
Quick Settings  Programmes  Programme Tunning

 Manual Tuning
When the signal is strong, use the

attenuator (-10dB, -15dB, -20dB etc.)
Error Established
symptom A. Video error_Video error, video lag/stop date
2014.12.31
LCD TV Revised
Content LCD-TV Version checking method A4
date
1. Checking method for remote controller for adjustment
Version
Press the IN-START with the remote

controller for adjustment
Error Established
symptom
A. Video error_Video error, video lag/stop 2014.12.31
LCD TV date
Revised
Content TUNER checking part A5
date
Checking method:
1. Check the signal strength or check whether the screen is normal when the external device is connected.
2. After measuring each voltage from power supply, finally replace the MAIN BOARD.
Error A. Video error _Vertical/Horizontal bar, Established 2014.12.31
symptom residual image, light spot date
LCD TV Revised
Content LCD TV connection diagram date A6
As the part connecting to the external input, check

the screen condition by signal
Error Established
symptom A. Video error_Color error date
2014.12.31
LCD TV Revised
Content Check Link Cable (EPI) reconnection condition date A7
Check the contact condition of the Link Cable, especially dust or mis insertion.
Appendix : Exchange the Module (1)
Vertical abnormal display Brightness difference Line Dim
Crosstalk Press damage Crosstalk
Un-repairable Cases
In this case please exchange the module.
Burnt
Copyright 2015 LG Electronics Inc. All rights reserved. A – 1/2 LGE Internal Use Only
Appendix : Exchange the Module (2)
Angle view Color difference Brightness dot noise Half dead
Brightness difference
Green Noise on power on/off time Line Defect
Un-repairable Cases
In this case please exchange the module.
Mura
Copyright 2015 LG Electronics Inc. All rights reserved. A – 2/2 LGE Internal Use Only
Error Established
symptom B. Power error _No power date
2014.12.31
LCD TV Revised
Content Check front display Logo date A17
ST-BY condition: On or Off

Power ON condition: Turn Off
Error Established
symptom
B. Power error _No power 2014.12.31
LCD TV date
Revised
Content Check power input voltage and ST-BY 3.5V A18
date
Check the DC 24V, 12V, 3.5V.
24Pin(Power Board ↔ Main Board)

1 PWR ON 2 INV CTL
3 DPC 4 PDIM#2
5 3.5V 6 GND
7 3.5V 8 3.5V
① 9 GND 10 GND
② 11 12V 12 12V
13 12V 14 12V
15 12V 16 GND
③ 17 GND 18 12V_ON
19 24V 20 24V
21 24V 22 24V
23 GND 24 GND
Error
symptom B. Power error _Off when on, off whiling viewing Established
date
2014.12.31
LCD TV Revised
Content POWER OFF MODE checking method date A19
Entry method
1. Press the IN-START button of the remote controller for adjustment
2. Check the entry into adjustment item 3
Error Established
symptom C. Audio error_No audio/Normal video 2015.12.31
LCD TV date
Revised
Content Checking method in menu when there is no audio date A20
Checking method
1. Press the Setting button on the remote controller
2. Select the Sound function of the Menu
3. Select the Sound Out
4. Select TV Speaker
Error Established
symptom C. Audio error_No audio/Normal video date
2014.12.31
LCD TV Revised
Content Voltage and speaker checking method A21
when there is no audio date
24Pin(Power Board ↔ Main Board)

1 PWR ON 2 INV CTL
3 DPC 4 PDIM#2
①
5 3.5V 6 GND
7 3.5V 8 3.5V
② 9 GND 10 GND
11 12V 12 12V
13 12V 14 12V
15 12V 16 GND
17 GND 18 12V_ON ③
19 24V 20 24V
21 24V 22 24V
23 GND 24 GND 1 SPK_R- 1 SPK_R+
3 SPK_L- 4 SPK_L+
Checking order when there is no audio
① Check the contact condition of or 24V connector of Main Board
② Measure the 24V input voltage supplied from Power Board

(If there is no input voltage, remove and check the connector)
③ Connect the tester RX1 to the speaker terminal and if you hear the Chik Chik sound when you touch the
GND and output terminal, the speaker is normal.
Error Established
D. Function error 2014.12.31
symptom date
LCD TV Revised
Content Remote controller operation checking method date A22
③ P4100
1 GND
2 KEY1
3 KEY2
4 3.5V_ST
5 GND
6 LOGO_LIGHT
7 IR
8 GND
9 EYE_SCL
10 EYE_SDA
①
②
Checking order
1, 2. Check IR cable condition between IR & Main board.
3. Check the st-by 3.5V on the terminal 4.
4. When checking the Pre-Amp when the power is in ON condition, it is normal when the
Analog Tester needle moves slowly, and defective when it does not move at all.
Error Established
symptom date
LCD TV Revised
Content Motion Remote operation checking method date A23
P4100
1 GND
2 KEY1
③ 3 KEY2
4 3.5V_ST
5 GND
6 LOGO_LIGHT
7 IR
8 GND
9 EYE_SCL
10 EYE_SDA
P4101
① ②
1 GND
2 M_RFModule_RESET
3 NOT USE
4 WOL/WIFI_POWER_ON
5 GND
③ 6 WIFI_DP
7 WIFI_DM
8 3.5V_WIFI
Checking order
1. Check IR cable condition between IR & Main board.
2. Check WIFI Combo cable condition between WIFI Combo Assy & Main board.
3. Check the st-by 3.5V P4100 on the terminal 4
4. Check the 3.5V_WIFI P4101 on the terminal 8
Error Established
symptom date
LCD TV Revised
Content Wifi operation checking method date A24
P4101
1 GND
2 M_RFModule_RESET
3 NOT USE
4 WOL/WIFI_POWER_ON
5 GND
6 WIFI_DP
③ 7 WIFI_DM
8 3.5V_WIFI
①
②
Checking order
1, 2. Check Wifi cable condition between Wifi assy & Main board.
3. Check the 3.3V on the terminal 8.

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Service Manual LG 65ef9500

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Internal Use Only

North/Latin America http://aic.lgservice.com

MODEL : 65EF9500 65EF9500-UA

P/NO : MFL69264602 (1507-REV00) Printed in Korea

SAFETY PRECAUTIONS ......................................................................... 3

BLOCK DIAGRAM .................................................................................. 24

EXPLODED VIEW ................................................................................... 34

SCHEMATIC CIRCUIT DIAGRAM .............................................APPENDIX

IMPORTANT SAFETY NOTICE

General Guidance Leakage Current Hot Check (See below Figure)

Before returning the receiver to the customer,

always perform an AC leakage current check on the exposed

Leakage Current Cold Check(Antenna Cold Check)

Fuse and Conventional Resistor

(1) Temperature : 25 ºC ± 5 ºC(77 ± 9 ºF) , CST : 40 ºC ± 5 ºC

(4) Specification and performance of each parts are followed

5.2. Component input(Y, CB/PB, CR/PR)

6. 3D Mode(3D supported mode manually)

6.2. HDMI Input

4 1920*1080 27.00 24.00 74.25 HDTV 1080P 2D to 3D, Side by Side(Half),

67.50 30.00 296.70

6.6. Component Input ( 3D) (3D supported mode manually)

6.8. USB, DLNA -Photo (3D) (3D supported mode manually)

6.9. USB, DLNA (3D) (3D supported mode automatically)

6.10. Miracast, Widi (3D supported mode manually)

* Remark: 3D Input mode

- A bove adjustment items can be also performed in Final

3.2. Final assembly adjustment

4.4.1 Equipment setting

4.5. Model name & Serial number Download

4.5.2. Method & notice

※ Manual Download (Model Name and Serial Number)

c. Input the Factory model name or Serial number like photo.

■ check the menu on in-start

(2) Select [Start] button by pressing Enter key, HDMI1 / HDMI2

EDID Block 1, Bytes 128-255 EDID Block 1, Bytes 128-255

EDID Block 1, Bytes 128-255 EDID Block 1, Bytes 128-255

EDID Block 1, Bytes 128-255

# AC3 HDMI2 (C/S: E6,6B)_3G_UHD Deep Color OFF

          $ % & ' ( )           $ % & ' ( )

5.3.4. Equipment connection

* If TV internal pattern is used, not needed

5.3.4. Adjustment Command (Protocol)

(2) Adjustment Map

5.3.8. Reference (White Balance Adj. coordinate and

5.7. HDMI ARC Function Inspection

5.7.2. Test method

(2) Check the sound from the TV Set

(3) Don’t wear a 3D Glasses, Check the picture like below

5.8. Tool Option Inspection

5.9. Ship-out mode check (In-stop)

(5) Updating Completed, The TV will restart automatically

7. AUDIO output check

* After downloading, TOOL OPTION setting is needed again.

URSA9_CONNECT MCLK_A PMIC_RESET 5V_DET_HDMI_1

EB_DATA[1] PCM_D[0]/GPIO147 FE_DEMOD1_TS_DATA[0]

33 D9 AF32 AG12 AG11

PWM1/GPIO153 LHSYNC/[VX1_0+] EB_DATA[4] PCM_D[3]/GPIO119 TS1_D2/GPIO180 FE_DEMOD1_TS_DATA[3]

EB_WE_N PCM_WE_N/GPIO134 OPT_P HDMI_SW_SDA

SOC_TX GPIO3/TX1/GPIO58 B_ODD[2]/LVA3P/[HTPDN] HTPDAn_Video SM_VCC

/TU_RESET2 R172 R173 CAM_REG_N PCM_REG_N/GPIO144 TS3_D7/GPIO213 EO_A E/O

L6 G7 R183 100 C103 0.1uF OPT IF_P

CPU_VID0 VID0/GPIO50 TESTPIN C107

I2C for URSA9 (URSA9 Only)

(4) Specification and performance of each parts are followed

- A bove adjustment items can be also performed in Final

c. Input the Factory model name or Serial number like photo.

(2) Select [Start] button by pressing Enter key, HDMI1 / HDMI2

$ % & ' ( ) $ % & ' ( )

5.3.8. Reference (White Balance Adj. coordinate and

(3) Don’t wear a 3D Glasses, Check the picture like below