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TAS5612L-TAS5614LDDVEVM
This user’s guide provides specifications for the evaluation module (EVM) for TAS5612L and TAS5614L
Digital Input Class-D Power Stages with the TAS5558 Digital Audio Processor with PWM output from
Texas Instruments. The user’s guide also describes operation of the EVM and provides design information
including schematic, bill of materials, and PCB layout.
Contents
1 Introduction .................................................................................................................. 3
1.1 TAS5612L-TAS5614LDDVEVM Features ...................................................................... 6
1.2 EVM Physical Structure ........................................................................................... 7
2 Quick Setup Guide .......................................................................................................... 8
2.1 Electrostatic Discharge Warning ................................................................................. 8
2.2 Unpacking the EVM ................................................................................................ 8
2.3 Power Supply Setup ............................................................................................... 8
2.4 Speaker Connection ............................................................................................... 9
2.5 Output Configuration BTL and PBTL ............................................................................ 9
3 GUI Software Installation and Startup .................................................................................. 10
3.1 Software Installation .............................................................................................. 10
3.2 Software Quick-Start Guide ..................................................................................... 10
3.3 Using the EVM Software ........................................................................................ 11
3.4 Self-Protection and Fault Reporting ............................................................................ 14
4 Related Documentation from Texas Instruments ..................................................................... 14
4.1 Additional Documentation ....................................................................................... 14
5 Design Information ........................................................................................................ 15
5.1 EVM Custom Component Vendors ............................................................................ 18
5.2 TAS5612L-TAS5614LDDVEVM PCB SPECIFICATION .................................................... 18
5.3 EVM PCB Layers ................................................................................................. 19
5.4 EVM and Input-USB Board 3 Schematics .................................................................... 20
List of Figures
1 TAS5612L-TAS5614LDDVEVM .......................................................................................... 4
2 Input-USB Board3........................................................................................................... 5
3 Integrated PurePath Digital Amplifier System ........................................................................... 6
4 Physical Structure of the TAS5612L-TAS5614LDDVEVM (Approximate Layout) .................................. 7
5 PBTL Mode Configuration ................................................................................................ 10
6 Main Tab .................................................................................................................... 11
7 Process Flow Tab ......................................................................................................... 12
8 Direct I2C Access .......................................................................................................... 13
9 Registers Tab (Selecting Biquad GUI).................................................................................. 14
10 Top Composite PCB Layer ............................................................................................... 19
11 Bottom Composite PCB Layer ........................................................................................... 19
12 TAS5612L-TAS5614LDDV Evaluation Board Digital Audio Processor I/O ........................................ 20
13 TAS5612L-TAS5614LDDV Evaluation Board Power Amplifier ...................................................... 21
14 TAS5612L-TAS5614LDDV Evaluation Board Power Supply, Status Monitors, On and Off Control ........... 22
15 TAS5612L-TAS5614LDDV Evaluation Board Revision History ..................................................... 23
PurePath is a trademark of Texas Instruments.
List of Tables
1 TAS5612L-TAS5614LDDVEVM Specification .......................................................................... 3
2 Recommended PVDD Power Supply Voltages ........................................................................ 8
3 Related Documentation from Texas Instruments ..................................................................... 14
4 Bill of Materials for TAS5614LDDVEVM ............................................................................... 16
1 Introduction
The TAS5612L-TAS5614LDDVEVM PurePath™ EVM demonstrates the current version of TAS5612LDDV
or TAS5614LDDV integrated circuit power stage with TAS5558 from Texas Instruments (TI).
The TAS5612L and TAS5614L are high-performance, integrated Stereo Feedback Digital Amplifier Power
Stages designed to drive 4-Ω speakers at up to 150 W per channel for TAS5614LDDV and 125 W per
channel for TAS5612LDDV. They require only a passive demodulation filter to deliver efficient high quality
audio amplification.
The TAS5558 is a high-performance 32-bit (24-bit input) multi channel PurePath Digital Pulse Width
Modulator (PWM) with fully symmetrical AD modulation scheme. The device also has Digital Audio
Processing (DAP) that provides 48 bit signal processing, advanced performance and a high level of
system integration.
This EVM can be configured as 2 BTL channels for stereo evaluation or 1 PBTL (parallel BTL) channel for
subwoofer evaluation. Together with a TI Input-USB Board 3, it provides a complete stereo digital audio
amplifier system which includes digital input (S/PDIF), analog inputs, interface to PC and DAP features
like digital volume control, input and output mixers, automute, tone controls, loudness, EQ filters and
dynamic range compression (DRC). There are configuration options for power stage failure protection.
Figure 1. TAS5612L-TAS5614LDDVEVM
8 Channel
Analog
Input
Control Interface
Stereo/Mono
TAS5612L-TAS5614LDDVEVM Channel
USB Speaker Output
Interface
I2C Bus
Optical
and
Coaxial I2S Bus
S/PDIF
Input
Example:
TI Input - USB Board 3
Power Supply
HEATSINK
TAS5612L
TAS5614L
TAS5612LDDVEVM 6500567
TAS5614LDDVEVM 6524655
PVDD REGULATOR
MODE
+3.3Vdc
PINS
TAS5558
PBTL – BTL
(+12 to
+36 Vdc)
NORMAL
S1
RESET INPUT SIGNAL & CONTROL
GND Reset INTERFACE (J1) STATUS
LED LEDs
CAUTION
Failure to observe ESD handling procedures can result in damage to EVM
components.
CAUTION
NOTE: Applying voltages above specifications in Table 2 can cause permanent
damage to the hardware. Verify polarity of power supply connections before
powering the EVM.
NOTE: The length of the power supply cable must be minimized. Increasing length of PSU cable is
likely to increase distortion for the amplifier at high output levels and low frequencies.
CAUTION
Both positive and negative speaker outputs are floating and cannot be
connected to ground (that is, through an oscilloscope). To measure a BTL
output connect an oscilloscope probe to each side of the output, connect both
ground clips to EVM ground and use the oscilloscope math functions to show
the difference between the 2 probe signals.
HEATSINK
TAS5612L
TAS5614L
TAS5612LDDVEVM 6500567
TAS5614LDDVEVM 6524655
PVDD REGULATOR
MODE
+3.3Vdc
PINS
TAS5558
PBTL – BTL
(+12 to
+36 Vdc)
NORMAL
S1
RESET INPUT SIGNAL & CONTROL
GND Reset INTERFACE (J1) STATUS
LED LEDs
5 Design Information
This appendix includes design information for the TAS5612L-TAS5614LDDVEVM. This information is
presented in the following order.
• Table 4 Bill of Materials for TAS5614LDDVEVM
• Section 5.1 EVM Custom Component Vendors
• Section 5.2 TAS5612L-TAS5614LDDVEVM PCB SPECIFICATION
• Section 5.3 EVM PCB Layers
• Section 5.4 EVM and Input-USB Board 3 Schematics
4700pfd/50V
0603 X7R
4700pfd/50V
0603 X7R U2
1 56
C56 C57
R48 R49
2 55
AVDD 0.047ufd/16V
470
0.047ufd/16V
470
0603 0603
0603 X7R 0603 X7R
R50 3 54
+3.3V
1.0
4 53
0603 C58 C59 C63
+3.3V 10ufd/16V 0.1ufd/16V 5 52
0805 X7R 0603 X7R
C32 R51 0.1ufd/16V
0603 X7R
6 51
0.1ufd/16V 0.0
A842 0603 X7R
GND
0603
AVSS 7 50 GND
GND
INPUT-USB 5
U3
1 8 49 +3.3V
BOARD 2 R27 4
9
C64
48
+3.3V 47 2 3 0.1ufd/16V
0603 0603 X7R
R52 10 47
GND
TPS3825-33DBVT
SOT23-DBV5 GND 15.0K ET2 GND TO
200ms 0603 Orange 11 46
R20
10.0K
R22
10.0K
R24
10.0K
R26
10.0K
R28
TAS5612L
0603 0603 0603 0603 47 R53
0.1ufd/16V
0603 X7R
+12V
GND
+
C51 C52 C53
47ufd/16V 0.1ufd/16V 0.1ufd/16V
FC 0603 X7R 0603 X7R
R1
+12V
3.3
0603 C3
0.1ufd/16V
0603 X7R
R14
GND
1
U1 44
+12V
3.3
43
0603 C2
0.1ufd/16V
0603 X7R 42
FROM ON/RESET 41 C16
GND
CONTROL 2 C8
0.033ufd/50V L+
GND 1.0ufd/50V 0603 X7R
R2 40 0805 X7R
3 L1
39 OUT_A 1 2
R3 GND 30.0K
0603 OA 10uH/10A
C20 C21 C22 LEFT
4
+3.3V
47K
38 PVDD_AB
PVDD
MA5172-AE 0.68ufd/250V
MKP4-15
1000pfd/100V
1206 COG
0.01ufd/100V
0805 X7R
Output
0603
FROM 5 37 +
C12 GND GND R8
3.3
LOUT+
6 36 Red
C17
MODULATOR 1000ufd/50V
FC
0603
C4 0.033ufd/50V
0603 X7R
LOUT-
7 GND L2 GND Black
INPUT_A 35 OUT_B OB 1 2
0.1ufd/16V 10uH/10A
GND 0603 X7R
INPUT_B 8 C9 MA5172-AE C23 C24 C25 L-
9 1.0ufd/50V 0.68ufd/250V 1000pfd/100V 0.01ufd/100V
INPUT_C C5 34
0805 X7R MKP4-15 1206 COG 0805 X7R
1-2 = BTL 1.0ufd/16V 10 GND
GND
33 GND GND GND R9
INPUT_D 2-3 = PBTL 0603 X7R
11 3.3 GND
0603
1 GND 12 L3
C 32 GND OUT_C 1 2
2 GND
100LS GND OC 10uH/10A R+
3 13 MA5172-AE
120TAIL C10 C18
1
D C6 1.0ufd/50V
0805 X7R
0.033ufd/50V
0603 X7R
C26 C27 C28 RIGHT
2
100LS
1.0ufd/16V
0603 X7R 31 PVDD_CD
PVDD
0.68ufd/250V
MKP4-15
1000pfd/100V
1206 COG
0.01ufd/100V
0805 X7R
Output
3 120TAIL
30 +
GND C14 GND GND R10 ROUT+
GND 14 29 3.3 Red
1000ufd/50V 0603
15 FC
ROUT-
GND L4 GND Black
R4 16 28 OUT_D OD 1 2
TO 100 0603 R5 10uH/10A
17 27
STATUS R6 100 0603 C11 C19
MA5172-AE C29 C30 C31 R-
18
MONITOR 100 0603 1.0ufd/50V 0.033ufd/50V
0.68ufd/250V
MKP4-15
1000pfd/100V
1206 COG
0.01ufd/100V
0805 X7R
R12 0805 X7R 0603 X7R
0.0 0402 19 GND GND R11
M1 3.3
GND 20 26 0603
1 R13 M2
M3 0.0 0402 21 25
GND 2 GND
3 100LS GND
120TAIL
+3.3V 24
R7 22 23
1-2 = BTL +12V
3.3
OUT_D
2-3 = PBTL 0603 C7 TAS5612LDDV/TAS5614LDDV
HTSSOP44-DDV
OUT_C
0.1ufd/16V OUT_B CR1 CR2 CR3 CR4
0603 X7R
OUT_A 30BQ060 30BQ060 30BQ060 30BQ060
+12V 60V/790mV@3A 60V/790mV@3A 60V/790mV@3A 60V/790mV@3A
GND SMC SMC SMC SMC
+
C1 HS1
2 1 GND GND GND GND
47ufd/16V
FC
SCH REV A
AMP
OTW R61 CLIP R62 FAULT R63 R65
4.7K
0603
4.7K
0603
4.7K
0603 RESET 4.7K
0603
D D
STATUS D D
2N7002 125C 2N7002 CLIP 2N7002 FAULT 2N7002 AMP_RESET
FROM U1
Q1
G 60V/115mA
Red/2,0V
0805
Q2
G 60V/115mA
Yellow/2,0V
0805
MONITORS Q3
G 60V/115mA
Red/2,0V
0805
Q4
G 60V/115mA
Red/2,0V
0805
S SOT23-DBV3 S SOT23-DBV3 S SOT23-DBV3 S SOT23-DBV3
ON/RESET CONTROL
FROM
MODULATOR
TO U1
VALID 1 S1
2
3 G12AP
C77
GND 0.1ufd/16V
S3 SETTINGS 0603 X7R
1-2/6-5 ON GND
3-2/4-5 RESET
SCH REV A
TI PAGE INFO:
DESIGN LEAD
POWER SUPPLY, STATUS MONITORS, ON/OFF CONTROL
STEPHEN CRUMP EDGE # TAS5612L-6500567 / TAS5614L-6524655
DATE
FILENAME
MARCH 7, 2012
TAS5612L-TAS5614LDDVEVM_RevA.sbk
PCB REV A
SHEET 3 OF 5
DRAWN BY LDN
Figure 14. TAS5612L-TAS5614LDDV Evaluation Board Power Supply, Status Monitors, On and Off Control
REVISION HISTORY
REVISION DESCRIPTION DATE APPROVAL
A INITIAL RELEASE MARCH 7, 2012 SC
SCH REV A
1.) These preliminary evaluation schematics are intended for use for PRELIMINARY ENGINEERING DEVELOPMENT AND EVALUATION PURPOSES ONLY and are not considered by
Texas Instruments to be fit as a basis for establishing production products or systems. This information may be incomplete in several respects, including but not limited to information
relating to required design, marketing, and/or manufacturing-related protective considerations and product safety measures typically found in the end-product incorporating the goods.
2.) Accordingly, neither TI nor its suppliers warrant the accuracy or completeness of the information, text, graphics, links orother items contained within the Materials. TI may make
changes to the Materials, or to the products described therein, at any time without notice. TI makes no commitment to update the Materials.
3.) TI assumes no liability for applications assistance, customer product design, software performance, or services that may be described or referenced in the Materials. The user
assumes all responsibility and liability for proper and safe design and handling of goods. Accordingly, the user indemnifies TI from all claims arising from its use of the Materials.
4.) TI currently deals with various customers for products, and therefore our arrangement with the user will not be exclusive. TI makes no representations regarding the
commercial availability of non-TI components that may be referenced in the Materials.
5.) No license is granted under any patent right or other intellectual property right of TI covering or relating to any combination, machine, or process in which such TI products or
services might be or are used. Except as expressly provided herein, TI and its suppliers do not grant any express or implied right to you under any patents, copyrights,
trademarks, or trade secret information.
6.) Performance tests and ratings, to the extent referenced in the Materials, are measured using specific computer systems and/or components and reflect the approximate
performance of TI products as measured by those tests. Any difference in system hardware or software design or configuration may affect actual performance. Buyers should
consult other sources of information to evaluate the performance of systems or components they are considering purchasing.
7.) Resale of TI's products or services with statements different from or beyond the parameters stated by TI for that product or service in official TI data books or data sheets
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INTERRUPTION, LOSS OF INFORMATION) ARISING OUT OF THE USE OF OR INABILITY TO USE THE
MATERIALS, EVEN IF TI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
TI
Figure 16. TAS5612L-TAS5614LDDV Evaluation Board Disclaimer
INPUT-USB BOARD #3
+3.3VD4
4.7K
E
I2C
Q3
FROM EVMs +3.3V-USB
B SOT23-DBV3 ACTIVITY
+3.3V-USB C I2C
SDIN R404
C100 R101 0805 Yellow 357
R100 10.0K
10.0K 0.1ufd/16V 0603 0603 GND
0603 EPROM 0603
1 1 8
GND
A0 2 2 7 1
3 6 2 WE SDA-USB R110
GND +3.3V-USB
4
64K
5
GND 4.99K
0603 TO EVMs
GND
SOP8-D(SOIC)
SCL-USB R111
+3.3V-USB SCL
4.99K
C101 0603
SDA
MiniB USB INPUT R102 Q1 27pfd/50V Y1
R112
47
1
SDA
1
SCL
MMBT2222A 2 2
USB
0603
GND
USB-IN 15.0K
SOT23-DBV3
6.0 MHz GND 0603
40V,1A C102 ABMM
0603 R113 GND GND
6
Case 47
27pfd/50V
7 5 R103 0603
0603
Case GND 1.50K GND R115 MCLK-USB
8 4 0603 MCLK-USB
Case ID_NC R104 C103 47 0603 MCLK1
R116 Orange
9 3 SDOUT-USB
Case Data+ 27.4 SDOUT-USB
10 2
R105 0603 47 0603 DOUT1
Data- 100pfd/50V R117 Orange
NC
0603 C104 SCLK-USB
11 1 27.4 R106 SCLK-USB
NC 5v 0603 C105 C106 GND 47 0603 SCLK1
FB1 3.09K Orange
USB MINIB 47pfd/50V 47pfd/50V 0603 1000pfd/50V R118 SDIN LRCLK-USB
0603 0603 0603
600 Ohms/2A 48 47 46 45 44 43 42 41 40 39 38 37
47
0805 1 36 0603
FB2
GND GND GND
VR1
+3.3V-USB
+3.3V-USB
2 35
R119 LRCLK-USB TO I2S
600 Ohms/2A
1
2
5 3
4
34
33
47
0603
LRCLK1
Orange
SELECT
0805 C107 C108 C109 +3.3V-USB
3 4 5 32
10ufd/10V 0.1ufd/16V 1.0ufd/25V
0805 0603 0603 6 U6 31
TPS73633DBVT
SOT230DBV5 7 30
GND GND GND 3.3V/400mA GND TAS1020BPFB R114
+3.3VD
8 TQFP48-PFB 29
+3.3V-USB 10.0K
R107 9 28 0603
+3.3V-USB
10.0K 10 27
0603 C110 C111 GND
11 26
10ufd/10V 0.1ufd/16V
0805 0603 12 25
+3.3VD
+3.3V-USB
R10 R109 GND
+3.3V +3.3V-USB
4.7 1/4W 10.0K
R108 C121 C120 0805 0603 +3.3V-USB
4.99K
0603 0.1ufd/16V 10ufd/10V C112
0603 0805
SCH REV A
INPUT-USB BOARD #3
R202
COAX 1.0M
0603
E +3.3VD1
SPDIF 1
INV1
5
+3.3VD1
B
4.7K
Q2
SOT23-DBV3
C200 R201
2 2
C201 C
3 100 3 4
0.047ufd/16V
R200 0603
0603 1.0ufd/10V
0603 SPDIF-LOCK
1 75 SN74LVC1GU04DBV +3.3VD1 0805
0603 SOT23-DBV5
R204 Blue
J3 GND GND GND
7.50K
GND 0603 C203 R211
C202 +3.3VD1 392
1.0ufd/10V 0603
0.047ufd/16V INV2 0603 C205
0603 1 5
MUX1 0.1ufd/16V GND
0603
GND
OPTICAL SPDIF R203
2
3 4 1
VCC
8
3 GND 7
+3.3VD1 Vcc 3
2 GND 6
C204 GND
3
+3.3VD1
21
+3.3VD1 C211 C210
SPDIF SELECT LEDs C207
24
0.1ufd/16V 10ufd/10V TO ADCs /
SPDIF SELECT 5 23
0603 0805
R205
1 S2
E +3.3VD1
0.1ufd/16V
0603
6
GND GND GND I2S SELECT
+3.3VD1 4.7K
Q8 GND GND R213
49.9 2 4 SCKO MCLK-SPDIF
0603 B SOT23-DBV3 R206 MCLK-SPDIF
3 7
2-3 = COAX C206
C COAX R220 470
10 BCKO 47
0603
MCLK2
Orange
GND 1-2 = OPTO 0.1ufd/16V
0603 0805 Green 357
0603 11 LRCKO
R214 SCLK-SPDIF
0603 GND Y2 12 DOUT SCLK-SPDIF
GND 12.288 MHz 47 SCLK2
0603 Orange
OPTO R221 ABM8G
8 19
R215 LRCLK-SPDIF
0805 Green 357 LRCLK-SPDIF
GND 9 18
0603 GND 47 LRCLK2
R218 26 17 GND 0603 Orange
+3.3VD1
0.0 25 16 R216 DOUT-SPDIF
0603
13 15 47 DOUT2
GND R219 0603 Orange
14 22
PSK Select
FROM +3.3VD1 +3.3VD1
C208 C209
0.0
0603
DIR9001PW R217 DOUT-SPDIF
18pfd/50V 18pfd/50V
SYSTEM 0603 0603
TSSOP28-PW
C212
680
0603
RESET
R207
10.0K
0603
R209
DNP
0603
GND GND 4700pfd/50V
0603
C213 TO
0.068ufd/16V
0603
ADC MUXES
R208 R210 GND GND
DNP 10.0K
0603 0603
GND GND
SCH REV A
TI PAGE INFO:
DESIGN LEAD
SPDIF INTERFACE
TUAN LUU EDGE # 6527708
DATE
FILENAME
JULY 12, 2011
InputUsbBoard3.sbk
PCB REV A
SHEET 2 OF 7
DRAWN BY LDN
INPUT-USB BOARD #3
+3.3VD4
+3.3VD4 +3.3VD4 E +3.3VD4 E +3.3VD4 E +3.3VD4
S6
R400
10.0K 1
INV3
5 C402 C404 MUTE 4.7K
Q4 OTW 4.7K
Q5
SHUT 4.7K
Q6 FAULT
0603
FROM 2 0.1ufd/16V
0603
0.1ufd/16V
0603
MUTE R403 B SOT23-DBV3 B SOT23-DBV3
DOWN B SOT23-DBV3
C OTW C SHUTDOWN C FAULT
C400 C401
3 4 FF1 0805 Yellow 357 R405 R406 R407
GND GND +3.3VD4 0603
SYSTEM GND
4.7ufd/16V
0805
0.1ufd/16V
0603
74LVC1G14DBV
SOT23-DBV5
1
2
8
7 R410 GND
0805 Red 357
0603 GND
0805 Red 357
0603 GND
0805 Red 357
0603 GND
GND
RESET GND GND C403 R401
10.0K
3
4
6
5
10.0K
0603
+3.3VD4
R412
+3.3VD4
R413
+3.3VD4
R414
0.1ufd/16V 0603 100K 100K 100K
0603 0603 0603 0603
SN74LVC2G74DCT R411 1
SSOP8-DCT
0.0
GND GND 0603 2
SCL 3
7
FROM SPDIF VCC
8
+3.3VD3
SCL
8
MCLK-SPDIF 1 SDA
MCLK-SPDIF
MCLK-USB
5 MCLK-MUX 1 MCLK 9
2
2 MCLK-OUT 10
SCLK-SPDIF 7 +3.3VD3
3
3 MCLKO 11
I2S-SEL GND 6
C405 C406 Orange
LRCLK-SPDIF 4 12
4 0.1ufd/16V 0.1ufd/16V MCLK-OUT
GND 0603 0603 13
74LVC2G157DCT
SCLK-MUX 1 SCLK 14
SSOP8-DCT GND GND GND
2 SCLK-OUT SCLK-OUT
R402 15
+3.3VD3 1 S7 MUX7
8
3 SCLKO LRCLK-OUT
49.9 VCC +3.3VD3 Orange 16
2
0603 SCLK-SPDIF 1 4
I2S-SEL
3
C409 5 17
SCLK-USB 2 SDATA1
GND 0.1ufd/16V
0603
LRCLK-MUX 1 LRCLK 18
6
3 2 LRCLK-OUT
SDATA2
SDATA3
19
3 LRCLKO 20
Orange
4 SDATA4
E +3.3VD3 GND 4 21
4.7K
2-3 = SPDIF 74LVC2G157DCT R408
+5V
22
Q10 SSOP8-DCT GND GND
B SOT23-DBV3 1-2 = USB +3.3VD4
10.0K
S8 C410
23
MUX8 0603
C SPDIF R415 VCC
8
+3.3VD3
PSIA OUT = 1/2, PSIA IN = 3/4 0.1ufd/16V
0603 24
0805 Green 357
LRCLK-SPDIF 1 JUMPER 2-3 FOR PASS-THRU +3.3VD4 GND GND 25
5 E
0603 GND LRCLK-USB 2 4.7K
Q7 +12V 26
USB 7 +3.3VD3
R416 B SOT23-DBV3 C411 GND J1
0805 Green 357
I2S-SEL GND 6
3
C407 C408 PSIA DATA SELECT C
PDN 0.1ufd/16V J2
0603 GND 4 0.1ufd/16V 0.1ufd/16V R409 0603
GND 0603 0603 1
0805 Yellow
74LVC2G157DCT
SDOUT1-MUX 1 ADC1 357
0603
GND +3.3V
2
SSOP8-DCT GND GND GND
2 SDATA1
MUX9
3 SDATA1
POWER GND
3
5 5
MCLK-USB SDOUT-USB 2
SDOUT2 1 ADC2 6
SCLK-USB
LRCLK-USB
I2S-SEL GND
7
6
3
I2S 2
3
SDATA2
SDATA2
Orange
7
8
4
SDOUT-USB
GND
74LVC2G157DCT
SSOP8-DCT GND
SELECT SDOUT3
4
1 ADC3
9
10
11
2 SDATA3
12
3 SDATA3
Orange 13
SDOUT1 4
PVDD 14
3
SDATA4
SDATA4
Red 16
17
Orange
SDOUT4 4 +3.3V 18
GND
SDIN GND
Orange
PSIA OUT = 1/2, PSIA IN = 3/4
JUMPER 2-3 FOR PASS-THRU
TO USB SDIN SCH REV A
Figure 19. Input - USB Board Schematic, PSIA Inputs, Data Select, and EVM Connector
INPUT-USB BOARD #3
+3.3VD4
+3.3VD4 +3.3VD4 E +3.3VD4 E +3.3VD4 E +3.3VD4
S6
R400
10.0K 1
INV3
5 C402 C404 MUTE 4.7K
Q4 OTW 4.7K
Q5
SHUT 4.7K
Q6 FAULT
0603
FROM 2 0.1ufd/16V
0603
0.1ufd/16V
0603
MUTE R403 B SOT23-DBV3 B SOT23-DBV3
DOWN B SOT23-DBV3
C OTW C SHUTDOWN C FAULT
C400 C401
3 4 FF1 0805 Yellow 357 R405 R406 R407
GND GND +3.3VD4 0603
SYSTEM GND
4.7ufd/16V
0805
0.1ufd/16V
0603
74LVC1G14DBV
SOT23-DBV5
1
2
8
7 R410 GND
0805 Red 357
0603 GND
0805 Red 357
0603 GND
0805 Red 357
0603 GND
GND
RESET GND GND C403 R401
10.0K
3
4
6
5
10.0K
0603
+3.3VD4
R412
+3.3VD4
R413
+3.3VD4
R414
0.1ufd/16V 0603 100K 100K 100K
0603 0603 0603 0603
SN74LVC2G74DCT R411 1
SSOP8-DCT
0.0
GND GND 0603 2
SCL 3
7
FROM SPDIF VCC
8
+3.3VD3
SCL
8
MCLK-SPDIF 1 SDA
MCLK-SPDIF
MCLK-USB
5 MCLK-MUX 1 MCLK 9
2
2 MCLK-OUT 10
SCLK-SPDIF 7 +3.3VD3
3
3 MCLKO 11
I2S-SEL GND 6
C405 C406 Orange
LRCLK-SPDIF 4 12
4 0.1ufd/16V 0.1ufd/16V MCLK-OUT
GND 0603 0603 13
74LVC2G157DCT
SCLK-MUX 1 SCLK 14
SSOP8-DCT GND GND GND
2 SCLK-OUT SCLK-OUT
R402 15
+3.3VD3 1 S7 MUX7
8
3 SCLKO LRCLK-OUT
49.9 VCC +3.3VD3 Orange 16
2
0603 SCLK-SPDIF 1 4
I2S-SEL
3
C409 5 17
SCLK-USB 2 SDATA1
GND 0.1ufd/16V
0603
LRCLK-MUX 1 LRCLK 18
6
3 2 LRCLK-OUT
SDATA2
SDATA3
19
3 LRCLKO 20
Orange
4 SDATA4
E +3.3VD3 GND 4 21
4.7K
2-3 = SPDIF 74LVC2G157DCT R408
+5V
22
Q10 SSOP8-DCT GND GND
B SOT23-DBV3 1-2 = USB +3.3VD4
10.0K
S8 C410
23
MUX8 0603
C SPDIF R415 VCC
8
+3.3VD3
PSIA OUT = 1/2, PSIA IN = 3/4 0.1ufd/16V
0603 24
0805 Green 357
LRCLK-SPDIF 1 JUMPER 2-3 FOR PASS-THRU +3.3VD4 GND GND 25
5 E
0603 GND LRCLK-USB 2 4.7K
Q7 +12V 26
USB 7 +3.3VD3
R416 B SOT23-DBV3 C411 GND J1
0805 Green 357
I2S-SEL GND 6
3
C407 C408 PSIA DATA SELECT C
PDN 0.1ufd/16V J2
0603 GND 4 0.1ufd/16V 0.1ufd/16V R409 0603
GND 0603 0603 1
0805 Yellow
74LVC2G157DCT
SDOUT1-MUX 1 ADC1 357
0603
GND +3.3V
2
SSOP8-DCT GND GND GND
2 SDATA1
MUX9
3 SDATA1
POWER GND
3
5 5
MCLK-USB SDOUT-USB 2
SDOUT2 1 ADC2 6
SCLK-USB
LRCLK-USB
I2S-SEL GND
7
6
3
I2S 2
3
SDATA2
SDATA2
Orange
7
8
4
SDOUT-USB
GND
74LVC2G157DCT
SSOP8-DCT GND
SELECT SDOUT3
4
1 ADC3
9
10
11
2 SDATA3
12
3 SDATA3
Orange 13
SDOUT1 4
PVDD 14
3
SDATA4
SDATA4
Red 16
17
Orange
SDOUT4 4 +3.3V 18
GND
SDIN GND
Orange
PSIA OUT = 1/2, PSIA IN = 3/4
JUMPER 2-3 FOR PASS-THRU
TO USB SDIN SCH REV A
Figure 20. Input - USB Board Schematic, Power Inputs and Supplies
INPUT-USB BOARD #3
MAIN POWER IN +12V +5V +3.3V
+12V
+12V CR1 Green Green Green
12V 5V 3.3V
Red ES2AA + 0805 0805 0805
SMA C1
50V 2A
GND 220ufd/16V
M
R1
13.0K
R2
560
R3
374
0603 0603 0603
Black
GND
GND
GND GND GND
+3.3VD1
PVDD TO 5V SWITCHER +3.3V
R11
+12V
7
VIN
VR2
BOOT
1
C3 L1 0805 C11
10ufd/10V
SPDIF
15uH 0805
5 0.01ufd/50V CR2 +
C2 ENA
0603 B240A-13-F
DG6045C C4 R4
2 8 2A 40V 10.0K
4.7ufd/16V NC PH SMA 47ufd/16V 0603 GND
0805 3 FC
NC
6 4 +3.3VD2
GND GND VSENSE GND GND R5
3.16K R16
TPS5410D 0603 +3.3V
GND
SOP8-D
GND
4.7 1/4W
0805 C12 ADC
10ufd/10V
0805
MUXES
GND
+3.3VD3
R17
+3.3V
4.7 1/4W
I2S
C13
5V TO 3.3V DC-DC CONVERTER 0805
10ufd/10V SELECT
0805
1
VR3
5
+3.3V
GND
MUXES BOM ONLY
+5V
2 + STANDOFFS
C5 C6 C7 C8 +3.3VD4
3 4
R18
0.1ufd/10V
0603
TPS73633DBVT
47ufd/16V
FC
2.2ufd/10V
0603
0.1ufd/10V
0603 +3.3V
4.7 1/4W
SWITCHES 0.5in
0.5in
0.5in
0.5in
GND 0805 C14
GND
SOT230DBV5
3.3V/400mA GND GND GND 10ufd/10V
0805
AND
GND
GND
LEDs
SCH REV A
INPUT-USB BOARD #3
REVISION HISTORY
REVISION DESCRIPTION DATE APPROVAL
A INITIAL RELEASE JULY 12, 2011 TL
SCH REV A
1.) These preliminary evaluation schematics are intended for use for PRELIMINARY ENGINEERING DEVELOPMENT AND EVALUATION PURPOSES ONLY and are not considered by
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Figure 23. USB Board Schematic Disclaimer
Caution
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause
harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the
equipment.
This device complies with Industry Canada licence-exempt RSS standard(s). Operation is subject to the following two conditions: (1) this
device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired
operation of the device.
This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum
permissible gain and required antenna impedance for each antenna type indicated. Antenna types not included in this list, having a gain
greater than the maximum gain indicated for that type, are strictly prohibited for use with this device.
Les changements ou les modifications pas expressément approuvés par la partie responsable de la conformité ont pu vider l’autorité de
l'utilisateur pour actionner l'équipement.
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est
autorisée aux deux conditions suivantes : (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout
brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gain
maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique à
l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope rayonnée équivalente
(p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante.
Le présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le manuel
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cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de l'émetteur.
SPACER
SPACER
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SPACER
【Important Notice for Users of EVMs for RF Products in Japan】
】
This development kit is NOT certified as Confirming to Technical Regulations of Radio Law of Japan
If you use this product in Japan, you are required by Radio Law of Japan to follow the instructions below with respect to this product:
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【無線電波を送信する製品の開発キットをお使いになる際の注意事項】
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SPACER
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EVALUATION BOARD/KIT/MODULE (EVM)
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