162 Advanced Microprocessors and Peripherals: ‘own | cux al 086 assrs wpe nw | | | wpteceec Ee re oy ; og sly chs Ox@,) >! Recor, a oye) | 0 Sesh rela < | 248.) | +10 pe | ee : a) — 2700 ap 7 iB en a c008 n= a P Ao Fig. 5.14 Interfacing Circuit Diagram for Problem 5.8 ; Start from 00. ; Clear AL and flags. ; Display OH, : Wait for one second. # Increment count for next ‘display. Is itabove 9H? :Ifyes, start from 00, $else continue. Program 5.3 ALP for Problem 5.8 Wipes 7-seg Displays To display a single digit, at least one output port is required. ippose one wants a 5-digit display for some practical application, Five such ports will be required, ic. the hardware will be very complex and costly. To minimize the complexity and cost of hardware one may implement an almost visually identical display using only two ports. Suppose there are four 7-seg display’s numbered 1, 2, 3 and 4. One of the two ports, say port! selects one of these displays, say display 1 at a time, while port 2 sends the data to be displayed (.e.a,b,c,d,e,f,g and dp) to the first display for a fixed short duration. Port 1 next, selects the display 2 and port 2 sends the appropriate display data to it. Bach of the display unit remains active for a short duration and the process continues in a loop. This is repeated at a high frequency so that the complete display containing more than one 7-seg Aisplay appears to be stationary due to the persistence of vision. Instead of BCD to T-see Aecoder circuit, ook up table technique may be used for eonverting BCD numbers to equive: lent 7-sex codes. Problem 8.9 Draw a schematic hardware circuit for interfacing five, 7-seg displays (common cathode) with 8086 using output ports. Display numbers 1 to § on them continuously, The 7-seg Codes are stored in a look-up table serially at the address 2000:0000 H onwards starting from ‘ode for 1. Solution port 0004 ing the ea a transist Des 2 3 These Only one high for sete displays ai should rema ‘codes for the nections benis required. ports will be pplexity and ng only two e two ports, the data to stion. Port 1 Each of the Joop. This is an one 7-8eg ICD to 7-seg ays (common ly. The 7-seg starting from Basic Penpherals and Thelr Interfacing with aoearae 163 | Solution Let us select the two port addresses 0004H and 0008H for the output ports. The first Port 0004H outputs 7-seg code while the second output port 0008H selects the display by ground- Ing the common cathode. The hardware is given in Fig. 5.15. ‘The 7-8eg codes for C.C. displays can be decided as given. For a LED to be ‘on’, that particular anode should be 1 and the common cathode line should be grounded , using a port line that drives € transistor. Thus for the numbers to be displayed the code is calculated as shown, } Deana a6 So ad eg ap wo 4 A A&A A km 1 te Pad eG Oe Be ate Sie tenga 4 oh te em Ss eS tog So ae Ae ed OO a oo Sat ee edie so ee a ‘These codes are stored in a look up table starting from 2000H:0000, as shown below. 2000:0000 + COH 2000:0001 + DAH 2000:0002 >» F2H 2000:0003 > 66H 2000: 0004 > B6H Only one display should be selected at a time, i.e. only the corresponding bit of port 2 should be high for selecting a common cathode display. All the other bits should be low to keep the other displays disabled. Thus to enable the least significant display, the LSB of the &-bit selected port should remain ‘1’. Hence AL should have 01 or E1H in itto select the least significant disiplay. The codes for the selection of displays and 7-segment codes directly depend upon the hardwired con- nections between them, 20008 ; Initialize pointer to n Code table DS:8x NEXT ; Get 1st number from the table. 5H ; Count for display z Selection code for 1st display AGAIN al Out the code for the first j Number to port OH. Get to be enabled display code. Select 1st display. jecide code for selecting next } display for next number ; get next num, to be displayed. Repeat five times, Continue the procedure Program 5.4 ALP for Problem 5.9 el164 Advanced Microprocessors and Peripherals A ay} OE ~ | —— en A . As 8086 k Dy-D; masa Ay Miroproceesor 2) ESP & ‘Spstem at ane x iowe ox | » LU 7aLsos Butere yrrryyer || Ly | l < To Cathodes of i 7 Se, eile Display L100 &. 4 as a ney werner The OUT programm register AX A16-bitg interfacing ing the Prog were either: input port g device 5.4 PIO ‘The parallel output port. ity microprae two groups of named as Gr lines called a contains an §‘Basic: Peripherals and Their interlacing with BOB6/e8 165 For interfacing a 16-bit output port with 8086, we may use two 8-bit output ports to form 8 16-bit port, with a single address, as shown in Fig. 5.16. Both the 8-bit ports are in this case addressed as a single 16-bit port with a single address, ” ox em anf all BeBe raiser (Pa Pig | are 0 8086 Ar a Microprocessor x { — aa | = L | “&—4 deux OF (De= Dis <2,-0; rausa73[Po=P7_> AoA» =. Fig. 5.16 Interfacing a Circuit of Problem 5.10 The OUT instruction of 8086 is able to output 16-bit data directly in a single cycle, and the programming technique is identical to that of the 8-bit port. The instruction uses 16-bit register AX as source operand as shown: OUT Port_Add, & OUT [Dx]; ax A 16-bit input port may also be interfaced similarly. Note the use of AO and BHE signals in interfacing the 16-bit ports. One may find out address of the output port in Fig. 5.16. Till now we have studied some common interfacing methods for 1/0 ports and have also solved some problems based on /O ports, A few more problems will be discussed while study- ing the Programmable Peripheral Input/Output port chip 8255. The ports in this section were either input or output, but in 8255 the same port may be programmed either to work as input port or as output port. Hence the chip is called programmable input-output (PIO) device. '5i4)_PIO 8255 [PROGRAMMABLE INPUT-OUTPUT PORT] ‘The parallel input-output port chip 8255 is also called as programmable peripheral input- output port. The Intel's 8255 is designed for use with Intel's 8-bit, 16-bit and higher capabil- ity microprocessors, It has 24 input/output lines which may be individually programmed in two groups of twelve lines each, or three groups of eight lines. The two groups of VO pins are named as Croup A and Group B. Bach of these two groups contain a subgroup of eight VO lines called as 8-bit port and another subgroup of four VO lines or a 4-bit port. Thus Croup A contains an 8-bit port A along with a 4-bit port, C upper. The port A lines are identified by