Code No: 114AF R13

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

B.Tech II Year II Semester Examinations, May - 2016
DIGITAL DESIGN USING VERILOG HDL
(Electronics and Communication Engineering)
Time: 3 Hours Max. Marks: 75
Note: This question paper contains two parts A and B.

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Part A is compulsory which carries 25 marks. Answer all questions in Part A.
Part B consists of 5 Units. Answer any one full question from each unit.
Each question carries 10 marks and may have a, b, c as sub questions.

PART – A (25 Marks)

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1.a) What is functional verification? [2]
b) Write short notes on programming language Interface. [3]
c) Define tri-gate state. [2]
d) What is array of Instances of primitives? [3]
e) Define Initial Construct. [2]
f) Define Blocking and Non-Blocking assignments. [3]

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g) Explain Bi-Directional gates. [2]
h) Explain parameter declaration and assignments. [3]
i) Explain Feedback model. [2]
j) Explain test bench techniques. [3]

PART - B (50 Marks)

2. Define the following terms relevant to Verilog HDL.
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a) Simulation versus synthesis
b) PLI
c) System Tasks. [3+3+4]
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3.a) Explain port declaration with an example using Verilog code.
b) Write about white space characters and variables with examples. [5+5]
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4.a) What is a three-state gate and explain each type of three-state gate with truth
tables?
b) Design module and a test bench for a half-adder. [5+5]
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5.a) Explain NMOS enhancement with conditions.
b) Write a Verilog HDL code for n-bit right-to-left shift register using data flow
level. [5+5]
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6.a) What is difference between an Intra statement delay and an Inter statement delay?
Explain using an example.
b) Write the differences between begin-end and fork-blocks with examples. [5+5]
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7.a) Write syntax for while loop and write a Verilog code for n-bit Johnson counter.
b) What is the difference between a sequential block and a parallel block? Explain
using an example. [5+5]
 8.a) Design half-adder using CMOS switches.
b) Write about basic switch primitives. [5+5]
OR
9.a) What do you mean by user defined primitives (UDP) and explain the types with
examples?
b) Explain edge sensitive path using an example. [5+5]

10.a) What are the rules to be followed to declare and use the bidirectional lines?

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b) Write a Verilog module for PLA. [5+5]
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11.a) Explain in detail about formal verification of a system.
b) What is the use of assert cycle sequence and assert next? Explain using an

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example. [5+5]

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 Code No: 114CU R13
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
B.Tech II Year II Semester Examinations, May - 2016
ELECTROMAGNETIC THEORY AND TRANSMISSION LINES
(Common to ECE, ETM)
Time: 3 Hours Max. Marks: 75

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Note: This question paper contains two parts A and B.
Part A is compulsory which carries 25 marks. Answer all questions in Part A.
Part B consists of 5 Units. Answer any one full question from each unit.
Each question carries 10 marks and may have a, b, c as sub questions.

or
PART - A (25 Marks)

1.a) How can materials be classified in terms of their conductivity? [2]

b) Give an expression for convection current density. Also state the point form of
Ohm’s Law. [3]

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c) State Maxwell’s equations for a lossless or non conducting medium. [2]
d) State the Amphere’s Force Law. Give magnetic force for arbitary geometrics. [3]
e) Give an expression for intrinsic impedance in phasor form. What are its
magnitude and phase components? [2]
f) Explain in brief significance of loss tangent. [3]
g) List any four types of transmission lines. [2]
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h) How does group velocity vary when compared to phase velocity? [3]
i) What are the two families of circles that constitute the Smith Chart? [2]
j) What are the advantages and disadvantages of a Single Stub? [3]

PART - B (50 Marks)

2.a) State Coulomb’s Law. Find the force on charge Q1, 30 μc due to a change Q2,
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-200 μ c, where Q1 is at (0,0,2) m and Q2 is at (2,1,0) m.

b) Derive the relation between electric field, E and Scalar potential, V. Find the
electric field at (2,3,1) if the potential distribution is of the form 3x2y+y2x+3z.
[5+5]
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3.a) Discuss the Maxwell’s equations for electrostatic fields.
b) Obtain the expression of Gauss’s Law for infinite surface charge. Also state any
two limitations of Gauss’s Law. [5+5]
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4.a) State the important properties of magnetic lines of forces.

b) Show that the magnetic field due to a finite current element along z-axis at a point
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P “r” distance away from y-axis is given by H = ( Sin α1 − Sin α 2 ) aφ ,   where

4π r
“I” is the current through the conductor, α1 , α 2   are the angles made by the tips of
the conductor element at P. [5+5]
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 5.a) What are boundary conditions? State the boundary conditions at the interface of
dielectric and perfect conductor.
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b) A certain material has σ =0 and ∈r = 1,   if H = 4sin(106 t − 0.01z )a y A / m. Use
Maxwell’s equations to find μr . [5+5]

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6.a) Derive the relation between E and H in a Uniform plane wave.
b) What are the wave equations for a lossless medium and a conducting medium for
sinusoidal variations? [5+5]
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7.a) Write short notes on normal incidence of a plane wave on a perfect dielectric.
b) A plane wave travelling in air is normally incident on a material with ∈r = 4 and
μr = 1.  Find the reflection and transmission coefficients. [5+5]

8.a) Derive the expression for voltage and current at any point on the transmission line

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in terms of characteristics impedance.
b) Discuss the parameters that characterize a lossless and lowloss transmission line.
[5+5]
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9.a) What is distortion? State the conditions that characterize a distortion less line.
b) The propagation constant of a lossy transmission line is (1+j2)m-1 and its
characteristic impedance is 20 Ω at w = 1M rad/s. Find L ,C, R and G for the line.
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[5+5]
10.a) What are the applications of transmission lines?
b) How can ultra high frequency transmission lines be used as circuit Elements?
[ 5+5]
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11.a) What are the applications of Smit Chart.
b) One end of a lossless transmission line having the characteristic impedance of
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75 Ω and length of 1 cm is short circuited. At 3 GHz, What is the input impedance

at the other end of the transmission line? [5+5]

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 Code No: 114CV R13
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
B.Tech II Year II Semester Examinations, May - 2016
ELECTRONIC CIRCUIT ANALYSIS
(Common to ECE, EIE, ETM)
Time: 3 Hours Max. Marks: 75

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Note: This question paper contains two parts A and B.
Part A is compulsory which carries 25 marks. Answer all questions in Part A.
Part B consists of 5 Units. Answer any one full question from each unit.
Each question carries 10 marks and may have a, b, c as sub questions.

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PART- A (25 Marks)

1.a) What is the main application of CC amplifier and Why? [2]

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b) What are the conditions for approximate h-parameter model? [3]
c) What is base-spreading resistance? [2]
d) What is the bypass capacitor and why it is connected in CE amplifier? [3]
e) What is the effect of negative feedback on stability? [2]
f) What is Barkhausen criterion? [3]
g) What are the advantages of class-B operation? [2]
h) What is harmonic distortion? [3]
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i) What are the properties of Q of a tuned circuit? [2]
j) What is the effect of cascading on double tuned amplifier? [3]
PART-B (50 Marks)

2.a) Draw the CC amplifier and derive the expression for AI, RI, AV, YO.
b) A CE amplifier is drawn by a voltage source of internal resistance RS = 800 ohms
and load impedance is a resistance RL = 1000 ohms. The h-parameters are
hie = 1.0 K ohms, hre = 2 ×10-4, hfe = 50 and hoe = 25 µ A/V. compute AI, RI, AV,
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Ro using exact analysis. [5+5]

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3.a) Derive the expression for the bandwidth of multistage amplifier.
b) What is the use of transformer coupling in the output of multistage amplifier?
[5+5]
4.a) Derive the equation for the lower 3dB frequency of CE configuration due to
emitter bypass capacitor.
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b) Given the following transistor measurements made at IC=5mA and VCE = 5 V and
at room temperature. hie = 600 ohms, hfe=100, Cb′c=3PF and Ai=10 at 10 MHz.
Find fβ, fT, Cb′e, rb′e and rbb′ of hybrid equivalent circuit in CE configuration.
A

[5+5]
OR
5.a) Derive the expression for voltage gain of a common source FET amplifier with
and without source resistance included in the circuit.
b) In the CS amplifier RL=5K, RG=10 Mohms, µ=50 and rd = 35 K. Evaluate voltage
gain, input impedance and output impedance. [5+5]
 6.a) Show that bandwidth increases in negative feedback amplifiers.
b) An amplifier has a input resistance of 200 K ohms, with a certain negative
feedback introduced in the above amplifier the input resistance is found to be
20 M ohms and overall gain is found to be 1000. Calculate the loop gain and
feedback factor. [5+5]
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7. Draw the circuit diagram of RC-Phase shift oscillator using BJT and derive the
expressions for frequency of oscillations and condition on gain. [10]
8.a) Derive the expression for maximum conversion efficiency for a Transformer-
coupled Class A power amplifier.

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b) List out the advantages of complementary symmetry configuration over push pull
configuration. [7+3]
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9.a) Show that the maximum conversion efficiency of the idealized class B push-pull
circuit is 78.5%.

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b) For an ideal class B transistor amplifier the collector supply voltage Vcc and the
effective load resistance RL= (N1/N2)2 RL are fixed as the base current excitation
is varied. Show that the collector dissipation Pc is zero at no signal, rises as Vm
increases and passes through a maximum at Vm = 2Vcc/π. [5+5]

10.a) Derive an expression for the bandwidth of a synchronous tuned circuit.

b) Discuss the necessity of stabilization circuits in tuned amplifiers. [7+3]
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OR
11. Draw the equivalent circuit of double tuned amplifier and derive the expression
for gain at resonance. [10]

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 Code No: 114CW R13
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
B.Tech II Year II Semester Examinations, May - 2016
ENVIRONMENTAL STUDIES
(Common to CE, ECE, CSE, EIE, IT, MCT, ETM, MMT, AME, PTE, CEE)
Time: 3 Hours Max. Marks: 75
Note: This question paper contains two parts A and B.

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Part A is compulsory which carries 25 marks. Answer all questions in Part A.
Part B consists of 5 Units. Answer any one full question from each unit.
Each question carries 10 marks and may have a, b, c as sub questions.

PART - A (25 Marks)

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1.a) Define the term Ecosystem. [2]
b) What is Bio-magnification? [3]
c) Write the importance of forests. [2]
d) Why are fossil fuels are regarded as non-renewable energy resources? [3]

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e) Write the ethical value of biodiversity. [2]
f) Mention the ex-situ measures of conservation of bio-diversity. [3]
g) What is e-waste? [2]
h) What are secondary air pollutants? [3]
i) Define bio-medical waste. [2]
j) Write the concept of Green Building. [3]
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PART – B (50 Marks)

2.a) Give the classification of ecosystems.

b) Explain energy flow models in ecosystem. [5+5]
OR
3.a) Explain the structure of an ecosystem.
b) With a neat sketch, describe Carbon cycle. [5+5]
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4.a) What are the various sources of water ? Write the differences in their quality.
b) Write the Environmental Impacts of dams. [5+5]
OR
5. What are non-conventional energy resources? Write their merits. [10]

6.a) What is meant by genetic diversity, species diversity and ecosystem diversity?
b) What are the values of biodiversity? [5+5]
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OR
7. Explain the measures of conservation of bio-diversity. [10]
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8.a) Define Air Pollution. What are the sources of air pollution?
b) Write the impacts of modern agriculture. [5+5]
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9. What are the global impacts of air pollution? [10]
 10.a) What is EIA? How is it accomplished?
b) Describe the impact of dams on socio-economic attribute. [5+5]
OR
11. Write the salient features of Environmental Protection Act. [10]

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 Code No:114DH R13
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
B.Tech II Year II Semester Examinations, May - 2016
PRINCIPLES OF ELECTRICAL ENGINEERING
(Common to ECE, ETM)
Time: 3 Hours Max. Marks: 75
Note: This question paper contains two parts A and B.
Part A is compulsory which carries 25 marks. Answer all questions in Part A.

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Part B consists of 5 Units. Answer any one full question from each unit.
Each question carries 10 marks and may have a, b, c as sub questions.

PART - A (25 Marks)

1.a) Give the expression of transient current flows in a RLC series circuit suddenly

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excited by d.c. source. [2]
b) Define time constant of RC circuit. Give its expression. [3]
c) What is meant by input driving point admittance and output driving point
admittance? [2]
d) Express the relation between Y-parameters and ABCD parameters. [3]

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e) Draw the circuits for symmetrical low-pass T filters. [2]
f) What is filter? Define pass band, stop band and cut-off frequency. [3]
g) Draw the cross section of a 2-pole DC machine and name its parts. [2]
h) If the speed of the DC motor is below the rated speed which method do you
suggest? Justify your statement with the relevant expressions. [3]
i) Derive the condition for zero regulation of a single phase transformer. [2]
j) What are the applications of Synchros? [3]
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PART - B (50 Marks)
2.a) Write the stepwise procedure in determining the forced response for RLC circuits
with dc sources.
b) In the circuit shown in figure 1, switch S is in position 1 for a long time and brought
to position 2 at time t=0. Determine the circuit current. [4+6]
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Figure: 1
OR
3.a) Why there are no transients in pure resistive circuits?
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b) Describe the current i(t) flowing in the circuit shown in figure 2 i(t) through the
8 KΩ resistor by providing the mathematical formula(s) for t >0. Sketch a graph of
i(t) for t>0. [2+8]
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Figure: 2
 4.a) What are the conditions for Reciprocity and symmetry of open circuit impedance
parameter?
b) Test results for a two port network are:
i) port 2 short circuited:
V1 = 50∠00 V , l1 = 2.1∠ − 300 A, l2 − 1.1∠ − 200 A.
ii) port 1 short circuited:
V2 = 50∠00 V , l1 = 3.0∠ − 150 A, l1 − 1.1∠ − 200 A.

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Find y-parameters. [3+7]
OR
5.a) What is the use of h-parameters? Derive equations to determine these parameters.
Draw h-parameter equivalent circuit.
b) Find the transmission parameters of the network in figure 3. [4+6]

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Figure: 3

6.a) Explain in brief units of attenuation and obtain relation between the two units.
b) A prototype HPF has cut-off frequency of 10 kHz and design impedance of 600 Ω.
Find element values of L and C. Also find attenuation in dB and phase shift in
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degrees at a frequency of 8 kHz. [4+6]
OR
7.a) What is an attenuation frequency curve of an ideal low-pass filter?
b) Design symmetrical π-attenuator with 25 dB attenuation with 25 dB attenuation and
600 Ω design impedance. [4+6]

8.a) From the fundamentals, derive an expression for the induced emf in the armature of
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a DC Machine.
b) A 400V, dc series motor has an armature resistance of 0.12Ω. When motor takes a
current of 85A, its speed is 600 rpm. Determine its speed if current drawn by the
motor changes to 40A.
c) What are the applications of differentially compounded DC generator? [4+3+3]
OR
9.a) A 250V DC shunt motor takes 4A when running unloaded. Its armature and field
resistances are 0.3 Ω and 250 Ω respectively. Calculate the efficiency when the dc
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shunt motor taking a current of 60A.

b) Explain the application of DC shunt generator along with its characteristics. [4+6]
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10.a) Derive the condition for maximum efficiency of a single phase transformer.
b) A 20 kVA, single-phase transformer has 200 turns on the primary and 40 turns on
the secondary. The primary is connected to 1000 V, 50 Hz supply. Determine the
secondary voltage on open circuit and the current flowing through the two windings
on full load.
c) What happens when a 50 Hz transformer is used at higher frequencies? [3+3+4]
OR
 11.a) Draw the phasor diagram of Transformer on load assuming the load is a lagging
power factor load.
b) A single-phase transformer has 500 turns in the primary and 1200turns in the
secondary. The cross-sectional area of the core is 80sq.cm. If the primary winding
is connected to a 50 Hz supply at 500V, calculate (i) peak flux-density, and (ii)
Voltage induced in the secondary. [5+5]

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Code No: 114DN R13
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
B.Tech II Year II Semester Examinations, May - 2016
PULSE AND DIGITAL CIRCUITS
(Common to ECE, ETM)
Time: 3 Hours Max. Marks: 75

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Note: This question paper contains two parts A and B.
Part A is compulsory which carries 25 marks. Answer all questions in Part A.
Part B consists of 5 Units. Answer any one full question from each unit.
Each question carries 10 marks and may have a, b, c as sub questions.

or
PART - A (25 Marks)

1.a) Why does resistive attenuator need to be compensated. [2]

b) Derive an expression for the output of a high-pass circuit excited by a ramp input.

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[3]
c) Draw the basic circuit diagram of negative peak clamper circuit. [2]
d) Explain the working of an emitter coupled clipper. [3]
e) Explain the effect of pedestal in gate circuit. [2]
f) Explain the variation of saturation parameters of transistor with temperature? [3]
g) Define UTP and LTP. [2]
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h) Write the difference between current time base generator and voltage time base
generators. [3]
i) Draw the diagram of OR gate using diodes. [2]
j) Explain the principle of synchronization. [3]

PART - B (50 Marks)

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2.a) A symmetrical square wave whose peak-to-peak amplitude is 8V and whose average
value is zero is applied to an RC integrating circuit. The time constant is equal to
half -period of the square wave. Find the peak to peak value of the output amplitude.
b) Explain the working of high-pass RC circuit as a differentiator. [5+5]
OR
3.a) Derive the expression for rise time of integrating circuit and prove that it is
proportional to time constant and inversely proportional to upper 3 dB frequency.
b) Draw the response of the circuit for step input critically damped and over damped
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cases for a fixed value of R and C. [5+5]

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4.a) For the circuit shown in figure, an input voltage Vi linearly varies from 0 to 120 V is
applied. Sketch the output voltage Vo to the same time scale. (Assume ideal diodes).

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b) State and prove the clamping circuit theorem. [5+5]
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5.a) Classify different types of clipper circuits. Give their circuits and explain their

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operation with the aid of transfer characteristics.
b) Draw the basic circuit diagram of positive peak clamper circuit and explain its
operation. [7+3]

6.a) Write a short note on switching times of a transistor.

b) With the neat circuit diagram, explain the operation of unidirectional sampling gate
for multiple inputs. [5+5]
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OR
7.a) Discuss in detail about breakdown voltages of a transistor.
b) Illustrate the errors encountered in series sampling and what is the design procedure
to minimize these errors? [5+5]

8.a) With the help of neat circuit diagram and waveform, explain the principle of
operation of collector coupled monostable multivibrator.
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b) Explain how the deviation from linearity is expressed in terms of errors. [6+4]
OR
9.a) With the help of a neat circuit diagram and waveforms, explain the working of a
transistor bootstrap time base generator.
b) What is hysteresis? Explain how hysteresis can be eliminated in a Schmitt trigger?
[6+4]
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10.a) Explain working of monostable relaxation device as a divider.

b) Why totem pole is used in DTL? Draw the circuit diagram and explain a DTL
NAND gate with this. [5+5]
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11.a) What is phase jitter? How to reduce it in frequency division?

b) Draw and explain a diode AND circuit for negative logic and how it works. And how
an OR circuit acts as a buffer circuit? [5+5]

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