& STR-G6653 POY OFA 7 ISL
STR-G6653 block diagram
a vin
ween cece eee eee eed
+1 SbF RAE
Function of terminal
Functions
MOS FET Kf >
Drain terminal MOS FET drain
i : Y—ARF MOS FET Y—A
Source terminal MOS FET source
75 7 RE F507
3 ‘ND Ground tertninal Ground
4 ¥, ReaF FIBER MRA A
" Power supply terminal Input of power supply for control. circuit,
: ie Da MAUL ORE UES A
5s locprs aan? a We one Input of overcurrent detection signal and
salbilet constant voltage control signal
5.2 ZO{wsnie
Oiher function
cy
Overvollage
fie
Functions
MSERRER
yrotection circuit
GFARM Ee
‘Thermal shutdown circuit
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Example application circuit
4B
SEyy—x
(ee
te) ERO MBE 5-3pin MIM EKARL CHa CPS, BUM BS ITS.
RAMEE TOTEM, COMMER OTH, HART TUS 2 ay
JH ERERT St,
Note ) Overcurrent adjustment shall not be made by connecting a resistor between 5 and 3 pins.
For this purpose, RS resistance value shall be adjusted. Refer (o the application note.
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Electrical characteristics
4 LBD EN A AY A
Electrical characteristics for control part
CEB SORP Vie=18V (Tax25T)
Viv=18¥(Ta=25), unless otherwise specified.
ermal shutdown operating temperature
ai g ay | 23 | WB i Rang | me | MERE
Parameter Terminal] Symbol [win | Typ | MAX] Unit ping
L tio,
OMG ER EE 7
Operation start voltage 4-3 | Vawor | 44] 16 | 176} Vv
ORR LER EE aaly
Operation stop voltage (Or
of OM em 3
Circuit current in operation
eo EB MH tt 4-3
Circuit current in non-operation
& KO F F ® _ _
Maximum OFF time. SS | wsce
GMOS ADT 6
Minitium time for input of quasi 5-3 | Tom -— | - | 10 | usec
resonant signals _—
@ 4) OF Fw ml _ a 5 Refer to
Minimum OFF time Torroane 15 | usec} ‘page 7
OC PFBMT LEO REL ri
O.CP/F.B terminal threshold voltage Send Yoon | 0:68 | 0.73 | 0.78 |
O.C.PF.B MTL EO BE 2 -
OCB terminal threshold vollage2? | S79 | Vom | 23 | 145 | 16 | ¥ |
OCF BMF S| SR =
O.C.PFEB terminal extraction current 5-3 | locems | 12 | 135 | 15 | ma
CVIPHEE RAE es
.¥ operation voliage 4-3 | Vawovn | 205 | 225 | 245) VY |_|
PvF ORBRHRR «8 ae er =
Latch circuit sustaining current as loon 400 | HA
Pv FORRREHEE xe A _
Latch circuit release voltage 4-3 | Vinasom | 66 a4 | ¥
ceo eK ~Taea fwl-tole
KG P23-1ERGERAER
Refer to P.2 3-1 for recommended operating conditions.
7 RUD OFE BRMIL, Bb RHRIES EAN LAO Top TT.
The minimum OFF time means Torr Width at the Lime when the minimum quasi tesonant signal is inputted.
MB DyFOMEL. OVP, TSDKLOMET SORE RT.
‘The latch circuit means a circuit operated O.V.P.
and T.S.D.