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Problem 1

A processor has 16 address lines (A15-A0), 8 data lines (D7-D0) and connected to the memory
chips shown in the diagram below. Assume that each chip has consecutive addresses.
a. What is the maximum address space of this processor in Kbytes?

b. What is the maximum size (in Bytes or KBytes) of each of the chips: Chip0, Chip1, and
Chip6?

No. Chip Size


1 Chip0

2 Chip1
3 Chip6

c. Fill up the following table by indicating the chip number accommodating the given
address.
No. Address Chip Number
(Hexadecimal)
1 15FF

2 500F

3 7200

4 7800

5 800C

6 6FFF

d. Assume that chip7 has a size of 16KB and to be placed at the starting address C000.
1. How many address lines are connected to this chip?

2. Show on the figure the connections needed to the chip select (CS7)?
Problem #2
Assume the following
1. The processor has 20 address lines
2. The processor and all memory components have 8 data lines.
3. There are 2 ROM chips, each has a size of 4 Kbytes.
4. There is 1 RAM chip that has a size of 128 Kbytes.
5. There are 4 I/O chips with the following sizes (8bytes, 16 bytes 32 bytes and 64 bytes.)
6. The ROMs should start at address 0 and have consecutive addresses.
7. The RAM should start at address (20000)16
8. The I/Os should start at address 30000

a. Draw a memory decoding structure that implements the above system.

b. Assume that a chip has a size of 16KB and to be placed at the starting address C000. [2]
3. How many address lines are connected to this chip?
4. Show on the figure the connections needed to the select this chip.

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