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/* ***************************************** code starts here

************************************/
ORG 0x0000
(1) GOTO MAIN

ORG 0008H
(2) BTFSS INTCON TMR0IF ; Timer0 interrupt ?
(3) RETFIE ; return from interrupt
(4) GOTO T0_ISR

ORG 0x00100
(5) MAIN BCF TRISB, 5
(6) MOVLW 0x08 ; Timer0, 16-bit, internal clock, no prescale
(7) MOVWF T0CON
(8) MOVLW 0xFF
(9) MOVLW 0xFF
(10) MOVWF TMR0H
(11) MOVLW 0xF2
(12) MOVWF TMR0L
(13) BCF INTCON, TMR0IF ; clear Timer0 interrupt flag
(14) BSF T0CON, TMR0ON ; start Timer0
(15) BSF INTCON, TMR0IE ; enable Timer0 interrupt
(16) BSF INTCON GIE ; enable interrupt globally
(17) BSF INTCON, GIE ; enable interrupt globally

OVER ; processor may execute any other operation


coded here
; processor may execute any other operation
coded here
; processor may execute any other operation
coded here
(18) BRA OVER

ORG 200H
T0_ISR
(19) MOVLW 0xFF
(20) MOVWF TMR0H
(21) MOVLW 0xF2
(22) MOVWF TMR0L
(23) BTG PORTB, 5
(24) BCF INTCON, TMR0IF ; clear Timer0 interrupt flag **
(25) RETFIE ; return from interrupt
end
/******************************************* code ends here
***********************************/

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