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J2960
C2960 L2960
R0750
R2900
DZ2960 R2053
U0701 C2055
C2095
C2094
C2093
C0701
C2090
C8108 C8107
C2080
R2050 J47002_WIFI
R2040
L8121
L8119
C2961 L2961
STD9300
C8122
R2901 R2052
C2711
C1106
L8105
C8121
C8117
DZ2961
L2700
C47010_WIFI
C2701
C2045
U47002_WIFI
R0736
R47012_WIFI
C2962 L2962
U2710
SL9304
J47001_WIFI
L47015_WIFI
C2057
R2902
U2700
DZ2962
C2702
C2092
C2710
L2701
R2903 C2963 L2963
R1751
R1780
DZ2963 R2042
C2700 R2043
L8110
L8107
R1954 C2091 L47013
L2050
C2060
C
C47018
47
C1112 C8175 C8189
01
C1104
C1107
R1953 C47016
2
C1108
C1109
C1105
XW1900
U47005
C2051
U2050
U47004_WIFI
R1753
C1761
C7327
C1990
C47017
L2040
C1708
C1127
C1110
C1111
C1113
C8176
C1991
R1952
XW1903
XW1902
C47015
C2047
C7326
C7324
C8188
IFI
_W
C1910
C8118
12
C7302
70
C1707
U2040
C1917
C1916
L4
R8218
L8101
L8100
C1128
C7300
C1903
C1913
C7311
C8103
R1912
C1042
SL9302 C1912
L8115
C1129 R1752
C1125
C1115
C1123
C1124
C1119
C1120
C1122
C1121
C1114
C1117
C1118
C47007_WIFI
R2950 C1706
R1901
C7325
C0963 C2048
C8102
R2724
FL0911 R0721
C47014
L47014
C8179 C8180
C1751
C2250
C2233
C2220
C8177
C8178
C2971 C0930 L1702
C1130
C1760
R1005
C2904
C1911
C7328
R0720
C1930
C41008_RF L41005_RF C41009_RF
L38018_RF
L2901 C2046
L38026_RF
L1760 R1790
L38020_RF
R1910
C41022_RF
C43005_RF
C43006_RF
C35006_RF
C35007_RF
L36001_RF
C0920
C1005
R1001
C1031
C1116
C1126
C0908 C7330
C1750
C0902
C1041
L38025
R36003 C0962
L2202
C7315 R1006
C45015_RF
C2052
L39011_RF
L39001_RF
R0931 R0933
C1132
C2053
C34015_RF
R1930
C41007_RF
C41004_RF
C34003_RF C34002_RF
C41003_RF
L41007_RF
C41017_RF
C41011_RF
C41016_RF
L41003_RF
R35002_RF
R0941
R35005_RF
R1204
R1206
C1001
C38079_RF
R0703
R0940
R35004_RF
L45013_RF
C1932 R8240
FL39002_RF
L1701
C45005_RF C45004_RF C45003_RF C45002_RF C45001_RF
C38021
L38019_RF
C38041_RF R1913
R34004_RF
C40001
C40002
L38006
C38034_RF
C8163
C8164
C2905
C2903
R31102_RF
R31101_RF
R31104_RF
R31103_RF
J1700
R36004 C0961 C0903 C1002
C8120
C8119
C47020
R47017
R47016
C7319 R0700 R0701
L38011_RF
C7316
C2056
R2051
C2054
C8138 C8137
R1931 C2058
C8139
C8140
C8141
C38027
C1931 R8239
C2041 C2043
C39001_RF
L1750
DZ31002_RF
L38004_RF
R36005
C8124
U1700
U2720
C34016_RF
C8174 C8172
C1040
C2901
C38023
C35008_RF
C8198
C8195
C8131
C8197
C8196
L40009
C8199
R8227
R2041
C38025
L2212
C36004 C38022_RF
C1704
L2912
C38043
U47001_WIFI
U1900
C1131
C1009
C8173 C8171 U47006
C7380
R47011_WIFI
J2201
C1920
R8231
L1920
U41002_RF
C1705
C2900
C2902
C39004
L39006
R35001
C39005_RF
DZ31001
R1920
J2950
L38022
C38010
L38003
C35009_RF
R8202
C1034
D8100
C2725
C1915
C1902
L2900 L43007_RF
R8232 C1703
U7300
U45001_RF
C47013_WIFI
L2222
R7301
R7300
L2910
L8128
C2970
C34026_RF
C8126
C8125
C1908 R8235
C2906
C2908
R1940
C1753
C1149
C1752
R0932
C2723
C38038_RF L38014_RF
L44010 C44001_RF
C34011_RF C1702
C7350
R47007_WIFI
R45003_RF
C8159
C1006
C2907
C38040_RF
C1918
R45007_RF
C1907 L1700
R45006_RF
R45004_RF
R45005
C44015 C36003
L2200
L2902
C43001_RF
C2726
L2911
C1148
L2232
C34023_RF
C2721
C38042_RF
R34002_RF
R0702
C2972
C36001
C36005
C1701
C7310
R1950
R2205
L45004
L2702 R1455 R1200
R1951
L45009
C1951
C2242
C1909
C1451
C38017_RF
C1901
C1950
J31001_RF
C1402
C1401
R42001
C2241
R1000
C1004
C1906
C1905
C1043
C1411
C38029
R8291
R8290
L38008
C1412
U35001_RF
C34004_RF
C34005_RF
R45009
R45008
C1914
R0738
L45008
L45010
C2911
C1405
L38021
C2909
C1450
C38036_RF
C1406
L2233
U34001_RF
C38044_RF
L2950
C1493
U8100
C2206
C1491
C7320
C1400
R0831
C7321
C7323
C0610
C7314
C8161
C8160
C34025_RF R1201
R42007
C38031_RF
R0735
C8147
C1904
L38009
R0930
C2910
U36001_RF
C1410
L38010
C2232
R1205
L2903
U2200
R34001_RF
C34001_RF
C8208
C2973
R1051
C1052
R0737
C1133
C38039_RF L38013 C1144
Q5701
C8210
FL
C41005_RF
C41006_RF
C41012_RF
C41010_RF
R41002_RF
R8216
42
L41008_RF
C34022_RF
C38019
C38013_RF
L38024_RF
C1054
R1054
R0832
R1052
C8209
C8149
00
L38015
R1270
C8135
L2800 C8207
C34008_RF
R47015
R47013
R1053
1
L38016_RF
C38018_RF
_RF
R8299
002
L42004 C42001_RF
R1202
C2802
C2807
U0652
C2800
L42
L42001
C0627
C7301
C2801
C2806
C2240
R47009
R47005
C38020_RF
C34006_RF
C1035
L8112
C1145
C2202
R1208
L42005 C42002_RF
C1142
C34007_RF
R33008_RF
C8223 XW8203
U44001_RF
C38037_RF
R1209
C8167
C44014_RF
L44011_RF
C45013
C0643
C0642
C47002_WIFI
L38017_RF
L45006
L45007_RF
C8169
C1137
C1135
C8217
C44007
C1140
R2801 R1207
L2807 L2808 C2203
C36002_RF
L2201
C45014 C47004_WIFI
L38023_RF
R34007_RF
C8215
C1139 C8204
C2230
C2804 C1026
R8203
C47003_WIFI
L45012
L45003_RF
R2260
Y33001_RF
C34021
U2800
R31005
L44009_RF
L45002
R0642
C0640
C44008
C38015
L44005
C8221
C7329
R1203
C38090
C1141
R42008_RF R42009_RF
C2805
C1146
L45011
C8142
R47008_WIFI
STD9301
L42006_RF
R34006_RF
C8143
C8212
C8144
C8130
C8145
C8239
C8153
C8156
R5760
C8168
C8220
C8201
C5750
R1213
C8238
C32036_RF
C1134
C32035_RF
R36001
R42006_RF
L44007
C2803
C1143
C32015
C32016
C32017
C32018
R1750
C42013_RF
R42011_RF
C38003 L46007
L37003
L37002
L40008 R40005
C1147
C7322
C1032
L8229
L40007
L40012_RF
C42006_RF
C32034_RF
C32012_RF
C32031_RF
C44010_RF
L44006
C44009
C34027_RF
C34020_RF
C34019_RF
C35001_RF
R34008 C33008
Q5700
C1136
Y8138
C34009
22
L40006
L46009
L46006
C43024
C43023
R40004
R8219
30
R33010_RF
C8214
C4
R5703
C1036
C8155
L38001
C42005_RF
21
C32014_RF
L37005 L37004 C32013
C0630
C7312
C33006
30
R33007
C8237
U1400
16
C1138
C4
L4
R5704
C7313
C39013_RF
R39002_RF
30
R33018
R33019
R34005
C32006
C32023
U42001_RF
30
C8150
C8146
C8152
R5701
L4
R42010_RF
R0771
13
L46013
15
C37001
RT33001
C37005
C37004
C37006
C32020_RF
C8162
R33003 R33001
C44012
C32033_RF
30
L4
C44005_RF
C4
C44011
30
FL46002_RF C7331
C8288
L2802
L2804
C32021_RF C32037_RF
05
C8136
C8151
J2800
20
R1322
D8230
C42010_RF
C37002 DZ0600 R0765 R0739
C2081
C2061
30
14
L4
30
DZ5701
R43
C34018
C34017
L4
DZ5710
20
C7306
L47011_WIFI
R5702
004
C37003
C8154 R8222
12
C37007_RF
30
_RF
R0770
C8236
30
C4
C42009_RF
L39005_RF
06
R0651
C0907
L4
FL2040
L37006
Q1300
FL2050
FL2051
FL2041
30
J5700
L4
R4
U40002_RF
C44013_RF
30
C32029_RF
C32030_RF
C8129
C32040_RF
05
C1362
C46007_RF
03
C32022_RF
C2084
30
FL44001_RF
C42008_RF
U37001
C2064
R4
C1037
C39019
C39014 C8299 C47001_WIFI
L39007
C8226
L39009
FL42002_RF
C42007_RF L44008 L44002 C0641
L32009_RF
R1350
C1350
L39012
C39018 C39016 U37002_RF
C8148 C8234 C8235 R1321 C47009_WIFI
C39012 C1028
C5704
C43027_RF
L43023_RF
C44003_RF
C32011_RF
L2801
C32009_RF
DZ5702
Q1301
U32001_RF
C7318
L2803
C7524
U1350
C7526
C7525
L43022
FL40001
L46021_RF
L40011_RF
L39013 R0704
C1322
C8232
L43024 FL7500 C7522
L43009_RF
C7523
C2086 C2083 C2040 C2063 C2049 C2066
R0705
L32011_RF
DZ5704
Q8104
C40017_RF
L5702
C41021_RF
C5707
C43016
C8191
R1320 C2070
L5703
C2071
D5700
L40004_RF
L40010_RF
R46008_RF
R5700
C41020_RF C1039 R5706 R5705
C8166
C1019
L46020_RF
L40005 C40010
FL43001_RF
C8233
C40009_RF
C1302
L8225
R33017
R1210 C0680
C1151
C5700
C1000
C0681
C0684
C7317
C7307
C32019
C1027
C1030
C1029
C5701
C1038
C5702
C1007
L46019
C41001_RF
DZ5700
C7309
STD9302
R33004_RF
C1056
C46023_RF
L46018_RF
R46005_RF
C46020_RF
L46028_RF
R0640 R0655
L5700
R1055
C41019_RF
C1015
U43001_RF U39001_RF
R0645 C0651
U41001_RF
U1300
C40018_RF
C46030 R1056
C1024
R33002_RF
C0613 C0607
C32001 C32002
C5703
C32026_RF C32003_RF C32004_RF
C0648
C0652
R0689
R0646
C41018_RF
R0620
C8231
J7500
C0682
FL46001_RF
R0625
C39022_RF
C0618
C5705
C46027
C46022
C0683
L46016
L46004_RF
R40003_RF
R0647
R40001_RF
U40001_RF
DZ5703
C0646
R0688 R0621 C0608
L5701
L32008_RF
L32007_RF
L32010_RF
C43026_RF
L5704
U46001_RF C1303
C39009
R2800
C8100 D5701
C41015
C32010_RF
C7303
R0622
C32007_RF
Y0602
L46024_RF
R0617 R0624
C40004_RF
C7304 C7305
C40011_RF
L46017
FL39001_RF
R2054
FL43002_RF
C8295 R2045
C46021_RF
C1300
R8292
C1321
D8228 C1361
C39011
R1260
L41001_RF
C1301 C1320 C2072 C2050
R8100
L40002_RF
C46013_RF
L46010_RF
L46003_RF
R1454 C1404 C1490 C1414 C1494 C1460 R1460 R1461 C1413 C1461 C1310 R1311 C1360 C2087 C2068
L40003_RF
L46027_RF
SL9305
L46023_RF
C46026_RF
L46022_RF
J46002_RF
L2602
C2606
L2660
C2608
J2601
C2607
L2600
C2601
L2611
C2600
C2602
L2610
C2605
C2603
C2604
L2601
R2601
U2601
U2600
R1850
L1903
C1850
J1800
L1905
C1800
L1904
C1820
L1902
L1800
C1821
L1901
L1900
C1801
C1802
C1822
C46028_RF
L46026_RF
J46003_RF
R46007
J46004_RF
C46025_RF
L46002_RF
Diesel57 Diesel57
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8 7 6 5 4 3 2 1
CK
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. APPD
REV ECN DESCRIPTION OF REVISION
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. DATE
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
X123
13 0001520462 ENGINEERING RELEASED 2012-07-02
MAIN
DVT
LOGIC BOARD
LAST_MODIFIED=Wed Jun 27 16:39:53 2012
D D
SCH AND BOARD PART NUMBERS
TABLE_5_HEAD
22 32 BASEBAND PMU (1 0F 2)
TABLE_TABLEOFCONTENTS_ITEM
JORGE 06/27/2012
2 2 BLOCK DIAGRAM: SYSTEM N/A N/A TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
N/A 04/18/2011
TABLE_TABLEOFCONTENTS_ITEM
24 34 BASEBAND (1 OF 2)
TABLE_TABLEOFCONTENTS_ITEM
JORGE 06/27/2012
C 4
TABLE_TABLEOFCONTENTS_ITEM
7 AP: I/Os N/A 05/05/2011 25 35 MOBILE DATA MODEM (2 OF 2)
TABLE_TABLEOFCONTENTS_ITEM
JORGE 06/27/2012 C
5 8 AP: FLASH MEMORY INTERFACE N/A 04/18/2011
26 36 RF TRANSCEIVER (1 0F 3)
TABLE_TABLEOFCONTENTS_ITEM
JORGE 06/27/2012
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
8
TABLE_TABLEOFCONTENTS_ITEM
11 AP: PWR N/A 04/18/2011 30 40 BAND 13 PA
TABLE_TABLEOFCONTENTS_ITEM
JORGE 06/27/2012
TABLE_TABLEOFCONTENTS_ITEM
MLB 05/04/2012
TABLE_TABLEOFCONTENTS_ITEM
34 44 BAND2 PAD
TABLE_TABLEOFCONTENTS_ITEM
JORGE 06/27/2012
12
TABLE_TABLEOFCONTENTS_ITEM
17 TOUCH: FLEX CONNECTOR N/A 06/21/2010 35 45 RX DIVERSITY
TABLE_TABLEOFCONTENTS_ITEM
JORGE 06/27/2012
37 47 WIFI/BT
TABLE_TABLEOFCONTENTS_ITEM
JORGE 06/27/2012
14 19 AUDIO: L81 CODEC KAVITHA 01/18/2012 TABLE_TABLEOFCONTENTS_ITEM
B TABLE_TABLEOFCONTENTS_ITEM
16
TABLE_TABLEOFCONTENTS_ITEM
22 VIDEO: MIPI CONNECTOR N/A N/A 40 75 POWER: BATTERY CONNECTOR
TABLE_TABLEOFCONTENTS_ITEM
N/A N/A
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
20
TABLE_TABLEOFCONTENTS_ITEM
29 BUTTON & REAR CAMERA CONN N/A N/A 45 101 CONSTRAINTS: ASSIGNMENTS
TABLE_TABLEOFCONTENTS_ITEM
N/A N/A
A A
DRAWING TITLE
SCH,MLB,X123
DRAWING NUMBER SIZE
ISP_I2C1 FF CAMERA
CUMULUS MIPI1C
MASTER
CABERNET BRD
SPI1
H4A ISP_I2C0
CANADA FLEX
REAR CAMERA
MIPI0C SENSOR PANEL
D DUAL-CORE ARM D
CORTEX-A9 W/ SMP
CUMULUS 1GHZ
SLAVE HSIC1
RF/GPS RF ANT
CABERNET BRD
LPDDR2 UART4
2X32-BIT
400MHZ/800MB/S
CSA 32-46
UART5_RTXD
NAND FLASH
PMU BATTERY FMI0
ALISON
FMI1
CSA 75
CSA 14
DWI
I2C0
CSA 81-82
B B
TRISTAR AUDIO CODEC
USB2.0 L81
SPI2 SPI
E75 UART0 HS JACK
UART2 I2S0 ASP
MIKEY AUDIO JACK FLEX
IO FLEX BB USB
UART4 I2S2 XSP
JTAG
CSA 13 CSA 19
I2C2 I2S1
I2C1
VOLTAGE=1.1V
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR
R0620 MAX_NECK_LENGTH=3 MM
0.00 2
39 =PP1V0_PLL_H4 1 PP1V0_PLL4_F
0%
1/32W 1
MF C0651 1
01005 0.01UF C0680
10% 27PF
6.3V 5% VOLTAGE=1.1V
2 X5R 16V MIN_LINE_WIDTH=0.2MM
01005 2 NP0-C0G MIN_NECK_WIDTH=0.1MM
01005 NET_SPACING_TYPE=PWR
R0621 MAX_NECK_LENGTH=3 MM
D 1
0.00 2 PP1V0_PLL3_F VOLTAGE=1.1V
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.1MM
D
0% NET_SPACING_TYPE=PWR
1/32W MAX_NECK_LENGTH=3 MM
MF 1 C0648 1 R0625
01005 C0681
0.01UF 27PF PP1V0_PLL_USB_F 1
0.00 2 =PP1V0_USB_H4
10% 5% 3 39
2 6.3V
X5R 16V
2 NP0-C0G VOLTAGE=1.1V 0%
01005 MIN_LINE_WIDTH=0.2MM 1 1/32W
01005 MIN_NECK_WIDTH=0.1MM 1 C0652 MF
NET_SPACING_TYPE=PWR C0684 0.01UF 01005
R0622 MAX_NECK_LENGTH=3 MM 27PF 10%
0.00 2 5%
16V 2 6.3V
X5R
1 PP1V0_PLL2_F 2 NP0-C0G 01005
0% 01005
1/32W
MF 1 C0646 1
01005 C0682
0.01UF 27PF
10% 5%
2 6.3V
X5R 2 16V VOLTAGE=1.1V 1 C0627
01005 NP0-C0G MIN_LINE_WIDTH=0.2MM
01005 MIN_NECK_WIDTH=0.1MM 0.01UF
NET_SPACING_TYPE=PWR 10%
R0624 MAX_NECK_LENGTH=3 MM 6.3V
2 X5R
0.00 2
1 PP1V0_PLL01_F 01005
0%
1/32W
MF 1 1 =PP1V0_USB_H4 =PP3V3_USB_H4
01005 C0608 C0683 39 3 8 39
0.01UF 27PF
10% 5% 1 1 C0640 1 C0630
6.3V
2 X5R
16V
2 NP0-C0G C0643
0.22UF 1UF 0.01UF
01005 01005 20% 10%
20% 6.3V 6.3V
6.3V 2 X5R 2 X5R
2 X5R
0201 0201 01005
39 =PP1V2_HSIC_H4 =PP1V8_USB_H4 39
C C
W26
V25
V27
E16
E17
E18
E20
E21
E19
R25
T27
P27
HSIC2_DVDD102 V24
1 C0641
1 C0642 0.01UF
0.22UF 10%
HSIC_VDD121
HSIC_VDD122
HSIC1_DVDD101
PLL0_AVDD11
PLL1_AVDD11
PLL2_AVDD11
PLL3_AVDD11
PLL4_AVDD11
PLL_USB_AVDD11
USB_DVDD
USB_VDD330
USB_ASW_VDD18
20% 6.3V
2 X5R
2 6.3V
X5R 01005
0201
10MA
35MA
25MA 25MA 4MA 4MA 4MA
4MA 4MA
10MA 10MA 1MA
W30 HSIC1_DATA 4MA
44 21 BI HSIC1_BB_DATA OMIT WDOG C27 SOC_WDOG OUT 10
2
39 9 6 4 3
R0655
CRITICAL 1.00M CRITICAL
1% MF
010051/32W Y0602
R0647 1R0646 1R0645
1
A25 JTAG_SEL
1
9 IN JTAG_SOC_SEL SM-2
100K 100K 100K E26 JTAG_TRTCK R0640 24.000MHZ-16PF-60PPM
1% 1% 1% NC_JTAG_SOC_TRTCK
1/32W 1/32W 1/32W 1.00K2 XTAL_SOC_24M_O_R
MF MF MF 44 9 OUT JTAG_SOC_TRST_L E25 JTAG_TRST* XO0 A16 45 XTAL_SOC_24M_O 1 1 3
2 01005 2 01005 2 01005 44 9 JTAG_SOC_TDO D26 JTAG_TDO 1%
OUT 1/32W 2 4
44 JTAG_SOC_TDI D25 JTAG_TDI MF
USB11_DP T29
IN 1 1
=PP1V8_H4 B25 JTAG_TMS
NC_USB_FS_D_P 9 01005 C0613 C0607
39 9 6 4 3 JTAG_SOC_TMS 15PF 15PF
USB11_DM U29
44 10 OUT
C26 JTAG_TCK NC_USB_FS_D_N 9
44 10 JTAG_SOC_TCK 5% 5%
OUT
2 16V
NP0-C0G-CERM 2 16V
NP0-C0G-CERM
1 01005 01005
R0617
10K USB_DP M31 SOC_USB_D_P
B 1%
1/32W
MF
USB_DM N31 SOC_USB_D_N
BI
BI
10 44
10 44 B
2 01005
PLL_USB_AVSS11
SOC_HOLD_RESET H23 HOLD_RESET
P28 USB_ASW_VSS18
TABLE_5_HEAD 9
W28 HSIC_VSS121
V26 HSIC_VSS122
PLL0_AVSS11
PLL1_AVSS11
PLL2_AVSS11
PLL3_AVSS11
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION PLL4_AVSS11
W29 HSIC1_DVSS
W25 HSIC2_DVSS
USB_VSSA0
A 339S0179 1 H4A B0,35NM,1.15MM HEIGHT U0652 CRITICAL COMMON
TABLE_5_ITEM
AP: MAIN
DRAWING NUMBER SIZE
TABLE_ALT_ITEM
051-9374 D
D16
D17
D18
D20
D21
D19
R26
R27
H4A I/OS
R0720
33.2
1% OMIT
1/32W OMIT
MF GPIO_BTN_HOME_L K4 GPIO0
44 14 OUT I2S0_CODEC_ASP_MCK 1
01005
2 44 I2S0_CODEC_ASP_MCK_R AM18 I2S0_MCK U0652
42 12 4
42 20 4
IN
IN GPIO_BTN_POWER_L H1 GPIO1
U0652
44 14 I2S0_CODEC_ASP_BCLK AM19 I2S0_BCLK H4A 20 GPIO_BTN_VOL_UP_L F2 GPIO2
H4A
OUT IN BGA
I2S0_CODEC_ASP_LRCK AP14 I2S0_LRCK BGA GPIO_BTN_VOL_DOWN_L G4 GPIO3
D
R0721
33.2
1%
44 14
44 14
OUT
IN I2S0_CODEC_ASP_DIN AP17 I2S0_DIN
POP-512MB-DDR
I2C0_SCL AL4 I2C0_SCL BI 4 10 15 42 44
20
42 20 4
IN
IN GPIO_BTN_SRL_L G3 GPIO4
POP-512MB-DDR
(2 OF 12) EHCI_PORT_PWR0 T3 GPIO_BOARD_REV0
D
I2S0_CODEC_ASP_DOUT AM22 G2 IN 9
1/32W 44 14 I2S0_DOUT I2C0_SDA AM6 I2C0_SDA 4 10 15 42 44 15 4 GPIO_SPKAMP_RST_L GPIO5
EHCI_PORT_PWR1 V2
MF OUT OUT OUT GPIO_BOARD_REV1
(3 OF 12) K3 IN 9
01005
AM13 15 OUT GPIO_SPKAMP_KEEPALIVE GPIO6
44 15 OUT I2S1_SPKAMP_MCK 1 2 44 I2S1_SPKAMP_MCK_R I2S1_MCK I2C1_SCL AM7 I2C1_SCL BI 4 18 19 44
L4 EHCI_PORT_PWR2 U2 GPIO_BOARD_REV2 IN 9
AK3 15 IN GPIO_SPKAMP_RIGHT_IRQ_L GPIO7
44 15 OUT I2S1_SPKAMP_BCLK I2S1_BCLK I2C1_SDA AG3 I2C1_SDA OUT 4 18 19 44
G1
AP8 14 IN GPIO_CODEC_IRQ_L GPIO8
44 15 OUT I2S1_SPKAMP_LRCK I2S1_LRCK H2
AL14 I2C2_SCL D29 I2C2_SCL BI 4 17 18 44 21 OUT GPIO_BT_WAKE GPIO9
44 15 IN I2S1_SPKAMP_DIN I2S1_DIN N3 TMR32_PWM0 AP5 GPIO_GYRO_IRQ2 IN 18
AM20 I2C2_SDA E29 I2C2_SDA OUT 4 17 18 44 21 OUT GPIO_BB_RST_L GPIO10
44 15 OUT I2S1_SPKAMP_DOUT I2S1_DOUT J2 TMR32_PWM1 AP4 GPIO_ACCEL_IRQ1_L IN 18
21 IN GPIO_BB_GSM_TXBURST GPIO11
AM9 SWI_DATA AN6 NC_SWI_AP J3 TMR32_PWM2 AN5 AP_CLK_32K_CUMULUS OUT 12 44
42 10 IN PMU_GPIO_TRISTAR_IRQ I2S2_MCK 21 IN GPIO_BB_IPC_GPIO GPIO12
44 14 OUT I2S2_CODEC_XSP_BCLK AM16 I2S2_BCLK 21 IN GPIO_BB_DIAGS_RDY J1 GPIO13
44 14 I2S2_CODEC_XSP_LRCK AK2 I2S2_LRCK DWI_DI U1 DWI_DI 42 44 21 GPIO_BB_GPS_SYNC W3 GPIO14
OUT IN IN
44 14 I2S2_CODEC_XSP_DIN AN17 I2S2_DIN DWI_DO AN18 DWI_DO 42 44 21 GPIO_BB_RST_DET_L W4 GPIO15 UART0_RXD B29 UART0_DEBUG_RXD 10 44
IN OUT IN IN
44 14 I2S2_CODEC_XSP_DOUT AM2 I2S2_DOUT DWI_CLK AM11 DWI_CLK 42 44 9 GPIO_BOARD_ID3 M3 GPIO16 UART0_TXD C29 UART0_DEBUG_TXD 10 44
OUT OUT IN OUT
AM1 21 OUT GPIO_BB_HSIC_HOST_RDY AB5 GPIO17 AG5
10 IN GPIO_ACC_SW_POK_L I2S3_MCK N2 UART1_CTSN UART1_BT_CTS_L IN 21 44
AL16 9 IN GPIO_BOOT_CONFIG0 GPIO18 AH5
44 21 OUT I2S3_BT_BCLK I2S3_BCLK AB4 UART1_RTSN UART1_BT_RTS_L OUT 21 44
AN20 42 IN GPIO_PMU_IRQ_L GPIO19 AL1
44 21 OUT I2S3_BT_LRCK I2S3_LRCK Y4 UART1_RXD UART1_BT_RXD IN 21 44
AH1 42 4 OUT GPIO_PMU_KEEPACT GPIO20 AK1
44 21 IN I2S3_BT_DIN I2S3_DIN AD5 UART1_TXD UART1_BT_TXD OUT 21 44
AK5 12 OUT GPIO_GRAPE_RST_L GPIO21
44 21 OUT I2S3_BT_DOUT I2S3_DOUT H4 N1
12 IN GPIO_GRAPE_IRQ_L GPIO22 UART2_CTSN GPIO_ALS_IRQ_L OUT 17
C
OUT
C 44 12
44 12
OUT
OUT
SPI1_GRAPE_MOSI
SPI1_GRAPE_SCLK AP13
SPI1_MOSI
SPI1_SCLK
19 IN GPIO_PROX_IRQ_L
NC_GPIO31 AF4
GPIO30
GPIO31 UART4_CTSN AJ26 UART4_BB_CTS_L IN 21 44
VSS
A11
A12
A13
A14
A17
A24
A27
A30
A31
B1
VSS
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
39 8 6 =PP1V8_IO_H4 =PP3V0_MLC_RST_LEVELSHIFTER 39
NOSTUFF
1 C0701
39 10 9 4 =PP1V8_S2R_MISC
B R0771
220K 2
A1
VCCA VCCB
A2 0.1UF
20%
6.3V
2 X5R-CERM
B
1 GPIO_BTN_HOME_L 4 12 42 01005
U0701
5% SN74LVC1T45YZPR
1/32W
MF BGA
01005 4 IN GPIO_MLC_RST_1V8_L C1 A B C2 GPIO_MLC_RST_L OUT 16
NOSTUFF
39 =PP1V8_ALWAYS B2 DIR
R0770
220K 2
1 GPIO_BTN_POWER_L 4 20 42
GND
5%
1/32W B1
MF
01005
39 10 9 4 =PP1V8_S2R_MISC
R0765
1
220K 2 GPIO_BTN_SRL_L 4 20 42
5%
1/32W
(SCREEN ROTATION LOCK) R0750
MF 1
0.00 2
01005
0%
1/32W
MF
01005
39 9 6 3 =PP1V8_H4
1 1 1 1 1 1
R0700 R0701 R0702 R0703 R0704 R0705
2.2K 2.2K 1.8K 1.8K 2.2K 2.2K GPIO_SPKAMP_RST_L 4 15
5% 5% 5% 5% 5% 5%
1/32W 1/32W 1/32W 1/32W 1/32W 1/32W GPIO_PMU_KEEPACT 4 42
MF MF MF MF MF MF
2 01005 2 01005 2 01005 2 01005 2 01005 2 01005
GPIO_MLC_RST_1V8_L 4
A 44 42 15 10 4 I2C0_SDA
GPIO_FORCE_DFU
GPIO_DFU_STATUS
4 9
4
SYNC_MASTER=N/A SYNC_DATE=05/05/2011 A
44 42 15 10 4 I2C0_SCL PAGE TITLE
39 8 5 =PP1V8_NAND_H4
D
R0831
1 D
100K
1%
1/32W
MF
2 01005
OMIT
FMI0_CE0_L AF28 FMI0_CEN0
44 11 OUT
NC_FMI0_CEN1 AE26 FMI0_CEN1
U0652
NC_FMI0_CEN2 AF25 FMI0_CEN2
H4A
NC_FMI0_CEN3 AF26 FMI0_CEN3
BGA
POP-512MB-DDR
(4 OF 12)
AB30
FMI0_DQS C
44 11 OUT FMI1_CE0_L FMI1_CEN0
NC_FMI1_CEN1 AB26 FMI1_CEN1
NC_FMI1_CEN2 AA25 FMI1_CEN2
NC_FMI1_CEN3 AB25 FMI1_CEN3
VSS
B2
B3
B5
B6
B8
B9
B11
B12
B13
B15
B16
B17
B B
A SYNC_MASTER=N/A SYNC_DATE=04/18/2011 A
PAGE TITLE
TABLE_ALT_HEAD
VOLTAGE=0.4V
D
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
D
PP_AP_MIPI0D_0P4V
TV/DISPLAYPORT 1
10%
C0902
2.2NF
10V
2 X5R-CERM
VOLTAGE=0.4V 0201
MIN_NECK_MIDTH SHOULD BE 0.2MM MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR
MIPI MAX_NECK_LENGTH=3 MM
PP_AP_MIPI1D_0P4V
1 C0920
2.2NF
10%
10V
2 X5R-CERM
0201
VOLTAGE=1.1V
MIN_LINE_WIDTH=0.2MM
39 =PP1V8_MIPI_H4 MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR
FL0911
=PP1V8_DPORT_H4 39 MAX_NECK_LENGTH=3 MM 80-OHM-0.2A-0.4-OHM
1 C0907 PP1V0_MIPID_PLL_F 1 2 =PP1V0_MIPI_PLL_H4 39
0.1UF 0201-1
20%
2 6.3V
X5R-CERM
1 C0961 1 C0962 1 C0963
01005 27PF 0.1UF 1UF
5% 20% 20%
39 8 4 =PP1V8_IO_H4 16V
2 NP0-C0G
6.3V
2 X5R-CERM
6.3V
2 X5R
39 =PP1V0_MIPI_H4 01005 01005 0201
=PP1V0_DPORT_H4 39
C
1 C0930 1 C0908 1 C0903
C
AG17
AG18
AG19
AG20
AG21
AG22
AG23
AJ19
AJ23
MIPI0D_VREG_0P4V AJ18
MIPI1D_VREG_0P4V AJ22
MIPI0D_VDD10_PLL AJ17
MIPI1D_VDD10_PLL AJ21
1UF 0.1UF 0.1UF
DAC_AVDD18A E23
DAC_AVDD18D E22
DP_PAD_AVDD0 L24
DP_PAD_AVDD1 K26
DP_PAD_AVDDP0 M25
DP_PAD_AVDDX N25
DP_PAD_DVDD P25
M27
MIPI_VDD10
MIPI0D_VDD
1 1 1 1
R0930 R0931 R0932 R0933
2.2K 2.2K 2.2K 2.2K
5% 5% 5% 5%
1/32W 1/32W 1/32W 1/32W
MF MF MF MF
2 01005 2 01005 2 01005 2 01005
OMIT
12MA 15MA 45MA 4MA
77MA 77MA
OMIT 5MA
11MA
U0652
8MA U0652 H4A 6.6MA
DISPLAY_SYNC AM10 MIPI_VSYNC BGA ISP0_SDA AC1 ISP0_CAM_REAR_SDA
H4A 12 OUT
ISP0_SCL AP7 ISP0_CAM_REAR_SCL
BI 20 44
POP-512MB-DDR
NC_DAC_COMP C23 DAC_COMP (6 OF 12) DAC_OUT3 A21 NC_DAC_OUT3 (5 OF 12)
45 20 IN MIPI0C_CAM_REAR_DATA_P<0> AM30 MIPI0C_DPDATA0 ISP1_SDA AL20 ISP1_CAM_FRONT_SDA BI 17 44
H24 DAC_VREF DAC_OUT2 A22 NC_DAC_OUT2 MIPI0C_CAM_REAR_DATA_N<0> AM31 MIPI0C_DNDATA0 ISP1_SCL AN3 ISP1_CAM_FRONT_SCL
NC_DAC_VREF 45 20 IN OUT 17 44
DAC_OUT1 A23 NC_DAC_OUT1
NC_DAC_IREF C24 DAC_IREF 45 20 IN MIPI0C_CAM_REAR_DATA_P<1> AL30 MIPI0C_DPDATA1
ISP0_FLASH AL17 NC_ISP0_FLASH
45 20 MIPI0C_CAM_REAR_DATA_N<1> AL31 MIPI0C_DNDATA1
IN AL13 NC_ISP0_PRE_FLASH
DP_HPD E27 NC_DP_HPD ISP0_PRE_FLASH
9 NC_MIPI0C_CAM_REAR_DATA_P<2> AJ30 MIPI0C_DPDATA2 SENSOR0_CLK AP19 44 ISP0_CAM_REAR_CLK_R 100 1 2 R0941 ISP0_CAM_REAR_CLK OUT 20 44
N26 DP_PAD_AVSSX
45 16 OUT IN 17 45
D23 DAC_AVSS18A
D22 DAC_AVSS18D
P26 DP_PAD_DVSS
MIPI_VSS
MIPI1D_DNDATA1 AJ29 NC_MIPI1D_AP_DATA_N<1> 9
AH17
AH18
AH19
AH20
AH21
AH22
AH23
A SYNC_MASTER=MLB SYNC_DATE=05/04/2012 A
PAGE TITLE
AP: TV/DP/MIPI/CAMERA
DRAWING NUMBER SIZE
D 1%
2.21K
1/32W
MF
0.01UF
10%
6.3V
2 X5R
NET_SPACING_TYPE=VREF
MAX_NECK_LENGTH=3 MM
OMIT
39 =PP1V2_VDDIOD_H4
CRITICAL
G7
G9
U0652
H4A
K7
K9 D
01005 L12 DDR0_VDDQ_CKE B21 C1034 1 G11 K10
2 01005 C1035 1 BGA
T10 DDR1_VDDQ_CKE
<1MA
U0652 B22 4.7UF
20% 0.01UF G13 K11
<1MA
H4A 6.3V
X5R-CERM1 2
10%
6.3V G15 POP-512MB-DDR K13
44 7 PPVREF_DDR0_CA AP15 DDR0_VREF_CA BGA B23 402 X5R 2 (9 OF 12)
01005 H6 K15
44 7 PPVREF_DDR1_CA
Y31 DDR1_VREF_CA B26
POP-512MB-DDR H8 K17
B19 DDR0_VREF_DQ (7 OF 12) B30 H10 K19
44 7 PPVREF_DDR1_DQ
R1001 44 7 PPVREF_DDR0_DQ Y2 DDR1_VREF_DQ B31 H12 K21
39 7 =PP1V2_VDDQ_H4 240 H14 K23
1 2 DDR0_ZQ AP10 DDR0_ZQ C3
1% 1/20W MF 201 H16 K24
1 1 2 DDR1_ZQ AD31 DDR1_ZQ C4
R1053 1% 1/20W MF 201 CRITICAL CRITICAL CRITICAL J7 K27
C1039 1 C1040 C1041 1
1.00K 240 P30 C5 1 J8 K28
1% (DDR IMPEDANCE CONTROL) 0.22UF 0.22UF 0.22UF
1/32W R1000 Y30 C6 20% 20% 20% J9 K29
MF 6.3V 6.3V 6.3V
2 01005 AC30 C7 X5R 2 X5R 2 X5R 2 J10 K30
0201 0201 0201
AN12 VDDCA 80MA C8 J11 L1
AN16 C9 J12 L3
PPVREF_DDR0_DQ 7 44 AN21 C10 J13 L5
NOSTUFF VOLTAGE=0.6V 39 7 =PP1V2_S2R_H4 J14 L6
1 1 CRITICAL CRITICAL CRITICAL CRITICAL C11 CRITICAL CRITICAL CRITICAL
R1054 C1054 MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.3MM 1 1 1 1 1 J15 L10
1.00K 0.01UF NET_SPACING_TYPE=VREF C1004 C1005 C1006 C1007 C12 C1036 1 C1037 1 C1038
1% 10% MAX_NECK_LENGTH=3 MM 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF J16 L14
1/32W 6.3V
2 X5R 20% 20% 20% 20% A18 C13 20% 20% 20%
MF 6.3V 6.3V 6.3V 6.3V 2 6.3V 6.3V 6.3V K6 500MA L16
01005 X5R 2 X5R 2 X5R 2 X5R A19 C14 X5R 2 X5R 2 X5R 2
2 01005 0201 0201 0201 0201 0201 0201 0201 K8 VDDIOD L18
A28 C15 (VDDQ = VDDIOD)
L7 (DON’T DOUBLE COUNT)
L20
C2 C16
L8 L22
L30 C17
M6 L26
CRITICAL W1 C18
1
M8 L27
C1009 Y1 C19
C 4.7UF
20%
6.3V
AA30
VDD2 320MA (DRAM CORE) C20
N7
N8
L28
L29
C
X5R-CERM1 2 AD30 C21
402 P6 L31
39 7
=PP1V2_S2R_H4 AJ1 C22
P8 M4
AN14 C25
R7 M5
1 AN23
R1051 C28 R8 M7
2.21K AP9
1% D1 T6 VSS M9
1/32W D2 T8 M11
MF
2 01005 39 =PP1V8_S2R_H4 A20 D3 U7 M13
CRITICAL CRITICAL B28 VSS D4 U8 M15
C1015 1 C1019 1 C1 D5 V6 M17
PPVREF_DDR1_CA 7 44 4.7UF 0.22UF M30 D6 V8 M19
20% 20%
1 NOSTUFF VOLTAGE=0.6V 6.3V 6.3V AA2 20MA D7 W7 M21
R1052 1 C1052 MIN_NECK_WIDTH=0.2MM X5R-CERM1 2 X5R 2 VDD1 (DRAM CORE - CHARGE PUMP)
MIN_LINE_WIDTH=0.3MM 402 0201 AE29 D8 W8 M23
2.21K 0.01UF NET_SPACING_TYPE=VREF
1% 10% MAX_NECK_LENGTH=3 MM AJ2 D9 Y6 M29
1/32W 6.3V
MF 2 X5R
01005 AN10 Y8 N4
2 01005 D10
AN24 AA7 N5
D11
AA8 N6
D12
N10
B4 D13
N12
B7 D14
N14
39 7 =PP1V2_VDDQ_H4 B10 D15
N16
B14 D24
N18
1 B18 D27
R1055 N20
1.00K B20 D30
1%
N22
1/32W B24 E1
MF 39 7 =PP1V2_VDDQ_H4 N29
B27 E3
B 2 01005 CRITICAL
C1024 1
C1026 1
C30
E2
E4
E5 =PP1V8_VDDIO18_H4
N30
P1
B
4.7UF 0.01UF 39
20% F30 E6 P3
PPVREF_DDR1_DQ 7 44 6.3V 10%
6.3V VDDQ CRITICAL CRITICAL
X5R-CERM1 2 X5R 2 J30 500MA E7 C1042 1 1 AB9 P4
1 NOSTUFF VOLTAGE=0.6V 402 01005 C1043
R1056 1 C1056 MIN_NECK_WIDTH=0.2MM K2 E8 4.7UF 0.22UF AC9 P5
MIN_LINE_WIDTH=0.3MM 20%
1.00K 0.01UF NET_SPACING_TYPE=VREF M2 E9 6.3V 20%
6.3V AD9 P7
1% 10% MAX_NECK_LENGTH=3 MM X5R-CERM1 2 X5R 2
1/32W 6.3V R2 E10 402 0201 AE16 P9
MF 2 X5R 75MA
01005
2 01005 W2 E11 AE15 GPIO
P11
AE2 E12 AE14 EHCI (UNUSED)
UART[1-3] (1-2 UNUSED)
P13
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL AH2 E13 AE13 VDDIO18_GRP1 I2C[0-1]
P15
ISP[0-1]
C1027 1 C1028 1 C1029 1 C1030 1 C1031 1 C1032 1
AL2 E14 AE12 DWI
P17
0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF SENSOR[0-1]
20% 20% 20% 20% 20% 20% AN4 E15 AE11 ISP FLASH (UNUSED)
I2S[0-3] (1 UNUSED)
P19
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
X5R 2 X5R 2 X5R 2 X5R 2 X5R 2 X5R 2 AN7 E24 AE10 SPI[0-2] (0,2 UNUSED) P21
0201 0201 0201 0201 0201 0201
E28 AE9 P23
E30 H20 VDDIO18_GRP2 11MA - VSEL30_X,CFSB,TEST
P29
E31 H19 VDDIO18_GRP3 2MA - XI/0
P31
F1 R4
F3 R5
R6
A SYNC_MASTER=N/A SYNC_DATE=04/18/2011 A
PAGE TITLE
AP: PWR
DRAWING NUMBER SIZE
39 =PPVDD_SOC_H4
OMIT OMIT
R10 AB13 OMIT
R12
U0652 AB15 L9 F4
=PPVDD_CPU_H4
R14 H4A AB17
K14
U0652
Y12 39
CRITICAL CRITICAL CRITICAL L11 U0652 F5
BGA K16 Y14 C1131 1 C1132 1 C1133 1
R16 AB19
K18 H4A Y16 4.7UF 4.7UF 4.7UF
L13 H4A F6
R18 POP-512MB-DDR AB21 BGA 20% 20% 20% L15 F7
K20 Y18 6.3V 6.3V 6.3V BGA
R20 (11 OF 12) AB23 X5R-CERM1 2 X5R-CERM1 2 X5R-CERM1 2 M10 POP-512MB-DDR F8
K22 POP-512MB-DDR Y20 402 402 402
(8 OF 12)
D
R22
R24
AB27
AC2
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
L17
L19
(10 OF 12) Y22
AA9
M12
M14
F9
F10 D
R28 AC3 C1104 1 C1105 1 C1106 1 C1107 1 C1108 1 C1109 1 M16 F11
L21 AA11
R29 AC5 4.7UF 4.7UF 10UF 4.7UF 4.7UF 4.7UF N9 F12
20% 20% 20% 20% 20% 20% L23 AA13
R30 AC6 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V CRITICAL CRITICAL N11 F13
X5R-CERM1 2 X5R-CERM1 2 X5R 2 X5R-CERM1 2 X5R-CERM1 2 X5R-CERM1 2 M18 AA15 C1134 1 C1135 1
T4 AC7 402 402 603 402 402 402 N13 F14
T5 AC8
M20 AA17 4.7UF 4.7UF N15 F15
20% 20%
M22 AA19 6.3V 6.3V
T7 AC10 X5R-CERM1 2 X5R-CERM1 2 P10 F16
N17 AA21 402 402
T11 AC12 P12 F17
N19 AA23 2.4A
T13 AC14 P14 F18
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL N21 AB10 VDD_CPU A9 CORES
T15 AC16 1 1 1 1 1
P16 L2 CACHE
F21
C1110 1 C1111 C1112 C1113 C1114 C1115 N23 AB12 BIU
T17 AC18 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 4.2A R9 F23
20% 20% 20% 20% 20% 20%
P18 AB14
T19 AC20 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 GRAPHICS CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL R11 F24
X5R X5R X5R X5R X5R X5R P20 LOWPERF AB16 1 1 1 1 1
T21 AC22 0201 0201 0201 0201 0201 0201 APPLE MC C1136 1 C1137 C1138 C1139 C1140 C1141 R13 F25
P22 HPERF NRT
AB18 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF
T23 AC29 HPERF RT 20% 20% 20% 20% 20% 20% R15 F26
R17 CDIO
AB20 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
T28 AC31 DISP_OUT X5R 2 X5R 2 X5R 2 X5R 2 X5R 2 X5R 2 T12 F28
R19 VDD AUDIO COMPLEX VDD AB22 0201 0201 0201 0201 0201 0201
G19 AD1 AUDIENCE DSP
T14 F29
R21 USB
AC11
T30 AD2 PMGR T16 G5
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL R23 AC13
U3 AD4 1 1 1 1 1
U9 G6
C1116 1 C1117 C1118 C1119 C1120 C1121 T18 AC15
U4 AD6 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF U11 G8
20% 20% 20% 20% 20% 20%
T20 AC17
U5 AD7 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 CRITICAL CRITICAL CRITICAL U13 G10
X5R X5R X5R X5R X5R X5R T22 AC19 1 1 1
U6 AD8 0201 0201 0201 0201 0201 0201 C1142 C1143 C1144 U15 G12
T24 AC21 0.22UF 0.22UF 0.22UF
U10 AD11 20% 20% 20% V10 G14
U17 AC23 6.3V 6.3V 6.3V
U12 AD13 X5R 2 X5R 2 X5R 2 V12 G16
U19 AD10 0201 0201 0201
U14 AD15 V14 G18
U21 AD12
U16 AD17 V16 AL3
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL U23 AD14
U18 AD19 1 1 1 1 1
G22
C1122 C1123 C1124 C1125 C1126 C1127 V18 AD16
C U20
U22
AD21
AD23
0.22UF
20%
6.3V 2
1
0.22UF
20%
6.3V 2
0.22UF
20%
6.3V 2
0.22UF
20%
6.3V 2
0.22UF
20%
6.3V 2
0.22UF
20%
6.3V 2
V20 AD18
VSS
AN11
G24
C
X5R X5R X5R X5R X5R X5R V22 AD20 1 1
U24 AD27 0201 0201 0201 0201 0201 0201 C1145 C1146 G25
W9 AD22 0.01UF 0.01UF
U28 AE3 10% 10% G26
W11 AE17 6.3V 6.3V
H17 AE6 X5R 2 X5R 2 G27
W13 AE19 01005 01005
U30 AE7 G28
W15 AE21
J17 AE8 G29
W17 AE23
V1 AE18 1 1 1
G30
C1128 C1129 C1130 W19 AF18
V4 AE20 0.01UF 0.01UF 0.01UF H3
10% 10% 10%
W21 AF20
V5 VSS VSS AE22 6.3V 2 6.3V 2 6.3V 2 H5
X5R X5R X5R W23 AF22
V7 AF3 01005 01005 01005 H7
Y10
V9 J22 H9
V11 AF6 H11
V13 AF7 H13
V15 AF8 H15
V17 AF9 H18
V19 AF10 AN19
V21 AF11
OMIT =PP3V3_USB_H4 U25 VDDIO30_USB11_DM 5MA AP20
V23 AF12 39 3
UNUSED H22
V28 AF13 AJ3 AL9 C1147 1
V29 AF14 AJ4 U0652 AL11 0.01UF
F19
B W16
W18
AF23
AF24
AJ10
AJ11
AL23
AL24
C1148
0.01UF
10%
1 AA24
AB24
H30
H31 B
W20 AF27 AJ12 AL25 6.3V 2 AC24 J4
X5R
W22 AF29 AJ13 AL26 01005 AD24 VDDIOD2 35MA (NAND) J5
W24 AG1 AJ14 AL27 AE24 J6
Y3 AG4 AJ15 AM5 39 5 =PP1V8_NAND_H4 Y24 J19
Y5 AG6 AJ16 AM8 CRITICAL J25 J20
C1149 1 VDDIOD3
Y7 AG7 AJ20 V30 K25 VDDIOD3 F20
4.7UF 35MA
Y9 AG8 AK4 AM14 20%
6.3V G17
Y11 AG9 K1 AM17 X5R-CERM1 2 I2C2
402 UART0
Y13 AG10 AK6 V31 UART5_RTXD J24
DP_HPD
Y15 AG11 AK7 AM23 TST_CLKOUT J26
VSS VSS TST_STPCLK
Y17 AG12 AK8 AM24 WDOG
JTAG J27
Y19 AG13 AK9 AM25 39 =PP1V8_VDDIOD3_H4 J28
Y21 AG14 AK10 AM26 CRITICAL
C1151 1
Y23 AG15 AK11 AM27 J29
4.7UF
Y27 AG16 AK12 AM28 20% K5
6.3V
AA1 AG24 AK13 AM29 X5R-CERM1 2
402
AA4 AG25 AK14 AN1
AA5 AG29 AK15 AN2
AA6 AH6 AK16 AN9
AA10 AH7 AK17 AN15
AA12 AH8 AK18 AN30
AA14 AH9 AK19 AN31
AA16 AH10 AK20 AP1
AA18 AH11 AK21 AP2
A AA20
AA22
AH12
AH13
AK22
AK23
AP3
AP6 SYNC_MASTER=N/A SYNC_DATE=04/18/2011 A
PAGE TITLE
AB2 AH14 T31 AP12
AB6 AH15 AL5 AP16 AP: PWR
AB7 AH16 AL6 AP22 DRAWING NUMBER SIZE
AB8 AH26 AL7 AP24 Apple Inc. 051-9374 D
AB11 AH29 AL8 AP30 REVISION
AP31
R
13.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
11 OF 102
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 8 OF 46
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
BOOT CONFIG ID NOTE: PADS USED FOR DEBUG
=PP1V8_H4
39 9 6 4 3
FMI_4CS_TEST FMI_4CS_NOTEST
JTAG
1 1 1 1 =PP1V8_S2R_MISC
R1200 R1201 R1202 R1203 39 10 4
SHORT-01005
BOARD ID XW0602 1 2 SOC_FAST_SCAN_CLK 3
C 39 9 6 4 3 =PP1V8_H4
BOARD_ID_P106_P107 BOARD_ID_P105_P107 BOARD_ID_DEV XW0603
SHORT-01005
1 2 SOC_HOLD_RESET 3
C
1 1 1 1
R1213 R1204 R1205 R1206
2.2K 2.2K 2.2K 2.2K
5% 5% 5% 5%
1/32W 1/32W 1/32W 1/32W
MF MF MF MF
2 01005 2 01005 2 01005 2 01005
BOARD_ID[3] 4 GPIO_BOARD_ID3
ID[3-0] SYSTEM
NC_FMI0_RE_POS FMI0_RE_P 11
MAKE_BASE=TRUE
1010 P105 AP S/W READ FLOW
1011 P105 DEV NC_FMI1_DQS_NEG FMI1_DQS_N
1. SET GPIO AS INPUT 11
MAKE_BASE=TRUE
1100 P106 AP 2. DISABLE PU AND ENABLE PD
X123A 1101 P106 DEV
NC_FMI1_RE_POS FMI1_RE_P 11
3. READ MAKE_BASE=TRUE
1110 P107 AP
X123B 1111 P107 DEV NC_PMU_SHDWN PMU_SHDWN 42
MAKE_BASE=TRUE
NC_JTAG_SOC_TDO JTAG_SOC_TDO 3 44
4 GPIO_BOARD_REV2
4 GPIO_BOARD_REV1
GPIO_BOARD_REV0 NC_AP_MIPI0C_DPDATA2 NC_MIPI0C_CAM_REAR_DATA_P<2> 6
4
NC_AP_MIPI0C_DNDATA2 MAKE_BASE=TRUE NC_MIPI0C_CAM_REAR_DATA_N<2> 6
NOSTUFF NOSTUFF
B 1
R1207
2.2K
1
R1208
2.2K
1
R1209
2.2K
NC_AP_MIPI0C_DPDATA3
MAKE_BASE=TRUE
NC_MIPI0C_CAM_REAR_DATA_P<3> 6 B
NC_AP_MIPI0C_DNDATA3 MAKE_BASE=TRUE NC_MIPI0C_CAM_REAR_DATA_N<3> 6
5% 5% 5%
1/32W 1/32W 1/32W MAKE_BASE=TRUE
MF MF MF
2 01005 2 01005 2 01005
NC_AP_MIPI1D_DPCLK NC_MIPI1D_AP_CLK_P
6
NC_AP_MIPI1D_DNCLK MAKE_BASE=TRUE NC_MIPI1D_AP_CLK_N
6
MAKE_BASE=TRUE
NC_AP_MIPI1D_DPDATA0 NC_MIPI1D_AP_DATA_P<0>
6
NC_AP_MIPI1D_DNDATA0 MAKE_BASE=TRUE NC_MIPI1D_AP_DATA_N<0>
6
MAKE_BASE=TRUE
NC_AP_MIPI1D_DPDATA1 NC_MIPI1D_AP_DATA_P<1>
6
BRD_REV[2-0] S/W READ FLOW NC_AP_MIPI1D_DNDATA1 MAKE_BASE=TRUE NC_MIPI1D_AP_DATA_N<1>
6
MAKE_BASE=TRUE
1. SET GPIO AS INPUT
000 PROTO 0
2. ENABLE PU AND DISABLE PD NC_AP_MIPI1C_DPDATA1 NC_MIPI1C_CAM_FRONT_DATA_P<1> 6
001 PROTO 1
3. READ NC_AP_MIPI1C_DNDATA1 MAKE_BASE=TRUE NC_MIPI1C_CAM_FRONT_DATA_N<1> 6
010 PROTO 2
MAKE_BASE=TRUE
011 EVT
100 DVT NC_AP_USB11_DPD NC_USB_FS_D_P
3
NC_AP_USB11_DND MAKE_BASE=TRUE NC_USB_FS_D_N
3
MAKE_BASE=TRUE
A SYNC_MASTER=N/A SYNC_DATE=04/11/2011 A
PAGE TITLE
TABLE_ALT_HEAD
D 39
=PPVCC_MAIN_ACC_SW
CRITICAL
D
1 C1350
0.1UF
TRISTAR 10%
6.3V
2 X5R
201
39 =PP3V0_S2R_TRISTAR 39 9 4
=PP1V8_S2R_MISC
CRITICAL CRITICAL
1 C1320 1 C1300 1 C1360
8.2PF 0.1UF 1.0UF R1321
1
A1
+/-0.5PF 20% 20%
16V
2 NP0-C0G-CERM 2 6.3V 2 10V 100K CRITICAL
X5R-CERM X5R-CERM
01005 01005 0201-1 1%
1/32W VCC
MF
2 01005 U1350
LM34904
USMD
39 10 =PP1V8_S2R_TRISTAR 10 PP3V3_ACC_FET A2 ACC_PWR ENABLE B2 GPIO_ACC_SW_EN 4
IN
CRITICAL CRITICAL
1 C1321 1 C1301 1 C1302 1 C1322
8.2PF 0.1UF 4.7UF 8.2PF 10 4 OUT GPIO_ACC_SW_POK_L C1 POK* ACC_DET* C2 TS_CON_DET_L IN 10 38
VDD_1V8 F3
VDD_3V0 F4
ACC_PWR D5
+/-0.5PF 20% CRITICAL 10% +/-0.5PF GND
16V
2 NP0-C0G-CERM 2 6.3V 25V
2 X5R-CERM 2 16V
X5R-CERM NP0-C0G-CERM
B1
01005 01005 0603 01005
R1320
1
1.00M
PPVBUS_PROT 38 1%
OMIT 1/32W
MF
CRITICAL 2 01005
U1300 1 C1361
LAYOUT NOTE:
THS7383IYKAR 1UF
10% ADD THERMAL GND VIAS TO U1350
C3 WCSP 2 25V
45 14 MIKEY_TS_P DIG_DP P_IN F6 X5R
C4 402
45 14 MIKEY_TS_N DIG_DN ACC1 C5 TS_ACC1 38
A1 ACC2 E5 TS_ACC2 38
C TO USB BB MUX
44 21
44 21
USB_BB_D_P
USB_BB_D_N B1
USB1_DP
USB1_DN DP1 A2 TS_E75_DPAIR1_P 38 44
NOSTUFF C
USB_BRICKID C2
BRICK_ID
DN1 B2 TS_E75_DPAIR1_N 38 44 R1350
42
1
0.00 2
A3 DP2 A4 TS_E75_DPAIR2_P 38 44
AP USB 44 3 SOC_USB_D_P USB0_DP 1%
B3 DN2 B4 TS_E75_DPAIR2_N 38 44 1/20W
44 3 SOC_USB_D_N USB0_DN MF
0201
E2 CON_DET_L E3 TS_CON_DET_L 10 38
ACCESSORY UART 44 4 UART2_ACC_TXD UART0_TX
E1
44 4 UART2_ACC_RXD UART0_RX OVP_SW_EN* D6 OVP_SW_EN_L OUT 38
Q1301 CRITICAL
44 4 UART0_DEBUG_TXD F2 UART1_TX SWITCH_EN E4 RST_SYSTEM_L IN 3 21 42
CSD68803W15
AP DEBUG UART F1 BGA
44 4 UART0_DEBUG_RXD UART1_RX HOST_RESET B6 TS_HOST_RESET OUT 10
D2 D3 =PP3V3_ACC
S
PP3V3_ACC_FET
D
BB DEBUG UART 44 21 4 UART4_BB_RXD UART2_TX SDA I2C0_SDA 4 15 42 44 39 C3 10
(T’S OFF TO H4A UART4) UART4_BB_TXD D1 UART2_RX SCL D4 I2C0_SCL
C1
VOLTAGE=3.3V
44 21 4 4 15 42 44 C2
B2
INT C6 PMU_GPIO_TRISTAR_IRQ MIN_LINE_WIDTH=0.6MM
44 3 JTAG_SOC_TCK A5 JTAG_CLK
OUT 4 42
B1 B3 MIN_NECK_WIDTH=0.2MM
BYPASS E6 TRISTAR_ADD0
JTAG_SOC_TMS B5 JTAG_DIO A2 A3 NET_SPACING_TYPE=PWR
44 3
VOLTAGE=3V MAX_NECK_LENGTH=3 MM
G
DVSS
DVSS
DVSS
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.1MM CRITICAL
NET_SPACING_TYPE=PWR
A1
CRITICAL
MAX_NECK_LENGTH=0.5MM R1322
1
220K
F5
C1
A6
1 C1303 5%
1.0UF 1/32W
20% TRISTAR BYPASS FOR 3V LDO MF
2 10V 2 01005
X5R-CERM
0201-1
GPIO_ACC_SW_POK
3
B R1370
0.00 2 D CRITICAL
B
L81_MBUS_REF 1
14 OUT
0%
Q1300
1/32W 10 4 GPIO_ACC_SW_POK_L 1 G DMN26D0UFB4
MF S DFN
01005
1 SYM_VER_1
C1362
470PF
10% 2
10V
2 X5R
01005
CRITICAL
6
74LVC1G32
A 3 IN SOC_WDOG 2
U1310
SOT891
4 PMU_RESET_IN OUT 42 SYNC_MASTER=N/A SYNC_DATE=N/A A
10 TS_HOST_RESET 1 PAGE TITLE
IN NC
5 3 E75 SUPPORT
DRAWING NUMBER SIZE
1
R1310 1
R1311 NC_U1310_5
Apple Inc. 051-9374 D
220K 220K REVISION
5% 5%
1/32W
MF
1/32W
MF
R
13.0.0
2 01005 2 01005 NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
13 OF 102
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 10 OF 46
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
FLASH CONFIGURATIONS
TABLE_5_HEAD
TABLE_5_ITEM
PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: 335S0890 1 TOSHIBA 19NM PPN1.5 8GB U1400 8GB
PART NUMBER
TABLE_5_ITEM
TABLE_ALT_ITEM
335S0889 335S0890 8GB U1400 HYNIX 20NM PPN1.5 8GB 335S0878 1 TOSHIBA 19NM PPN1.5 16GB U1400 16GB
TABLE_5_ITEM
TABLE_ALT_ITEM
335S0871 335S0878 16GB U1400 HYNIX 20NM PPN1.5 16GB 335S0879 1 TOSHIBA 19NM PPN1.5 32GB U1400 32GB
TABLE_5_ITEM
TABLE_ALT_ITEM
335S0872 335S0879 32GB U1400 HYNIX 20NM PPN1.5 32GB 335S0880 1 TOSHIBA 19NM PPN1.5 64GB U1400 64GB
TABLE_ALT_ITEM
39 =PP3V3_NAND
CRITICAL CRITICAL CRITICAL
1 C1400 1 C1401 1 C1402 1 C1404
1 C1490 1 C1491 1 C1405 1 C1406 =PP1V8_NAND 11 39
27PF 27PF 0.22UF 0.22UF 10UF 10UF 10UF 0.1UF
5% 5% 20% 20% 20% 20% 20% 20% CRITICAL CRITICAL CRITICAL CRITICAL
16V 16V 6.3V 6.3V 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
X5R-CERM 1 1 1 C1412 1 C1413
2 NP0-C0G 2 NP0-C0G 2 X5R 2 X5R
0402-2 0402-2 0402-2 01005 C1410 C1411 1 C1414 1 C1493 1 C1494
01005 01005 0201 0201 0.1UF 10UF 10UF 0.22UF 0.22UF
20% 20% 20% 20% 20% 27PF 27PF
6.3V 6.3V 5% 5%
2 6.3V 2 6.3V 2 CERM-X5R 2 X5R 6.3V
X5R-CERM CERM-X5R
0402-2 0201
2 X5R 2 16V
NP0-C0G
16V
2 NP0-C0G
01005 0402-1 0201 01005 01005
PPVDDI_NAND_U1400
VOLTAGE=1.2V
CRITICAL CRITICAL MIN_LINE_WIDTH=0.2MM
1 1 1 MIN_NECK_WIDTH=0.1MM
C1492 C1451 C1450 NET_SPACING_TYPE=PWR
27PF 1UF 1UF MAX_NECK_LENGTH=3MM
5% 20% 20%
16V 6.3V 6.3V
C
2 NP0-C0G
01005
2 X5R
0201
2 X5R
0201 C
OB8
OC8
OD8
OE0
OF8
OA8
B6
F2
M6
N1
N7
G0
VDDI
VCC VCCQ
CRITICAL R1455
44 5 FMI0_AD<0> G3 IO0-0 OMIT 1
BI A5 FMI0_CE0_L
44 5 BI FMI0_AD<1> H2 IO1-0 U1400 CE0*
CLE0 A3 FMI0_CLE
IN 5 44
100K
1%
44 5 BI FMI0_AD<2> J3 IO2-0 LGA-12X17 IN 5 44
1/32W
ALE0 C1 FMI0_ALE IN 5 44 MF
FMI0_AD<3> K2 IO3-0 2 01005
XXNM-XGBX8-MLC-PPN1.5-ODP
44 5 BI
WE0* E3 FMI0_WE_L IN 5 44
44 5 FMI0_AD<4> L5 IO4-0
BI
44 5 BI FMI0_AD<5> K6 IO5-0
J5 RE0 B4 FMI0_RE_P 9
44 5 BI FMI0_AD<6> IO6-0
H6 RE0* C7 FMI0_RE_N IN 5 44
44 5 BI FMI0_AD<7> IO7-0
G1 DQS0 H4 FMI0_DQS_P IN 5 44
44 5 BI FMI1_AD<0> IO0-1
J1 DQS0* F4 FMI0_DQS_N 9
44 5 BI FMI1_AD<1> IO1-1
44 5 BI FMI1_AD<2> L1 IO2-1
N3 R/B0* E5 NAND_RDYBSY_L
44 5 BI FMI1_AD<3> IO3-1
44 5 BI FMI1_AD<4> N5 IO4-1
CE1* C5 FMI1_CE0_L IN 5 44
44 5 BI FMI1_AD<5> L7 IO5-1
CLE1 C3 FMI1_CLE IN 5 44
44 5 BI FMI1_AD<6> J7 IO6-1
ALE1 D2 FMI1_ALE IN 5 44
44 5 BI FMI1_AD<7> G7 IO7-1
WE1* E1 FMI1_WE_L IN 5 44 =PP1V8_NAND 11 39
RE1 D4 FMI1_RE_P 9
RE1* D6 FMI1_RE_N IN 5 44
1
R1460 1 C1460
DQS1 M4
B DQS1* K4
FMI1_DQS_P
FMI1_DQS_N 9
IN 5 44
1%
50K
1/32W
MF
0.01UF
10%
6.3V
2 X5R
B
R/B1* E7 2 01005 01005
VREF G5 VREF_NAND_U1400
A7
M2
OC0
OD0
OE8
OF0
G8
50K 0.01UF
1% 1% 10%
1/20W 1/32W 6.3V
2 X5R
MF MF
01005
2 201 2 01005
A SYNC_MASTER=MLB SYNC_DATE=05/04/2012 A
PAGE TITLE
NAND STORAGE
DRAWING NUMBER SIZE
TOUCH SUBSYSTEM
L1700
240OHM-350MA
=PP5V25_GRAPE 1 2
PP5V25_GRAPE_FILT
39 12 12
D
0201
1 C1700 1 C1701 1 C1702
VOLTAGE=5.25V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
NET_SPACING_TYPE=PWR
D
27PF 1UF 1000PF MAX_NECK_LENGTH=3 MM
5% 10% 10%
2 16V
NP0-C0G 2 10V
X5R 2 16V
X7R
01005 402 201
CRITICAL
J1700
503304-2010
F-ST-SM-1
22
R1752 21
0.00
0%
=PP1V8_S2R_GRAPE 1/32W
39 MF PP3V0_S2R_HALL_FILT 2 1 GPIO_BTN_HOME_FILT_L
01005 12 12
CRITICAL DISPLAY_SYNC DISPLAY_SYNC_R 4 3
=PPVCC_MAIN_GRAPE 1 1 2
39
C1752 6
1
2 X5R
1 C1750 0201 0.00 44 4 SPI1_GRAPE_MOSI 10 9 PMU_GPIO_HALL_IRQ_2 42
0.1UF VDD 0% SPI1_GRAPE_CS_L 12 11 PMU_GPIO_HALL_IRQ_1 42
10% NOSTUFF 44 4
2 16V
X5R-CERM
U1700 1/32W
MF 1 C1761 44 4 AP_CLK_32K_CUMULUS 14 13
0201 SLG5AP302 01005
NOSTUFF TDFN
27PF 4 GPIO_GRAPE_IRQ_L 16 15
VCC_MAIN_GRAPE_RAMP 7 CAP 5%
R1750 D 3 16V
2 NP0-C0G 4 GPIO_GRAPE_RST_L 18 17 PP5V25_GRAPE_FILT 12
CRITICAL VOLTAGE=1.8V
C
1%
1/20W
MF
1
R1751 1
CRITICAL
C1751
GND 1 C1753 MIN_LINE_WIDTH=0.30 MM
MIN_NECK_WIDTH=0.20 MM
23 C
8
201 10UF
100K 4700PF 20% NET_SPACING_TYPE=PWR 24
1% 10% 2 10V MAX_NECK_LENGTH=3 MM
1/32W 10V X5R-CERM
R1780 MF 2 X7R
201
0402-2
=PP1V8_GRAPE 1
0.00 2 2 01005
39 12
0%
1/32W
MF
01005 LAYOUT NOTE:
PUT THERMAL VIAS AROUND U2200 IN CASE OF SHORTED CONDITION
L1760 R1790
GPIO_BTN_HOME_L 1 2 GPIO_BTN_HOME_R_L 1
1.00K2 GPIO_BTN_HOME_FILT_L
42 4 12
01005 1%
150OHM-25%-200MA-0.7DCR 1/32W
MF
1 C1760 01005
27PF
5%
16V
2 NP0-C0G
01005
L1701
240OHM-350MA
1 2
0201
NOSTUFF
L1750
240-OHM-0.2A-0.8-OHM
=PP1V8_GRAPE
B 39 12
1
0201
2
PP1V8_GRAPE_FILT 12 B
VOLTAGE=1.8V
1 C1703 1 C1704 1 C1705 MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
27PF 1UF 1000PF NET_SPACING_TYPE=PWR
5% 20% 10% MAX_NECK_LENGTH=3 MM
16V
2 NP0-C0G
6.3V
2 X5R
16V
2 X7R
01005 0201 201
L1702
240-OHM-0.2A-0.8-OHM
=PP3V0_S2R_HALL 1 2 PP3V0_S2R_HALL_FILT
39 12
0201
VOLTAGE=3.0V
1 C1706 1 C1707 1 C1708 MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
27PF 1UF 1000PF NET_SPACING_TYPE=PWR
5% 20% 10% MAX_NECK_LENGTH=3 MM
2 16V 6.3V 2 16V
A NP0-C0G
01005
2 X5R
0201
X7R
201 SYNC_MASTER=N/A SYNC_DATE=06/21/2010 A
PAGE TITLE
D D
R1850
0.00 2
45 14 DMIC1_FF_SCLK 1 45 DMIC1_FF_SCLK_CONN
0%
1/32W
MF NOSTUFF
01005
1 C1850 P/N 510S0760 - MLB
27PF (P/N 510S0761 - FLEX)
5%
2 16V
NP0-C0G
01005 CRITICAL
J1800
AA07-S016VA1
F-ST-SM-COMBO
18
17
B B
A SYNC_MASTER=N/A SYNC_DATE=03/31/2011 A
PAGE TITLE
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
39 15 =PPVCC_MAIN_AUDIO
CRITICAL
C1904 1 1 C1909
39 14 =PP1V8_AUDIO NOTE:
0.1UF 4.7UF
1 1 10% 20%
C1902 C1915 10V 10V U1900 DECAPS CHANGED ON 5/24/12 PER RADAR #11485846 MIKEY BUS FILTER
0.1UF 0.1UF X5R-CERM 2 2 X5R-CERM
0201 0402
20% 20%
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
01005 01005
VOLTAGE=4.2V SIGNAL_MODEL=EMPTY
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.15MM R1951
1 C1930
PPVCC_VPROG_CP 1.00 2 100PF
VOLTAGE=1.7V 1 5%
MIN_LINE_WIDTH=0.3MM PLACE R1930 & R1931 CLOSE TO U3600 25V
2 NP0-CERM
D 1
R1950
1.00 2
MIN_NECK_WIDTH=0.15MM
PP1V7_VCP
1 C1914
0.1UF
1%
1/20W
201
MF 1
R1930
12
0201
D
1 2
MF 1% 201 10%
10V R1953
1/20W CRITICAL CRITICAL 2 X5R-CERM 0 5% NOSTUFF
39 15 =PP1V7_VA_VCP 1 C1950 1 C1951 0201 5% 1/20W 1 C1931
4.7UF 1.0UF 1/20W 45 14 L81_MBUS_P MF MIKEY_TS_P BI 10 45
20% 20% MF
L81_MBUS_N 201 100PF MIKEY_TS_N
CRITICAL CRITICAL 6.3V 6.3V 2 201 45 14 5% BI 10 45
1 C1901 1 C1903 2 X5R
402
2 X5R
0201-MUR VOLTAGE=4.2V NOSTUFF R1931 25V
2 NP0-CERM
4.7UF 1.0UF MIN_LINE_WIDTH=0.3MM 12 0201
20%
6.3V
20%
6.3V
14 GND_AUDIO_CODEC MIN_NECK_WIDTH=0.15MM R1952 R1954 1 2
2 X5R 2 X5R PPVCC_VPROG_MB_F 1
255K 2 PPVCC_VPROG_MB 1
0 2 =PP3V0_SPARE1 39 5%
402 0201-MUR 1/20W SIGNAL_MODEL=EMPTY
GND_AUDIO_CODEC MF
14
1 C1913
1%
1/20W
VOLTAGE=4.2V
MIN_LINE_WIDTH=0.3MM
5%
1/20W 201 1 C1932
C1905 0.1UF 201
MF
MIN_NECK_WIDTH=0.15MM MF
201
100PF
10% 5%
4.7UF 10V 2 25V
NP0-CERM
2 1 L81_FLYP 2 X5R-CERM
0201 0201
0.3MM
VPROG_CP G10
0.15MM
G1
VCP0 G8
VCP1 G9
A9
VL A8
VP0 E8
VP1 E9
VPROG_MB H1
6.3V 20%
402 X5R
L81_FLYC
VA
VD
0.3MM CRITICAL
0.15MM
C1906 C1907
4.7UF 4.7UF
2 1 L81_FLYN CRITICAL 1 2 GND_AUDIO_CODEC 14
0.3MM 0.15MM
6.3V 20% 0.15MM H10 FLYP +VCP_FILT H9
U1900 L81_PVCP 0.30MM 20% 6.3V
402 X5R J10 FLYC CS42L81-CWZR-A1 GNDCP J9 X5R 402 L1920
K10 WLCSP K9 R1920 240-OHM-0.2A-0.8-OHM
FLYN -VCP_FILT
L81_NVCP CRITICAL 3.3K 2
0.15MM CODEC_HP_DET 1 CODEC_HP_DET_R 1 2 CONN_HP_HEADSET_DET
SYM 1 OF 2 C1908 14
0201 IN 13
SPEAKER_VQ
GNDP
GNDD
GNDA
20%
NOSTUFF 6.3V
2 X5R 120-OHM-210MA
CRITICAL 402 1 2 CONN_HP_HS3_REF_FILT IN 13
C1918 1
MIN_LINE_WIDTH=0.15MM
B 01005
B
E10
A10
K2
J2
G2
2.2UF CODEC_HP_HS4_REF
MIN_NECK_WIDTH=0.1MM
10% 14
6.3V MIN_LINE_WIDTH=0.15MM
X5R 2 MIN_NECK_WIDTH=0.1MM L1905
402
NOSTUFF VOLTAGE=0V
0.15MM
120-OHM-210MA
GND_AUDIO_CODEC 14 XW1900 0.20MM 1 2
SHORT-8L-0.25MM-SM CONN_HP_HS4_REF_FILT IN 13
1 2 GND_AUDIO_CODEC14 01005 MIN_LINE_WIDTH=0.15MM
MIN_NECK_WIDTH=0.1MM
NOSTUFF
R1914 L81_MBUS_REF OUT 10 14
1
0 2
5%
1/20W
MIC1_BIAS_FILT 14
MF
201
GND0 C6 PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:
MAKE_BASE=TRUE 45 13 DMIC1_FF_SD R1912 1 2 22 45 L81_DMIC1_FF_SD B1 DMIC1_SD PART NUMBER
MIC4_BIAS_FILT IN D3
1 C1990 14 1/32W 5% MF 01005
B2 GND1
45 13 IN DMIC1_FF_SCLK R1913 1 2 22 45 L81_DMIC1_FF_SCLK DMIC1_SCLK D5
TABLE_ALT_ITEM
AIN4N 14
44 4
44 4
IN I2S2_CODEC_XSP_LRCK
I2S2_CODEC_XSP_DOUT
B5
A5
XSP_LRCK_FSYNC
XSP_SDIN_DAC2_MUTE
GND14
GND15
G6
G7
SYNC_MASTER=KAVITHA
PAGE TITLE
SYNC_DATE=01/18/2012 A
IN
44 4 IN I2S2_CODEC_XSP_DIN R1911
L81_MBUS_REF
1/32W 5%
1 2
MF
22
01005
44 I2S2_CODEC_XSP_SDOUT A4
K5
XSP_SDOUT
MBUS_REF
GND16
GND17
H5
H7
AUDIO: L81 CODEC
39 14 =PP1V8_AUDIO 14 10 IN DRAWING NUMBER SIZE
SPI2_CODEC_CS_L C5 J5
44 4 OUT
A6
CS* GND18
Apple Inc. 051-9374 D
NOSTUFF 44 4 OUT SPI2_CODEC_SCLK CCLK REVISION
1 B8
R1940 44 4 IN SPI2_CODEC_MOSI CDIN R
13.0.0
1.00K SPI2_CODEC_MISO A7 CDOUT
5% 44 4 OUT
TSTI0 C4 NOTICE OF PROPRIETARY PROPERTY: BRANCH
1/32W
MF
B9 TSTI1 C7 THE INFORMATION CONTAINED HEREIN IS THE 14 OF 46
2 01005 4 OUT GPIO_CODEC_IRQ_L INT* PROPRIETARY PROPERTY OF APPLE INC.
B10 TSTI2 D4 THE POSESSOR AGREES TO THE FOLLOWING: PAGE
42 OUT PMU_GPIO_CODEC_HS_IRQ_L WAKE* I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE 19 OF 102
42 PMU_GPIO_CODEC_RST_L C9 RESET* II NOT TO REPRODUCE OR COPY IT
IN SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
CRITICAL CRITICAL
L19_R_VBOOST TABLE_5_HEAD
1 C2041 1 C2043 1 C2044 CRITICAL CRITICAL CRITICAL PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION
1 C2092 1 C2045 1 C2091 1 C2094
4.7UF 4.7UF 0.1UF
TABLE_5_ITEM
A1
B1
F5
C1
D1
A4
A5
0201 603 0402-1 0402-1
201
4.7UF
B2 SW VER1 NOSTUFF
LDO_FILT C5
TFA302610A-SM L19_R_LDO_FILT 1 2 5%
1 1/32W
20% X5R-CERM1 C2067 MF
44 42 15 10 4 I2C0_SDA D5 SDA 6.3V 402 100PF 01005
VSENSE- E3 SPKR_R_VSENSE_N_FILT 5%
16V
44 42 15 10 4 I2C0_SCL D6 SCL
VSENSE+ E2 SPKR_R_VSENSE_P_FILT NP0-C0G 2
01005
A7 NOSTUFF
4 GPIO_SPKAMP_RIGHT_IRQ_L INT* ISENSE- F1 SPKR_R_SES_N
A6 ISENSE+ E1 SPKR_R_SES_P C2060 R2044 SPKR_R_VSENSE_P
15 4 GPIO_SPKAMP_RST_L RESET* 0.01UF 1
10K 2 15
D7 ALIVE OUT+ D2 SPKR_R_P 1 2
15 4 GPIO_SPKAMP_KEEPALIVE 5%
OUT- C2 SPKR_R_N 10%
6.3V 01005
X5R
NOSTUFF 1/32W
MF
41 39 PP1V7_VA_VCP C7 ADO C2068 1 01005
IREF+ B7 L19_R_IREF 1
R2043 1
R2042 100PF
I2S1_SPKAMP_MCK E7 0.00 0.00 5%
44 15 4 MCLK 16V
0% 0% NP0-C0G 2
E6 1/32W 1/32W OMIT 01005
44 15 4 I2S1_SPKAMP_BCLK SCLK MF MF
2 01005 CRITICAL 2 01005 FL2041
44 15 4 I2S1_SPKAMP_LRCK F6
LRCK/FSYNC R2040 MIN_LINE_WIDTH=0.5 MM 220-OHM-2.0A
0.1002 MIN_NECK_WIDTH=0.2 MM
44 15 4 I2S1_SPKAMP_DOUT F7
SDIN
1 SPKR_R_FLR 1 2 SPKR_R_CONN_P 15 38 45
MIN_LINE_WIDTH=0.5 MM 1% 0603
E5 SDOUT MIN_NECK_WIDTH=0.2 MM 1/4W NOSTUFF NOSTUFF
I2S1_SPKAMP_DIN 1
R2041
SPEAKER CONNECTOR
44 15 4 MF 1 1
0805 NOSTUFF C2040 C2063
GNDP GNDA 44.2K 1 C2061 18PF 3.9PF
1%
1/20W 18PF 5%
16V
+/-0.1PF
16V
MF 5% 2 CERM 2 NP0-C0G
2 201 2 16V
A3
B3
B4
B5
B6
C3
C4
D3
D4
C6
E4
F3
F4
CERM 01005 01005
01005
C OMIT C
FL2040 45 38 15 SPKR_R_CONN_P
220-OHM-2.0A XW2074
SM
1 2 SPKR_R_CONN_N SIGNAL_MODEL=EMPTY
15 38 45
15 SPKR_R_VSENSE_P 1 2
MIN_LINE_WIDTH=0.5 MM 0603
MIN_NECK_WIDTH=0.2 MM NOSTUFF 45 38 15 SPKR_R_CONN_N
NOSTUFF 1 C2066 XW2075
C2049 1 3.9PF SM
NOSTUFF SIGNAL_MODEL=EMPTY
1 C2064 18PF +/-0.1PF 15 SPKR_R_VSENSE_N 1 2
5% 2 16V
NP0-C0G
18PF 16V 01005 45 38 15 SPKR_L_CONN_P
5% CERM 2 XW2076
2 16V
CERM
01005 SM
01005
15 SPKR_L_VSENSE_P 1 2 SIGNAL_MODEL=EMPTY
15
SPKR_L_CONN_N
SPKR_L_VSENSE_N
XW2077
1
SM
2 SIGNAL_MODEL=EMPTY
1
NOSTUFF
CRITICAL
C2070
1
NOSTUFF
CRITICAL
C2072
I2C ADDRESS: 1000000X 100PF 100PF
5% 5%
39 15 14 =PPVCC_MAIN_AUDIO =PP1V7_VA_VCP 14 15 39 PLACE XWS CLOSE TO CONNECTOR 16V
2 NP0-C0G
16V
2 NP0-C0G
CRITICAL CRITICAL CRITICAL
L19_L_VBOOST 01005 01005
1 C2051 1 C2052 1 C2053 1 C2054 CRITICAL CRITICAL CRITICAL
1 C2093 1 1 C2090 1 C2095 C2056 NOSTUFF NOSTUFF
4.7UF 4.7UF 4.7UF 0.1UF C2055 1 CRITICAL CRITICAL
20% 20% 20% 10% 0.1UF 10UF 10UF 10UF 0.1UF
2 10V
X5R-CERM 2 10V 2 10V
X5R-CERM 2 10V
10%
10V 20% 20% 20% 10%
6.3V C2071 1
C2073 1
0402 X5R-CERM 0402 X5R-CERM 2 X5R-CERM 2 10V 10V
2 X5R-CERM
10V
2 X5R-CERM CRITICAL 100PF 100PF
0402 0201 X5R 2 X5R C2057
A1
B1
F5
C1
D1
A4
A5
B5
B6
C3
C4
D3
D4
C6
E4
F3
F4
OMIT
FL2050
A 220-OHM-2.0A
1 2
SYNC_MASTER=KAVITHA SYNC_DATE=01/18/2012 A
SPKR_L_CONN_N 15 38 45 PAGE TITLE
MIN_LINE_WIDTH=0.5 MM
MIN_NECK_WIDTH=0.2 MM
0603
1
NOSTUFF AUDIO: CS35L19A AMPS
NOSTUFF C2086 DRAWING NUMBER SIZE
1
NOSTUFF C2059
18PF
1 3.9PF
+/-0.1PF Apple Inc. 051-9374 D
C2084 5% 2 16V REVISION
18PF 16V NP0-C0G
5%
16V
CERM 2
01005
01005 R
13.0.0
2 CERM NOTICE OF PROPRIETARY PROPERTY: BRANCH
01005
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
4 OF 4
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
20 OF 102
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 15 OF 46
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
MIPI CONNECTOR
D D
39
=PPVCC_MAIN_LCD
CRITICAL
1 C2240 1 C2242
0.1UF 27PF
CRITICAL 5%
1
10%
16V
2 X5R-CERM
16V
2 NP0-C0G
VDD
0201 01005
U2200
TABLE_ALT_HEAD
8
1% 0.1UF 10UF 27PF 5% 5% 10%
1/20W 3900PF 10% 20% 5% 1/20W 2 16V 16V
10% 2 16V 10V 16V NP0-C0G 2 X7R
MF
2 50V X5R-CERM 2 X5R-CERM 2 NP0-C0G MF 01005 201
2 201 X7R 0201 0402-2 01005 2 201
0402 CRITICAL
3
L2233 2 MIPI0D_DATA_N<3> IN 6 45
4 1 MIPI0D_DATA_P<3>
LAYOUT NOTE: P/N 998-4669 -> 516S1056 SYM_VER-2 IN 6 45
TCM0605-1
PUT THERMAL VIAS AROUND U2200 IN CASE OF SHORTED CONDITION CRITICAL 90-OHM-50MA
J2201
C AA07A-S032-VA1
F-ST-SM-1
CRITICAL
L2232
C
3 2 MIPI0D_DATA_N<2> 6 45
34 33 IN
4 1 MIPI0D_DATA_P<2> 6 45
2 1 SYM_VER-2 IN
TCM0605-1
4 3 45 MIPI_DATA_CONN_N<3> 90-OHM-50MA
6 5 45 MIPI_DATA_CONN_P<3> CRITICAL
8 7 3
L2222 2 MIPI0D_DATA_N<1> IN 6 45
10 9 45 MIPI_DATA_CONN_N<2>
12 11 45 MIPI_DATA_CONN_P<2>
GPIO_MLC_RST_L 14 13 4 1 MIPI0D_DATA_P<1> 6 45
4 SYM_VER-2 IN
16 15 45 MIPI_DATA_CONN_N<1> TCM0605-1
90-OHM-50MA
42 WLED_STRING4 18 17 45 MIPI_DATA_CONN_P<1>
IN
42 WLED_STRING3 20 19
IN
42 WLED_STRING2 22 21 45 MIPI_DATA_CONN_N<0>
IN
24 23 CRITICAL
42 IN WLED_STRING1 45 MIPI_DATA_CONN_P<0>
26 25 3 L2212 2
42 IN WLED_STRING5 MIPI0D_DATA_N<0> IN 6 45
42 WLED_STRING6 28 27 MIPI_CLK_CONN_N
IN
30 29 MIPI_CLK_CONN_P 4 1 MIPI0D_DATA_P<0> 6 45
32 31 SYM_VER-2 IN
TCM0605-1
90-OHM-50MA
36 35 CRITICAL
3 L2202 2 MIPI0D_CLK_N IN 6 45
L2200 4 1 MIPI0D_CLK_P
B 39
FERR-240-OHM-25%-300MA
=PPLED_REG 1 2 PPLED_BACK_REG
SYM_VER-2
TCM0605-1
90-OHM-50MA
IN 6 45
B
0402 VOLTAGE=20.4V
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.2 MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
A SYNC_MASTER=N/A SYNC_DATE=N/A A
PAGE TITLE
D L2600
240OHM-350MA D
=PP2V8_CAM_FRONT 1 2
PP2V8_CAM_FRONT_FILT
39 17
0201 VOLTAGE=2.8V
1 C2600 1 C2601 1 C2602 MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
27PF 1UF 1000PF NET_SPACING_TYPE=PWR
XW2600 5%
16V
20%
6.3V
10%
6.3V MAX_NECK_LENGTH=3 MM
SM 2 NP0-C0G
01005
2 X5R
0201
2 X5R-CERM
01005
L2610
1 2 GND_AVDD_CAM_FRONT 17 45 17 MIPI1C_CAM_FRONT_CLK_FILT_P 2 3 MIPI1C_CAM_FRONT_CLK_P OUT 6 45
VOLTAGE=0V
MIN_LINE_WIDTH=0.15 MM
MIN_NECK_WIDTH=0.15 MM
NET_SPACING_TYPE=GND 45 17 MIPI1C_CAM_FRONT_CLK_FILT_N 1 4 MIPI1C_CAM_FRONT_CLK_N 6 45
OUT
SYM_VER-2
TCM0605-1
90-OHM-50MA
L2611
45 17 MIPI1C_CAM_FRONT_DATA_FILT_P<0> 2 3 MIPI1C_CAM_FRONT_DATA_P<0> 6 45
OUT
L2601
240OHM-350MA
=PP1V8_CAM_FRONT MIPI1C_CAM_FRONT_DATA_FILT_N<0> 1 4 MIPI1C_CAM_FRONT_DATA_N<0>
39
1 2 PP1V8_CAM_FRONT_FILT 17
45 17
SYM_VER-2
OUT 6 45
TCM0605-1
0201
VOLTAGE=1.8V 90-OHM-50MA
1 C2603 1 C2604 1 C2605 MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
5%
27PF 1UF
20%
1000PF
10%
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
1
R2601 L2660
16V
2 NP0-C0G
6.3V
2 X5R
6.3V
2 X5R-CERM 100K 120-OHM-210MA
01005 0201 01005 1% ISP1_CAM_FRONT_SHUTDOWN 1 2
1/32W 17 ISP1_CAM_FRONT_CLK_F_R ISP1_CAM_FRONT_CLK_F 17 44
MF 01005
2 01005 LOW = ENABLES CAMERA TO TURN ON
HIGH = DISABLES / TURNS OFF CAMERA
C C
17 ISP1_CAM_FRONT_SHUTDOWN_F
44 17 I2C2_SCL_F 2 1 I2C2_SDA_F 17 44
17 GPIO_ALS_IRQ_L_F
4 3 ISP1_CAM_FRONT_CLK_F_R 17
17 PP3V0_ALS_FILT
6 5
8 7 ISP1_CAM_FRONT_SHUTDOWN_F 17
45 17 MIPI1C_CAM_FRONT_DATA_FILT_P<0> 10 9 ISP1_CAM_FRONT_SDA_F 17 44
45 17 MIPI1C_CAM_FRONT_DATA_FILT_N<0>
12 11 ISP1_CAM_FRONT_SCL_F 17 44
14 13 PP2V8_CAM_FRONT_FILT 17
45 17 MIPI1C_CAM_FRONT_CLK_FILT_P 16 15 GND_AVDD_CAM_FRONT 17
U2600 45 17 MIPI1C_CAM_FRONT_CLK_FILT_N 18 17 PP1V8_CAM_FRONT_FILT 17
B 44 6 ISP1_CAM_FRONT_SDA
400MHZ-0.1A-27PF
IN1
1208
OUT1 ISP1_CAM_FRONT_SDA_F 17 44 22 21
B
BI
44 6 IN ISP1_CAM_FRONT_SCL IN2 OUT2 ISP1_CAM_FRONT_SCL_F 17 44
44 18 4 BI I2C2_SDA IN3 OUT3 I2C2_SDA_F 17 44
44 6 IN ISP1_CAM_FRONT_CLK IN4 OUT4 ISP1_CAM_FRONT_CLK_F 17 44
GND
U2601
400MHZ-0.1A-27PF
1208
NC_U2601_1 IN1 OUT1 NC_U2601_5
44 18 4 IN I2C2_SCL IN2 OUT2 I2C2_SCL_F 17 44
A SYNC_MASTER=N/A SYNC_DATE=N/A A
PAGE TITLE
GYRO
(WRITE: 0XD4 READ: 0XD5)
VOLTAGE=3.0V
NET_SPACING_TYPE=PWR
MIN_LINE_WIDTH=0.6MM
D ACCELEROMETER L2702
MIN_NECK_WIDTH=0.2MM
MAX_NECK_LENGTH=3MM D
(WRITE: 0X3A READ: 0X3B) 240-OHM-0.2A-0.8-OHM
39
=PP3V0_SENSOR_GYRO 2 1 PP3V0_SENSOR_GYRO_FILT
0201
C2723 1 C2721 1
10UF 0.1UF
L2700
240-OHM-0.2A-0.8-OHM 12-BIT PART 20%
6.3V
CERM-X5R 2
0402-2
10%
6.3V
X5R 2
201
39 =PP3V0_SENSOR_ACCEL 2 1 PP3V0_SENSOR_ACCEL_FILT
0201 VOLTAGE=3.0V
C2700 1 C2701 1 NET_SPACING_TYPE=PWR
10UF 0.1UF MIN_LINE_WIDTH=0.6MM
20% 10% MIN_NECK_WIDTH=0.2MM
6.3V 6.3V MAX_NECK_LENGTH=3MM 39 =PP1V8_GYRO
CERM-X5R 2 X5R 2
0402-2 201 1
C2725 1
0.1UF R2724
39 =PP1V8_ACCEL
10%
6.3V 10K
X5R 2 1%
1/32W
201
MF
C2702 1 1 16 15 CRITICAL 01005 2
0.1UF VDD_IO RES/VDD
VDD
14
10% CRITICAL
1
6.3V 2
X5R U2720
201 VDD_IO VDD
2
NC DATASHEET SAYS TO CONNECT AP3GDL20BCTR
U2700 NC 3
NC PIN 15 TO VDD
LGA
AP3DSHAD PIN 10 TO GND 44 18 17 4 IN I2C2_SCL 2 SCL/SPC CS 5 GYRO_CS
LGA I2C2_SDA 3 SDA/SDI/SDO DRDY/ 6 GPIO_GYRO_IRQ2
8 CS RES 10 44 18 17 4 BI INT2 OUT 4
4 SDO/SA0 DEN 8 CAM_REAR_VSYNC
RES 15 IN 20
7 SEL/SDO
9 RES0 INT1 7 GPIO_GYRO_IRQ1
I2C2_SDA 6 SDA/SDI/SDO 4
C
OUT
C
44 18 17 4 BI
10 RES1
44 18 17 4 IN I2C2_SCL 4 SCL/SPC
INT1/DRDY 11 GPIO_ACCEL_IRQ1_L OUT 4 11 RES2
INT2 9 GPIO_ACCEL_IRQ2_L OUT 4 12 RES3
RES/GND GND
GND
14 13
16
13
12
5
GYRO_PUMP
C2726 1
0.01UF
10%
25V
X5R-CERM 2
0201
B COMPASS B
WRITE: 0X18 READ: 0X19
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3MM
VOLTAGE=3.0V L2701
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.2MM 240-OHM-0.2A-0.8-OHM
PP3V0_SENSOR_COMPASS_FILT 2 1 =PP3V0_SENSOR_COMPASS 39
0201
39 =PP1V8_COMPASS
C2711 1
0.1UF
20%
C4
B1
6.3V
X5R-CERM 2 C2710 1
01005 VID VDD 1.0UF
18 AGND_COMPASS 20%
U2710 10V
X5R-CERM 2
0201-1
AK8963C
CSP
44 19 4 IN I2C1_SCL A3 SCL/SK CAD0 D1
44 19 4 BI I2C1_SDA A4 SDA/SI CAD1 D2
CRITICAL
CS* TIES TO VID FOR I2C MODE A2 CSB* TST1 C2 NC_U2710_TST1
PROX SENSOR
D D
D2
C2
P106_P107 CRITICAL
1
R2800 J2800
2.0K VCC VDRIVE P106_P107 P106_P107 503548-0620
1%
1/32W U2800 CRITICAL CRITICAL F-ST-SM
MF
01005 2 AD7149 L2802 L2801 7 8
390NH-2%-170MA-4.0OHM 68NH-2%-320MA-1.0OHM
WLCSP
PROX_BIAS E3 BIAS 353S2964 CIN0 D3 2 1 CIN9 2 1 CIN9 SENSOR ELECTRODE PROX_CIN9_CONN 1 2 NC_J2800_2
NC
CRITICAL CIN1 A3 PROX_CIN1 0603 0402 CIN7 DUMMY PROX_CIN7_CONN 3 4 NC_J2800_4
I2C1_SDA E1 SDA
44 18 4 BI
P106_P107 CIN2 B3 TP_PROX_CIN2 PROX_ACSHIELD_CONN 5 6 NC_J2800_6
I2C1_SCL C1 SCLK CIN3 A4
44 18 4 IN NC P106_P107 P106_P107
C3 9 10
VDRIVE RAIL
D1 CIN4 NC CRITICAL CRITICAL
ADD0 A5
CIN5 NC L2804 L2803
B1 ADD1 CIN6 B4 390NH-2%-170MA-4.0OHM 68NH-2%-320MA-1.0OHM
NC
CIN7 B5 PROX_CIN7 2 1 CIN7 2 1
4 GPIO_PROX_IRQ_L A1 INT*
OUT
CIN8 C4 0603 0402
NC
PROX_GPIO A2 GPIO CIN9 C5 PROX_CIN9
INT* IS OPEN DRAIN PU RAIL MATCH VDRIVE D4
B2 CIN10 NC
NC TP D5
CIN11 NC
ACSHIELD
P106_P107 CIN12 E5
INT IS 1.8V LEVEL. P106_P107 P106_P107 1 NC PCB: ACSHIELD NEEDS TO BE
C2802 1 C2807 1 R2801
100K P106_P107 A PLANE UNDER PROX_CIN NETS
0.01UF 27PF
GND
1% C2803 1
E4
E2
CONNECTED TO MLB INTERCONNECT. CERM 2 REF CAP TO MEASURE
201
A SYNC_MASTER=N/A SYNC_DATE=N/A A
PAGE TITLE
PROX SENSOR
DRAWING NUMBER SIZE
CRITICAL
27PF 27PF 1UF 1000PF NET_SPACING_TYPE=PWR
5% 5% 10% 10% 1 J2950
16V 16V 10V 6.3V MAX_NECK_LENGTH=3 MM R2950
2 NP0-C0G
01005
2 NP0-C0G
01005
2 X5R
402
2 X5R-CERM
01005 100K AA07-S022VA1 L2911
1% F-ST-SM
1/32W
MF
24 2 3 MIPI0C_CAM_REAR_DATA_P<0> OUT 6 45
2 01005 23
1 4 MIPI0C_CAM_REAR_DATA_N<0> OUT 6 45
44 6 IN ISP0_CAM_REAR_SCL 1 2 SYM_VER-2
TCM0605-1
L2903 44 6 BI ISP0_CAM_REAR_SDA 3 4
90-OHM-50MA
240OHM-350MA ISP0_CAM_REAR_SHUTDOWN 5 6 45 MIPI0C_CAM_REAR_DATA_FILT_P<0>
=PP1V2_CAM_REAR 1 2
PP1V2_CAM_REAR_FILT 6
7 8 MIPI0C_CAM_REAR_DATA_FILT_N<0>
39
0201 9 10
45
2
L2910 3
VOLTAGE=1.2V MIPI0C_CAM_REAR_CLK_P OUT 6 45
1 C2973 1 C2909 1 C2910 1 C2911 MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
11 12 45 MIPI0C_CAM_REAR_CLK_FILT_P
27PF 27PF 1UF 1000PF NET_SPACING_TYPE=PWR 18 IN CAM_REAR_VSYNC 13 14 45 MIPI0C_CAM_REAR_CLK_FILT_N
5% 5% 10% 10% MAX_NECK_LENGTH=3 MM
2 16V 2 16V 2 10V 2 6.3V 15 16 1 4 MIPI0C_CAM_REAR_CLK_N OUT 6 45
NP0-C0G NP0-C0G X5R X5R-CERM SYM_VER-2
01005 01005 402 01005 GND_CAM_AVDD 17 18 45 MIPI0C_CAM_REAR_DATA_FILT_P<1> TCM0605-1
19 20 45 MIPI0C_CAM_REAR_DATA_FILT_N<1>
90-OHM-50MA
GND_AF_AVDD
21 22
L2912
2 3 MIPI0C_CAM_REAR_DATA_P<1> OUT 6 45
25
L2900 26
240OHM-350MA 1 4 MIPI0C_CAM_REAR_DATA_N<1> 6 45
OUT
=PP2V8_CAM_REAR PP2V8_CAM_REAR_FILT SYM_VER-2
C 39
1
0201
2
VOLTAGE=2.8V
MIN_LINE_WIDTH=0.6 mm
TCM0605-1
90-OHM-50MA C
1 C2970 1 C2900 1 C2901 1 C2902 MIN_NECK_WIDTH=0.2 mm
NET_SPACING_TYPE=PWR
27PF 27PF 1UF 1000PF MAX_NECK_LENGTH=3 MM
5% 5% 10% 10%
16V
2 NP0-C0G XW2950
SM
16V
2 NP0-C0G 2 X5R
10V 6.3V
2 X5R-CERM
01005 01005 402 01005
1 2
VOLTAGE=0V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.1 MM
NET_SPACING_TYPE=GND
MAX_NECK_LENGTH=5 MM
L2901
240OHM-350MA
=PP2V8_CAM_REAR_AF 1 2
PP2V8_CAM_REAR_AF_FILT
39
0201
VOLTAGE=2.8V
1 C2971 1 C2903 1 C2904 1 C2905 MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
27PF 27PF 1UF 1000PF NET_SPACING_TYPE=PWR
5% 5% 10% 10% MAX_NECK_LENGTH=3 MM
16V
2 NP0-C0G XW2951
SM
16V
2 NP0-C0G
10V
2 X5R
6.3V
2 X5R-CERM
01005 01005 402 01005
1 2
VOLTAGE=0V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.1 MM
NET_SPACING_TYPE=GND
MAX_NECK_LENGTH=5 MM
B B
BUTTON CONNECTOR
CRITICAL
J2960
FF18-6A-R11AD-B-3H
F-RT-SM
L2960
240-OHM-0.2A-0.8-OHM R2900 1
GPIO_BTN_VOL_DOWN_R_L 1.00K2
4 GPIO_BTN_VOL_DOWN_L 1 2 1 GPIO_BTN_VOL_DOWN_L_FILT 2
0201 3
1% GPIO_BTN_VOL_UP_L_FILT
L2961 1/32W
240-OHM-0.2A-0.8-OHM MF
01005
R2901 GPIO_BTN_SRL_L_FILT 4
GPIO_BTN_VOL_UP_L 1 2 GPIO_BTN_VOL_UP_R_L 1
1.00K2 GPIO_BTN_POWER_L_FILT 5
4
0201 6
1%
L2962 1/32W
240-OHM-0.2A-0.8-OHM MF
01005
R2902
GPIO_BTN_SRL_R_L 1.00K2
42 4 GPIO_BTN_SRL_L 1 2 1
518S0692
0201
1%
L2963 1/32W
R2903
A
MF
A
240-OHM-0.2A-0.8-OHM 01005
GPIO_BTN_POWER_L 1 2 GPIO_BTN_POWER_R_L 1.00K2
42 4 1 SYNC_MASTER=N/A SYNC_DATE=N/A
0201 PAGE TITLE
1%
1/32W
MF
01005 DZ2960
2 DZ2962
201-1
2 BUTTON & REAR CAMERA CONN
201-1 DRAWING NUMBER SIZE
12.8V-100PF
1 C2960 1 C2961 1 C2962 1 C2963
12.8V-100PF
DZ2961 2
DZ2963 2
Apple Inc. 051-9374 D
82PF 82PF 201-1 201-1
82PF 82PF 12.8V-100PF REVISION
5%
25V
2 CERM
5%
25V
2 CERM
5%
25V
2 CERM
5%
25V
2 CERM
1 1 12.8V-100PF R
13.0.0
0201 0201 0201 0201 NOTICE OF PROPRIETARY PROPERTY: BRANCH
1 1 THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
29 OF 102
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 20 OF 46
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PP_BATT_VCC_CONN 21 22 23 29 30 31 33 34
IN
D D
AP CONNECTIONS J31010_RF
PP_BATT_VCC_CONN =PPBATT_VCC_RF
34 33 31 30 29 23 22 21 39
DEBUG CONNECTOR 56
AXE654124
M-ST-SM
55
25 TX_GTR_THRESH GPIO_BB_GSM_TXBURST 4
24 23 21 BB_RST_L GPIO_BB_RST_L 4
2 1
25 21 RESET_DET_L GPIO_BB_RST_DET_L 4
4 3
23 21 RADIO_ON_L GPIO_BB_RADIO_ON_L 4 6 5
23 21 RESET_PMU_L PMU_GPIO_BB_RST_L 42
8 7
25 21 BB_WAKE_HOST PMU_GPIO_BB_WAKE 42
10 9 PP_SMPS3_MSME_1V8
DEBUG_RST_L
21 RF_RESET_L RST_SYSTEM_L 3 10 42
24 OUT
12 11
IN 21 22 24 25 28
23 21 RESET_PMU_L BT_WAKE 21 37
25 21 PBL_RUN_BB_HSIC1_RDY GPIO_BB_HSIC_DEV_RDY 4 OUT
14 13
OUT
23 21 OUT RADIO_ON_L
16 15 PP_LDO6_RUIM_1V8 IN 21 22 24
PP31007_RF 44 24 4 BB_JTAG_TCK 26 25 NC
OUT
P4MM 28 27
SM
1 BB_ERROR_FLAG 44 24 4 OUT BB_JTAG_TMS
PP
NOSTUFF
25
44 24 4 BB_JTAG_TDO 30 29 AP_HSIC1_RDY 21 25
BB_HSIC1_REMOTE_WAKE GPIO_BB_DIAGS_RDY IN IN
25 4
BB_JTAG_TDI 32 31 BT_REG_ON
25 21 BB_UART_TXD UART4_BB_RXD 4 10 44 PP31001_RF
44 24 4 OUT
34 33 BB_WAKE_HOST
IN 21 37
C
BB_USB_VBUS BB_VBUS_DET PP IN BI
C NOSTUFF NOSTUFF
2
3
4
24 21 42
BB_UART_RXD 44 43 SIM_DETECT
24 21 90_BB_USB_D_P USB_BB_D_P 10 44
25 21 OUT
BB_RST_L
OUT 21 25
PP31005_RF 25 21 BB_UART_RTS_L 46 45 21 23 24
90_BB_USB_D_N USB_BB_D_N IN OUT
24 21 10 44 P4MM SIMCRD_RST_CONN
SM BB_UART_CTS_L 48 47
1 RADIO_ON_L 21 23
25 21 OUT IN 21 25
PP
NOSTUFF 25 GPIO_DEBUG_LED 50 49 PBL_RUN_BB_HSIC1_RDY IN 21 25
J31003_RF IN
PP31003_RF 25 21 GPIO_51 GPIO51/BOOT_CONFIG_3 52 51 GPIO54/BOOT_CONFIG_0 ANT_SEL_2 21 25 32
MM4829-2702 OUT OUT
P4MM
SM F-ST-SM ANT_SEL_1 GPIO53/BOOT_CONFIG_1 54 53 GPIO48/BOOT_CONFIG_6 LAT_SW1_CTL
1 PBL_RUN_BB_HSIC1_RDY 32 25 21 OUT OUT 21 25
PP
NOSTUFF
21 25
1 50_HSIC_BB_STROBE
37
PP_WLAN_MAIN_VCC =PPBATT_VCC_WL 39
21 24
58 57
PP31004_RF
PP_SYNC GPIO_BB_GPS_SYNC NOSTUFF
2
3
4
25 4 P4MM
SM
1 AP_HSIC1_RDY NOSTUFF
PP 21 25
=PP1V8_S2R_WL NOSTUFF
37 PP_WL_BT_VDDIO_AP 39
37 CLK32K_AP PMU_CLK_32K_WLAN 42 44
PMU_GPIO_WLAN_REG_ON
BT UART
37 21 WLAN_REG_ON 42 PP31013_RF
P4MM
SM
1 BT_UART_TXD 21 37
37 WLAN_UART_TXD UART3_WLAN_RXD 4 44
PP
NOSTUFF
37 WLAN_UART_RXD UART3_WLAN_TXD 4 44 GPIO/BOOT_CONFIG CONFIGURATION
PP31014_RF
37 WLAN_HOST_WAKE PMU_GPIO_WLAN_HOST_WAKE 42 P4MM
SM
PP_SMPS3_MSME_1V8 BOOT_CONFIG 6 5 4 3 2 1 0
PP
1 BT_UART_RXD 21 37
28 25 24 22 21
BOOT OPTIONS SW REGISTER
NOSTUFF
VALUE 47 48 49 50 51 52 53 54 55
CELL CELL
CELL CELL BOOT_DEFAULT_OPTION 0X00 X 0 0 0 0 0 0 0 X
GPIO_WLAN_HSIC_RESUME 4
37
37
WLAN_HSIC3_RESUME
DEV_HSIC3_RDY GPIO_WLAN_HSIC_DEV_RDY 4 PP31015_RF
BB NOR SPI 1
R31101_RF
10K
1R31102_RF1
10K
R31103_RF
10K
1R31104_RF
37 BT_PCM_CLK I2S3_BT_BCLK 4 44
37 BT_PCM_SYNC I2S3_BT_LRCK 4 44
37 BT_PCM_OUT I2S3_BT_DIN 4 44
37 BT_PCM_IN I2S3_BT_DOUT 4 44
25 21 13 ANT_PORTB_1 ANT_PORTB_1 13 21 25
SIM CARD CONNECTOR
ANT_PORTB_2 ANT_PORTB_2
25 21 13 13 21 25
PP_LDO6_RUIM_1V8
25 21 13 ANT_PORTB_3
LAT_SW1_CTL
ANT_PORTB_3
ANT_PORTA_1
13 21 25
24 22 21 PP_LDO6_RUIM_1V8 21 22 24
R R104
C CXXX
25 21
1 DZ31002_RF
35 32 27 22 21 13 PP_LDO14_2P65 PP_LDO14_2P65 13 21 22 27 32 35
12V-33PF
01005
1 1
R31005_RF
0.00
0%
R31004_RF
15.00K
1%
2 CELL
XWXW206
1/32W
MF
01005 2
NOSTUFF
1/32W
MF
2 01005
CELL
DZDZ101
1
VCC
J31001_RF
DZ31001_RF
U U101
A 25 21 SIMCRD_RST_CONN 2 RST
SIM-CARD-N41 I/O 7 SIMCRD_IO_CONN 21 25
TPD4E101DPW
SON4 A
F-ST-SM 25 21 SIMCRD_IO_CONN 1 4 SIM_DETECT 21 25
PAGE TITLE
25 21 SIMCRD_RST_CONN 2 3 SIMCRD_CLK_CONN 21 25
R
13.0.0
8
9
10
11
13
5
D
OUT 24
D
PP_VREG
1 C32031_RF
1.0UF
20%
6.3V
2 X5R
0201-MUR
L32007_RF CELL
2.2UH-20%-1.2A-0.15OHM
PP_VSW_S1 1 2 PP_SMPS1_MSMC_1V05 24
CREATE A PLANE
OUT
0806
CELL 1 C32007_RF
22UF
20%
6.3V
2 X5R-CERM-1
603
CELL XW32007_RF
SHORT-10L-0.25MM-SM
23 22 S1_GND 1 2
NOSTUFF
L32008_RF
2.2UH-20%-1.2A-0.15OHM
PP_VSW_S2 1 2 PP_SMPS2_RF1_1V3 OUT 24 28
0806
CELL 1 C32008_RF
22UF CREATE A PLANE
20%
6.3V
2 X5R-CERM-1
C 603
CELL
C
L32009_RF
2.2UH-20%-1.2A-0.15OHM
PP_VSW_S3 1 2 PP_SMPS3_MSME_1V8
22 23
22 23
22 23
OUT 21 22 24 25 28
23
0806
23
1 1
98 VDD_S4
VSW_S4
81
87
PP_VSW_S5 1
TFA252010-SM
2 PP_SMPS5_DSP_1V05 OUT 22 B
C32035_RF C32037_RF
10UF 10UF VREG_S4 105 CELL 1
20% 20% C32011_RF
2 6.3V
CERM-X5R 2 6.3V
CERM-X5R
89 82 22UF
0402-1 0402-1 101 VDD_S5 VSW_S5 88 20%
CELL CELL 2 6.3V
X5R-CERM-1
VREG_S5 76 603 XW32011_RF
CELL SHORT-10L-0.25MM-SM
23 22 S5_GND 1 2
1 C32036_RF NOSTUFF
8 VDD_XO VREG_XO 20 PP_LDO1
10UF
20% 44 VDD_L2_L3 VREG_L2 31 PP_LDO2_XO_HS_1V8 OUT 24 28
2 6.3V
CERM-X5R
VREG_L3 32 PP_LDO3_AMUX_1V8 OUT 23 24
0402-1
1 C32023_RF
CELL 78 VDD_L4 VREG_L4 84 PP_LDO4_VDDA_3V3 OUT 24
0.1UF 11 PP_LDO5_GPS_LNA_2V5
20% VREG_L5 OUT 36
6.3V
2 X5R-CERM 5 VDD_L5_L6_L13_L14 VREG_L6 17 PP_LDO6_RUIM_1V8 OUT 21 24
01005
NOSTUFF VREG_L13 23 PP_LDO13_VDDPX_2V95 OUT 24
28 25 24 22 21 IN
PP_SMPS3_MSME_1V8 58 VDD_L8 VREG_L8 54 PP_LDO8_VDDPX_1V2 OUT 24
70 77 PP_LDO9_PLL_1V05
PP_SMPS5_DSP_1V05
59
VDD_L9
VDD_L10_L11
VREG_L9
VREG_L10
VREG_L11
65
55
PP_LDO10_ADSP_1V05
PP_LDO11_MDSP_FW_1V05
OUT
OUT
24
24
C C237
L L211
22 IN OUT 24
64 VDD_L12 VREG_L12 43 PP_LDO12_MDSP_SW_1V05 OUT 24
CELL
U U201
C32030_RF 1 1 C32040_RF
A 1 C32012_RF
1.0UF
1 C32014_RF
1.0UF
1 C32016_RF
1.0UF
1 C32018_RF
1.0UF
1 C32020_RF
10UF
1 C32022_RF
10UF
10UF
20%
6.3V
10UF
20%
2 6.3V
A
20% 20% 20% 20% 20% 20% CERM-X5R 2 CERM-X5R PAGE TITLE
6.3V
2 X5R
0201-MUR
6.3V
2 X5R
0201-MUR
6.3V
2 X5R
0201-MUR
6.3V
2 X5R
0201-MUR
6.3V
2 CERM-X5R
0402-1
6.3V
2 CERM-X5R
0402-1
0402-1
CELL
0402-1
CELL BASEBAND PMU (1 0F 2)
CELL CELL CELL CELL CELL CELL DRAWING NUMBER SIZE
BASEBAND PMU (2 OF 2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. PA_ID PA CONFIG
PP_LDO3_AMUX_1V8
0.25V B4/17 CONFIG 0
24 23 22 IN
0.50V B4_17 CONFIG 1
BOARD_ID REVISION 1
R33003_RF
143K
1
R33004_RF
102K 1.10V B3/13 CONFIG 0
1% 1%
0.25V N41 PROTO 1 1/32W 1/32W
D
D MF
2 01005
CELL
MF
2 01005
OMIT
0.50V N41 PROTO 2, X122 RF DEV 1 BOARD_ID PA_ID
CELL
R33019_RF
0.00 2
24 21 IN BB_RST_L 1
0% BOARD_TEMP4_P
1/32W
MF
U32001_RF 45 42 IN
01005 PM8018
CELL BGA 1
CONTROL
R33018_RF (SYM 1 OF 5)
20.0K2 PS_HOLD_PMIC 47 PS_HOLD RT33001_RF
25 21 IN PS_HOLD 1 LED_DRV_N 86 NC
10KOHM-1%-0.31MA
C CELL 5%
1/32W
MF
01005
0201 C
21 IN RADIO_ON_L 69 KPD_PWR* PON_RESET* 4 PMIC_RESOUT_L OUT 21 24
2 CELL PLACE CLOSE TO PA
21 IN RESET_PMU_L 16 PM_RESIN_N
PM_USR_INT_N 21 PM_USR_IRQ_L OUT 25
R33017_RF 45 42 IN BOARD_TEMP4_N
NC 62 OPT_1 PM_MDM_INT_N 14 PM_MDM_IRQ_L OUT 25
0.00 2 74 OPT_2
34 33 31 30 29 22 21 PP_BATT_VCC_CONN 1 OPT_2
0%
1/32W
MF
01005
NOSTUFF PON_TRIG 41
24 21 PMIC_SSBI 68 SSBI BAT_ID 35
BI
CELL
NDK - 197S0410
KYOCERA - 197S0437
RAKON - 197S0409 R33008_RF
100K 2
Y33001_RF
2.5X2.0MM-SM1
1 XO_GND 23
1%
19.2MHZ-90PPM-10PF 1/32W
1 3 XTAL19M_IN MF
01005
CELL NOSTUFF
23 XO_GND 2 4 U32001_RF 1
PP
PP33001_RF
SM P4MM
PM8018
XO_THERM_Y1 BGA PP33002_RF
CLOCKS 1
PP SM P4MM
(SYM 2 OF 5)
1 XTAL_19M_IN R33010_RF
2 XTAL_19M_OUT
100
XTAL19M_OUT XO_OUT_A0 19 A0_PMCLK 1 2 RF_CLK OUT 26
XO_OUT_D0 25 MDM_CLK 1%
OUT 24
1/32W
MF
1 C33008_RF
8.2PF
B 01005
CELL +/-0.1PF%
16V
2 NP0-C0G
B
U32001_RF 3 XTAL_32K_IN
15 XTAL_32K_OUT
XO_OUT_A1 37 NC 01005
PM8018 NC
CELL
BGA XO_OUT_D0_EN 9 D0_EN IN 24
INPUT PWR 45
(SYM 3 OF 5) GND1
91 S1_GND
R33007_RF GND1 PIN NO NEEDS TO BE 61
22
XW33008_RF 100K 2 27
GND_S1 103 SHORT-10L-0.25MM-SM
24 23 22 IN
PP_LDO3_AMUX_1V8 1 GND0 SLEEP_CLK 26 SLEEP_CLK_32K OUT 21 24
1% 10 XO_THERM
GND_S2 96 22 S2_GND 1 2
1/32W 1 C33006_RF
30 MF 22 XOADC_GND
S3_GND NOSTUFF 01005 1000PF
GND_S3 36 XW33010_RF CELL
10% RSVD 7 RSVD
SHORT-10L-0.25MM-SM 2 6.3V
X5R-CERM
93 22 S4_GND 1 2 01005
GND_S4 99 CELL CELL
NOSTUFF
GND_S5 94 S5_GND 22
1
XW33004_RF
XW33003_RF
23 XO_GND
SHORT-10L-0.1MM-SM
SHORT-10L-0.1MM-SM
39
NOSTUFF
51
2
R R317
1
NC 57 VCOIN 61 61 NEEDS TO BE MADE 45
56
GND
46
C C309
2
52
40
L LXXX
CELL
U U301
ALTERNATES BOM OPTIONS XW XW305
A PART NUMBER ALTERNATE FOR
PART NUMBER
BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
A
TABLE_5_ITEM PAGE TITLE
118S0656 1 PA_ID RES DIVIDER 61.9K R33004_RF Y B3_13 DRAWING NUMBER SIZE
197S0409 197S0410 CELL Y33001_RF RAKON CRYSTAL
118S0729 1 PA_ID RES DIVIDER 39K R33002_RF Y B4_17
TABLE_5_ITEM
BASEBAND (1 OF 2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. U34001_RF
24 22 IN PP_SMPS1_MSMC_1V05 MDM9615M
BGA
1 C34001_RF 1 C34002_RF 1 C34003_RF 1 C34004_RF 1 C34005_RF (6 OF 6)
1.0UF 1.0UF 1.0UF 1.0UF 1.0UF GND
20% 20% 20% 20% 20% A21 M14
2 6.3V
X5R
6.3V
2 X5R 6.3V
2 X5R 6.3V
2 X5R 6.3V
2 X5R
AA1 M15
0201-MUR 0201-MUR 0201-MUR 0201-MUR 0201-MUR
CELL CELL CELL CELL CELL AA21 M16
B2 M17
D B7
B11
M19
N6
D
PP_LDO9_PLL_1V05 PP_LDO10_ADSP_1V05 PP_LDO11_MDSP_FW_1V05
24 22 IN 24 22 IN 24 22 IN B14 N7
1 C34012_RF
1 C34006_RF 1 C34007_RF 1 C34008_RF 1 C34009_RF 1 C34011_RF 1 C34013_RF 1 C34014_RF 1 C34028_RF B15 N10
1.0UF
1.0UF 1.0UF 1.0UF 1.0UF 1.0UF 20% 1.0UF 1.0UF 1.0UF C19 N11
20% 20% 20% 20% 20% 6.3V 20% 20% 20%
6.3V 6.3V 6.3V 6.3V 6.3V 2 X5R 6.3V 6.3V 6.3V F6 N14
2 X5R
0201-MUR
2 X5R
0201-MUR
2 X5R
0201-MUR
2 X5R
0201-MUR
2 X5R
0201-MUR
0201-MUR
CELL
2 X5R
0201-MUR
2 X5R
0201-MUR
2 X5R
0201-MUR F7 P6 U34001_RF
CELL CELL CELL CELL CELL CELL CELL CELL F10 P10 MDM9615M
BGA
F15 P11 (2 OF 6) R34008_RF
F16 R6 EBI1_EBI2 240
PP_SMPS3_MSME_1V8 PP_SMPS3_MSME_1V8 PP_LDO12_MDSP_SW_1V05 F19 GND R10 EBI1_CAL C21 EBI1_CAL 1 2
28 25 24 22 21 IN 28 25 24 22 21 IN 24 22 IN 1%
G2 R11 1/32W
1 C34015_RF 1 C34016_RF 1 C34017_RF 1 C34018_RF 1 C34019_RF 1 C34020_RF 1 C34027_RF NC D21 EBI2_NAND_CS* EBI2_AD_0 J20 NC MF
G6 R15 01005
1.0UF 1.0UF 1.0UF 1.0UF 1.0UF 1.0UF 1.0UF NC E19 EBI2_OE* EBI2_AD_1 J19 NC CELL
20% 20% 20% 20% 20% 20% 20% G10 R16
2 6.3V
X5R
6.3V
2 X5R 6.3V
2 X5R 6.3V
2 X5R 6.3V
2 X5R 2 6.3V
X5R
6.3V
2 X5R NC D20 EBI2_WE* EBI2_AD_2 G19 NC
G11 R17
0201-MUR 0201-MUR 0201-MUR 0201-MUR 0201-MUR 0201-MUR 0201-MUR D19 H20
G15 R19 NC EBI2_BUSY* EBI2_AD_3 NC
CELL CELL CELL CELL CELL CELL CELL J21
G16 T10 EBI2_AD_4 NC
EBI2_AD_5 H19 NC
G17 T12
NC C20 EBI2_CLE* EBI2_AD_6 H21 NC
G20 T13
NC E20 EBI2_ALE* EBI2_AD_7 E21 NC
H6 T14
H10 U2
U34001_RF H11 GND V19
CELL
MDM9615M H15
BGA
(5 OF 6) H16 F11
PWR J6 J16
24 22
PP_SMPS1_MSMC_1V05 F8 AA20 PP_SMPS3_MSME_1V8 21 22 24 25 28
IN IN J7 K16
F9 B19
C 24 22
PP_SMPS1_MSMC_1V05
IN
F12
F13
VDD_DDR F20
M20
J10
J11
L16
T6 C
J14 T7
1 C34022_RF F14
PP_LDO10_ADSP_1V05 J15 T11
1.0UF G9 C5 IN 22 24
20% K6 GND_ANA U9
6.3V G12 C6
2 X5R
K7 U12
0201-MUR H9 E6
CELL VDD_ADSP K10 W7
H12 E7
K11 W14
J8 F5
K14 Y7
J9
K15 Y11
J12 T15 PP_LDO11_MDSP_FW_1V05 22 24
IN K20 Y15
J13 T16
L2 Y18
K8 T17
L6 U13
K9 U14
L7 W13
K12 VDD_MDSP_FW U15
L10
K13 U16
L11
L8 U17
VDD_CORE L14
L9 U19
L15
L12 T19
M6
L13 PP_LDO12_MDSP_SW_1V05 IN 22 24
M7
M8 N15
M10
M9 N16
M11
M12 N17
M13 N19 PP_LVS1
IN 22 CELL
N8 VDD_MDSP_SW P15
R34005_RF
470K 2
N9 P16
1/32W
01005
0.00 2 U34001_RF
B N13 P19 23 21 IN BB_RST_L 1
MDM9615M B
1
P9 0% 1/32W
CELL MF 01005 BGA
P12 VDD_QFUSE_PRG B13 NOSTUFF (1 OF 6)
R9 DIGITAL
PMIC_RESOUT_L Y20 RESIN* RESOUT* U20 NC
R12 VDD_USB_1P8 E12 PP_LDO2_XO_HS_1V8 22 28
23 21 IN
IN DEBUG_RST_L Y4 SRST*
21 IN
T8 VDD_USB_3P3 E10 PP_LDO4_VDDA_3V3 IN 22
1 C34025_RF AA19 SLEEP_CLK
23 21 IN SLEEP_CLK_32K
T9
VDDPX_BIAS
1.0UF
VDD_HVPAD_BIAS E16 IN 23
20%
6.3V Y3
PP_LDO9_PLL_1V05 C17 2 X5R 44 21 4 IN BB_JTAG_TCK TCK TDO AA3 BB_JTAG_TDO OUT 4 21 44
24 22 IN 0201-MUR 44 21 4 IN BB_JTAG_TDI AA2 TDI RTCK Y2 BB_JTAG_RTCLK OUT 21
C18 K17 1 C34021_RF CELL
BB_JTAG_TMS W4 TMS R34002_RF
E17 VDD_PLL1 L17 PP_LDO9_PLL_1V05
IN 22 24
0.1UF 44 21 4 IN
240
PP_LDO3_AMUX_1V8
20% 44 21 4 IN BB_JTAG_TRST_L AA4 TRST* HSIC_CAL A8 50_HSIC_CAL 1 2
F17 4V
VDD_PLL2 W12 IN 22 23 2 X5R
G7 01005 HSIC_DATA C7 50_HSIC_BB_DATA BI 21 1%
1/32W
NOSTUFF 24 BB_MODE_0 W20 MODE_0 HSIC_STB B8 50_HSIC_BB_STROBE 21 MF
G8 U6 PP_LDO7_DAC_1V8 BI 01005
IN 22 25
24 BB_MODE_1 Y19 MODE_1 CELL
G13 VDD_A2 U7
G14 AA11 PP_SMPS2_RF1_1V3 MDM_CLK V20 CXO
H7 GND AA18 IN 22 28 23 IN
H8 1 C34023_RF
1.0UF
1 C34026_RF
1.0UF
23 OUT D0_EN
PMIC_SSBI
U21 CXO_EN
Y21 SSBI_PMIC R R502
C528
23 21 BI
H13 W9
H14
P7
VDD_MEM VDD_A1 AA7
AA15
20%
6.3V
2 X5R
0201-MUR
20%
6.3V
2 X5R
0201-MUR 21 BI 90_BB_USB_D_P C11 USB_HS_DP
DNC
DNC
E8
C8
NC
NC
PP_SMPS3_MSME_1V8 21 22 24 25 28 C
P8
GND CELL CELL
21 BI 90_BB_USB_D_N E11 USB_HS_DM DNC B9 NC
L LXXX
R34006_RF
R34007_RF
RREFEXT A12 USB_HS_REXT DNC A9 NC
NOSTUFF
NOSTUFF
2
2
P13 A15 PP_SMPS3_MSME_1V8
IN 21 22 24 25 28
C12
U U501
1/32W
01005
1/32W
01005
10K
10K
P14 G1 ID IS NC USB_HS_ID
1%
MF
1%
MF
1 C34024_RF B12 USB_HS_SYSCLK
R7 G21
1.0UF 21 IN BB_USB_VBUS C10 USB_HS_VBUS
R8 VDD_P3 L1
1
20%
6.3V E9
A R13
R14
U1
W19
2 X5R
0201-MUR
CELL
DNC
DNC C9
NC
NC
24 BB_MODE_0
A
DNC B10 NC PAGE TITLE
BASEBAND (1 OF 2)
R34001_RF
BB_MODE_1
2
24
DNC A10 NC
PP_SMPS3_MSME_1V8 A14 A2 PP_LDO6_RUIM_1V8
1/32W
01005
200
28 25 24 22 21 IN VDD_P4 IN 21 22
1%
MF
22 CELL
SDC1_CMD K19 NC
Apple Inc. 051-9374 D
VDD_P1 IN
SDC1_CLK L21 NC
1
REVISION
M1 VDD_P7 A11 PP_SMPS3_MSME_1V8
M21
IN 21 22 24 25 28 R
13.0.0
SDC1_DATA0 L19 NC NOTICE OF PROPRIETARY PROPERTY: BRANCH
SDC1_DATA1 L20 NC THE INFORMATION CONTAINED HEREIN IS THE
22 PP_LDO13_VDDPX_2V95 K21 VDD_P2 PROPRIETARY PROPERTY OF APPLE INC.
IN N20
SDC1_DATA2 NC THE POSESSOR AGREES TO THE FOLLOWING: PAGE
SDC1_DATA3 N21 NC I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
34 OF 102
CELL III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
CELL
IV ALL RIGHTS RESERVED 24 OF 46
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
BASEBAND (2 OF 2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D D
U34001_RF
MDM9615M
BGA
(4 OF 6)
ANALOG
DAC0_VREF W5 VREF_DAC_BIAS OUT 23
PRX_BB_I_P U8
1 C35008_RF PP_SMPS3_MSME_1V8
26 IN BBRX_IP_CH0 0.1UF 28 25 24 22 21
26 DRX_BB_Q_N AA9 BBRX_QM_CH1 TX_DAC0_QM AA5 TX_BB_Q_N 26 SIMCRD_RST_CONN A6 GPIO_1 GPIO_45 R1 ANT_PORTB_1 SPARE PA ON
IN OUT 21 OUT OUT 13 21
OUT 21 C
NC W15 DNC DNC AA14 NC 20% SPI2 CS_L B3 GPIO_5 GPIO_49 M2 TX_GTR_THRESH OUT 21
4V
NC W16 DNC 2 X5R SPI2 MOSI B4 GPIO_6 GPIO_50 N1 ANT_PORTB_2 BOOT_CONFIG_4 13 21
OUT
01005 BOOT_CONFIG_3
PP_LDO7_DAC_1V8 SPI2 MISO A4 GPIO_7 GPIO_51 N2 GPIO_51 IN 21
H17 NC IN 22 24
SPI_CLK A16 GPIO_8 GPIO_52 M3 ANT_SEL_0 BOOT_CONFIG_2
25 21 OUT OUT 32
J17 NC 25 21 SPI_CS_L A13 GPIO_9 GPIO_53 L3 ANT_SEL_1 BOOT_CONFIG_1 21 32
OUT OUT
26 GPS_BB_I_P W10 GNSS_BB_IP 25 21 SPI_DATA_MISO E14 GPIO_10 GPIO_54 M5 ANT_SEL_2 BOOT_CONFIG_0 21 32
IN IN OUT
26 IN GPS_BB_I_N U10 GNSS_BB_IM V21 NC 25 21 OUT SPI_DATA_MOSI E13 GPIO_11 GPIO_55 L5 ANT_SEL_3 OUT 32
26 IN GPS_BB_Q_P W11 GNSS_BB_QP W21 NC 21 OUT BB_UART_RTS_L C14 GPIO_12 GPIO_56 K1 DRX_MODE_SEL_A OUT 35
26 IN GPS_BB_Q_N U11 GNSS_BB_QM DNC Y12 NC 21 IN BB_UART_CTS_L C13 GPIO_13 GPIO_57 K5 DRX_MODE_SEL_B OUT 35
Y16 NC 21 OUT BB_UART_RXD E15 GPIO_14 GPIO_58 K3 DRX_MODE_SEL_C OUT 35
Y17 NC 21 BB_UART_TXD A18 GPIO_15 GPIO_59 K2 ANT_PORTB_3 LAT_SW2_CTL 13 21
IN OUT
AA12 NC 21 OUT BB_ERROR_FLAG C15 GPIO_16 GPIO_60 J2 DCDC_EN OUT 31
AA16 NC 21 OUT GPIO_DEBUG_LED B16 GPIO_17 GPIO_61 J5 DCDC_MODE OUT 31
AA17 NC 21 IN AP_WAKE_MODEM B18 GPIO_18 GPIO_62 J1 SPARE GRFC[34]
NC C16 GPIO_19 GPIO_63 J3 PRX_B5_B8_1 OUT 27
CELL
NC A17 GPIO_20 GPIO_64 H3 BB_PDM OUT 25
B 21
31
OUT RESET_DET_L
GSM_PA_LB_EN
T21
U5
GPIO_30
GPIO_31
GPIO_74
GPIO_75
W2
W1
WAN_GP_DATA0
WAN_GP_DATA1
OUT 26
26
B
OUT OUT
31 OUT GSM_PA_HB_EN V2 GPIO_32 GPIO_76 Y1 WAN_GP_DATA2 OUT 26
PA_R0 P1 C3 PM_USR_IRQ_L
B2
VCC CELL
U35001_RF
SERIAL-SPI-2MX8-1.8V
WLCSP
MX25U1635EBAI-10G B3 SPI_CS_L
D3 CS* IN 21 25
25 21 IN SPI_DATA_MOSI E2
WP*/SIO2
SI/SIO0
CELL
SO/SIO1 C3 SPI_DATA_MISO OUT 21 25 R R608
25 21 IN SPI_CLK D2 SCLK
NC
A4 NC
F1 NC C C609
C2
NC/SIO3
GND
F4 NC
CELL L L601
A PP_SMPS3_MSME_1V8
A
E3
28 25 24 22 21 IN R35004_RF R35005_RF
R35002_RF
1.00K 1.00K
25 BB_PDM 1 2 BB_PDM_FILT 1 2 DCDC_ADJ OUT 31 PAGE TITLE
1% 1%
MOBILE DATA MODEM (2 OF 2)
2
ALTERNATES
1/32W 1/32W
1 C35006_RF 1 C35007_RF
1/32W
01005
10K
MF MF
01005 01005 DRAWING NUMBER SIZE
1%
MF
0.01UF 4700PF
TABLE_ALT_HEAD
CELL 10%
6.3V
10%
6.3V Apple Inc. 051-9374 D
PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: 2 X5R 2 X5R
1
335S0899 335S0874 CELL U35001_RF MICRON SPI NOR THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
35 OF 102
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 25 OF 46
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
RF TRANSCEIVER (1 OF 3)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
C36005_RF
220PF C36003_RF
1 2
15PF
D
5%
D
2
10%
10V
X7R-CERM 16V
01005 01005
CELL NP0-C0G-CERM
NOSTUFF C36001_RF NOSTUFF
100PF
23 RF_CLK 1 2 XO_REF
IN
RF_RBIAS
5%
16V
NP0-C0G 1
01005 R36001_RF
25 IN
IREF
4.7K TRANSCEIVER RF AND IQ PORTS
C36004_RF
1%
1/32W TRANSCEIVER PHASE CONTROL PORTS
R36004_RF 27PF MF
50_CPL_PDET 49.9 250_PDET_PAD 1 2 2 01005
1 CELL
34 IN U36001_RF
1% TRANSCEIVER U36001_RF
5%
1/32W CELL
MF 16V CELL BGA196 TRANSCEIVER
01005 NP0-C0G (3 OF 4) BGA196
01005 (1 OF 4)
7DB ATTENUATOR 1 1 C14 RBIAS GNSS_INP A4 100_GPS_IN_P
R36003_RF R36005_RF IN 36
NC C1 GNSS_CLK SSBI_1 M2 RTR_SSBI_TX_GPS 25
N5 XO_REF BI
130 130 GNSS_INM A5 100_GPS_IN_N
1% 1% P1 DAC_REF
IN 36
L36001_RF NC L2 PRX_CLK SSBI_2 M1 RTR_SSBI_PRX_DRX BI 25
1/32W
MF
1/32W
MF GNSS_BB_I1 C2 GPS_BB_I_P 25
22-OHM-25%-0.18A-0.9DCR NC V2 GSM_PH_CLK
U10 PDET_IN OUT
2 01005 2 01005
50_PDET_IN GND79 V8 CORRECT SYMBOL
CELL CELL GNSS_BB_I2 B2 GPS_BB_I_N OUT 25 25 IN WAN_GPRSYNC 1 2 GPRSYNC V3 GPRS_SYNC
GND78 V9 PA_R1 AND PA_R0 SHOULD BE GND PINS
NC M14 RSVD GNSS_BB_Q1 D2 GPS_BB_Q_P OUT 25
01005
N2 RX_ON
25 IN CELL WAN_DIO_RX_ON
T14 TX_MB1 GNSS_BB_Q2 D1 GPS_BB_Q_N OUT 25
N1 RF_ON JAM_DET L1 NC
31 OUT 50_XCVR_2G_PA_HB_TX 25 IN WAN_DIO
R14 TX_MB2 TX_BB_IP T2 TX_BB_I_P GND56 R4
33 OUT 50_XCVR_3G_B4_TX IN 25
VTUNE_SHDR E5 VTUNE_SHDR
P14 TX_MB3 TX_BB_IM R2 TX_BB_I_N GND57 P4
34 OUT 50_XCVR_3G_B2_TX IN 25
N14 TX_MB4 TX_BB_QP R1 TX_BB_Q_P V6 GP_DATA2 GND58 A6
33 OUT 50_XCVR_3G_B1_TX IN 25 25 IN WAN_GP_DATA2
U13 TX_LB1 TX_BB_QM T1 TX_BB_Q_N IN 25 25 IN WAN_GP_DATA1 V5 GP_DATA1 GND59 B4
29 OUT 50_XCVR_3G_B5_TX 1 C36002_RF V4 GP_DATA0
WAN_GP_DATA0 GND60 E6
C
V12 TX_LB2 IN
GND20 M11
C 30
29
OUT 50_XCVR_3G_B13_TX
OUT 50_XCVR_3G_B8_TX
V13 TX_LB3 GND21 K11
10%
10V
5600PF
2 CERM-X5R
NEED TO LENGTH MATCH:
GSM_TX_LB_CLK NC N7 DNC16 GND61 D5
U14 TX_LB4 GND22 K13 GP_DATA[2:0] P7 DNC17 GND62 G4
31 OUT 50_XCVR_2G_PA_LB_TX 01005 NC
CELL
F1 PRX_BB_QP GND23 K14 NC P8 DNC18 GND63 E4
25 OUT PRX_BB_Q_P
E1 PRX_BB_QM GND24 V11 NC N8 DNC19
25 OUT PRX_BB_Q_N
G2 PRX_BB_IP GND25 R10 NC L10 DNC20
25 OUT PRX_BB_I_P
F2 PRX_BB_IM GND26 G6
25 OUT PRX_BB_I_N NC D4 DNC0
A7 PRX_LB1_INP GND27 G7
27 IN 100_BAND5_BAND8_RX_N NC K8 DNC1
A8 PRX_LB1_INM GND28 B7 B13 GND55
27 IN 100_BAND5_BAND8_RX_P
B9 PRX_LB2_INP GND29 B10
30 IN 100_BAND13_RX_P
B8 PRS_LB2_INM GND30 D10
30 IN 100_BAND13_RX_N CELL
A11 PRX_MB1_INP GND31 D11
33 IN 100_BAND4_RX_P
33 100_BAND4_RX_N A12 PRX_MB1_INM GND32 C13
IN
34 100_BAND2_RX_P B12 PRX_MB2_INP GND33 D7
IN
34 100_BAND2_RX_N B11 PRX_MB2_INM GND34 E10
IN
33 100_BAND1_RX_P A9 PRX_HB_INP GND35 F10
IN
33 100_BAND1_RX_N A10 PRX_HB_INM GND36 G10
IN
J1 DRX_BB_QP GND37 H10
25 OUT DRX_BB_Q_P
H1 DRX_BB_QM GND38 J10
25 OUT DRX_BB_Q_N
J2 DRX_BB_IP GND39 H8
25 OUT DRX_BB_I_P
H2 DRX_BB_IM GND40 J8
25 OUT DRX_BB_I_N
100_DRX_BAND13_BAND17_P H14 DRX_LB1_INP
35 IN GND41 D13
100_DRX_BAND13_BAND17_N J14 DRX_LB1_INM
35 IN GND42 H11
100_DRX_BAND5_BAND8_P J13 DRX_LB2_INP
35 IN GND43 G13
100_DRX_BAND5_BAND8_N H13 DRX_LB2_INM
35 IN GND44 J11
100_XCVR_DCS1800_RX_P F14 DRX_MB1_INP
B
32
32
IN
IN
100_XCVR_DCS1800_RX_N
100_DRX_BAND2_RX_P
G14 DRX_MB1_INM
F13 DRX_MB2_INP
GND45 M13
GND46 N13
B
35 IN
100_DRX_BAND2_RX_N E13 DRX_MB2_INM GND47 N11
35 IN
100_DRX_BAND1_BAND4_P D14 DRX_HB_INP GND48 T13
35 IN
100_DRX_BAND1_BAND4_N E14 DRX_HB_INM GND49 T11
35 IN
CELL
R R705
C C705
L LXXX
U U701
A A
PAGE TITLE
RF TRANSCEIVER (1 0F 3)
DRAWING NUMBER SIZE
D D
9
5%
L37005_RF 16V
XM0830SZ SWITCH LOGIC U37001_RF
VDD
5.6NH-3%-140MA CERM
01005
CELL
XM0831SZ-AL1067 1 2
PRX_B5_B8 ACTIVE BAND PORT LLP 01005
=========================================== 29
100_BAND8_RX_N 5 PORT2+ CELL
IN
29
100_BAND5_RX_N 1 PORT3+ PORT1+ 7
IN
HIGH 5 PORT 1 TO PORT 3 L37003_RF
100_BAND8_RX_P 4 PORT2-
C37005_RF 7.5NH-5NH%-140MA
LOW 8 PORT 1 TO PORT 2 29 IN 27PF
29
100_BAND5_RX_P 10 PORT3- PORT1- 8 1 2 1 2 26
IN OUT
100_PRX_B5_B8_SW_P 100_B5_B8_RX_MTCH_P 01005 100_BAND5_BAND8_RX_P
CELL
CTL 6 5%
16V
GND NP0-C0G
01005
CELL
2
3
CELL
PP_LDO14_2P65 13 21 22 27 32 35
1 C37007_RF
SWAPPED BAND5 AND BAND8 INPUTS FROM DEV0 2.2UF
10%
6.3V
U37002_RF
B 74LVC1G04S500
SOT891
6
2 X5R
402
CELL
B
PRX_B5_B8_0 4 2 PRX_B5_B8_1 IN 25
1
NC NC NC 5 NC
3 CELL
R RXXX
C C37007
L L803
U U801
A A
PAGE TITLE
RF TRANSCEIVER (2 OF 3)
DRAWING NUMBER SIZE
D
SHORT-10L-0.1MM-SM
1 2 PP_RF1_15_DRX_LNA 28 L38003_RF
FERR-33-OHM-0.8A-0.09-OHM
CELL
CLOSE TO
1 C38013_RF
0.047UF CLOSE TO
U6.H5
01005
CELL D
1 2 PP_RF1_11_12_RX_TX_DIG U6.H5 20%
1 4V
C38003_RF 2 CERM-X5R
1.0UF 0201 01005
20% CELL XW38005_RF CELL
6.3V 1
2 X5R C38010_RF SHORT-10L-0.1MM-SM
0201-MUR 1.0UF 1 2 PP_RF1_11_12_RX_TX_DIG_E728
CLOSE TO R95 20%
CELL 2 6.3V
X5R
XW38003_RF
SHORT-10L-0.1MM-SM
0201-MUR
CELL
PP_SMPS2_RF1_1V3 U36001_RF
PP_RF1_13_GPS_LNA 28 L38023_RF
1 2 28 24 22
FERR-33-OHM-0.8A-0.09-OHM
TRANSCEIVER
BGA196
1 2 PP_RF1_21_GPS_VCO (2 OF 4)
28
0201 28
PP_RF1_1_PRX_VCO M8 VDD_RF1_1 GND0 L7
CELL RX OSCILLATOR 1
1 C38015_RF 28 PP_RF1_2_TX_VCO U5 VDD_RF1_2 TX OSCILLATOR 1 GND1 L8
0.1UF CLOSE TO K4 VDD_RF1_3 RX
CLOSE TO 20% U6.D6 28 PP_RF1_3_20_23_RX_PLL PLL GND2 M7
U6.D6 R5 VDD_RF1_23 TX
4V
2 X5R 28 PP_RF1_3_20_23_TX_PLL PLL GND3 R7
01005 28 PP_RF1_4_TX_LO M10 VDD_RF1_4 TX LO HIGH/MID BAND GND4 T7
CELL R11
L38004_RF 28 PP_RF1_5_PRE_DRIVER VDD_RF1_5 LB/HB PRE DRIVER AMP GND5 U7
FERR-33-OHM-0.8A-0.09-OHM L14 VDD_RF1_6 HB PRE DRIVER AMP GND6 L11
1 2 PP_RF1_1_PRX_VCO 28
P10 VDD_RF1_7 TX LB GND7 U11
0201 28
PP_RF1_8_TX_MIXER_LB_DA P11 VDD_RF1_8 TX MIXER GND8 N10
CELL CELL 1 C38017_RF
1 C38016_RF PP_RF1_9_HB_DA P13 GND9 N4
L38018_RF 0.1UF CLOSE TO 28 VDD_RF1_9 HIGH BAND DRIVER AMP
120-OHM-25%-450MA 10UF 4V
20% U6.M8 R13 VDD_RF1_10 LB DRIVER AMP GND10 L5
20%
PP_RF1_2_4 1 2 PP_RF1_4_TX_LO 28
10V
2 X5R-CERM L38016_RF 2 X5R
01005 28 PP_RF1_11_PDET_TX T10 VDD_RF1_11 TX DIGITAL GND11 H6
0402-1 4.7NH-3%-0.35A CELL 28 PP_RF1_12_DIG M5 VDD_RF1_12 RX/TX/SBI DIGITAL GND12 J7
0201 CLOSE TO
CELL 1 C38021_RF L102 1 2 PP_RF1_18_DRX_LO PP_RF1_13_GPS_LNA B6 VDD_RF1_13 GPS LNA GND13 K5
XW38007_RF 0.22UF 0201
28 28
C38034_RF
CELL
C C942
L L924
01005
CLOSE TO U6.T5
4.7NH-3%-0.35A U6.R5 CELL 10UF
20%
PP_RF1_3_20_23_TX_PLL 6.3V
1
0201
CELL
2
1 C38038_RF
28
2 CERM-X5R
0402CLOSE TO
U6.T5 L38013_RF XW XW906
70-OHM-300MA
A 0.1UF
20% 25 24 22 21
PP_SMPS3_MSME_1V8 1 2 PP_DIG 28
A
2 4V
X5R PAGE TITLE
01005-1
01005
CELL
CLOSE TO
CELL 1 CELL
C38039_RF
RF TRANSCEIVER (3 OF 3)
U6.G5 L38014_RF CLOSE TO 0.1UF DRAWING NUMBER SIZE
240-OHM-0.2A-0.8-OHM U6.M4 AND H4 20% 051-9374 D
24 22 PP_LDO2_XO_HS_1V8 1 2 28 PP_XO_1P8_FILT
4V
2 X5R Apple Inc. REVISION
01005
0201
CELL 1 C38040_RF
CLOSE TO
U6.M4
R
13.0.0
0.1UF NOTICE OF PROPRIETARY PROPERTY: BRANCH
10% THE INFORMATION CONTAINED HEREIN IS THE
2 16V
X5R-CERM PROPRIETARY PROPERTY OF APPLE INC.
0201 THE POSESSOR AGREES TO THE FOLLOWING: PAGE
CELL CLOSE TO
U6.P5
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
38 OF 102
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
SHEET
28 OF 46
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
HIGH ATTENUATION
FL39002_RF
D C39001_RF L39011_RF
UMTS-BAND8TX-2.6DB
SAFFB897MAM0F57 L39002_RF D
6.2NH-5NH%-140MA LLP 6.8NH-3%-140MA
10PF 50_BAND8_TX_PA_IN
26 50_XCVR_3G_B8_TX 1 2 50_3G_TX_B8_T 1 2 50_TX_3G_B8_FILT 1 INPUT OUTPUT 4 50_BAND8_TX_INT_OUT 1 2
IN
01005 01005
5% CELL GND CELL
16V
CERM 1 C39003_RF 1 1 C39024_RF
01005 CELL 82PF 0.4PF
2
3
5
CELL 5% +/-0.1PF
6.3V 16V
PLACE MATCHING L39001_RF NP0-C0G 2 2 NP0-C0G
CLOSE TO XCVR 01005 01005
5.1NH-3%-0.16A NOSTUFF CELL
01005
CELL
PA_ON_B5 IN 25
34 33 31 30 IN PP_PA PA_ON_B8 IN 25
PA_R0 IN 25 30 31 33 34
1 C39021_RF 1 C39022_RF
220PF 1.0UF PA_R1 IN 25 30 33
10% 20%
2 10V
X7R-CERM 2 6.3V
X5R 1 1 1 1
01005 0201-MUR C39007_RF C39008_RF C39009_RF C39011_RF
CELL CELL 100PF 100PF 100PF 100PF
5% 5% 5% 5%
16V 16V 16V 16V
2 NP0-C0G 2 NP0-C0G 2 NP0-C0G 2 NP0-C0G
HIGH ATTN 01005
CELL
01005 01005
NOSTUFF
01005
NOSTUFF
CELL
34 33 31 30 23 22 21 IN PP_BATT_VCC_CONN
FL39001_RF
SAFFB836MAL0F57
C C39005_RF
12PF
C39004_RF
33PF LGA C39006_RF
10PF 1 C39020_RF
C
26
50_XCVR_3G_B5_TX 1 2 50_3G_TX_B5_T 1 2 50_BAND5_TX_INT_IN 1 IN OUT 4 50_BAND5_TX_INT_OUT 1 2 50_BAND5_TX_PA_IN 0.01UF
IN 10%
5% 5% 5% 2 6.3V
X5R
16V 16V 16V 01005 50_CPL_B13_B17_OUT
CERM NP0-C0G 1 CERM 1 CELL IN 30
01005 01005 GND 01005
CELL 1 CELL OMIT CELL
2
3
5
VBATT 25
VEN_5 27
VEN_8 28
4.7NH-3%-160MA
VMODE0 21
VMODE1 22
01005
CELL
VCC 2
01005 NOSTUFF
CELL
2 2
2 CPL_IN 4
CPL_OUT 19
U39001_RF
L39012_RF L39013_RF 23 RFIN_5 SKY77487 RFIN_8 30 L39005_RF
6.8NH-3%-0.3A 7.5NH-150MA LGA R39002_RF 4.7NH-3%-0.35A
50_TXRX_B5_ASM 1
13 ANT_5
0 50_TXRX_B8_ASM
32 BI
2 50_TXRX_B5_PAD_MCH 1 2 50_TXRX_B5_PAD_ANT ANT_8 10 50_TXRX_B8_PAD_ANT 1 2 50_TXRX_B8_PAD_MCH 1 2
BI 32
0201 0201 5% 0201
CELL 1/20W CELL
CELL 16 RX_5 RX_8 6 MF
201
1 C39012_RF
17 RX_5Q RX_8Q 7 CELL 1 C39013_RF
1.2PF
2.1PF GND THRM_PAD +/-0.1PF
25V
+/-0.1PF 2 C0G-CERM
25V
2 C0G-CERM OMIT 0201
1
3
5
8
9
11
12
14
15
18
20
24
31
32
33
34
35
36
37
38
39
40
41
42
26
29
0201
CELL
CELL
B C39014_RF B
15PF
100_BAND8_DUPLX_RX_N 1 2 100_BAND8_RX_N 27
OUT
5% CELL
1 16V
NP0-C0G-CERM
01005
L39007_RF
1.0NH+/-0.1NH-0.22A-0.9OHM
01005
NOSTUFF
100_BAND8_DUPLX_RX_P
353S3415 1 SKY77487 BAND 5/8 PAD U39001_RF Y B4_17
39PF 5% CELL
TABLE_5_ITEM 16V
353S3568 1 SKY77491 BAND5_E/8 PAD U39001_RF Y B3_13 100_BAND5_DUPLX_RX_N 1 2 100_BAND5_RX_N OUT 27
NP0-C0G-CERM
01005
TABLE_5_ITEM
R R1003
TABLE_5_ITEM
L39009_RF
15NH-5%-140MA C C39023
01005
NOSTUFF L L39010
2
C39019_RF
U U1001
A 39PF
1 2 100_BAND5_RX_P
OUT 27 A
100_BAND5_DUPLX_RX_P PAGE TITLE
5%
16V
NP0-C0G
BAND 5/8 PAD
01005 DRAWING NUMBER SIZE
CELL
Apple Inc. 051-9374 D
REVISION
R
13.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
39 OF 102
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 29 OF 46
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
L40006_RF
R40004_RF 7.5NH-5NH%-140MA
100_BAND13_DUPLX_RX_P 1
0.00 2 100_BAND13_DUPLX_MATCH_RX_P 1 2 100_BAND13_RX_P
OUT 26
0% 01005
1/32W CELL
MF 1
1 01005
PP_PA CELL SIGNAL_MODEL=EMPTY
34 33 31 29 IN SIGNAL_MODEL=EMPTY
L40012_RF L40007_RF PLACE MATCHING
15NH-3%-140MA CLOSE TO XCVR
15NH-3%-140MA 01005
01005 NOSTUFF
CELL
34 33 31 29 23 22 21 IN
PP_BATT_VCC_CONN 1 C40007_RF 1 C40008_RF 2 L40008_RF
220PF 1.0UF 2 R40005_RF 7.5NH-5NH%-140MA
10% 20% 0.00 2 100_BAND13_RX_N
1 C40005_RF 2 10V
X7R-CERM 2 6.3V
X5R
1 1 2
OUT 26
01005 0201-MUR 100_BAND13_DUPLX_RX_N 100_BAND13_DUPLX_MATCH_RX_N
0.01UF 0% 01005
10% CELL CELL 1/32W CELL
6.3V MF
2 X5R 01005
01005 CELL
LOW INSERTION LOSS CELL
PLACE MATCHING
CLOSE TO XCVR FL40001_RF
UMTS-BAND17TX-1DB
CELL
L40009_RF C40002_RF SAFFB710MAA0F57
C40003_RF C40004_RF
C 26
4.7NH-3%-160MA
1 50_3G_TX_B13_T
2
18PF
1 2 50_BAND13_TX_INT_IN 1 INPUT
LLP
OMIT
OUTPUT 4
6.8PF
1 2 50_3G_TX_B13_PA_T
18PF
1 2 50_BAND13_TX_PA_IN
C
IN
50_BAND13_TX_INT_OUT
01005
10
50_XCVR_3G_B13_TX CELL 2% GND +/-0.1PF 2%
1
16V 16V 1 16V
CERM NP0-C0G CERM
01005 01005 01005 VCC1 VCC2
2
3
5
7
5
4
2
33 29 25 IN PA_R1 1 PA_R1_VBP
0%
L40003_RF 1
1/32W 27NH-3%-0.140A-2.3OHM
MF
01005 5 VEN
0201
L40004_RF
1 C40017_RF
CELL OMIT 2.7PF
THRM 15NH+/-3%-0.25A-0.7OHM +/-0.1PF
GND PAD 0201 25V
2 2 C0G-CERM
34 33 31 29 25 IN PA_R0 OMIT 0201
11
CELL
2
25
PA_ON_B13
IN
1
R40003_RF
49.9
1%
1/32W
MF
2 01005
CELL
FL FL1101
R R1102
TABLE_5_ITEM
C C1118
L L1108
TABLE_5_ITEM
155S0738
152S1280
1
1
BAND13 DUPLEXER
C40011_RF
Y
Y
B3_13
B4_17
TABLE_5_ITEM
U U1102
TABLE_5_ITEM
A PA POWER MODES
131S0129
131S0198
1
1
22 PF CAPACITOR, 0201
L40003_RF
Y
Y
B3_13
B4_17
TABLE_5_ITEM
A
PAGE TITLE
BAND 13 PA
TABLE_5_ITEM
D C41001_RF
56PF
5%
1 1 C41018_RF 1 C41019_RF
0.01UF
10%
4.7UF
20%
1 C41020_RF
1 C41021_RF
0.01UF
10%
LOW BAND
LOW BAND
HIGH BAND
EDGE
EDGE
EDGE
MEDIUM
HIGH
LOW
LOW
LOW
HIGH
10 TO 14
8 TO 9
9 TO 15
D
6.3V 6.3V 6.3V 1.0UF 6.3V
HIGH BAND EDGE HIGH LOW 2 TO 8
NP0-C0G 2 2 X5R 2 X5R 20% 2 X5R
01005 01005 402 6.3V
2 X5R 01005
CELL CELL CELL 0201-MUR CELL
CELL
31 DCDC_PGND DCDC_PGND 31
IN1 B2
IN2 C2
A2 REFIN CELL
DCDC_ADJ OUT C3
25 IN
U41001_RF
25 DCDC_EN B1 EN MAX77100 2.2UH-20%-1.7A-200MOHM PLACE CLOSE TO L41001_RF
IN
WLP 1 2
C1 MODE LX B3 DCDC_OUT PP_PA OUT 29 30 31 33 34
25 IN DCDC_MODE
TFA201610G-SM
CELL CELL
L41001_RF
A1 AGND
A3 PGND
CELL 1 C41002_RF1 C41015_RF
4.7UF 1000PF
20% 10%
6.3V 2 6.3V
XW41002_RF 2 X5R X5R-CERM
SHORT-10L-0.25MM-SM 402 01005 PP_PA
34 33 31 30 29 IN
31 DCDC_PGND 1 2
NOSTUFF
DCDC_PGND 31 1 C41005_RF
XW41003_RF 1 C41006_RF
SHORT-10L-0.25MM-SM 4.7UF 0.1UF
20% 20%
1 2 6.3V
2 X5R-CERM1 4V
2 X5R
NOSTUFF 402 01005
CELL
CELL
L41007_RF
C 34 33 31 30 29 23 22 21 PP_BATT_VCC_CONN 1 2 PP_BATT_VCC_FB
C
IN
01005
C41009_RF L41003_RF 240-OHM-25%-0.20A-1.0DCR
12PF 4.7NH-3%-160MA CELL
26 IN
50_XCVR_2G_PA_HB_TX 1 2 50_TX_G_HB_MCH 1 2 50_TX_G_HB_PAIN
1 C41003_RF
1 C41022_RF 1 C41004_RF
01005 1.0UF
5% CELL 56PF 20% 0.01UF
16V 5% 6.3V 10%
CERM 16V 2 X5R 6.3V
01005 2 NP0-C0G 0201-MUR 2 X5R
CELL 1 C41016_RF 01005
CELL
CELL 01005
CELL
2.4PF
+/-0.1PF
16V
2 NP0-C0G
V2G 14
01005-1
VBATT 7
CELL
U41002_RF L41004_RF
SKY77352 R41002_RF 1.5NH+/-0.1NH-600MA
L41005_RF C41017_RF 1
LGA
HB_GSM_RF_OUT 11 50_TX_G_HB_PAOUT 1
0 2 50_TX_G_HB_PAMCH 1 2 50_TX_G_HB_ASM OUT
0.8NH+/-0.1NH-0.32A-0.6OHM 33PF
HB_GSM_RF_IN 32
5% 0201
26
50_XCVR_2G_PA_LB_TX 1 2 50_TX_G_LB_MCH 1 2 50_TX_G_LB_PAIN 3 LB_GSM_RF_IN LB_GSM_RF_OUT 8 1/20W CELL
IN MF
01005
CELL 5%
16V 34 33 30 29 25 IN
PA_R0 6 VMODE0
201
CELL
1 C41010_RF
NP0-C0G 0.5PF
4 +/-0.05PF
01005 25 IN
GSM_PA_LB_EN PA_ON2 25V
2 COG-CERM
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
CELL GSM_PA_HB_EN 5
25 IN PA_ON3 0201
CELL
1 C41011_RF
6PF C41007_RF
1 C41008_RF
GND
GND
GND
GND
GND
1
+/-0.5PF
B 16V
2 NP0-C0G
01005
5%
100PF
16V
100PF
5%
16V CELL CELL B
2
9
10
12
13
15
16
17
18
19
20
21
22
23
CELL
2 NP0-C0G
01005
2 NP0-C0G
01005 L41008_RF L41006_RF
CELL CELL
2.2NH+/-0.1NH-0.6A 4.7NH-3%-0.35A
50_TX_G_LB_PAOUT 1 2 50_TX_G_LB_PAMCH 1 2 50_TX_G_LB_ASM OUT 32
0201 0201
CELL
1 C41012_RF
1.5PF
+/-0.1PF
25V
2 C0G-CERM
0201
CELL
R R1209
C C1215
L L41007
U U1202
A A
PAGE TITLE
ASM,DCS RX
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D D
35 27 22 21 13
PP_LDO14_2P65
IN
1 C42005_RF 1 C42006_RF
100PF 0.1UF
5% 20%
16V 4V
2 NP0-C0G 2 X5R
C 01005
CELL
01005
CELL
C
CELL
C42001_RF L42004_RF
16
27PF 1.2NH+/-0.1NH-220MA USE MURATA PART DUE TO LARGEST PACKAGE OUTLINE
26 OUT
100_XCVR_DCS1800_RX_N 1 2 100_DCS1800_RX_MATCH_N 1 2 FL42001_RF PIN DEFINITION UPDATED FOR LAYOUT/ISOLATION COMPROMISE
VDD
5%
01005
1
DCS1800-RX-2.0DB PLACE R42002 CLOSE TO FL42001
5/30/2011
U42001_RF
1 CELL SAFFB1G84FB0F57
16V
NP0-C0G LLP SKY13420
01005 SIGNAL_MODEL=EMPTY
3 OUT1
R42002_RF 29 BI 50_TXRX_B8_ASM 6 TRX1 LGA VC1 11 ANT_SEL_0 IN 25
L42001_RF L42002_RF 100_PRX_DCS_G_1_P OMIT 0.00 2 7 12
5.6NH-3%-140MA 4 OUT2 IN 1 50_RX_DCS_FIL 1 33 BI 50_TXRX_B4_ASM TRX2 VC2 ANT_SEL_1 IN 21 25
10NH-3%-140MA 100_PRX_DCS_G_1_N
01005 01005 0% 29 50_TXRX_B5_ASM 8 TRX3 VC3 13 ANT_SEL_2 21 25
GND 1/32W BI IN
CELL CELL 9 14
MF 50_TXRX_B1_ASM TRX4 VC4 ANT_SEL_3
C42002_RF L42005_RF 01005 1
R42003_RF
33 BI IN 25
5
2
1.2NH+/-0.1NH-220MA 2 OMIT 50_RX_DCS 10 TRX5 VC5 15 ANT_SEL_4_LOW
27PF 2 0.00 17
26 OUT
100_XCVR_DCS1800_RX_P 1 2 1 2 R42007_RF
1 0%
1/32W
50_OHM_TERM_2 TRX6
100_DCS1800_RX_MATCH_P 0.00 MF 50_TXRX_B13_ASM 18 TRX7
5%
01005
CELL
0%
1/32W 2 01005
OMIT 34 BI 50_TXRX_B2_ASM 19 TRX8
1
R42010_RF
16V MF 10K 1 1 C42008_RF
1 CELL 1 C42010_RF
NP0-C0G
01005 2 01005 ANT1 20 5% 100PF 100PF 100PF 100PF
OMIT 1/32W
CELL 31 IN 50_TX_G_HB_ASM 4 TXHB ANT2 1 MF 5% 5% 5% 5%
16V 16V 16V 16V
PLACE R42007 CLOSE TO FL42001 5 TXLB 2 01005 2 NP0-C0G 2 NP0-C0G 2 NP0-C0G 2 NP0-C0G
50_DRX_B3_ZERO_OHM 31 IN 50_TX_G_LB_ASM ANT3 2 01005 01005 01005 01005
THRM CELL
PAD GND C42007_RF CELL C42009_RF CELL
R42001_RF
1 CELL
21
OMIT
3
0.00
0%
1
R42006_RF L42006_RF
1/32W 49.9 1.5NH+/-0.1NH-600MA
MF
2 01005
1% R42011_RF
OMIT
1/32W
MF
0.00 2 1 2 50_PRI_ANT
50_ASM_ANT 1 50_ASM_ANT_MCH IN 36
35 IN 50_DRX_B3_OUT PLACE R42001 CLOSE TO R42005 2 01005
CELL 1% 0201
1/20W
B R42005_RF
1
MF
0201
CELL 1 C42013_RF
CELL
B
49.9 50_ANT2_TERM 0.5PF
1% +/-0.05PF
1/32W 25V
MF 2 COG-CERM
50_ANT1_TERM 0201
2 01005
OMIT R42008_RF 1 1
R42009_RF CELL
OMIT
49.9 49.9
FL42002_RF 1% 1%
BAND13-0.3DB 1/32W 1/32W
LFL18766MTH1D393 3 MF MF
30 IN 50_BAND13_TRX 1 IN OUT 01005 2 2 01005
CELL CELL
GND
2
R R42011
TABLE_5_ITEM
C42013
TABLE_5_ITEM
155S0729
155S0695
1
1
BAND3 RX FIL
THRU LINE
FL42001_RF
FL42002_RF
Y
Y
B3_13
B4_17
TABLE_5_ITEM
C
155S0722 1 BAND13 TX LPF FL42002_RF Y B3_13
TABLE_5_ITEM
L 42006
U U1301
TABLE_5_ITEM
FL
TABLE_5_ITEM
FL1302
A 118S0652
118S0652
1
1
49.9OHM RES
49.9OHM RES
R42003_RF
R42005_RF
Y
Y
B3_13
B4_17
TABLE_5_ITEM
A
PAGE TITLE
D D
34 31 30 29 IN PP_PA
1 C43026_RF
220PF PA_R0 IN 25 29 30 31 34
10%
10V
2 X7R-CERM
01005
PA_R1 IN 25 29 30
CELL
B1B4_SELECT IN 25
PA_ON_B1B4 IN 25
1 C43005_RF 1 C43006_RF
100PF 100PF
5% 5%
PP_BATT_VCC_CONN 16V 16V
34 31 30 29 23 22 21 IN 2 NP0-C0G 2 NP0-C0G
01005 01005
CELL CELL
LOW INSERTION LOSS 1 C43017_RF
0.01UF
FL43001_RF 10%
2 6.3V
C43001_RF C43002_RF SAFFB1G95AA0F57 C43028_RF X5R
01005 50_CPL_B5_B8_OUT IN 29
VBATT 28
PA_ON 24
VCC 21
BS 25
16V 16V 16V
VMODE0 2
VMODE1 1
NP0-C0G
01005-1 1
CERM
01005 GND
NP0-C0G
01005
50_CPL_B1_B4_OUT OUT 34 L43012_RF C43023_RF
0.4NH+/-0.1NH-320MA
C CELL CELL CELL CELL 1 27PF
C
2
3
5
PLACE MATCHING 50_BAND1_TX_INT_OUT CPL_IN 4 100_BAND1_DUPLX_RX_P 1 2 100_BAND1_DUPLX_MATCH_RX_P 1 2 100_BAND1_RX_P
CLOSE TO XCVR L43001_RF 1 L43002_RF 30 RFIN_1 CPL_OUT 19 PLACE CLOSE TO PAD 01005
OUT 26
2.2NH+/-0.1NH-200MA CELL 5%
01005 4.7NH+/-0.3NH-160MA
7 ANT_1 U43001_RF 1 1 16V
CELL 01005 RX1Q 10 NP0-C0G
L43021_RF NOSTUFF SKY77486
RX1 11
SIGNAL_MODEL=EMPTY 01005
CELL PLACE MATCHING
2 15NH-5%-140MA 23 RFIN_4 LGA L43003_RF L43005_RF
01005 2 OMIT
CELL 16 ANT_4 RX4Q 12 4.7NH-3%-160MA 3.3NH+/-0.3NH-150MA CLOSE TO XCVR
01005 01005
GND THRM_PAD RX4 13 CELL NOSTUFF
2
CELL
2 L43014_RF 2 C43024_RF
3
5
6
8
9
29
14
15
17
18
20
22
26
31
32
33
34
35
36
37
38
39
40
41
42
27
0.4NH+/-0.1NH-320MA 27PF
100_BAND1_DUPLX_RX_N 1 2 1 2 100_BAND1_RX_N 26
OUT
LOW INSERTION LOSS 01005
100_BAND1_DUPLX_MATCH_RX_N
CELL 5%
FL43002_RF 16V
NP0-C0G
01005
BAND4-TX-1.6DB
SAFFB1G73KA0F57
C43009_RF C43010_RF LLP L43017_RF L43020_RF C43021_RF
7.0PF 18PF 2.9NH+/-0.1NH-200MA R43005_RF 4.7NH+/-0.3NH-160MA 10PF
50_XCVR_3G_B4_TX 1 2 50_TX_B4_MCH 1 2 50_BAND4_TX_IN 1 OMIT 1
4 50_BAND4_TX_INT_OUT 2
0.00 2 1 2 100_BAND4_DUPLX_MATCH_RX_P 1 2 100_BAND4_RX_P
26 IN IN OUT 50_BAND4_TX_PA_IN 1 100_B4_DUPLX_P OUT 26
+/-0.1PF 2% GND
01005 L43024_RF L43009_RF 100_BAND4_DUPLX_RX_P 0%
1/32W
01005
5%
16V 16V OMIT 2.2NH+/-0.1NH-0.6A 3.0NH+/-0.1NH-0.45A MF
OMIT 1 16V
NP0-C0G CERM 01005 1 C43020_RF CERM
2
3
5
01005 01005 1 2 1
50_TXRX_B4_PAD_MCH 2 01005
SIGNAL_MODEL=EMPTY
CELL CELL 1
50_TXRX_B4_PAD_ANT0201
BI 32 PLACE CLOSE TO PAD 1
R43004_RF 1.0PF OMIT
0201 50_TXRX_B4_ASM NOSTUFF +/-0.1PF L43013_RF
1 1 C43011_RF OMIT CELL
0%
0.00 16V
2 NP0-C0G 6.2NH-5NH%-140MA
0.7PF L43008_RF 1/32W
PLACE MATCHING 01005 01005
+/-0.1PF MF CLOSE TO XCVR OMIT OMIT
L43007_RF 2 16V 6.2NH-5NH%-140MA
NP0-C0G 01005 2 01005
1.7NH+/-0.1NH-0.200A 01005 CELL
01005 OMIT NOSTUFF
R43006_RF C43015_RF 2 C43022_RF
CELL 1 C43016_RF 0.00 2
1.0PF 10PF
B 2
2 1.8PF
+/-0.1PF
25V
2 C0G 100_BAND4_DUPLX_RX_N
1
0%
CELL
100_B4_DUPLX_N
1
+/-0.1PF
2
100_BAND4_DUPLX_MATCH_RX_N
1
5%
2 100_BAND4_RX_N
OUT 26
B
1/32W
201 MF 16V 16V
OMIT 01005 NP0-C0G CERM
01005 1 01005
L43016_RF
OMIT
TABLE_5_HEAD 4.7NH+/-0.3NH-160MA
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION 01005
TABLE_5_ITEM
1 2
50_TXRX_B1_PAD_MCH 1 2
50_TXRX_B1_ASM
131S0375 1 1.0 PF CAPACITOR C43015_RF Y B4_17 BI 32
0201 0201
50_TXRX_B1_PAD_ANT
TABLE_5_ITEM
R R1406
131S0377 1 1.2PF CAPACITOR C43015_RF Y B3_13
TABLE_5_ITEM
C C43027
131S0377 1 1.2 PF CAPACITOR C43011_RF Y B4_17
TABLE_5_ITEM
TABLE_5_ITEM
BOM OPTIONS TABLE_5_HEAD
L L43018
152S1571 1 5.6 NH INDUCTOR C43011_RF Y B3_13 PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION
U U1401
FL FL1101
TABLE_5_ITEM
TABLE_5_ITEM
131S0215 1 22 PF CAPACITOR L43017_RF Y B3_13 353S3443 1 B1/3 PAD, AVAGO AFEM-7813 U43001_RF Y B3_13
A A
TABLE_5_ITEM
TABLE_5_ITEM
PAGE TITLE
152S1063
1
1
B3 TX FIL
2.2NH INDUCTOR
FL43002_RF
L43022_RF
Y
Y
B3_13
B4_17
TABLE_5_ITEM BAND 1/4 PAD
DRAWING NUMBER SIZE
051-9374 D
TABLE_5_ITEM
TABLE_5_ITEM
131S0219 1 10PF CAPACITOR C43022_RF Y B4_17 152S1222 1 3.0NH INDUCTOR L43023_RF Y B3_13 BRANCH
TABLE_5_ITEM
BAND2 PAD
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D D
33 31 30 29 IN PP_PA PA_R0 IN 25 29 30 31 33
1 C44011_RF1 C44012_RF
220PF 1.0UF PA_ON_B2 IN 25
10% 20%
10V 6.3V
2 X7R-CERM 2 X5R
01005
CELL 0201-MUR 1 C44005_RF L44011_RF L44009_RF
CELL 100PF 1.0NH+/-0.1NH-0.75A 1.8NH+/-0.1NH-600MA
5%
16V 1 2 50_TXRX_B2_PAD_MCH 1 2 50_TXRX_B2_ASM
2 NP0-C0G BI 32
01005 0201 0201
CELL CELL CELL
PP_BATT_VCC_CONN
33 31 30 29 23 22 21 IN 1 C44014_RF
0.5PF
+/-0.05PF
1 C44013_RF 25V
2 COG-CERM
C
0.01UF
10%
6.3V
2 X5R
0201
CELL C
01005
CELL
HIGH ATTENUATION
VM 11
12
VCC1 1
VCC2 2
FL44001_RF
VEN
B2-25-TX-3.5DB
C44001_RF C44015_RF SAFFB1G88KC1F57
LLP
L44008_RF
C44003_RF 2.3NH+/-0.1NH-0.2A-1.35OHM CPL 10 50_CPL_PDET 26
OUT
3.5PF 18PF 33PF
50_XCVR_3G_B2_TX 1 2 50_3G_TX_B2_T 1 2 50_BAND2_TX_INT_IN 1 INPUT OUTPUT 4 50_TX_B2 1 2 50_TX_PCS_1 1 2 50_TX_PCS_2 13 RFIN U44001_RF
ANT 7 50_TXRX_B2_PAD_ANT C44007_RF L44005_RF
26 IN BAND-2-25 33PF 3.0NH+/-0.1NH-200MA
01005 TQM666083
+/-0.1PF 2% GND 5% CELL 4 ISO LGA
RX 6 50_B2_DUPLX_RX 1 2 50_B2_RX_BAL 1 2 100_BAND2_RX_P
OUT 26
16V 16V 16V 1 OMIT
NP0-C0G CERM NP0-C0G 01005
01005 01005 01005 9 5%
2
3
5
3
5
8
14
CELL
01005 1.5PF
L44010_RF NOSTUFF
2.1NH+/-0.1NH-0.2A-1.35OHM
01005 2
CELL +/-0.1PF
1 16V
SIGNAL_MODEL=EMPTY NP0-C0G
01005-1
2
CELL C44010_RF
C44008_RF L44007_RF 15PF
1.5PF 5.6NH-3%-140MA B2_RX_BAL_TERM 1 2
+/-0.1PF
16V 01005
NP0-C0G SIGNAL_MODEL=EMPTY 5%
50_CPL_B1_B4_OUT 01005-1 16V
33 IN CELL NP0-C0G-CERM
CELL 2 L44006_RF 01005
CELL
3.0NH+/-0.1NH-200MA
1 2
B 01005
CELL B
100_BAND2_RX_N 26
OUT
C C44014
L L1509
TABLE_5_ITEM
BAND2 PAD
DRAWING NUMBER SIZE
RX DIVERSITY
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
DIVERSITY MODULE LOGIC
BAND
BAND
VC1
1/4
VC2 VC3
==================================
BAND 2
32 27 22 21 13 IN PP_LDO14_2P65 BAND 5
BAND 8
1 C45001_RF 1 C45002_RF BAND 13/17
0.01UF 56PF
10% 5%
D
6.3V
2 X5R
01005
2 16V
NP0-C0G
01005 D
CELL CELL
3
25 IN DRX_MODE_SEL_A
VDD
U45001_RF 100_DRX_B13_B17_SW_N 35
OUT
DRX_MODE_SEL_B
B30374D5056V025
25 IN LGA
4 OMIT 100_DRX_B13_B17_SW_P
VC1 BAND17+ 1 OUT 35
5 VC2 BAND17- 24
25 IN DRX_MODE_SEL_C 6 VC3
BAND5/8+ 22 100_DRX_B5_B8_SW_P 35
OUT
C45003_RF C45004_RF C45005_RF BAND5/8- 21
1 1 1
TERM 11
L45013_RF GND 100_DRX_BAND1_BAND4_SAW_OUT_N
50_OHM_TERM
OUT 35
1.4NH+/-0.1NH-0.6A-0.15OHM R45010_RF
0
2
7
9
10
12
15
18
20
23
25
36 50_DRX_ANT 1 2 50_DRX_ASM_MCH 1 2 50_DIVERSITY_SWITCH_MATCH
IN 100_DRX_BAND1_BAND4_SAW_OUT_P 35
0201 5% OUT
CELL 1/20W
MF
201
C 1 C45015_RF
CELL 50_DRX_B3_OUT OUT 32
C
1.2PF
+/-0.05PF
2 25V
C0G-CERM
1
R45003_RF
0201 49.9
1%
CELL 1/20W
MF
2 201
CELL
C45013_RF L45008_RF
12PF R45004_RF 7.5NH-5NH%-140MA
100_DRX_BAND2_SAW_OUT_P 1 2 100_DRX_BAND2_RX_P 100_DRX_B13_B17_SW_P 0.00 100_DRX_B13_B17_MATCH_P 1 2 100_DRX_BAND13_BAND17_P
35 IN OUT 26 35 IN 1 2 OUT 26
0% 01005
5% 1/32W CELL
1 16V 1 MF 1
CERM 01005
01005 CELL
CELL
L45006_RF L45007_RF L45009_RF
5.1NH-3%-0.16A 4.3NH-3%-180MA 15NH-3%-140MA
01005 01005 01005
CELL NOSTUFF CELL
2 C45014_RF 2 2
L45010_RF
12PF
35 IN
1 2 100_DRX_BAND2_RX_N
OUT 26
R45005_RF
1
0.00 2
7.5NH-5NH%-140MA
1 2 R R1603
C1616
35 IN OUT 26
100_DRX_BAND2_SAW_OUT_N
5%
16V
CERM
01005
100_DRX_B13_B17_SW_N
0%
1/32W
MF
100_DRX_B13_B17_MATCH_N 01005
CELL
100_DRX_BAND13_BAND17_N
C
L L1610
01005
CELL CELL
U U1601
A A
PAGE TITLE
RX DIVERSITY
BOM OPTIONS TABLE_5_HEAD
Apple Inc.
DRAWING NUMBER
051-9374
SIZE
D
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION REVISION
GPS
PLACE CLOSE TO ANTENNA CONNECTOR
J46002_RF
MM5829-2700 C46026_RF
F-ST-SM
27PF
PRIMARY ANTENNA 1 50_PRI_ANT_TEST_COAX 1 2 50_PRI_ANT BI 32
D CELL
1 5%
25V
1 1
D
2
3
4
NP0-C0G
L46022_RF 0201
CELL L46023_RF L46027_RF
27NH-3%-0.140A-2.3OHM 47NH-100MA 4.7NH-3%-0.35A
0201 0201 0201
CELL NOSTUFF NOSTUFF
2 2 2
50_WIFI_NOTCH
1 C46029_RF
0.75PF
+/-0.1PF
25V
2 C0G
J46003_RF 201
GPS & SECONDARY ANTENNA MM8930-2600B NOSTUFF
J46004_RF F-RT-SM
MM4829-2702
F-ST-SM R46007_RF
0 2 1
1 50_GPS_DIV_ANT_TEST_COAX 1 2 50_GPS_DIV_ANT_MCH 50_GPS_DIV_SW_CONN
R C
5%
1/20W
CELL MF
2
3
4
201 GND 1
CELL
1
6
5
4
3
CELL
1 C46025_RF L46026_RF
4.7NH-3%-0.35A
1.5PF L46002_RF 0201
+/-0.1PF NOSTUFF
2 25V 10NH-3%-250MA
C0G-CERM
0201
0201 L46028_RF
CELL NOSTUFF
2 22-OHM-25%-0.18A-0.9DCR
PP_LDO5_GPS_LNA_2V5_FILT 1 2
PP_LDO5_GPS_LNA_2V5
2 50_WIFI_NOTCH2
C C
22
01005 CELL
1 C46028_RF 1 C46023_RF
0.75PF 1
+/-0.1PF C46020_RF R46005_RF 10PF
2 25V
C0G 1 4.7K
5%
16V
201 15PF 1% 2 CERM
01005
NOSTUFF 5% 1/32W 1
16V MF
NP0-C0G-CERM 2 01005 CELL
01005 2
CELL
CELL L46018_RF
GPS_LNA_BIAS
4.7NH-3%-160MA PLACE THIS STUFF CLOSE TO U2
01005
CELL
2 L46006_RF
GPS_LNA_VDD 10NH-3%-140MA
L46010_RF L46016_RF 100_GPS_FILT_OUT_P 1 2 100_GPS_IN_P OUT 26
FL46001_RF 4.7NH-3%-0.35A
6
01005
8.2NH+/-3%-0.25A-0.7OHM FL46002_RF CELL
1 2 VSD VDD
SASLE1G58AA0F57
1 2
0201 U46001_RF SAFFB1G58FA0F57
0201
CELL C46030_RF C46027_RF C46007_RF LLP 1 1
LGA CELL MGA300G
L46024_RF 50_GPS_FILT2 50_GPS_FILT4 1
27PF 27PF UDFN 56PF
OUT1 3
GPS/GNSS 1 50_GPS_FILT1 2 50_GPS_MCH 1 2 1 RFIN RFOUT 5 50_GPS_LNA_OUT1 2 50_GPS_FILT_IN 1
L46007_RF
1.5NH+/-0.1NH-600MA C46022_RF
IN
OUT2 4 L46013_RF
50_GPS_DIV_SW_CONN 1 2 50_GPS_DIV_TRI_ANT 6 ANT HB/LB 3 C46013_RF 0.75PF 1% 1%
50_GPS_LNA_IN 5% GND 1.0NH+/-0.1NH-0.22A-0.9OHM 1.0NH+/-0.1NH-0.22A-0.9OHM
GND
36 THRM
5.0PF 25V 25V 16V 01005
NC
0201 1 2 NP0-C0G NP0-C0G PAD NP0-C0G CELL
01005
NOSTUFF
2
5
CELL GND 1 2 201 201 01005 NOSTUFF
CELL CELL CELL CELL CELL
2
3
7
CELL +/-0.1PF 2 2
+/-0.05PF 25V
2
4
5
7
8
9
1 25V C0G
1 C0G-CERM
0201
201 L46009_RF
CELL 10NH-3%-140MA
L46003_RF L46004_RF 1
1 2 100_GPS_IN_N
10NH-3%-250MA 10NH-3%-250MA 100_GPS_FILT_OUT_N OUT 26
0201 1 01005
B NOSTUFF
0201
NOSTUFF
L46017_RF
12NH+/-3%-0.25A-0.7OHM
CELL
B
2
2
0201
CELL
L46019_RF
27NH-3%-0.140A-2.3OHM
0201
2
CELL
50_GPS_FILT3 2
1 C46021_RF
2.9PF
+/-0.05PF
2 25V
C0G-CERM
0201
CELL
R46008_RF
0
50_TRI_DIV_RX 1 2 50_DRX_ANT OUT 35
5%
1/20W
MF
201
CELL 1
R R46007
1
L46021_RF
C C46030
L46020_RF
10NH-3%-250MA
0201
10NH-3%-250MA
0201 L L46027
2
NOSTUFF
2
NOSTUFF
U U46001
A A
PAGE TITLE
GPS
DRAWING NUMBER SIZE
WLAN/BT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
J47001_WIFI L47012_WIFI
MM4829-2702
F-ST-SM 1.3NH+/-0.1NH-600MA C47015_WIFI
50_WIFI_ANT_2_4G 50_WIFI_ANT_FD_2_4G_1
12PF
1 1 2 1 2 50_WIFI_ANT_FD_2_4G_2
0201
1 5%
25V
2
3
4
C47017_WIFI 0.2PF NP0-C0G
+/-0.05PF 0201
25V
2 COG-CERM
0201
D U47004_WIFI
DPX205850DT-9038A1SJ
D
J47002_WIFI U47005_WIFI C47012_WIFI SM
MM4829-2702 L47013_WIFI C47016_WIFI UPG2185T6R
TSSON
12PF
F-ST-SM 1.3NH+/-0.1NH-600MA 12PF 1 OUTPUT1 INPUT 5 1 2 5 COM HI 1
1 50_WIFI_ANT_5G 1 2 50_WIFI_ANT_FD_5G_1 1 2 50_WIFI_ANT_FD_5G_2 3 OUTPUT2
50_WIFI_SPDT_IN 50_WIFI_SPDT_DCB
0201
5%
25V 1 LO 3
5% NP0-C0G
25V WIFI_SPDT_VC1 6 VCONT1 0201 GND
2
3
4
37
NP0-C0G
1 0201 WIFI_SPDT_VC2 4 VCONT2 L47015_WIFI
6
4
2
37
2
XW47002_WIFI 2
SHORT-0201
21 IN PP_WLAN_MAIN_VCC 1 2 PP_BATT_VCC_WLAN
1 C47001_WIFI 1 C47002_WIFI
10UF 27PF
20% 5%
6.3V 16V
2 CERM-X5R 2 NP0-C0G
0402-1 01005
R47008_WIFI
0.00
PP_WLAN_VDDIO_1V8 1 2 PP_WL_BT_VDDIO_AP 21 37
0%
1 1 C47004_WIFI 1/32W
C47003_WIFI MF
0.01UF 27PF 01005
10% 5%
NOSTUFF 6.3V
2 X5R 2 16V
NP0-C0G
1 1 01005
R47005_WIFI R47007_WIFI 01005
10K 10K
C
5%
1/32W
1%
1/32W
C
15
BATT_VCC 27
VBATT_RF_VCC 46
VBATT_RF_VCC 47
MF MF
32K INTERFACE TO AP 2 01005 2 01005
XW47001_WIFI VDDIO_1P8V C47007_WIFI
SHORT-01005 20PF
37 21 CLK32K_AP 1 2 WLAN_CLK32K 32 CLK32K_AP 2G_ANT 42 50_WLAN_G 1 2 50_WLAN_G_1
5G_ANT 52 50_WLAN_A
37 GPIO_6 6 GPIO_6 5%
25V
29 HOST_WAKE_BT 34 BT_HOST_WAKE OUT 21
C0H
0201
WLAN_BUCK_OUT VIN_1P2LDO
BT_WAKE 39 BT_WAKE IN 21
L47014_WIFI
0.6NH+/-0.1NH-0.85A
37 21 IN WLAN_REG_ON 31 WL_REG_ON U47001_WIFI 1 2 50_WLAN_A_DIPLX
30
LBEE5ZHTWC501 38
21 IN BT_REG_ON BT_REG_ON LGA BT_UART_RXD BT_UART_RXD IN 21
0201
5
6.3V
2 X5R-CERM1 1 100K 1 1 C47020_WIFI
402 R47009_WIFI GPIO_0 9 WLAN_HOST_WAKE OUT 21 37
VCC 1%
R47017_WIFI
0.01UF
10K 1/32W 100K
1% GPIO_1 8 AP_HSIC3_RDY IN 21 37
U47006_WIFI MF 1% 10%
6.3V
01005 2 1/32W 2 X5R
1/32W
MF GPIO_2 10 WLAN_HSIC3_RESUME 21 37 74LVC2G06 MF 01005
SOT891 2 01005
2 01005 NC 40 RF_SW_CTRL_3 GPIO_3 12 AGG_CHANNEL 37 37 GPIO_6 1
1A 1Y*
6 37 WIFI_SPDT_VC1 NOSTUFF
GPIO_4 7 WLAN_UART_RXD IN 21 37
1
R47011_WIFI 37 WIFI_SPDT_VC1 3
2A 2Y*
4 37 WIFI_SPDT_VC2
GPIO_5 11 WLAN_UART_TXD 10K
B RF_SW_CTRL_3 NC GPIO_12 13 HSIC_DEVICE_RDY
HSIC_DEVICE_RDY
OUT
OUT
21 37
37
1%
1/32W
MF PULL DOWN RESISTORS
06
GND
B
2 01005
NOSTUFF
2
GND THRML_PAD
17
18
19
20
21
22
1
16
23
26
33
41
43
44
45
48
49
50
51
53
54
55
56
57
58
59
60
GPIO6 SDIO_DATA<1> SDIO_DATA<2> MODE DEFAULT ARM STATE
J47003_RF
0 X X SDIO IN RESET MM4829-2702
F-ST-SM
1 X 0 GSPI IN RESET
1 50_HSIC_WLAN_DATA 21 37
1 0 1 HSIC OUT OF RESET
1 1 1 BOOTLESS HSIC IN RESET NOSTUFF
2
3
4
R47015_WIFI
0.00
37 AGG_CHANNEL 1 2 WLAN_TX_BLANK OUT 25
PP_WL_BT_VDDIO_AP
R R47015
37 21 IN 0%
1/32W J47004_RF
MF MM4829-2702
01005
F-ST-SM
1
R47013_WIFI 1 50_HSIC_WLAN_STROBE 21 37 C C47012
L L1801
10K
1%
CLK32K_AP 1 NOSTUFF
2
3
4
1/32W 37 21 PP PP47001_RF
MF ALTERNATES P4MM SM
37 HSIC_DEVICE_RDY
2 01005
U47002_WIFI PART NUMBER ALTERNATE FOR
PART NUMBER
BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
37 21 WLAN_REG_ON 1
PP PP47002_RF
P4MM SM U U47005
J J47002
74AUP1G08GF WLAN_HOST_WAKE 1
37 21 PP PP47003_RF
6
SOT891 TABLE_ALT_ITEM
P4MM SM
VCC 311S0548 311S0398 U47002_WIFI
A R47012_WIFI
1.00M2
2 A Y 4 DEV_HSIC3_RDY 21 37
339S0175 339S0171 U47001_WIFI
WIFI MODULE - USI
TABLE_ALT_ITEM
37 21 AP_HSIC3_RDY
DEV_HSIC3_RDY
1
1
PP PP47004_RF
P4MM SM
A
WLAN_REG_ON 1 WLAN_REG_ON_RC 1 B
37 21 PP PP47005_RF PAGE TITLE
37 21
TABLE_ALT_ITEM
P4MM SM
IN
1%
1/32W NC 5
339S0185 339S0171 U47001_WIFI
WIFI MODULE - TDK
37 21 WLAN_UART_RXD 1
PP PP47006_RF
P4MM SM
WIFI/BT
MF
01005
1 C47010_WIFI GND WLAN_UART_TXD 1 DRAWING NUMBER SIZE
0.22UF PP PP47007_RF
37 21
P4MM SM
Apple Inc. 051-9374 D
3
20%
6.3V GPIO_6 1
2 X5R 37 PP PP47008_RF REVISION
P4MM SM
0201
WLAN_HSIC3_RESUME 1
R
13.0.0
37 21 PP PP47009_RF
P4MM SM NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
47 OF 102
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 37 OF 46
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
NOSTUFF
1
R5701 PRELIMINARY - PENDING SIMULATIONS WITH TRISTAR
MOSFET FDMC6676BZ 470K
5%
1/20W VOLTAGE=20V
CHANNEL P-TYPE MF MIN_LINE_WIDTH=4.1MM CRITICAL
2 201 MIN_NECK_WIDTH=0.2MM
NET_SPACING_TYPE=PWR Q5701 VOLTAGE=20V
RDS(ON) 27 MOHM @-4.5V MAX_NECK_LENGTH=3 MM MIN_LINE_WIDTH=0.60MM
FDMC6676BZ MIN_NECK_WIDTH=0.25MM
NET_SPACING_TYPE=PWR
IMAX 6.9 A MLP3.3X3.3 MAX_NECK_LENGTH=3 MM
10 PPVBUS_PROT 3
VGS MAX +/- 25V 2
S
PPVBUS_PMU
D
5
D 1 OUT 41
D
K
DZ5701
3
2
1
CRITICAL
BZT52C10LP
Q5700
G
S LLP
FDMC6676BZ CRITICAL CRITICAL 1
1 C5750 R5703 4
A
NOSTUFF MLP3.3X3.3 G 4 NOTE: 10V ZENER 0.47UF 470K
5%
J5700 10%
25V
2 X5R
1/20W
MF
MLB-X123 VOLTAGE=20V VOLTAGE=20V 0402-1 2 201
MIN_LINE_WIDTH=0.6MM MIN_LINE_WIDTH=4.1MM
HB-SM MIN_NECK_WIDTH=0.15MM L5700 MIN_NECK_WIDTH=0.2MM D
1 NET_SPACING_TYPE=PWR FERR-70-OHM-4A NET_SPACING_TYPE=PWR
5
45 38 15 SPKR_R_CONN_N MAX_NECK_LENGTH=3 MM MAX_NECK_LENGTH=3 MM
2 SPKR_R_CONN_N 15 38 45 PPVBUS_CONN PPVBUS_EMI VBUS_PROT_G OVP_SW_EN_R_L
45 38 15 SPKR_R_CONN_P
3 38
1 2 MIN_LINE_WIDTH=0.20MM
4 SPKR_R_CONN_P MIN_NECK_WIDTH=0.1MM
5 15 38 45
0603 NET_SPACING_TYPE=ANLG
6 CONN_ACC2 1 NOSTUFF
CONN_DET_L 7 38
2 1 C5700 1 C5701 1 1 C5702 1 C5703 R5702 1 1
38
8 DZ5700 R5700 220K R5704 R5760
9 27PF 0.01UF 100K 27PF 6.8PF 1% 4.7K 4.7K
10 CONN_DP2_P 38 44 27V-100PF 1% 10% 1% 1% +/-0.25PF 1/20W 5% 5%
44 38 CONN_DP2_N 11 0402 25V
2 NP0-C0G
25V
2 X7R 1/20W
25V
2 NP0-C0G
25V
2 CERM MF 1/16W 1/20W
12 MF 201 2 MF-LF MF
13 201 402 201 201
14 PPVBUS_CONN 38 1 2 201 2 402 2 201
38 PPVBUS_CONN 15
16
17
18
19
21
20 PPVBUS REVERSE VOLTAGE PROTECTION
22 CONN_ACC1 38
23
24
44 38 CONN_DP1_N 25 OVP_SW_EN_L
26 CONN_DP1_P
27 38 44 10 IN
28
45 38 15 SPKR_L_CONN_N 29
30 SPKR_L_CONN_N 15 38 45
45 38 15 SPKR_L_CONN_P
31
32 SPKR_L_CONN_P 15 38 45
L5703
C CONN_DP1_P
90-OHM-50MA
TCM0605-1
SYM_VER-1
TS_E75_DPAIR1_P
C
44 38
1 4 10 44
=PPVCC_MAIN_DOCK
NOTE: SPKR_L_CONN_N AND SPKR_L_CONN_P WERE SWAPPED ON 5/22/12 PER RADAR #11526818 39
CONN_DP1_N 2 3
TS_E75_DPAIR1_N
44 38 10 44
1
R5705
100K
1% A1 B1
1/32W
MF
2 01005
R5706 D5700
CONN_DET_L 10K PMU_ACC_DET_A_L
USBULC6-2F3K
38 1 2 OUT 42 BGA
MAKE_BASE=TRUE
C CRITICAL 1% CRITICAL
1/32W K CRITICAL A2 B2
DZ5702 1 C5704 MF
01005 DZ5710
TS_CON_DET_L
OUT 10
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.6MM
L5704
90-OHM-50MA
MIN_NECK_WIDTH=0.2MM TCM0605-1
MAX_NECK_LENGTH=3 MM
NET_SPACING_TYPE=PWR L5701 CONN_DP2_P
SYM_VER-1
TS_E75_DPAIR2_P
FERR-22-OHM-1A-0.065-OHM 44 38
1 4 10 44
CONN_ACC1 TS_ACC1 10
B 38
C CRITICAL
1
0201
2
VOLTAGE=3.3V
CONN_DP2_N 2 3
TS_E75_DPAIR2_N B
DZ5703 1 C5705 0.055 OHM DCR MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
44 38 10 44
D5701
USBULC6-2F3K
BGA
CRITICAL
A2 B2
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
MAX_NECK_LENGTH=3 MM
NET_SPACING_TYPE=PWR L5702
FERR-22-OHM-1A-0.065-OHM
38
CONN_ACC2 1 2 TS_ACC2 10
C CRITICAL 0201 VOLTAGE=3.3V
MIN_LINE_WIDTH=0.6MM
DZ5704 1 C5707 0.055 OHM DCR MIN_NECK_WIDTH=0.2MM
8.2PF MAX_NECK_LENGTH=3 MM
14.2V-6PF +/-0.5PF NET_SPACING_TYPE=PWR
16V
0201-1 2 NP0-C0G-CERM
A 01005
A SYNC_MASTER=N/A SYNC_DATE=04/18/2011 A
PAGE TITLE
41 39 PP1V2_CPU =PPVDD_CPU_H4 8
42 PPLED_OUT =PPLED_REG 16
MAKE_BASE=TRUE
VOLTAGE=4.8V
LDO1 PP3V0_SPARE1 =PP3V0_SPARE1 MIN_LINE_WIDTH=0.6MM
41 14
MAKE_BASE=TRUE
VOLTAGE=1.2V MAKE_BASE=TRUE
D
MAKE_BASE=TRUE
VOLTAGE=3.0V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.2 MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=0.8 MM
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.2 MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM =PPVCC_MAIN_LED
=PPVCC_MAIN_LCD
42
16
D
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM =PPVCC_MAIN_ACC_SW 10
VOLTAGE=0V
MIN_LINE_WIDTH=0.4MM NET_SPACING_TYPE=PWR MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.2MM MAX_NECK_LENGTH=0.8 MM MIN_NECK_WIDTH=0.10MM
NET_SPACING_TYPE=PWR NET_SPACING_TYPE=GND
MAX_NECK_LENGTH=3 MM MAX_NECK_LENGTH=5 MM
41 39 PP1V8_S2R =PP1V8_S2R_H4 7
BATTERY
LDO3 41 PP3V0_S2R_TRISTAR =PP3V0_S2R_TRISTAR 10
MAKE_BASE=TRUE
VOLTAGE=1.8V =PP1V8_S2R_WL 21
MAKE_BASE=TRUE
=PP3V0_SENSOR_GYRO
MAKE_BASE=TRUE
VOLTAGE=3.0V 18
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.2 mm
NET_SPACING_TYPE=PWR
=PP3V0_SENSOR_COMPASS
=PP3V0_SENSOR_PROX
18
PP1V8
BOOST->LDOS
MAX_NECK_LENGTH=3 MM 19 41 39
=PP1V8_AUDIO 14
=PP3V0_MLC_RST_LEVELSHIFTER
MAKE_BASE=TRUE
4 VOLTAGE=1.8V PP5V25_GRAPE =PP5V25_GRAPE
MIN_LINE_WIDTH=0.6MM =PP1V8_H4 3 4 6 9
42 12
=PP3V0_ALS 17 MIN_NECK_WIDTH=0.2MM MAKE_BASE=TRUE
VOLTAGE=5.25V
NET_SPACING_TYPE=PWR =PP1V8_VDDIO18_H4 7
MIN_LINE_WIDTH=0.6 MM
MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.15 MM
=PP1V8_MIPI_H4 6
NET_SPACING_TYPE=PWR
=PP1V8_DPORT_H4 6
MAX_NECK_LENGTH=6 MM
=PP1V8_IO_H4 4 6 8
LDO5 41 PP3V2_SPARE2 =PP3V2_SPARE2
MAKE_BASE=TRUE =PP1V8_NAND_H4 5 8
VOLTAGE=3.2V
=PP1V8_PVDDP_H4
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
3
DESENSE CAPS
C NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
=PP1V8_USB_H4
=PP1V8_VDDIOD3_H4
3
8 PP3V3_OUT
C
=PP1V8_4_NAND 39 41 39
PP1V0 41 39
=PP1V8_CAM_REAR 20
1 C7320 1 C7321 1 C7322 1 C7323
=PP1V8_CAM_FRONT 17 1 C7300 1 C7301 1 C7302 1 C7303
=PP1V8_ACCEL 27PF 27PF 27PF 27PF
LDO6 41 PP3V3_ACC =PP3V3_ACC 10
18 27PF 27PF 27PF 27PF 5%
16V
5%
16V
5%
16V
5%
16V
5% 5% 5% 5%
MAKE_BASE=TRUE
VOLTAGE=3.3V
=PP1V8_GYRO 18 16V
2 NP0-C0G 2 16V 2 16V 2 16V
2 NP0-C0G 2 NP0-C0G 2 NP0-C0G 2 NP0-C0G
NP0-C0G NP0-C0G NP0-C0G 01005 01005 01005 01005
MIN_LINE_WIDTH=0.6MM =PP1V8_COMPASS 18 01005 01005 01005 01005
MIN_NECK_WIDTH=0.2MM
NET_SPACING_TYPE=PWR =PP1V8_PROX 19
MAX_NECK_LENGTH=3 MM
=PP1V8_DMIC 13 39
=PP1V8_MISC PP1V2_SOC
LDO7 41 PP1V8_CAM =PP1V8_CAM_BACKUP 39
41 39
PP1V2 41 39
MAKE_BASE=TRUE
VOLTAGE=1.8V
=PP1V8_DMIC 13 39
MIN_LINE_WIDTH=0.6 mm 1 1 1 1
MIN_NECK_WIDTH=0.2 mm 1 1 1 1 C7324 C7325 C7326 C7327
NET_SPACING_TYPE=PWR C7304 C7305 C7306 C7307 27PF 27PF 27PF 27PF
MAX_NECK_LENGTH=3 MM 27PF 27PF 27PF 27PF 5%
16V
5% 5% 5%
5%
16V
5%
16V
5%
16V
5%
16V 2 NP0-C0G 2 16V
NP0-C0G
16V
2 NP0-C0G 2 16V
NP0-C0G
2 NP0-C0G 2 NP0-C0G 2 NP0-C0G 2 NP0-C0G 01005 01005 01005 01005
LDO8 41 PP3V0_S2R_HALL =PP3V0_S2R_HALL 12 01005 01005 01005 01005
MAKE_BASE=TRUE
VOLTAGE=3.0V
MIN_LINE_WIDTH=0.4 MM BUCK3 - WDIG_SW
MIN_NECK_WIDTH=0.2 mm
NET_SPACING_TYPE=PWR PP1V2_CPU
MAX_NECK_LENGTH=3 MM 41 PP1V8_GRAPE =PP1V8_GRAPE 12 PP1V8 41 39
MAKE_BASE=TRUE 41 39
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.6 mm
LDO9 41 PP1V2_CAM =PP1V2_CAM_REAR 20
MIN_NECK_WIDTH=0.2 mm 1 C7328 1 C7329 1 C7330 1 C7331
NET_SPACING_TYPE=PWR 1 C7308 1 C7309 1 C7310 1 C7311
MAKE_BASE=TRUE
VOLTAGE=1.2V =PP1V2_VDDIOD_H4 7
5%
16V
5% 5% 5% 5% 5% 5% 5%
LDO11 MIN_LINE_WIDTH=0.6 MM 2 NP0-C0G 2 16V
NP0-C0G 2 16V
NP0-C0G 2 16V
NP0-C0G 2 16V
NP0-C0G 2 16V
NP0-C0G 2 16V
NP0-C0G 2 16V
NP0-C0G
41 PP2V8_CAM =PP2V8_CAM_FRONT 17
MIN_NECK_WIDTH=0.15 MM =PP1V2_HSIC_H4 3 01005 01005 01005 01005 01005 01005 01005 01005
NET_SPACING_TYPE=PWR
MAKE_BASE=TRUE
VOLTAGE=2.8V =PP2V8_CAM_REAR 20
MAX_NECK_LENGTH=0.8 MM
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
NOSTUFF
41 39 PP3V3_OUT =PP3V3_NAND 11 R7300
LDO12 41 39 PP1V0 =PP1V0_PLL_H4 3
MAKE_BASE=TRUE
VOLTAGE=3.3V =PP3V3_USB_H4 0
MIN_LINE_WIDTH=0.6MM
3 8
39 =PP1V8_4_NAND 1 2
=PP1V0_MIPI_H4
MAKE_BASE=TRUE
VOLTAGE=1.0V 6
MIN_NECK_WIDTH=0.2MM =PP3V3_MLC_HI
MIN_LINE_WIDTH=0.6 MM 5%
MIN_NECK_WIDTH=0.15 MM =PP1V0_DPORT_H4 6
NET_SPACING_TYPE=PWR 1/20W
NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=0.8 MM MF
MAX_NECK_LENGTH=0.8 MM =PP1V0_USB_H4 3 201
CRITICAL
=PP1V0_MIPI_PLL_H4 6
U7300
TPS22924X R7301
CSP 0
39 =PP1V8_S2R_4_NAND A2 A1 PP1V8_NAND_LS 1 2 PP1V8_NAND =PP1V8_NAND 11
1/20W
CRITICAL MIN_LINE_WIDTH=0.6MM MF MIN_LINE_WIDTH=0.6MM
1 MIN_NECK_WIDTH=0.2MM 201 MIN_NECK_WIDTH=0.2MM
C7380 39 =PP1V8_MISC C2 ON NET_SPACING_TYPE=PWR NET_SPACING_TYPE=PWR
10UF GND
20% MAX_NECK_LENGTH=3 MM MAX_NECK_LENGTH=3 MM
2 6.3V
C1
CERM-X5R 1
0402-2 C7350
0.01UF
10%
6.3V
2 X5R
A 01005
SYNC_MASTER=N/A SYNC_DATE=N/A A
PAGE TITLE
Power: Aliases
DRAWING NUMBER SIZE
VOLTAGE=1.8V
4 R
13.0.0
MIN_LINE_WIDTH=0.3 MM NOTICE OF PROPRIETARY PROPERTY: BRANCH
MIN_NECK_WIDTH=0.2 MM
NET_SPACING_TYPE=PWR THE INFORMATION CONTAINED HEREIN IS THE
MAX_NECK_LENGTH=3 MM PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
73 OF 102
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 39 OF 46
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
XW7520
SM
41 BATT_SNS 1 2
NET_SPACING_TYPE=ANLG
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.20 MM
40 39 =BATT_POS_CONN
TP7500
1 P/N 516S0906
A CRITICAL
TP-P55
NOSTUFF J7500
FL7500 CPB2304-0101F
240-OHM-0.2A-0.8-OHM 13 F-ST-SM
C 44 42 4 BI UART5_BATT_RTXD 1
0201
2 44 40 BATT_SWI_CONN 9 10
C
2 1 =BATT_POS_CONN 39 40
4 3 BATT_SWI_CONN 40 44
TP7501
1
A
TP-P55
NOSTUFF
TP7502
1
A
TP-P55
NOSTUFF
TABLE_ALT_HEAD
TP7503
1
PART NUMBER ALTERNATE FOR
PART NUMBER
BOM OPTION REF DES COMMENTS: A
TP-P55
TABLE_ALT_ITEM
NOSTUFF
155S0644 155S0274 RADAR:8391945
FL7500,L1700,L1701,L1702,L1800,L1920,L2600,L2601,L2602,L2700,L2701,L2702,L2800,L2900,L2901,L2902,L2903,L2960,L2961,L2962,L2963
B B
A SYNC_MASTER=N/A SYNC_DATE=N/A A
PAGE TITLE
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION CRITICAL CRITICAL
MIN_NECK_WIDTH=0.25 MM PST25201B-SM
BUCK4_LXL 1 C8171 1 C8172 CRITICAL CRITICAL CRITICAL
TABLE_5_ITEM 41
100PF 100PF
NET_SPACING_TYPE=SWITCHNODE
DIDT=TRUE
1 1
ADDITIONAL DISTRIBUTED
343S0593 1 IC,PMU,ALISON,D1946A5,OTPXX,UFBGA292 U8100 CRITICAL 5% 5% L8101 C8102 C8103 42UF (NO DE-RATING)
BUCK4_LXM 41
25V
2 CERM
25V
2 CERM
2.2UH-20%-1.85A-80MOHM 22UF 22UF
20% 20%
201 201 BUCK0_LXM 1 2 2 6.3V 6.3V
X5R-CERM-1 2 X5R-CERM-1
MIN_LINE_WIDTH=0.6 MM
CRITICAL CRITICAL MIN_NECK_WIDTH=0.25 MM PST25201B-SM 603 603
1 C8188 1 C8189 CRITICAL CRITICAL NET_SPACING_TYPE=SWITCHNODE
1 C8173 1 C8174 DIDT=TRUE XW8103
100PF 100PF
5% 5% 100PF 100PF BUCK0_FB 1 2
TABLE_ALT_HEAD
BUCK
IBAT_S 25V 100PF 100PF
D N17 BUCK2_LXM A6 2 X7R-CERM 2 CERM 5% 2 CERM 5% BUCK3_LX 22UF 22UF
MIN_LINE_WIDTH=0.6 MM 1 2
RDSON=0.0136@VGS=-2.5V BUCK2_LXR A4 201 201 25V 201 25V MIN_NECK_WIDTH=0.25 MM
20% 20%
5 P17 SM 6.3V 6.3V
ID=12.0A NET_SPACING_TYPE=SWITCHNODE 2 X5R-CERM-1 2 X5R-CERM-1
IBAT BUCK2_FB D7 DIDT=TRUE NOSTUFF
USB/BAT
N18 603 603
BUCK3_FB CRITICAL CRITICAL CRITICAL
41 39 PPBATT_VCC P18 BUCK3_LX A16 NET_SPACING_TYPE=ANLG
P24 MIN_LINE_WIDTH=0.25 MM L8119
ACT_DIO ACT_DIO BUCK3_FB D16 MIN_NECK_WIDTH=0.20 MM 2.2UH-20%-1.85A-80MOHM
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM F24 PP1V2_S2R 39
NET_SPACING_TYPE=ANLG
F25 VCENTER_A BUCK4_LXL A14 41 BUCK4_LXL 1 2 41
LDO
NET_SPACING_TYPE=SWITCHNODE
B6 VLDO6 K1 (150MA; 2.5-3.6V) PP3V3_ACC 39 41
DIDT=TRUE
1 C8119 1 C8120
PPBATT_VCC
VCC-MAIN
41 39
A17 VDD_BUCK3 VLDO7 P4 (50MA; 1.5-3.3V) PP1V8_CAM 22UF 22UF
NOSTUFF CRITICAL
39 41
XW8132 20% 20%
CRITICAL A13 VLDO8 P8 (10MA; 2.0-3.55V) PP3V0_S2R_HALL 39 41 BUCK5_FB 1 2 6.3V 6.3V
2 X5R-CERM-1 2 X5R-CERM-1
C8100 1 C8101 1
B13 VDD_BUCK4 VLDO9 P11 (300MA; 1.2-3.0V) PP1V2_CAM NET_SPACING_TYPE=ANLG
SM 603 603
22UF 22UF 39 41
PP2V8_CAM_AF 39 41
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.20 MM NOSTUFF CRITICAL CRITICAL
20% 20% E1 VLDO10 P5 (200MA; 2.5-3.55V)
6.3V 6.3V
X5R-CERM-1 2 X5R-CERM-1 2 E2 VDD_BUCK5 VLDO11 M1 (200MA; 1.7-3.0V) PP2V8_CAM 39 41
603 603 BATT_POS_RC
MIN_LINE_WIDTH=0.30MM G1 VLDO12 P6 (150MA; 0.6-1.3V) PP1V0 39 41
CRITICAL 1 MIN_NECK_WIDTH=0.20MM
G2 M2 PP1V8_ALWAYS 39 41
R8100 NET_SPACING_TYPE=PWR VDD_BUCK5_BYP ON_BUF
MAX_NECK_LENGTH=3 MM
0.5 VOLTAGE=4.5V H2
1% G22 VCC_MAIN_S
1/16W VBUCK4 B17 PP1V2_S2R 39 41
MF N19 CPU1V2_SW A18 (RON=0.1 OHM MAX) PP1V2 39
SWITCH POWER
402 2
DSP_SW TP8133
P19 DSP_SW B20 (RON=1 OHM MAX) 1 TP NOSTUFF
TP-P55
N20 VCC_MAIN
P20 VBUCK3 A19 PP1V8_S2R 39 41
B K2
CPU1V8_SW A20 (RON=0.2 OHM MAX)
WDIG_SW B19 (RON=0.5 OHM MAX)
PP1V8 39
PP1V8_GRAPE 39
B
VDD_LDO1_6
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
41 39 PP1V8_S2R L4 VDD_LDO2 VBUCK0_SW0_G B21 NC_PMU_VBUCK0_SW0_G 1 1 1 1 1
N9 C8138 C8140 C8139 C8141 C8199
VBUCK0_SW0_S A21 NC_PMU_VBUCK0_SW0_S
LDO INPUT
CRITICAL CRITICAL VDD_LDO3_5_8 1UF 1UF 1UF 1UF 1UF ADDITIONAL DISTRIBUTED:
1 C8135 1 C8129 N4 20% 10% 10% 10% 20%
1UF 1UF
VDD_LDO4_7
VPUMP B18 PMU_VPUMP 2 6.3V
X5R 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
X5R
PP1V2: 33UF (NO DE-RATING)
N10
10%
6.3V
2 CERM
10%
6.3V
2 CERM N6
VDD_LDO9 MIN_LINE_WIDTH=0.30MM
MIN_NECK_WIDTH=0.20MM
0201 402 402 402 0201 PP1V8: 13UF (NO DE-RATING)
VDD_LDO10 CRITICAL NET_SPACING_TYPE=PWR
402 402 MAX_NECK_LENGTH=3 MM
42 41 39 PPVCC_MAIN L2 VDD_LDO11 C8137 1 VOLTAGE=4.6V
41 39 PP1V2_S2R N7 VDD_LDO12 0.01UF
10%
CRITICAL 10V 2
1 C8136 X5R
XTAL
P1 XTAL1 201
PPVCC_MAIN 1UF NET_SPACING_TYPE=CRYSTAL
10% P2 XTAL2
CRITICAL CRITICAL
39 41 42 6.3V
2 CERM
402 CRITICAL LDO BYPASS
Y8138 PP3V0_SPARE1
C8190
10UF
C8191 32.768K-20PPM-12.5PF
41 39
PP1V7_VA_VCP
150UF-0.035OHM 1 2 NET_SPACING_TYPE=CRYSTAL 41 39 15
20% 20% PMU_XTAL PMU_EXTAL
6.3V 6.3V CRITICAL CRITICAL 41 39 PP3V0_S2R_TRISTAR
X5R POLY-TANT
603 CASE-B15G-SM C8142 1 2012 1 C8143 41 39 PP3V0_SENSOR
18PF 18PF 41 39 PP3V2_SPARE2
5% 5%
25V 25V PP3V3_ACC
NP0-C0G 2 2 NP0-C0G 41 39 LAYOUT NOTE:
201 201 41 39 PP1V8_CAM C8147-48,50 CAN BE FURTHER AWAY
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
PPVCC_MAIN 1 1 1 1 1 1 1
39 41 42
C8150 C8149 C8148 C8146 C8145 C8144 C8147
2.2UF 2.2UF 4.7UF 2.2UF 2.2UF 10UF 2.2UF
CRITICAL 10% 10% 20% 10% 10% 20% 10%
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
1
C8166 X5R 2
402
X5R 2
402
X5R-CERM1 2
402
X5R 2
402
X5R 2
402
CERM-X5R 2
0402-2
X5R 2
402
150UF-0.035OHM
20%
2 6.3V
A POLY-TANT
CASE-B15G-SM VCC_MAIN BYPASS 41 39 PP3V0_S2R_HALL
SYNC_MASTER=N/A SYNC_DATE=N/A A
PP1V2_CAM
TOTAL CAPS = ~400UF 41 39
PAGE TITLE
41 39
PP2V8_CAM_AF
PP2V8_CAM Power: PMU
(PLACE ONE 1UF CAP AT EACH VDD INPUT) PP1V0 DRAWING NUMBER SIZE
PPVCC_MAIN 39 41 42
41 39
PPVCC_MAIN 39 41 42
1
R8202
220K
1%
1/20W
MF
2 201 CRITICAL
1
R8203 LAYOUT NOTE:
D OMIT
1 C8204
0.1UF
10%
1%
200K
1/20W
ONE VIA PER PIN FOR
VSS_* AND VSSA_* PINS
D
6.3V MF
1 C8206 U8100 2 X5R 2 201
10%
0.01UF ALISON-A0-OTPXX 201
6.3V
2 X5R D1946A0-110-00 OMIT
01005 UFBGA
(SYM 1 OF 3) PLACEMENT NOTE: PLACE NEAR PIN K4
U8100
CRITICAL CRITICAL CRITICAL ALISON-A0-OTPXX
DIGITAL INPUT
1 C8212 1 C8209 1 C8210
NC_FW_DET F22 N2 PMU_IREF D1946A0-110-00
REFERENCES
FW_DET (PD) IREF NET_SPACING_TYPE=ANLG 0.1UF 1UF 0.22UF
12 4 GPIO_BTN_HOME_L L15 BUTTON1 VREF N1 PMU_VREF 10% 10% 20% PLACEMENT NOTE: PLACE NEAR PIN H22 UFBGA
IN NET_SPACING_TYPE=ANLG
2 6.3V
X5R 2 6.3V
CERM 2 6.3V
X5R B2 (SYM 3 OF 3)
20 4 IN GPIO_BTN_POWER_L L16 BUTTON2 VDD_REF H22 PMU_VDD_REF A8
NET_SPACING_TYPE=ANLG 201 402 0201
20 4 GPIO_BTN_SRL_L L17 BUTTON3 VDD_REF_A K4 B4 VSS_BUCK02 B9
1 IN
C8208 PMU_ACC_DET_A_L A2 P7 PMU_VDD_RTC
38 IN ACC_DET_A VDD_RTC NET_SPACING_TYPE=ANLG
0.01UF 1 C8207 A1 N8 PMU_ADC_REF C2 A5
10% R8299 PMU_ACC_DET_B ACC_DET_B ADC_REF NET_SPACING_TYPE=ANLG
2 6.3V 0.01UF MIN_LINE_WIDTH=0.1MM
D4 VSS_BUCK2
CRITICAL B5
X5R
10% PMU_ACC_ID 6.34K K24 ACC_ID MIN_NECK_WIDTH=0.1MM
1 C8214
ANALOG
01005 2 D11 D5 A12
INPUT
6.3V
K22 BRICK_ID GPIO1 NC (1.8 PUSH-PULL)
X5R 10 IN USB_BRICKID 1 2 USB_BRICKID_R 1000PF D6 VSS_BUCK04
01005 1% 1/32W MF 01005 GPIO2 D12 PMU_CLK_32K_WLAN OUT 21 44 (1.8_S2R PUSH-PULL) 10% B12
ADC_IN7 K25 ADC_IN7 6.3V
GPIO3 D13 PMU_GPIO_BT_REG_ON_R 42 (1.8_S2R;NO PD REQ’D PER BB TEAM) 2 X5R-CERM A15
01005
D18 PMU_GPIO_WLAN_REG_ON_R VSS_BUCK34 B15
GPIO
(E75 CONN) M25 GPIO4 42 (1.8_S2R;NO PD REQ’D PER BB TEAM)
45 BOARD_TEMP1_P NET_SPACING_TYPE=TEMP TDEV1 E4
D19 PMU_GPIO_BB_RST_R_L D1
TEMPERATURE
(BETWEEN WLED AND CHARGER) M24 GPIO5 42
CRITICAL 45 BOARD_TEMP2_P NET_SPACING_TYPE=TEMP TDEV2 E5 VSS_BUCK5
1 GPIO6 D20 UART5_BATT_RTXD OUT 4 40 44 (2.5V ALWAYS ON PU IN BMU) D2
10KOHM-1%-0.31MA (AP) 45 BOARD_TEMP3_P NET_SPACING_TYPE=TEMP L22 TDEV3
0201 1 CRITICAL GPIO7 D15 PMU_GPIO_BT_HOST_WAKE 21 (INTERNAL PD) E6 VSSA_BUCK0 D10
10KOHM-1%-0.31MA (PANEL) 45 23 BOARD_TEMP4_P L24 IN
1 CRITICAL NET_SPACING_TYPE=TEMP TDEV4 D17 E7 D8
R8216 0201 GPIO8 PMU_GPIO_WLAN_HOST_WAKE IN 21 (INTERNAL PD) VSSA_BUCK2
10KOHM-1%-0.31MA 40 IN BATTERY_NTC N24 TBAT
R8222 0201 GPIO9 E20 PMU_GPIO_BB_WAKE 21 (INTERNAL PD; CAN’T BE USED FOR 32K CLK OUTPUT) E8 VSSA_BUCK3 B16
PMU_TCAL N25 IN
NET_SPACING_TYPE=ANLG TCAL D21 E9 B14
1 R8218 2 CRITICAL GPIO10 PMU_GPIO_CODEC_HS_IRQ_L IN 14 (INTERNAL PU TO PP1V8_S2R) VSSA_BUCK4
C8215 2 CRITICAL R8219 B22 PMU_GPIO_CODEC_RST_L E10 C1
100PF 1 1 C24 KEEPACT GPIO11 OUT 14 VSSA_BUCK5
C8221 C8220 3.92K GPIO_PMU_KEEPACT
WDOG
4 IN
5% 2 0.1% GPIO12 B23 PMU_GPIO_TRISTAR_IRQ E11 PVSS_CHG_A E22
100PF 100PF 4 10
C
16V (INTERNAL PULL-DOWN) B1 SHDN IN
C C8217 1 PMU_SHDWN
NP0-C0G 2 5% 2 5% 402 9 IN L18 PMU_GPIO_HALL_IRQ_1 E12 J22
01005 16V 100PF 1 16V 1/16W NET_SPACING_TYPE=ANLG GPIO13 IN 12 PVSS_CHG_B
NP0-C0G 2 5% C8223 NP0-C0G 2 1 MF L19 PMU_GPIO_HALL_IRQ_2 E13 N14
01005 16V 100PF 01005 F20 RESET_IN (PD) GPIO14 IN 12
NP0-C0G 2 10 PMU_RESET_IN NET_SPACING_TYPE=ANLG
RESET
5% IN L20 PMU_GPIO_HALL_IRQ_3 E14 VSS_WLED P14
01005 16V D24 RESET* GPIO15 IN 12 (EXTERNAL PU)
NP0-C0G 2 XW8203 PLACE CLOSE TO PMU 21 10 3 OUT RST_SYSTEM_L NET_SPACING_TYPE=ANLG
E15
GPIO16 K20 PMU_GPIO_HALL_IRQ_4 IN 12 (PLACEHOLDER) VSS_LCM N16
01005 23 BOARD_TEMP4_N 1 2 4
(PULLUP INSIDE H4P)
GPIO_PMU_IRQ_L B25 IRQ*
45 OUT K21 NC_PMU_GPIO17 E16
XW8202 SM RESISTOR FOR TEMP CALIBRATION GPIO17 (EXTERNAL PU) N3
45 BOARD_TEMP3_N 1 2 NOSTUFF GPIO18 L21 NC_PMU_GPIO18 E17
PLACE CLOSE TO PMU I2C0_SCL A25 SCL L8
XW8201 SM 44 15 10 4 IN E18
ANALOG MUX
CRITICAL CRITICAL AMUX_AY G20 NC_PMU_AMUX_AY F7
K10
L8225 D8228 WLED_LX N15 AMUX_B0 H21 NC_PMU_AMUX_B0 F8
4.7UH-3.2A MIN_LINE_WIDTH=0.6 MM NET_SPACING_TYPE=SWITCHNODE K8
PMEG4010BEA MIN_NECK_WIDTH=0.25 MM DIDT=TRUE P15 WLED_LX AMUX_B1 H20 NC_PMU_AMUX_B1 CRITICAL F9
(NOTE: 2MHZ) K6
39 =PPVCC_MAIN_LED 1 2 N23 VOUT_LED AMUX_B2 J20 NC_PMU_AMUX_B2 F10
A K L8229 J19
BACKLIGHT
CRITICAL CRITICAL F11 VSS
PIME051E-SM LED_IO1_R L11 WLED1 AMUX_B3 J21 NC_PMU_AMUX_B3 2.2UH-1.05A-0.195OHM
C8226 1 1 C8299 DCR=106MOHM MAX SOD-323 1 C8295 R8227 J17
LED
1.00 LED_IO2_R L12 WLED2 AMUX_BY K19 NC_PMU_AMUX_BY CRITICAL F12
10UF 27PF 56PF 16 OUT WLED_STRING1 1 2 1 2 J15
20% 5% 5% MIN_LINE_WIDTH=0.1 MM MIN_LINE_WIDTH=0.1 MM LED_IO3_R N13 WLED3 MIN_LINE_WIDTH=0.4 MM D8230 F13
10V 16V 25V MAKE_BASE=TRUE
VLS201612E-SM J13
X5R 2 2 NP0-C0G 2 NP0-C0G MIN_NECK_WIDTH=0.1 MM CRITICAL 1% MIN_NECK_WIDTH=0.1 MM
P13 VOLTAGE=6V MIN_NECK_WIDTH=0.2 MM
F14
603 01005 201 R8231 1/20W LED_IO4_R WLED4 VDD_LCM N21 PPVCC_MAIN 39 41 42 MIN_LINE_WIDTH=0.4MM NET_SPACING_TYPE=SWITCHNODE PMEG2005AEL
J11
LCM/GRAPE
MF MIN_NECK_WIDTH=0.2MM DIDT=TRUE
1.00 201 LED_IO5_R L13 WLED5 VDD_LCM_SW P21 PP6V0_LCM_HI NET_SPACING_TYPE=PWR
F15
16 OUT WLED_STRING2 1 2 MAX_NECK_LENGTH=3 MM A K J9
MIN_LINE_WIDTH=0.1 MM MIN_LINE_WIDTH=0.1 MM LED_IO6_R L14 WLED6 LCM_LX P16 LCM_LX F16
MIN_NECK_WIDTH=0.1 MM 1% CRITICAL MIN_NECK_WIDTH=0.1 MM SOD882 J7
1/20W PLACEMENT_NOTE=PLACE NEAR U8100.N23 VBOOST_LCM N12 PP6V0_LCM_VBOOST F17
39 PPLED_OUT MF R8232 CRITICAL J5
201 1.00 C8201 1 LCM2_EN C25 NC_LCM2_EN (INTERNAL PULLDOWN; TE ENABLE) MAKE_BASE=TRUE
VOLTAGE=6V
F18
WLED_STRING3 1 2 VSS H19
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL 16 OUT 1UF VLCM2 N11 NC_VLCM2
MIN_LINE_WIDTH=0.4MM
F19
VIB
MIN_LINE_WIDTH=0.1 MM MIN_LINE_WIDTH=0.1 MM MIN_NECK_WIDTH=0.2MM
1 C8233 1 C8231 1 C8234 1 C8235 1 C8232 10% H13
MIN_NECK_WIDTH=0.1 MM CRITICAL 1% MIN_NECK_WIDTH=0.1 MM 25V
VLCM1 P12
PP5V25_GRAPE NET_SPACING_TYPE=PWR
G5
X5R 2
1/20W
10UF 10UF 1UF 1UF 10UF R8235 MF
BB_VBUS_DET
39 MAX_NECK_LENGTH=3 MM
H14
20% 20% 10% 10% 20% 1.00 201 402 VLCM3 L10 21
G6
25V 25V 25V 25V 25V WLED_STRING4 1 2 H15
B
2 X5R-CERM
0603
2 X5R-CERM
0603
2 X5R
402
2 X5R
402
2 X5R-CERM
0603
16 OUT
MIN_LINE_WIDTH=0.1 MM
MIN_NECK_WIDTH=0.1 MM 1%
1/20W
MIN_LINE_WIDTH=0.1 MM
CRITICAL MIN_NECK_WIDTH=0.1 MM
R8239
CRITICAL 1
CRITICAL
C8237 1
CRITICAL
C8288
CRITICAL CRITICAL
C8239
G7
G8
H16 B
MF
201 1.00
I2C ADDRESS: 0111100X (0X78) C8236 1
4.7UF 4.7UF
1 C8238 1
1UF G9
H17
16 OUT WLED_STRING5 1 2 2.2UF 20% 20% 10UF 10% H18
20% 20% G10
MIN_LINE_WIDTH=0.1 MM MIN_LINE_WIDTH=0.1 MM
10V 2 10V
X5R-CERM 2 10V
X5R-CERM 2 25V
16V
X5R J4
X5R-CERM 2 2
MIN_NECK_WIDTH=0.1 MM CRITICAL 1% MIN_NECK_WIDTH=0.1 MM
1/20W 0402 0402 X5R-CERM 402 G11
R8240 MF 402 0603 J6
1.00 201 G12
16 OUT WLED_STRING6 1 2 J8
MIN_LINE_WIDTH=0.1 MM MIN_LINE_WIDTH=0.1 MM
G13
MIN_NECK_WIDTH=0.1 MM 1% MIN_NECK_WIDTH=0.1 MM J10
1/20W G14
MF LAYOUT NOTE: J12
201 G15
MAKE TRACE PP5V25_GRAPE 50 MOHM BETWEEN PMU AND C8238 J14
G16
J16
G17
J18
G18
K5
G19
K7
H4
K9
H5
K11
H6
K13
H7
K15
H8
K17
H9
5% L5
1/32W H10
MF L7
R8290 01005
10K H11
42 PMU_GPIO_BT_REG_ON_R 1 2 PMU_GPIO_BT_REG_ON OUT 21 L9
R8291 10K H12
42 PMU_GPIO_WLAN_REG_ON_R 1 2 PMU_GPIO_WLAN_REG_ON OUT 21
A SYNC_MASTER=N/A SYNC_DATE=05/09/2011 A
PAGE TITLE
POWER: PMU
DRAWING NUMBER SIZE
MECHANCIAL PARTS
PD PARTS PLATED THROUGH HOLES
D PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION
TABLE_5_HEAD
TABLE_5_ITEM
DRILL SIZE: 1.1MM X 0.4MM
PLATING SIZE: 1.4MM X 0.7MM STANDOFFS: P/N 860-1542 D
806-4017 1 FENCE,MAIN,MLB,YYY FENCE_MLB
TABLE_5_ITEM
SL-1.1X0.4-1.4X0.7 1
SL9302
TH-NSP
1
SL-1.1X0.4-1.4X0.7
STD9301
STDOFF-3.3X1.8R1.17H-SM
1
TOP BARCODE LABEL/EEE CODES
(ONLY ONE IS USED PER BOM)
TABLE_5_HEAD
SL9304
TH-NSP
825-7639 1 EEEE FOR 639-3415 (X123A GOOD) DY62 CRITICAL EEEE_X123A_GOOD SL-1.1X0.4-1.4X0.7
TABLE_5_ITEM
C
825-7639 1 EEEE FOR 639-3926 (X123A BEST) F3JP CRITICAL EEEE_X123A_BEST
TABLE_5_ITEM
B B
A SYNC_MASTER=N/A SYNC_DATE=N/A A
PAGE TITLE
MECHANCIAL PARTS
DRAWING NUMBER SIZE
I2S TABLE_PHYSICAL_ASSIGNMENT_ITEM
TABLE_PHYSICAL_ASSIGNMENT_ITEM
JTAG_50S * 45_OHM_SE I2S_45S * 45_OHM_SE
CLK_50S * 45_OHM_SE TABLE_SPACING_ASSIGNMENT_HEAD TABLE_SPACING_ASSIGNMENT_HEAD
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET
NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET TABLE_SPACING_ASSIGNMENT_ITEM TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
JTAG * * 2:1_SPACING I2S * * 3:1_SPACING
CLK * * 2:1_SPACING TABLE_SPACING_ASSIGNMENT_ITEM
D
I16
D I63
I162
CLK_50S
CLK_50S
CLK
CLK
AP_CLK_32K_CUMULUS
PMU_CLK_32K_WLAN
4 12
4 14
I143
CLK_50S CLK ISP0_CAM_REAR_CLK_R 6 I2S_45S I2S I2S0_CODEC_ASP_DOUT 4 14
I88
JTAG_50S JTAG JTAG_SOC_TDI 3
I142
CLK_50S CLK ISP0_CAM_REAR_CLK 6 20
I14
I2S_45S I2S I2S0_CODEC_ASP_DIN 4 14
I89
JTAG_50S JTAG JTAG_SOC_TDO 3 9
I141
CLK_50S CLK ISP1_CAM_FRONT_CLK_R 6
I13
I2S_45S I2S I2S0_CODEC_ASP_SDOUT 14
I95
JTAG_50S JTAG JTAG_SOC_TRST_L 3 9
I159
I96 CLK_50S CLK ISP1_CAM_FRONT_CLK 6 17
I20
CLK_50S CLK I2S0_CODEC_ASP_MCK_R 4 JTAG_50S JTAG BB_JTAG_TDO 4 21 24 I146 I2S_45S I2S I2S1_SPKAMP_DIN 4 15
I131 I198
I2C
NET_PHYSICAL_TYPE AREA_TYPE PHYSICAL_RULE_SET
TABLE_PHYSICAL_ASSIGNMENT_ITEM
I192 I2S_45S I2S I2S3_BT_LRCK 4 21
TABLE_SPACING_ASSIGNMENT_ITEM
NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET
NAND * * 2:1_SPACING TABLE_SPACING_ASSIGNMENT_ITEM
I2C * * 2:1_SPACING
NET_TYPE
NET_TYPE
ELECTRICAL_CONSTRAINT_SET PHYSICAL SPACING
ELECTRICAL_CONSTRAINT_SET PHYSICAL SPACING
TABLE_PHYSICAL_ASSIGNMENT_HEAD
I45
NAND_50S
NAND_50S
NAND
NAND FMI0_CE0_L
5 11
5 11
I2 I2C_50S
I2C_50S
I2C
I2C
I2C0_SCL
I2C1_SDA
4 10 15 42
4 18 19
UART_45S * 45_OHM_SE
TABLE_PHYSICAL_ASSIGNMENT_ITEM
C
NAND_50S NAND FMI0_CLE 5 11
I3
I41
I2C_50S I2C I2C1_SCL 4 18 19
TABLE_SPACING_ASSIGNMENT_HEAD
I43
I2C_50S I2C I2C2_SCL 4 17 18
UART * * 2:1_SPACING
NAND_50S NAND FMI0_WE_L 5 11
I62
I44
I2C_50S I2C I2C2_SDA_F 17
NAND_50S NAND FMI0_DQS_P 5 11
I230 NET_TYPE
I37
I229 I2C_50S I2C I2C2_SCL_F 17
ELECTRICAL_CONSTRAINT_SET PHYSICAL SPACING
I49 NAND_50S NAND FMI1_AD<7..0> 5 11
USB * * 3:1_SPACING
TABLE_SPACING_ASSIGNMENT_ITEM
SPACING
B
I5 USB_90D USB SOC_USB_D_P 3 10
SPI * * 2:1_SPACING
TABLE_SPACING_ASSIGNMENT_ITEM
VREF * * 2:1_SPACING
I186 USB_90D USB CONN_DP1_P 38
NET_TYPE
I187 USB_90D USB CONN_DP1_N 38 NET_TYPE
ELECTRICAL_CONSTRAINT_SET PHYSICAL SPACING
I185 USB_90D USB CONN_DP2_P 38 ELECTRICAL_CONSTRAINT_SET PHYSICAL SPACING
TABLE_PHYSICAL_ASSIGNMENT_HEAD
I226 SPI_45S SPI SPI2_CODEC_MOSI 4 14
NET_PHYSICAL_TYPE AREA_TYPE PHYSICAL_RULE_SET SPI_45S SPI SPI2_CODEC_SCLK 4 14
I227
HSIC HSIC_50S * 45_OHM_SE
TABLE_PHYSICAL_ASSIGNMENT_ITEM
A HSIC * *
TABLE_SPACING_ASSIGNMENT_ITEM
3:1_SPACING
DWI_45S * 45_OHM_SE
TABLE_SPACING_ASSIGNMENT_HEAD
SYNC_MASTER=N/A SYNC_DATE=N/A A
NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET PAGE TITLE
ELECTRICAL_CONSTRAINT_SET PHYSICAL
NET_TYPE
CONSTRAINTS: ASSIGNMENTS
DRAWING NUMBER SIZE
TABLE_PHYSICAL_ASSIGNMENT_HEAD
DMIC TABLE_PHYSICAL_ASSIGNMENT_ITEM
DMIC_45S * 45_OHM_SE
TABLE_SPACING_ASSIGNMENT_HEAD
TABLE_SPACING_ASSIGNMENT_HEAD
TABLE_SPACING_ASSIGNMENT_ITEM
NET_TYPE NET_TYPE
D I91
I92
MIPI_90D
MIPI_90D
MIPI
MIPI
MIPI0D_DATA_P<0> 6 16
MIPI0D_DATA_N<0> 6 16
I375
I374
DMIC_45S
DMIC_45S
DMIC
DMIC
L81_DMIC1_FF_SCLK
L81_DMIC1_FF_SD
14
14
D
I93 MIPI_90D MIPI MIPI0D_DATA_P<1> 6 16 DMIC_45S DMIC DMIC1_FF_SCLK 13 14
I376
I94 MIPI_90D MIPI MIPI0D_DATA_N<1> 6 16 DMIC_45S DMIC DMIC1_FF_SD 13 14
I373
I95 MIPI_90D MIPI MIPI0D_DATA_P<2> 6 16
I96 MIPI_90D MIPI MIPI0D_DATA_N<2> 6 16 I406 DMIC_45S DMIC DMIC1_FF_SCLK_CONN 13
MIPI1C_CAM_FRONT_CLK_P 6 17 L81_MBUS_N
C I347
I348
MIPI_90D
MIPI_90D
MIPI
MIPI MIPI1C_CAM_FRONT_CLK_N 6 17
I393 USB_90D USB 14
C
I382 MIPI_90D MIPI MIPI1C_CAM_FRONT_DATA_FILT_P<0> 17
I289 SPEAKER AUDIO SPKR_L_CONN_P 15 38
TABLE_PHYSICAL_ASSIGNMENT_HEAD
TABLE_SPACING_ASSIGNMENT_HEAD
LVDS * * 3:1_SPACING
NET_TYPE
B B
I245 LVDS_90D LVDS MIPI_DATA_CONN_P<3..0> 16
TEMP * TEMP_SENSE
TABLE_SPACING_ASSIGNMENT_HEAD
TEMP * * 3:1_SPACING
NET_TYPE
TABLE_SPACING_ASSIGNMENT_HEAD
I398 TEMP TEMP BOARD_TEMP1_N 42
NET_SPACING_TYPE1 NET_SPACING_TYPE2 AREA_TYPE SPACING_RULE_SET TEMP TEMP BOARD_TEMP2_P 42
I400
BOARD_TEMP2_N
TABLE_SPACING_ASSIGNMENT_ITEM
A BOARD_TEMP3_P
NET_TYPE
TEMP TEMP
ELECTRICAL_CONSTRAINT_SET PHYSICAL SPACING
I402
42 SYNC_MASTER=N/A
PAGE TITLE
SYNC_DATE=N/A A
XTAL_SOC_24M_I TEMP TEMP BOARD_TEMP4_P 23 42
I379
I380
CRYSTAL
CRYSTAL XTAL_SOC_24M_O
3
3
I404
MLB CONSTRAINTS
TABLE_BOARD_INFO
D D
PHYSICAL CONSTRAINTS SPACING CONSTRAINTS
TABLE_PHYSICAL_RULE_HEAD
PHYSICAL_RULE_SET LAYER ALLOW ROUTE MINIMUM LINE WIDTH MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAP
ON LAYER?
DEFAULT/BGA SPACING RULES
TABLE_SPACING_ASSIGNMENT_HEAD
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
STANDARD * Y =DEFAULT =DEFAULT 12.7 MM =DEFAULT =DEFAULT SPACING_RULE_SET LAYER LINE-TO-LINE SPACING WEIGHT * * BGA BGA_SPA
TABLE_SPACING_RULE_ITEM TABLE_SPACING_ASSIGNMENT_ITEM
SWITCHNODE * * SWITCHNODE
SINGLE-ENDED PHYSICAL RULES TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_PHYSICAL_RULE_HEAD
PHYSICAL_RULE_SET LAYER ALLOW ROUTE MINIMUM LINE WIDTH MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAP
ON LAYER?
TABLE_PHYSICAL_RULE_ITEM
0.075 MM ~ 3 MIL
TABLE_SPACING_RULE_ITEM
PHYSICAL_RULE_SET LAYER ALLOW ROUTE MINIMUM LINE WIDTH MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAP
TABLE_PHYSICAL_RULE_HEAD
TABLE_PHYSICAL_RULE_ITEM
2:1_SPACING * 0.11 MM ?
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
0.114 MM ~ 4.5 MIL C
50_OHM_SE * N 0.085 MM 0.085 MM 3.0 MM
2.5:1_SPACING * 0.137 MM ?
TABLE_SPACING_RULE_ITEM
0.125 MM ~ 5 MIL
3:1_SPACING * 0.165 MM ?
TABLE_SPACING_RULE_ITEM 0.140 MM ~ 5.5 MIL
4:1_SPACING * 0.22 MM ?
5:1_SPACING * 0.275 MM ?
TABLE_SPACING_RULE_ITEM
0.15 MM ~ 6 MIL
TABLE_SPACING_RULE_ITEM
PHYSICAL_RULE_SET LAYER ALLOW ROUTE MINIMUM LINE WIDTH MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAP
ON LAYER? 0.25 MM ~ 10 MIL
90_OHM_DIFF TOP Y 0.089 MM 0.089 MM 0.150 MM 0.150 MM
TABLE_PHYSICAL_RULE_ITEM
0.3 MM ~ 12 MIL
TABLE_PHYSICAL_RULE_ITEM
GND_P1SPACING * 0.1 MM
TABLE_SPACING_RULE_ITEM
SWITCHNODE * 0.2 MM
B B
PHYSICAL_RULE_SET LAYER ALLOW ROUTE MINIMUM LINE WIDTH MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAP
ON LAYER?
TABLE_PHYSICAL_RULE_ITEM