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Front Panel IO Connectivity Design Guide PDF
Front Panel IO Connectivity Design Guide PDF
Design Guide
July 2004
Version 1.2
Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or
otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions
of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating
to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability,
or infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical,
life saving, or life sustaining applications.
Intel may make changes to guidelines and product descriptions at any time, without notice.
This guide may contain errors known as errata. Current characterized errata are available on request.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be
obtained from:
Intel Corporation
P.O. Box 5937
Denver, CO 80217-9808
This guide describes connection and mechanical recommendations for all main boards having
internal connectors requiring external connection. Recommendations include (among others):
front panel I/O header pin-out definition, chassis I/O aperture size, I/O interface board dimensions
and main board to front panel board I/O cable shielding and size. Front panel I/O legacy
connectors, internal legacy and legacy-free connectors are also addressed. Specific to front panel
I/O the goal is for any particular setup of main board, interface board, interface cable and chassis
that meets the pinout and physical dimension recommendations of this design guide will be
physically compatible with another setup that also meets the requirements of this design guide.
Environmental and electrical compatibility testing should be conducted for all designs arising from
use of this design guide.
Intended Audience
The guide is intended to provide detailed, technical information to vendors, system integrators, and
other engineers and technicians who need this level of information. It is specifically not intended
for general audiences.
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Intel Front Panel I/O Connectivity Design Guide
Typographical Conventions
This section contains information about the conventions used in this guide. Not all of these
symbols and abbreviations appear in all guides of this type.
NOTE
Notes call attention to important information.
CAUTION
Cautions are included to help you avoid damaging hardware or losing data.
WARNING
Warnings indicate conditions, which if not observed, can cause personal injury.
iv
Contents
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Intel Front Panel I/O Connectivity Design Guide
vi
Contents
Figures
Figure 1. Front Panel Switch/LED and IR Headers (Top View) ................................................. 17
Figure 2. AC’97 Front Panel Dongle Schematic ........................................................................ 20
Figure 3. Front Panel Audio Header (Top View)........................................................................ 21
Figure 4. Intel® HD Audio - Analog Front Panel Header ........................................................... 22
Figure 5. Intel® HD Audio Front Panel Analog Header Motherboard Schematic ...................... 23
Figure 6. Intel® HD Audio Front Panel Dongle Implementation ................................................ 25
Figure 7. Dual Port USB Header (Top View) ............................................................................. 28
Figure 8. Front Panel Single Port USB Header (Top View) ....................................................... 28
Figure 9. Front Panel IEEE-1394 Connector (Top View) ........................................................... 32
Figure 10. Switch/LED Cable..................................................................................................... 33
Figure 11. Front Panel Audio Cable Dimensions....................................................................... 34
Figure 12. Front Panel Audio Cable Cross-Section ................................................................... 35
Figure 13. Audio Cable Wiring Diagram .................................................................................... 35
Figure 14. Dual Port USB Cable Cross Section......................................................................... 38
Figure 15. Dual Port USB Cable Wiring Diagram ...................................................................... 38
Figure 16. Single Port USB Cable Cross Section ...................................................................... 40
Figure 17. Single Port USB Cable Wiring Diagram.................................................................... 40
Figure 18. Front Panel I/O Aperture and Interface Board Placement Recommendations ......... 43
Figure 19. Front Panel I/O Interface Board Placement Recommendations ............................... 44
Figure 20. Front Panel I/O Board Dimensions (Top and Front Views) ...................................... 46
Figure 21. Front Panel I/O Board Dimensions (Bottom View) ................................................... 46
Figure 22. Front Panel I/O Aperture and Interface Board Placement Recommendations ......... 49
Figure 23. Front Panel I/O Interface Board Placement Recommendations ............................... 49
Figure 24. Front Panel I/O Shield Reference Design................................................................. 50
Figure 25. I/O Shield Reference Design .................................................................................... 51
Figure 26. Front Panel I/O Housing Reference Design ............................................................. 52
Figure 27. Front Panel I/O Housing and Shield Assembly Reference Design ........................... 53
Figure 28. Front Panel I/O Interface Board Support Structure Reference Design ..................... 54
Figure 29. Front Panel I/O Board Support Structure Reference Design.................................... 55
Figure 30. Serial-WHQL Debug Connector (Top View) ............................................................. 57
Figure 31. Mainboard Footprint for the Parallel Port Rear Panel Connector (Bottom View)...... 58
Figure 32. Parallel Port Rear Panel Connector (Outside View) ................................................. 58
Figure 33. LPC Debug Connector Dimensions.......................................................................... 64
Figure 34. LPC Debug Connector Hole Layout ......................................................................... 65
Figure 35. LPC Debug Connector Keep-Out Zone .................................................................... 65
Figure 36. LPC Debug Connector Pin Numbering..................................................................... 66
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Intel Front Panel I/O Connectivity Design Guide
Tables
Table 1. Specifications and Design Guidelines...................................................................... 10
Table 2. States for a Single-Color Power LED....................................................................... 16
Table 3. States for a Dual-Color Power LED ......................................................................... 16
Table 4. IR Front Panel Electrical Connection ....................................................................... 18
Table 5. Switch/LED Front Panel Electrical Connection ........................................................ 18
Table 6. AC’97 Front Panel Audio Header Signal Names ..................................................... 21
Table 7. Intel® HD Audio Front Panel Analog Header Signal Names ................................... 22
Table 8. Dual Port USB Header Pin Assignments ................................................................. 28
Table 9. Dual Port USB Header Pin Assignments ................................................................. 29
Table 10. Front Panel IEEE-1394 Connector .......................................................................... 32
Table 11. Front Panel Audio Cable and Connector Pin Assignments ..................................... 35
Table 12. Audio Cable Construction Recommendations ......................................................... 35
Table 13. Additional Audio Cable Recommendations.............................................................. 36
Table 14. Dual Port USB Cable and Connector Pin Assignments........................................... 39
Table 15. Dual Port USB Cable Material List........................................................................... 39
Table 16. Single Port USB Cable and Connector Pin Assignments ........................................ 40
Table 17. Single Port USB Cable Material List ........................................................................ 41
Table 18. USB Cable Recommendations ................................................................................ 41
Table 19. Serial-WHQL Debug Connector............................................................................... 57
Table 20. Parallel Port Rear Panel Connector (Centronics Standard)..................................... 59
Table 21. Parallel Port Stake-Pin Connector ........................................................................... 60
Table 22. LPC Debug Connector Features.............................................................................. 64
Table 23. LPC Debug Connector Pin Assignment................................................................... 66
viii
1 Supporting Documentation
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Intel Front Panel I/O Connectivity Design Guide
10
Supporting Documentation
11
Intel Front Panel I/O Connectivity Design Guide
12
Supporting Documentation
13
2 Front Panel Legacy I/O
2.1 Introduction
This chapter contains feature descriptions of the signals assigned to the 2x3-pin and 2x5-pin front
panel I/O connectors. This chapter also contains electrical connection information.
This guide does not specify designs for MIDI and diskette drive connectors. These interface types
are stable and well documented. Furthermore, as legacy reduction progresses, the functions of
these connectors will be assumed by newer interfaces such as USB.
CAUTION
Voltages supplied to the front panel connector such as VCC (+5 V) are not overcurrent protected
and should connect only to devices inside the computer’s chassis. Do not use these connectors to
power devices external to the computer’s chassis. A fault in the load presented by an external
device could cause damage to the computer, the interconnecting cable, and the external device
itself. It is strongly recommended that power provided to the external connector shall always
implement overcurrent protection.
2.2.1.2 IR Connector
Figure 1 also shows the 2x3-pin front panel connector’s IrDA† feature that supports wireless line-
of-sight peripherals such as remote controls for internal DVD drives, and IR keyboard and mouse
devices.
NOTE
The IrDA connector configuration described here may also be used to support consumer IR.
15
Intel Front Panel I/O Connectivity Design Guide
NOTE
To use the message waiting function, ACPI should be enabled in the operating system and a
message-capturing application should be invoked.
16
Front Panel Legacy I/O
A B C 5 1 9 1
5 1 9 1
6 2 10 2
E D 6 2 10 2
OM14806
17
Intel Front Panel I/O Connectivity Design Guide
Notes:
1. Standby voltage is the voltage that is active during a sleep state that your board supports.
2. If you want to tie this pin to +5 V Standby, adjust the pull-up resistor size (to 10 kΩ, for example).
3. If you want to support the legacy 2x8 connector, place a 0 ohm shorting resistor between pin 9 and +5 V.
18
Front Panel Legacy I/O
2.3.2 Features
The front panel audio connector is designed to support stereo audio output (headphone or amplified
speakers) and a microphone input. Designs using Intel® High Definition Audio (Intel® HD Audio)
permit the two front panel jacks to be dynamically reconfigured as input or outputs, depending
upon the desired application.
CAUTION
It is strongly recommended that motherboard designers only use Intel® HD Audio analog front
panel dongles with the Intel® HD Audio analog front panel header to insure that the jack detection
and dynamic re-tasking capability is preserved. Passive AC’97 analog front panel dongles (ones
which leave the 5V Analog pin-7 line unconnected on the dongle) may be used with the Intel® HD
Audio analog front panel header. But note that the front panel jack detection and re-tasking
functionality will be lost as the AC’97 jacks cannot support connection to the SENSE line. In
addition, software must be aware that an AC’97 dongle is being used with an Intel® HD Audio
analog header since the software might need to dedicate codec ports that are connected to the
header to meet the product’s intended functionality.
19
Intel Front Panel I/O Connectivity Design Guide
plugged into the front panel jack, these return signals which feed that back panel jack are
disconnected, thus muting the back panel output.
Note that the motherboard should not leave the back panel signal floating when front panel devices
are connected. Permitting the back panel signals to float could result in excessive noise at the back
panel jack when the front panel jack is in use.
The motherboard designer should put weak pull-down resistors (10K Ohm, for example) on the
FP_RETUN_R and FP_RETURN_L lines. If using a single supply for the output amplifier, ensure
that these resistors are located after the output capacitor to avoid loading down the amplifier bias.
The grounded side of these pulldowns should be connected to analog ground to prevent digital
noise from entering the audio sub-system.
EMI Filter
MIC
1 2 AUD_GND
ZL**
JACK1 L 220pF
MIC Jack
220pF
3 4 AUD_GND
ZL** MIC BIAS
JACK2 L
220pF
Headphone
AUD_5V 7
Jack 220pF
JACK1 L
FP_OUT_L
ZL** 9 10 FP_RETURN_L
** Note: ZL should be 600Ω or greater @ 100MHz with a low Q (broad Impedance curve over frequency)
20
Front Panel Legacy I/O
9 1
10 2
OM10452
NOTE
Motherboards that have the foot print for a front panel header, but depopulate the front panel
audio header must have 0 ohm resistors as options to connect the FP_OUT and FP_RETURN
signals. These resistors must be installed when the header is depopulated to insure audio is routed
to the back panel.
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Intel Front Panel I/O Connectivity Design Guide
PORT1 L 1 2 GND
PORT1 R 3 4 PRESENCE#
PORT2 R 5 6 SENSE1_RETURN
SENSE_SEND 7
PORT2 L 9 10 SENSE2_RETURN
22
Front Panel Legacy I/O
Rbias Rbias
C1
PORT1 L
1 2 GND
DVDD
VREF1_L VREF1_R
10kΩ
JACK1 L
C2
JACK1 R
PORT1 R 3 4 PRESENCE# To System GPI
HD
CODEC C3
PORT2 R SENSE1_RETURN
JACK2 R 5 6
JACK2 L Rjd_port1**
Jack Detection
Network
C4
PORT2 L SENSE2_RETURN
9 10
Rjd_port2**
Rbias Rbias
** Values for jack detectiond resistors Rjd_port1 and Rjd_port2 should be chosen based on the which CODEC
ports are connected to header PORT1 and PORT2. See the HD Audio specification for more information on jack
detection resistor value assignment.
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Intel Front Panel I/O Connectivity Design Guide
24
Front Panel Legacy I/O
EMI Filter
GND
PORT1 L 1 2
ZL**
220pF
JACK 1
220pF
PRESENCE#
ZL**
PORT1 R 3 4
1kΩ
JACK2 R
JACK2 L SENSE_SEND
220pF
JACK 2
220pF
PORT2 L
ZL**
9 10 SENSE2_RETURN
** Note: ZL should be 600Ω or greater @ 100MHz with a low Q (broad Impedance curve over frequency)
25
3 Front Panel High Speed Serial Bus
3.1 Introduction
This chapter contains electrical connection information for USB and IEEE 1394 front panel high-
speed serial bus connectors
3.2.2 Features
The USB front panel can support multiple USB ports that can be routed via a cable to the front
panel. Each 2x5 header supports two USB ports whereby each 1x5 header supports a single USB
port.
USB features include:
• Support for self-identifying peripherals that can be dynamically connected or disconnected
during computer operation (hot plugging)
• Dynamic device enumeration
• Support for isochronous and asynchronous transfer types over the same set of wires
• Support for up to 127 physical devices
• Error-handling and fault-recovery mechanisms built into the protocol
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Intel Front Panel I/O Connectivity Design Guide
28
Front Panel High Speed I/O Bus
29
Intel Front Panel I/O Connectivity Design Guide
NOTE
Ensure that fuse elements are not present on both the motherboard and the cabled solution.
Having fuse elements in both locations results in a voltage drop at the USB connector, which may
make the USB 2.0 solution non-compliant.
NOTE
Ensure that filter components are not present on both the mainboard and the cable solution.
Systems with filter elements in both locations may not meet the USB Specification signal quality
requirements.
30
Front Panel High Speed I/O Bus
3.3.2 Features
This chapter summarizes the design recommendations for hardware using the IEEE 1394 standards.
The IEEE 1394 high-speed serial bus complements USB by providing enhanced PC connectivity
for a wide range of devices, including consumer audio/video (A/V) components, storage
peripherals, other PCs, and portable devices.
IEEE 1394 has been adopted by the consumer electronics industry and is expected to provide a
volume, Plug and Play-compatible expansion interface for the PC.
The 100-Mb/s, 200-Mb/s, and 400-Mb/s transfer rates currently specified in IEEE 1394 are well
suited to multi-streaming I/O requirements. Figure 9 and Table 10 show the header and pin
assignments for the IEEE-1394 connector.
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Intel Front Panel I/O Connectivity Design Guide
9 1
10 2
OM09486
32
4 Cabling Design Guidelines
4.1 Introduction
This chapter contains reference cable designs for the switch/LED and audio cable that are
compatible with the connector pinouts described in Chapters 2 and 3.
NOTE
To prevent cable unseating, cables should be secured within the system. Tie wraps and/or sheet
metal features could be used to implement this. Cables that are permanently attached to the front
panel interface board could also be implemented, however the interface to the mainboard should
remain as specified.
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Intel Front Panel I/O Connectivity Design Guide
4.3.1 Introduction
This section details the design of an audio cable to be used in conjunction with the front panel I/O
board.
The shielding in this cable is important to reduce cross talk, signal degradation, and coupling of
electromagnetic interference. The shielding is especially important for the microphone circuit since
it is a low-level signal and is very sensitive to noise.
The suggested maximum length for this cable is 18 inches as shown in Figure 11. Figure 12 and
Figure 13 show the cable shielding details. Table 11 and Table 12 lists the pin assignments and
materials list. Table 13 provides additional information for the audio cable.
NOTE
Drawings are not shown to scale.
17.75 ± 0.25 in
1.0 in Max
XXXXXX- P2
P1
XXX
1.0 in Max
Item Identification
Number & Assembly
Vendor Identification
34
Cabling Design Guidelines
Cover Jacket
Shield:
> 65% Interwoven Inner Shield:
Tinned Copper Braid Aluminum Metalized Polyester
P1 AWG P2
26
1 1
3
26 A 3
2 2
26
4 4
7
26 B 7
2 2
26
5 5
6
26 C 6
2 2
26
9 9
10
26 D 10
2 2
2 2
8 KEY KEY 8
Table 11. Front Panel Audio Cable and Connector Pin Assignments
AWG Pairing PIN P1 / P2
26 A 1/1
N/A 2/2
26 A 3/3
26 B 4/4
26 C 5/5
26 C 6/6
26 B 7/7
N/A KEY 8/8
26 D 9/9
26 D 10 / 10
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Intel Front Panel I/O Connectivity Design Guide
36
Cabling Design Guidelines
4.4.1 Introduction
This chapter provides some details of the design for a front panel USB 1.1 and 2.0 interface cable to
be used in conjunction with the front panel I/O interface board and main board. The interface cable
must be shielded as specified in Figure 14, for two reasons:
• To ensure the cable data lines meet the required differential characteristic impedance as given
in the most recent USB specification. Cables with an impedance variation outside of the USB
specification limits will degrade signal quality and could cause front panel USB devices to fail
to operate reliably.
• To shield the cable from RF emissions inside the chassis. Improperly shielded interface cables
can pick up these internally radiated signals and cause the system to fail EMI testing.
Figure 14 and Figure 15 show the recommended USB interface cable shielding details and pin
assignments. Pin assignments are further detailed in Table 14. The cable materials (including
connectors) and construction should enable the system to meet the performance requirements of the
most current USB 2.0 Specification and applicable safety and regulatory requirements.
Table 15 and Table 18 show some current recommendations regarding cable parts and materials.
The cable length (in combination with the trace lengths on the main board and front panel I/O
interface board) must be such that it will satisfy the signal quality requirements (propagation delay,
etc.) given in the most recent version of the USB 2.0 Specification.
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Intel Front Panel I/O Connectivity Design Guide
Non-Twisted: Non-Twisted:
Black: GROUND Red: VREG_FP_USBPWR0
28 USB_FP_P0-
3 3
5
28 USB_FP_P0+ A 5
7 7
28 USB_FP_P1-
4 4
6
28 USB_FP_P1+ B 6
7 7
20 VREG_FP_USBPWR0
1 1
20 GROUND
8 8
7 7
10 KEY KEY 10
2 Unused Unused 2
N/A GROUND (Shield)
7 7
9 KEY KEY 9
38
Cabling Design Guidelines
Table 14. Dual Port USB Cable and Connector Pin Assignments
Signal AWG Color PIN P1 / P2
VREG_FP_USBPWR 20 Red 1/1
VREG_FP_USBPWR 20 Red 2/2
USB_FP_P0- 28 White 3/3
USB_FP_P1- 28 White 4/4
USB_FP_P0+ 28 Green 5/5
USB_FP_P1+ 28 Green 6/6
GROUND (Shield) N/A N/A 7/7
GROUND 20 Black 8/8
KEY N/A N/A 9/9
KEY N/A N/A 10 / 10
NOTE
Computer systems that have an unshielded cable attached to a USB port may not meet FCC
Class B requirements, even if no device or a low-speed USB device is attached to the cable. Use
shielded cable that meets the requirements for full-speed devices.
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Intel Front Panel I/O Connectivity Design Guide
Non-Twisted: Non-Twisted:
Black: GROUND Red: VREG_FP_USBPWR0
28 USB_FP_P0- 2
2
3
28 USB_FP_P0+ A 3
4 4
20 VREG_FP_USBPWR0
1 1
20 GROUND
4
4
Table 16. Single Port USB Cable and Connector Pin Assignments
Signal AWG Color PIN P1 / P2
VREG_FP_USBPWR0 20 -28 Red 1/1
USB_FP_P0- 28 White 2/2
USB_FP_P0+ 28 White 3/3
GROUND 20 - 28 Black 4/4
GROUND (Shield) N/A N/A 4/4
KEY N/A N/A 5/5
40
Cabling Design Guidelines
NOTE
Computer systems that have an unshielded cable attached to a USB port may not meet FCC
Class B requirements, even if no device or a low-speed USB device is attached to the cable. Use
shielded cable that meets the requirements for full-speed devices.
41
5 Interface Board Design Guidelines
5.1 Introduction
The following chapter defines the mechanical recommendations of a front-panel interface board.
The definition includes physical raw board size, mounting holes, keep-out zones and recommended
physical tolerances. A compliant front panel interface board can be used in any chassis design that
supports these key features. Figure 18 shows recommended dimensions of the front panel aperture
and interface board placement.
The front panel I/O guideline defines an I/O aperture opening area that is 3.875+/- 0.008 inch
(98.43 +/- 0.20 mm) wide by 1.000 +/- 0.008 inch (25.40+/- 0.20 mm) tall. To retain maximum
flexibility, the exact positioning and configuration of the connectors within the I/O connector zone
is left to the discretion of the designer. The connectors shown in Figure 18 are a reference design
and are shown here only as examples.
Figure 18. Front Panel I/O Aperture and Interface Board Placement Recommendations
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Intel Front Panel I/O Connectivity Design Guide
Figure 19 shows the front panel I/O board interface recommendations. The face of the front panel
I/O board edge should be placed 0.053 +/- 0.010 inch (1.35 +/- 0.25 mm) from the inside of the
chassis front panel I/O shield and/or chassis housing. The connectors shown here are only
examples.
It is the front panel I/O board designer’s responsibility to properly place the connector to meet front
panel I/O aperture and interface recommendations. (The front panel I/O shield is not shown.)
44
Interface Board Design Guidelines
45
Intel Front Panel I/O Connectivity Design Guide
Figure 20. Front Panel I/O Board Dimensions (Top and Front Views)
46
6 Chassis and I/O Shield Guidelines
6.1 Introduction
This chapter defines the chassis and I/O shield mechanical guidelines for the front panel I/O
interface. Typical chassis interfaces should adhere to the definitions of the front panel I/O board’s
keep-out zones, and mounting hole recommendations. Compliant front panel chassis interface
boards can be used in any chassis design that supports these key features.
Beyond the specific aperture opening and keep-out zones, the chassis and bezel implementation of
the front panel I/O board is not limited to specific features or locations.
NOTE
Figure 18 and Figure 19 are repeated as Figure 22 and Figure 23 in this chapter for convenience
only.
47
Intel Front Panel I/O Connectivity Design Guide
It is strongly recommended for the best EMI attenuation performance, paint should not be applied
within the 0.1 inches (2.54 mm) minimum keepout zone on the inside and outside surfaces of the
chassis front panel (Figure 22). Paint can prevent proper grounding of the I/O shield to the front
chassis panel. The list below shows some front panel I/O board highlights.
• Cutout size = 3.875 +/- 0.008 inches (98.43 +/- 0.20 mm) wide by 1.00 +/- 0.008 inches (25.4
+/- 0.20 mm) tall. See Figure 22.
• Distance from bottom of typical 0.062 inches (1.57 mm) thick board to bottom of I/O cutout
hole = 0.045 to 0.055 inches (1.14 to 1.39 mm). See Figure 22.
• Allowable thickness of the chassis front panel that the I/O shield can clip into is in the range
0.030 inches (0.76 mm) to 0.052 inches (1.32 mm).
The interface board’s width is 3.500 +/- 0.008 inches (88.90 +/- 0.20 mm), its minimum depth is
1.500 inches (38.10 mm), and its maximum depth is 2.500 inches (63.50 mm), see Figure 20 and
Figure 21.
• The corners of the I/O aperture can be rounded to a maximum radius of 0.030 inches (0.76 mm)
as shown in Figure 22. This allowable rounding of the corners helps chassis manufactures
extend the life of their hard tooling while still complying with this guide.
• The 0.1 inches (2.5 mm) minimum keepout zone around the I/O aperture area is used in a front
panel I/O interface board compliant chassis (see Figure 22). This allows front panel I/O
interface board- compliant I/O shields to fit into front panel I/O interface board compliant
chassis. The keepout area is used for the shield attachment points. Avoid paint application in
the area.
• The face of the Front Panel I/O board edge should be placed 0.053 +/- 0.010 inches (1.35 +/-
0.25 mm) from the inside of the chassis front panel I/O shield and/or chassis housing, as
defined in Figure 23.
• Chassis manufactures are not limited to an I/O shield implementation only. As long as the
chassis manufacturers comply with the definitions of this guide, they may choose to have
alternate methods of implementation, i.e., I/O shield or chassis dependent housing.
Figure 22 and Figure 23 detail the I/O connector zone. Compliance with this recommendation is
necessary to ensure enough clearance between the chassis aperture and the front panel I/O interface
board connectors for the I/O shield structure. This recommendation may be waived if the shield
provided with the board requires less than the recommended clearance. It is recommended that
system designers implement a universal design that would support a standard front panel I/O
aperture opening, as shown in Figure 22. To retain maximum flexibility, the exact positioning and
configuration of the connectors within the I/O connector zone is left to the discretion of the
designer. Connectors shown in Figure 22 are a reference design and are shown here only as an
example. Though it is not recommended for reasons of flexibility, a system designer may choose to
implement an integrated chassis housing and I/O shield to support and secure the front panel I/O
interface board. Then a supplied I/O shield may not be required.
48
Chassis and I/O Shield Guidelines
Figure 22. Front Panel I/O Aperture and Interface Board Placement Recommendations
49
Intel Front Panel I/O Connectivity Design Guide
50
Chassis and I/O Shield Guidelines
Figure 25 shows an example of a standard I/O shield reference design. It is provided here as only a
reference for key features that may be used to design and secure front panel I/O shields into a
standard front panel I/O aperture opening. See Figure 18 and Figure 19 for recommended
dimensions of the front panel aperture and interface board placement.
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Intel Front Panel I/O Connectivity Design Guide
52
Chassis and I/O Shield Guidelines
Figure 27. Front Panel I/O Housing and Shield Assembly Reference Design
53
Intel Front Panel I/O Connectivity Design Guide
Figure 28. Front Panel I/O Interface Board Support Structure Reference Design
54
Chassis and I/O Shield Guidelines
Figure 29. Front Panel I/O Board Support Structure Reference Design
55
Intel Front Panel I/O Connectivity Design Guide
56
7 Internal Legacy Connectors (Reference)
7.1 Introduction
This chapter contains electrical connection information for the internal legacy connectors.
9 1
10 2
OM12197
57
Intel Front Panel I/O Connectivity Design Guide
25 14
13 1
OM12198
Figure 31. Mainboard Footprint for the Parallel Port Rear Panel Connector (Bottom View)
13 1
25 14
OM12199
58
Internal Legacy Connectors (Reference)
59
Intel Front Panel I/O Connectivity Design Guide
60
8 Internal Legacy-Free Connectors (Reference)
8.1 Introduction
This chapter contains feature descriptions of the signals assigned to the internal connectors found
on legacy-free and legacy-reduced PC’s. This chapter also contains electrical connection
information.
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Intel Front Panel I/O Connectivity Design Guide
8.2.2 Features
The following criteria were used to design the LPC debug module of which the LPC debug
connector (described here) is a part. The LPC debug module is to:
• Be available on all production hardware which does not include the PC-AT serial COM port
• Use standard interfaces to connect the debug console to the PC under test
• Use a no-silicon design for quick industry enabling
• Not limit the hardware configurations of the PC system under test
• Minimize the processor and memory overhead of the debug data stream of the PC under test
• Be a private resource for the operating system
• Be easily discovered and enumerated by the operating system
• Support one full duplex 57,600 bits per second serial data pipe (minimum)
The module consists of a serial communications port, implemented with a standard 16550 UART
register interface. The serial communications port registers are not allowed to appear at a legacy
COM port I/O addresses, and should be reported to the operating system using a new ACPI table.
To minimize the impact to the main board, the module interface is placed on the Intel® Low Pin
Controller (LPC) interface. Since no LPC 16550 UART is available commercially, an LPC Super
I/O device (SIO) should be used to implement the module.
The LPC SIO used should have the following attributes:
• Its registers should be plug and play compatible
• All legacy controllers (including the 8042) and interfaces in the SIO should be hardware
disabled following a PCI reset.
An I2C serial EEPROM is provided on the module to provide the BIOS with the information used
to configure the COM port in the SIO. This information and method is detailed in the BIOS
requirements section of the Intel® LPC Debug Module Requirements Specification (v1.0).
Using the serial EEPROM to specify the programming method allows any SIO that meets the above
requirements to be used on the debug module. The serial EEPROM can be assigned the I2C
addresses: 1010111xb – 1010100xb by the main board. Since only eight, I2C serial EEPROM
devices can occupy one SMBUS segment, system designers should insure there is no conflict
between the I2C address assigned to the debug module and other Serial EPROM devices in the
system.
The serial EEPROM device should be capable of being written for field upgrade support. A jumper
on the module for write-enable control is an acceptable way to implement this requirement.
The debug module is defined in such a way that it supports two operating environments:
• Operation with a legacy-free operating system
• Operation with a legacy operating system
Operation with a legacy-free operating system is the intended mode of operation of the Debug
module.
Operation with a legacy operating system may be required to support legacy-free early design
validation and manufacturing test flows. Two connector sizes are therefore recommended for the
module interface. The smaller connector only supports the debug port function. The larger
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Internal Legacy-Free Connectors (Reference)
connector supports the signals needed to have full 8042 controller support: RC#, A20GATE, and
SERIRQ.
NOTE
Legacy operation should only be enabled for operation with a legacy operating system. This means
a BIOS setup option needs to be supported which turns legacy mode on and off. In legacy
operation mode, a PS/2† Keyboard and mouse would need to be attached to the debug module since
a legacy-free BIOS is not required to provide USB legacy keyboard emulation. In addition, when
operating the module in legacy mode, the COM port should be programmed by the BIOS to operate
as COM1.
A null modem cable is required to connect the debug module to the serial port on another PC. The
debug module uses a DB9-male connector that is wired in the standard way for a PC serial COM
port.
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Intel Front Panel I/O Connectivity Design Guide
The LPC debug connector’s physical dimensions are specified in Figure 33 below.
64
Internal Legacy-Free Connectors (Reference)
A physical keep-out around the LPC debug connector should be observed. The keep-out zone is
0.160 inches from the end of the connector hole pattern and 0.080 inches from the side of the
connector, measured from the center of any pin. The keep-out is used to allow the cable connector
to be attached without interference from adjacent components. The keep-out is shown in Figure 35.
0.160
0.080
0.080
0.160
65
Intel Front Panel I/O Connectivity Design Guide
Debug with
Debug (Only)
Legacy Extension
1 2 1 2
3 4 3 4
5 6 5 6
7 8 7 8
9 10 9 10
11 12 11 12
13 14 13 14
15 16 15 16
17 18
19 20
66