A Modular and Flexible High-Frequency-Link Transformer with a Reduced Device Count

and Zero High-Side Devices

Final Technical Report
Award No: DE-OE0000853
Submitted to:
The Department of Energy, U.S. DOE/NETL (SPONSOR)
National Energy Tech Lab
626 Cochrans Mill Road, PO Box 10940, Pittsburgh PA 15236-0940
Submitted by:
Sudip K. Mazumder, PI, NextWatt LLC (PRIME)
April 12, 2018
Email: sudipkumarmazumder@gmail.com
Phone: 312-543-9085
Recipient Organization:
NextWatt LLC
1635 Westbury Drive, Hoffman Estates, IL: 60192
DUNS Number: 831926121
Project Period: January 18, 2017 - January 17, 2018
Acknowledgment: "This material is based upon work supported by the Department of Energy
under Award Number DE-OE0000853."
Disclaimer: "This report was prepared as an account of work sponsored by an agency of the
United States Government. Neither the United States Government nor any agency thereof, nor
any of their employees, makes any warranty, express or implied, or assumes any legal liability or
responsibility for the accuracy, completeness, or usefulness of any information, apparatus,
product, or process disclosed, or represents that its use would not infringe privately owned rights.
Reference herein to any specific commercial product, process, or service by trade name,
trademark, manufacturer, or otherwise does not necessarily constitute or imply its endorsement,
recommendation, or favoring by the United States Government or any agency thereof. The
views and opinions of authors expressed herein do not necessarily state or reflect those of the
United States Government or any agency thereof."

Signature of Submitting Official:

Name and Title: Sudip K. Mazumder, President Date: Initial Submission: April 12, 2018
Final Submission: October 4, 2018

(Four detailed technical quarterly reports QR1-QR4 were e-mailed to the SPONSOR program
manager earlier that contains additional information that the PRIME may file for protection.)
1
Table of Contents
Cover Page 1
Executive Summary 3
Overall Summary 7
Key Task Details: Work done on Task 1 (Project management and planning) 12
Key Task Details: Work done on Task 2 (Develop power stage, control & protection designs of 12
the HFL-LPT)
Key Task Details: Work done on Task 3 (Develop HFL magnetics design, optimization, and 13
modeling)
Key Task Details: Work done on Task 4 (HFL-LPT design optimization at module and multi- 25
module levels) and Task 5 (Simulation and modeling of the HFL-LPT optimized design)
Key Task Details: Work done on Task 6 (Scaled experimental prototype single module for the 39
HFL-LPT)
Appendix: Matlab code for HFT design 41
References 49
Abbreviations
AC: Alternating current
BOPS: Balance-of-Plant System
CB: Circuit breaker
DAB: Dual active bridge
DC: Direct current
DSP: Digital signal processor
DOE: (U.S.) Department of Energy
FEA: Finite element analysis
HF: High frequency
HFL: High frequency link
HFT: high frequency transformer
HV: High voltage
IGSE: Improved generalised Steinmetz equation
IPC: Isolated power converter
LPT: Large power transformer
MBC: Minimum breaking current
MCB: Electromechanical circuit breakers
MOSFET: Metal oxide field effect transistor
MOV: Metal oxide varistor
NDA: Non-disclosure agreement
PCB: Printed circuit board
PWM: Pulse width modulation
QR: (Detailed) quarterly reports (sent to the SPONSOR program manager)
Rds,on: On-state resistance
RMS: Root mean square
SiC: Silicon carbide
SSCB: Solid state circuit breaker
ZVS: Zero voltage switching

2
Executive Summary
In general, large power transformers (LPTs) are not interchangeable with each other and their
high costs prohibit extensive spare inventories more so considering that on an average only 1.3
LPTs are manufactured for individual design. The latter pose a further challenge since given that
the several existing LPTs are reaching their end of service lives, loss of plurality of such LPTs,
that form the backbone of U.S. power grid, will clearly run into the problem of energy security
related to the non-availability of sufficient spares (and extended lead time) exacerbated further
by the fact that these spares are not interchangeable for installations at different locations.
Conventional LPT cost millions of dollars and weighs significantly between approximately 100
and 400 tons. Two raw materials—copper and electrical steel—account for over 50 percent of
the total cost of an LPT. In recent years, the price volatility of these two commodities in the
global market has affected the manufacturing conditions and procurement strategy for LPTs.
Transportation is also an important element of the total LPT cost, because an LPT can weigh
significantly and often requires long-distance transport. Transporting an LPT is challenging—its
large dimensions and heavy weight pose unique requirements to ensure safe and efficient
transportation. Current road, rail, and port conditions are such that transportation is taking more
time and becoming more expensive.

Conventional low-frequency LPTs typically follow a monolithic approach to design due to

historical reasons that need to transition to more modular and flexible (e.g., in voltage,
impedance, and power flow) designs with ability to seamlessly/near-seamlessly scale. They
should also have the ability to incorporate new technologies without in all cases redoing a LPT
design from scratch. Given that the cost of raw materials has continued to increase, next-
generation LPTs need to pursue avenues for reducing these costs. An added necessity is to
reduce the transportability cost, which is significant in conventional LPTs. Further, given that
LPTs are for the long term, they need to be durable, efficient, and fault tolerant with overloading
capability.

Given this backdrop, the objective and accomplishment of this one-year DOE (SPONSOR) R&D
project, led by small business NextWatt LLC (PRIME, Lead PI: Dr. Sudip K. Mazumder) and
University of Arkansas at Fayetteville (SUBAWARDEE, PI: Dr. Juan Balda) were to explore
the design of a (8 – 20 kHz) high-frequency-link (HFL) based 100-MVA LPT with nominal
voltage of 115/69 kV, with $15 - $22 US per kVA when manufactured in “moderate” volume,
with 99% energy-conversion efficiency, with 300% reduction in both volume and weight
compared to a conventional LPT with the same electrical ratings, with impedance variation
greater than 5%, with direct AC/AC power conversion capability, with very-high energy-
conversion efficiency (using wide-bandgap SiC based field effect MOSFET devices) over a wide
operating temperature, with reduction in both volume and weight with regard to conventional
low frequency LPT, and with significant reduction in number of devices compared to state of the
art solid state transformer topology. Aside from exploring the nominal design, this project also
explored mechanisms for scalability and modularity using the proposed modular HFL-LPT. The
HFL-LPT also explored the mechanism for voltage and active/reactive compensation and
protection. The tasks of the project encompassed the following: project management and
planning; develop power stage, control and protection designs of the HFL-LPT; develop HFL
magnetics design, optimization, and modeling; HFL-LPT design optimization at module and

3
multi-module levels; simulation and modeling of the HFL-LPT optimized design; and scaled
experimental prototype for the HFL-LPT.

The key outcomes and metrics of the HFL-LPT project are as follows:
1. Nominal primary/secondary voltage: 115/69 kV
2. Nominal power rating: 100 MVA
3. Estimated peak efficiency using hard switching (to increase beyond 99% using soft
switching and magnetics design and material optimizations):
a. 98.8% (8 kHz)
b. 98.5% (15 kHz)
c. 98% (20 kHz)
4. Power density: < 98 W/in3 leading to an estimated volume of 1,020,408 in3 which when
compared to a typical 100 MVA line frequency transformer is expected to yield a
tangible reduction in volume
5. Specific power: ~ 1.7 kW/kg leading to an estimated weight of 58 tons which when
compared to a typical 100 MVA line frequency transformer is expected to yield a
tangible reduction in weight
6. Cost:
a. ~ 10X compared to conventional 60-Hz LPT based on unit price of SiC 3.3 kV
module and HFT
b. ~ 2.5X compared to conventional 60-Hz LPT based on projected bulk price of
SiC 3.3 kV module and HFT
c. The pricing in 6.b is expected to go further down reviewing the aggressive
downward price trend of 1200 V SiC modules and due to increasing global
competition. Further reduction in cost is also expected due to savings in cost
associated with weight, volume, and size reductions due to HF operation of the
HFL-LPT as compared to a typical conventional 60-Hz LPT.
d. A competitive cost of the HFL-LPT with reference to the cost of a typical 60-Hz
LPT while HFL-LPT also achieves a tangible weight and volume reductions as
mentioned earlier may provide significant impetus to the commercial viability of
the HFL-LPT.
7. Nature of power conversion topology: AC/AC
8. Number of power-conversion stages: 1
a. Single-stage direct power conversion
9. Modular: Yes
a. Each phase has multiple modules connected in cascaded configuration)
b. Phase and device configurations also modular
10. Reduction in number of power-conversion stages/module: At least 50% compared to
typical state of the art
11. Number of SiC MOSFETs that are high side referenced to the module ground: 0
12. SiC MOSFET module device breakdown rating used: 3.3 kV
13. Voltage regulation: Yes
14. Active and reactive power capabilities: yes

4
 15. Scalability: Yes via modular architecture
16. Transportability: Yes
a. Due to expected tangible reduction in weight and volume
17. Ability of the architecture to support variable voltages: Yes
a. Due to modularity
b. Due to up/down capability
The take-aways from the project are as follows:
• Demonstrated the simulated feasibility of the novel AC/AC modular topology for SiC
based HFL-LPT power stage
• Demonstrated the simulated feasibility of the closed-loop control of one and plurality
of modules of multi-modular HFL-LPT
• Demonstrated the modular nanocrystalline-core-based HFT design of the HFL-LPT
• Scaled low-power experimental validation of a single AC/AC module
• With regard to performance metrics of 99% energy-conversion efficiency of the HFL-
LPT, following are the specific approaches that are needed most likely to be needed to
be applied together:
➢ Use primary-side soft switching to further mitigate the transition loss. For
instance, using such an approach, at 8 kHz, an efficiency of just about 99% is
already anticipated as shown.
➢ A second viable approach for further improving the efficiency is to reduce the
magnetics losses, which at 20 kHz is assumed to be 1.5% of the overall loss.
This will require design and material optimization of the magnetics (HFT and
the filter inductors).
➢ A third viable approach is to reduce the on-state resistance of the SiC module.
This can be achieved by using more parallel SiC MOSFET dies in parallel (a
shorter-term solution) and/or reducing the on-state resistance of a single SiC
MOSFET die.
• With regard to weight reduction, a tangible reduction in weight and volume is
anticipated using the HFL-LPT compared to a conventional line-frequency transformer.
• An architecture of the protection concept was illustrated. It emerged from that study
that unlike the 60-Hz LPT, the HFL-LPT needs to not only provide input-output
protection (like the conventional LPT) but provide protection for the fast power
semiconductor devices at the core of the AC/AC module. What was realized, however,
is that if one treats these slow and fast scale protections to be an integral entity, it may
yield superior protection with perhaps relatively lower cost since one may be able to
leverage existing protection technologies.
• With regard to variable secondary voltage scaling, clearly, if the requirement is for
lower secondary voltage than 69 kV, available SiC MOSFET with breakdown voltage
rating lower than 3.3 kV is not an issue. For secondary voltage higher than 69 kV (and
exceeding 115 kV), SiC modules with breakdown voltage rating greater than 3.3 kV
may be needed. Clearly, SiC MOSFETs with breakdown rating even at 15 kV has been
reported in published literature. With regard to HFT design, two different approaches

5
 can be pursued: one that uses a higher transformer turns ratio, while the other, that
connects two secondary outputs in series as shown in Fig. 3a of [34]. Both are viable
approaches; the challenge associated with the first approach with specific regard to the
HFL-LPT topology is to keep the leakage inductance lower than increase with square
of the number of turns, while the challenge associated with the second approach is to
have additional HF secondary windings.
The potential next steps are as follows:
• Seek federal and non-federal funding to experimentally materialize the HFL-LPT
• Team up with industry partner to design, fabricate, and test a real-life HFL-LPT
module and modular operation

6
A Modular and Flexible High-Frequency-Link Transformer with a Reduced Device Count
and Zero High-Side Devices

1. Overall Summary:
In general, large power
transformers (LPTs), as
illustrated in Fig. 1 [1],
with a maximum capacity
rating greater and or equal
to 100 MVA (with a high-
side voltage in excess of
115 kV, as captured in
Fig. 2), are not
interchangeable with each
other and their high costs
(at reduced unit volume)
prohibit extensive spare Fig. 1. Illustration of a conventional low-frequency LPT.
inventories more so
Low Side
considering that on an High Side 345 kV 230 kV 161 kV 138 kV 115 kV 69 kV 35 kV 4 kV
average only 1.3 LPTs are 765 kV 9 1 1 14 3 7 1 15
500 kV 3 107 16 43 69 43 3 153
manufactured for 345 kV - 18 27 269 185 136 10 336
individual design [2]. The 230 kV - - 87 226 628 422 56 528
161 kV - - - 44 162 336 14 158
latter pose a further 138 kV - - - - 365 1129 35 476
challenge since given that 115 kV - - - - - 390 213 337
the several existing LPTs Fig. 2. Typical voltage ratings of conventional LPT.
are reaching their end of
service lives, loss of plurality of such LPTs, that form the backbone of U.S. power grid, will
clearly run into the problem of energy security related to the non-availability of sufficient spares
exacerbated further by the fact that these spares are not interchangeable for installations at
different locations. Procurement and manufacturing of LPTs is a complex process that requires
prequalification of manufacturers, a competitive bidding process, the purchase of raw materials,
and special modes of transportation due to its size and weight. The result is the possibility of
extended lead times that could stretch beyond 20 months if the manufacturer has difficulty
obtaining certain key parts or materials [3]. Key industry sources—including the Energy Sector
Specific Plan, the National Infrastructure Advisory Council’s A Framework for Establishing
Critical Infrastructure Resilience Goals and the North American Electric Reliability
Corporation’s Critical Infrastructure Strategic Roadmap—have identified the limited availability
of spare LPTs as a potential issue for critical infrastructure resilience in the United States, and
both the public and private sectors have been undertaking a variety of efforts to address this
concern [3].

7
Due to the significant capital
expenditure, long lead time, and
unique specifications associated with
the procurement and manufacturing of
a replacement LPT, there is an
opportunity to research more flexible
and adaptable LPT designs. Although
the costs and pricing vary by
manufacturer and by size, a LPT can
cost millions of dollars and weigh
between approximately 100 and 400 Fig. 3. Estimated magnitude of LPTs per a survey [3].
tons (or between 200,000 and 800,000
pounds) [3], as captured in Fig. 3.
Two raw materials—copper and
electrical steel—account for over 50
percent of the total cost of an LPT.
(Specifically, manufacturers have
estimated that the cost of raw
materials accounted for 57 to 67
percent of the total cost of LPTs sold
Fig. 4. Variability of prices of steel and copper that
in the United States between 2008 and
serve as essential ingredients for conventional LPTs [5].
2010. Of the total material cost, about
18 to 27 percent was for copper and
22 to 24 percent was for electrical
steel. The average prices of both
copper and steel have increased
significantly over the years, as
captured in Fig. 4, which have clear
implications for conventional LPTs.)
Electrical steel is used for the core of a Fig. 5. Massive challenge with transporting conventional
power transformer and is critical to the bulky and heavy low frequency (LF) (60-Hz) LPTs.
efficiency and performance of the
equipment; copper is used for the windings. In recent years, the price volatility of these two
commodities in the global market has affected the manufacturing conditions and procurement
strategy for LPTs. Transportation is also an important element of the total LPT cost, because an
LPT can weigh as much as 410 tons (820,000 lb) and often requires long-distance transport [4].
Transporting an LPT (as illustrated in Fig. 5) is challenging—its large dimensions and heavy
weight pose unique requirements to ensure safe and efficient transportation. Current road, rail,
and port conditions are such that transportation is taking more time and becoming more
expensive [3].

8
One can draw important conclusions from this backdrop. To begin with, conventional low-
frequency LPTs typically follow a monolithic approach to design due to historical reasons that
need to transition to more modular and flexible (e.g., in voltage, impedance, and power flow)
designs with ability to seamlessly/near-seamlessly scale. They should also have the ability to
incorporate new technologies without in all cases redoing a LPT design from scratch. Given that
the cost of raw materials has continued to increase, next-generation LPTs need to pursue avenues
for reducing these costs. An added necessity is to reduce the transportability cost, which is
significant in conventional LPTs. Further, given that LPTs are for the long term, they need to be
durable, efficient, and fault tolerant with overloading capability.

Given this backdrop, the objective of this 1-year DOE R&D project, led by small business
NextWatt LLC and NCREPT (Arkansas) were to explore the design of a high frequency link
(HFL) based 100 MVA LPT with high-side nominal voltage of 115 kV with variable secondary
voltage with direct AC/AC power conversion capability, with energy-conversion efficiency of
around 99% (using wide-bandgap SiC based field effect MOSFET devices) over a wide
operating temperature, with reduction in both volume and weight with regard to conventional
low frequency LPT, and with significant reduction in number of devices compared to state of the
art solid state transformer topology. Aside from exploring the nominal design, this project also
explored mechanisms for scalability and modularity using the proposed modular HFL-LPT. The
HFL-LPT also explored the mechanism for voltage and active/reactive compensation and
protection. The tasks of the project encompassed the following: project management and
planning; develop power stage, control and protection designs of the HFL-LPT; develop HFL
magnetics design, optimization, and modeling; HFL-LPT design optimization at module and
multi-module levels; simulation and modeling of the HFL-LPT optimized design; and scaled
experimental prototype for the HFL-LPT.

While the details of the work conducted in this one-year project has been detailed later in this
report, a summary of the key outcomes, methodologies, and results for this project are outlined
next.
A. Reduced switch AC/AC HFL-LPT modular topology: A new AC/AC HFL module) based
multi-modular multi-level HFL-LPT architecture (as shown in Fig. 6 for each of the three
phases) has been pursued. This topology has reduced number of devices as compared to the
existing solid-state transformer modules. This reduces the cost for the relatively expensive
high voltage (HV) SiC devices/modules and gate drivers, and reduces overall system
complexity.
B. Module control simplicity: The simplicity of the module topology, with reduced number of
devices and topological symmetry yields a simple control structure. Given that the switching
frequency of the module is not expected to exceed 20 kHz, a real-time implementation of the
control can be executed in a low cost digital signal processor (DSP). This was confirmed via
doing scaled power experimental validation.

9
C. High efficiency of the HFL-LPT:
Switching frequencies for the conceptual
multi-module HFL-LPT realization was
varied between 8 kHz through 20 kHz.
For this frequency range, and using SiC
HV MOSFETs and nanocrystalline
magnetics, the efficiency range was
conservatively estimated to be between
close to 99% to 98% corresponding to
the above frequency range.
D. Active and reactive power factor
support: The HFL-LPT topology was
simulated under both active and reactive
power conditions. It was found that
simple control scheme can achieve Fig. 6. Mechanism for “seamless” and
feasible operation under unity and non- “modular” voltage scaling (and hence power
unity power factor conditions. scaling) using a new 1-phase in/out AC/AC
E. Efficient HF transformer (HFT): module. Same mechanism is applied for the
Using nanocrystalline core material, a other 2 phases to realize the 3-phase HFL-LPT.
modular transformer design
was designed for a modular
rating of 100+ kVA yielding
an energy-conversion
efficiency of at least 99%.
Once a conceptual transformer
was designed at high power,
for the scaled-power
experimentation, actual HFT
was designed and fabricated as
captured in Fig. 7 with high Fig. 7. Nanocrystalline and ferrite core based experimental
efficiency. This HFT was HFTs for scaled power validation.
initially used for experimental validation of the scaled power HFL-LPT AC/AC module
experimental testing.
F. Estimated cost of the HFL-LPT module: Current cost target of LPT is about $0.022/VA,
which yields a price of about $2.2M for 100 MVA in bulk. The HFL-LPT comprises new
materials and wide-bandgap devices. As such, the cost in bulk is not easily available and
equally importantly, these new materials need time for price reduction and stabilization.
Given this backdrop, the estimated price of the HFL-LPT, based purely on unit quantity price
from vendors of new materials and devices is expected to be an order of magnitude more
expensive. However, with bulk price of SiC modules, the HFL-LPT price is estimated to be

10
 only 2.5 times higher and that cost is expected to further come down if cost savings
associated with weight and volume reductions are taken into account.
G. Protection for HFL-LPT: A conceptual design) of the protection for the HFL-LPT has been
pursued and illustrated in Fig. 8. Unlike the conventional LPT protection, for the HFL-LPT,

Fig. 8. Input/output protection scheme outline for the HFL-LPT. Not shown are the
protection schemes for HF power electronics.
protection scheme needs to encompass the LPT on an input-output basis, but include the
protection of the power electronics modules as well. It was perceived that coordinating the
two protection strategies evolving at disparate temporal scales may be of value added and
provide unique opportunity for protection mechanisms hitherto unexplored.
H. Scaled experimental validation: A scaled-power prototype of the AC/AC HFL-LPT module
was developed to validate the operational feasibility of the concept. The PCB based hardware
prototype was developed using wide-bandgap FET, HF magnetics, and DSP based controller
unit and details sent to the SPONSOR program manager. Even though the project has ended
in January, our experimental work, given its initial promise and concept validation, is
continuing on a new PCB with added features including protection.

11
I. Modeling and simulation: This project led to the development of HFT model of the
modular HFT transformer for design and circuit-simulation implementation, power and
control stage circuit model of the HFL-LPT module and multi-module multilevel system.
Key challenges associated simulation convergence and scalability due to rapid switching and
floating ground to name a few were addressed. It was felt during the course of the simulation
that, a multi-core simulator that can distribute the software processing responsibility among
the cores may be helpful to carry out large scale system simulation.
2. Key Task Details:
A. Work done on Task 1 (Project management and planning)
Following chronological summary activities have been conducted as a part of Task 1:
• To begin with a detailed subaward between NextWatt LLC (PRIME) and the University of
Arkansas (SUBAWARDEE) was executed that included the overall guidelines of the U.S.
Department of Energy (SPONSOR) for the PRIME.
• Additionally, a non-disclosure agreement (NDA) was executed between the PRIME and the
SUBAWARDEE to share technical information between the PRIME and the SUBAWARDEE.
• The PRIME and the SUBAWADEE jointly participated in a Kickoff Meeting (on February
17, 2017) with the SPONSOR to go over SPONSOR’s overview and guidelines for the
project (with award number DE-OE0000853) under consideration (PROJECT) for the
PRIME and the SUBAWARDEE. The PRIME and the SUBAWARDEE also provided
technical details and outlined technical approach to the SPONSOR to execute the PROJECT.
• SUBAWARDEE discussed the technical approach to the execution of the design approach.
This included what simulation software(s) will be used, what the design approach for HF
transformer of the overall HF-link large power transformer (HFL-LPT) will be carried out such
that HF design at SUBAWARDEE can directly leverage the HFL-LPT work of the PRIME
that may/will change due to usage of different voltage level of SiC-FET module ratings and
variation in the control strategies and number of modules for the HFL-LPT.
• Communication between PRIME and SUBAWARDEE established regarding HFL-LPT
transformer module design, optimization, simulation, and modelling, and regarding scaled
HFL-LPT transformer module design for scaled validation.
• PRIME worked with a SiC MOSFET module manufacturer. to procure, after negotiation, data
for HV SiC FET using device data sheets.
• Attendance of and active participation in the SPONSOR organized workshop U.S. DOE Solid
State Power Substation Roadmapping Workshop organized by Mr. Kerry Cheung.
• Progress review meeting with SPONSOR on Sep. 8, 2017 at the premise of SUBAWARDEE.
It was attended by Kerry Cheung and by David Szucs via WebEx.
• Final presentation on Feb. 20, 2018 with the SPONSOR via WebEx. It was attended in person
by K. Cheung and by D. Szucs of the SPONSOR, the PRIME PI, and SUBAWARDEE PI.

B. Work on Task 2 (Develop power stage, control and protection designs of the HFL-LPT)

12
The overall HFL-LPT is a multi-module power-conversion system with each module comprising
a cycloconverter (i.e., AC/AC converter) that includes a HF transformer sandwiched between
input (output) AC source (load), HF inductor, and HF capacitor on each of its primary and
secondary sides. There are two potential ways to realize a three-phase HFL-LPT; (Approach 1)
either have 3 single-phase multi-module legs; the other approach (Approach 2) comprises a
multi-module realization of the three-phase HFL-LPT with each module being itself a three-
phase HF differential-mode inverter. Approach 1 was pursued. Different modulation schemes to
switch the HFL-LPT (single-phase AC/AC) module was pursued and closed-loop control
implemented. Subsequently, the closed-loop control and modulation strategies were
implemented on a circuit simulation platform, initially at an input (output) voltage of 1 kV (600
V) peak AC and finally ending at 1 kV (600 V) RMS AC. This is because initially, our team was
targeting 1.7 kV SiC MOSFET modules but finally targeted 3.3 kV SiC MOSFET modules.
The closed-loop performances of the AC/AC module are provided in Figs. 9 and 10,
respectively, for unity-power-factor load and non-unity-power-factor operation. Fig. 9 shows the
unity power factor operation of the AC/AC module. The two traces 2nd from the bottom showing
the output AC voltage and AC current locked in phase is illustrative proof of the operation. The
bottom 2 traces are that of the input AC voltage and AC input current, which are also locked in
phase. The 3rd single trace from the bottom is that of the duty cycle command for a block of the
AC/AC module. The 3rd trace from the top is that of the HF transformer’s magnetizing current. It
clearly shows that the flux of the HFT is centered at zero, which is a positive feature of the
AC/AC topology. Finally, the two top pair of traces signify the switching states for the SiC
MOSFETs in the AC/AC module. It clearly establishes the successful modulation-based
switching of the AC/AC module. Following the unity-power-factor operation of the AC/AC
module under closed-loop operation, non-unity-power factor operation of the AC/AC module of
the HFL-LPT was carried out. Fig. 10 shows the results establishing the operation of the module
with output AC current lagging the output AC voltage.

C. Work done on Task 3 (Develop HFL magnetics design, optimization, and modeling)
This section presents the procedure for designing a HFL-LPT given certain parameter
specifications. In particular, the minimum specification set is given in Table 1. The operating
frequency of the HFT was set to 20 kHz in consideration of the adopted HV SiC MOSFETs, and
a target efficiency of 99% was also set. Other specifications may be: a specific leakage
inductance and a desired magnetizing inductance, temperature rise, and isolation voltage.

13
Fig. 9. Unity power factor operation of the AC/AC module. Details of the waveforms are provided
above. The results establish modulation based closed-loop operation of the module.

14
Fig. 10. Non-unity power factor operation of the AC/AC module. The order of the waveforms is
the same as that for Fig. 10 and explained earlier for Fig. 10.

15
Material and shape of the core for HF operation
Fig. 11 illustrates the adopted shell-
type structure of a HFL-LPT where
𝐵, 𝐶 related to the core window
size, 𝑑𝑎 is the conductor outer
diameter, 𝑑𝑓 , 𝑑𝑖𝑠𝑜 , 𝑑𝑖𝑛𝑡𝑒𝑟 , 𝑑𝑎𝑖𝑟 are
the isolation distances, 𝑁𝐿 is the
number of turns for each layer of
the windings and D is the core
thickness. The shell-type structure
(realized using C cores) with Fig. 11. General structure of a HFL-LPT.
concentric winding is selected to have a controlled design of the HFL-LPT inductances by
adjusting the separation between primary and secondary windings. In general, commercial cores
are available for HFL low-power transformer designs so large-power designs present the challenge
of paralleling several cores to achieve the required area product. It is anticipated that cores having
higher dimensions will become commercially available as large-power applications become more
common.
Table 2 [4] shows
several materials
Amorphous (Metglass 2605SA1)
that can be Nanocrystalline (Viroperm 500f))
considered for this Ferrite (Ferroxcube 3C96)

high-frequency and
Core Loss (Mw/cm3)

high-power
transformer design;
namely, Ferrite,
Nanocrystalline,
and Amorphous.
Fig. 12 summarizes
the core loss
comparison of the
different materials
Peak Operating flux density(T) Operation Frequency (kHz)
under consideration
with different Fig. 12. Core loss comparison of different core materials [8].
operation
frequencies and maximum flux densities [5]. The Ferrite cores are suitable for applications in
which the operating frequencies are in the range of tens to hundreds of kilohertz due to their low
losses, but their saturation flux densities are also low (< 0.4 T), and are brittle so their mechanical
strength may not be sufficient [6]. In addition, the transformer size and weight may be an issue for
the selected operating frequency

16
Therefore, it is not considered in this specific HFT design. The Amorphous cores have the highest
saturation flux density (1.56 T) among all three candidates, their losses at several kilohertz are
acceptable, and their costs are low [4]. However, Nanocrystalline cores have also high-saturation
flux density (approximately 1.2 T) and their core losses are extremely low within the range of
kilohertz to tens of kilohertz, but unfortunately, Nanocrystalline cores cost more than Amorphous
cores [6][7]. Taking into account that a goal of the HFL-LPT design is to optimize efficiency and
power density, Nanocrystalline cores are selected for the 20-kHz HFL-LPT design since it is
expected that they achieve the best performance when all factors are considered.
Winding considerations
Skin and proximity effects can be considerable in
high-frequency applications as illustrated in Fig. 13.
Thus, a certain effective conductor area is necessary
to handle eddy current effects. The use of stranded
insulated and twisted wires reduces these effects; in
particular, Litz wires. In order to reduce the skin and
proximity effects, the windings will be made out of
Fig. 13. HF skin and proximity effects.
circular Litz wire arranged in a concentric manner.
Transformer design procedure
The general objective of the transformer design is to maximize efficiency while minimizing
transformer weight or volume subject to the temperature rise and inductance constraints. Thus, the
HFL-LPT design largely follows the design procedure illustrated in Fig. 14. The main steps are
Step 1: System and topology specifications 𝑺, 𝑽𝒑 , 𝑽𝒔 , 𝒇, 𝑻𝒂 , ∆𝑻∗ , 𝜼∗ , 𝑫, 𝒌𝒇 , 𝑳∗𝒌 , 𝒅∗𝒊
Table 3 provides the main parameters of this 20 kHz HFT.
1.1 𝑆 Rated power of the SST 𝑆 = 𝑉𝑟𝑚𝑠 ∗ 𝐼𝑟𝑚𝑠
1.2 𝑉𝑝 𝑟𝑚𝑠 Voltage applied across the transformer primary terminals
1.3 𝑉𝑠 𝑟𝑚𝑠 Voltage applied across the transformer secondary terminals
1.4 𝑓 Operation (switching) frequency
1.5 𝑇𝑎 Ambient temperature.
1.6 ∆𝑇 ∗ Maximum temperature rise
1.7 𝜂 ∗ Transformer target efficiency
1.8 𝐷 Duty cycle

17
 Step 1. System and Topology Specifications
𝑆, 𝑉𝑝 , 𝑉𝑠 , 𝑓, 𝑇𝑎 , ∆𝑇 ∗ , 𝜂 ∗ , 𝐷, 𝑘𝑓 , 𝐿∗𝑘 , 𝑑𝑖∗

Step 2. Core Material Properties

𝐵𝑠𝑎𝑡 , 𝐾𝑐 , 𝛼, 𝛽

Step 3. Optimal Flux Density

𝐵𝑜𝑝𝑡

Step 4. Core Dimensions

𝐴𝑝 , 𝐴𝑐 , 𝑊𝑎 , 𝑙𝑐

Step 5. Winding Arrangement and Dimensions or

𝐽𝑜 , 𝑁𝑝 , 𝑁𝑠 , 𝐴𝑤𝑝 , 𝐴𝑤𝑠 , 𝑑𝑖

Step 6. Air Gap Calculation

lg

𝐿𝑚 > 𝐿∗𝑚
Step 7. Desired and actual magnetizing Inductance
𝐿∗𝑚 , 𝐿𝑚

Step 8. Leakage Inductance Evaluation

𝐿𝑘 ≠ 𝐿∗𝑘
𝐿𝑘

Step 9. FEA Analysis YES

Does the magnetic core saturate?

NO

Step10. Volume Calculations

𝑉𝑐 , 𝑉𝑤 , 𝑉𝑇

𝜂∗ > 𝜂 Step 11. Core and Winding Losses

𝑃𝑐𝑜𝑟𝑒 , 𝑃𝑐𝑢 , 𝜂

∆𝑇 > ∆𝑇 ∗
Step 12. Temperature Rise and Isolation Level 𝑑𝑖 > 𝑑𝑖∗
∆𝑇, 𝑑𝑖

Optimun Desing with Desired

Lm and Lk

Fig. 14. Flow chart of the HFT design procedure [9]-[11].

Table 3. Main specification parameters
𝑆 72.8 𝑘𝑉𝐴 𝑉𝑝 792 𝑉𝑟𝑚𝑠
𝑉𝑠 792 𝑉𝑟𝑚𝑠 𝑓 20 𝑘𝐻𝑧
𝑇𝑎 25𝑜 𝐶 ∆𝑇 ∗ 50𝑜 𝐶
𝜂∗ 99% 𝐷 0.5
𝑘𝑓 1 𝐿∗𝑘 <100 𝑛𝐻
∗
𝑑𝑖𝑠𝑜 2.5𝑚𝑚

18
1.9 𝑘𝑓 A variable that takes a value in the range between 0 and 1 (i.e.,0 < 𝑘𝑓 ≤ 1.0). This
value depends on the type of isolated power converter (IPC) to determine the needed
magnetizing inductance 𝐿∗𝑚 . If the value of 𝑘𝑓 is small, then 𝐿∗𝑚 in (1) below will be
significantly large which is necessary to avoid a high magnetizing current in some IPCs. In
the case of DAB converters, 𝑘𝑓 is at least 0.2 (which means that the magnetizing current 𝐼𝑚
should be less than 20 % of the primary current 𝐼𝑝 . In the case of topologies like flyback
converters, 𝑘𝑓 is 1.0, which implies that the magnetizing current 𝐼𝑚 is equal to the primary
current 𝐼𝑝 . As a result, magnetizing inductance 𝐿∗𝑚 in those cases is much smaller than the
DAB case.
𝑉𝑟𝑚𝑠
𝐿∗𝑚 =
2𝜋𝑓(𝐼𝑟𝑚𝑠 ∗ 𝑘𝑓 )
∗
1.10 𝐿𝑘 Desired leakage inductance whose value depends on the type of IPC.
1.11 𝑑𝑖∗ Minimum distance between conductors based on transformer breakdown voltage.

Step 2: Core Material Properties 𝑩𝒔𝒂𝒕 , 𝑲𝒄 , 𝜶, 𝜷

As indicated earlier, nanocrystalline material was chosen for the HFT since it offers the best
potential for cost-efficiency-volume tradeoffs when compared to Amorphous and Ferrite
materials for the selected operation frequency of 20 kHz. Once the core material is selected, the
saturation flux density Bsat, and the Steinmetz coefficients 𝑘, 𝛼 and 𝛽 are obtained from the
manufacturer data. The selected core is a custom made Nanocrystalline core from King
Magnetics® whose B-H characteristic is given in Fig. 15 and its relative magnetic permeability is
higher than 𝜇r = 30000 H/m [12].
2.1 𝐵𝑠𝑎𝑡 is the maximum magnetic density field for the material and given in the datasheet (i.e.,
1.2 𝑇 for nanocrystalline).
2.2 𝐾𝑐 , 𝛼, 𝛽 Material parameters obtained from manufacturer’s datasheet or determined by curve
fitting the material loss curve under sinusoidal excitation (i.e., 2.3𝑊/𝑚2 , 1.32, 2.12 for
Nanocrystalline).

Step 3: Optimum flux density 𝑩𝒐𝒑𝒕

Even though Bsat = 1.2 T for the selected
material, the calculated value of Bopt is only
0.1491 T, well below the saturation value in
order to have a balance between HFT
efficiency and volume.
𝐵𝑜𝑝𝑡 = 0.149 𝑇 Optimal flux density
calculated using the expression below
derived in [9]-[11] considering that
minimum losses are obtained when the
copper and core losses are equal as shown Fig. 15. Winding, core and total loss [5].
in Fig. 15

19
 2 1
(ℎ𝑐 𝑘𝑎 ∆𝑇)3 𝐾𝑣 𝑓𝑘𝑠𝑓 𝑘𝑢 6
𝐵𝑜𝑝𝑡 = 1 7 (
∑ 𝑉𝐴
)
3
√4(𝜌𝑤 𝑘𝑤 𝑘𝑢 )12 (𝑘𝑐 𝐾𝑐 𝑓) 12

• ℎ𝑐 = 10𝑊/𝑚2 the natural coefficient of heat transfer by convection.

• 𝑘𝑎 = 40, 𝑘𝑐 = 5.6 𝑎𝑛𝑑 𝑘𝑤 = 10 are dimensionless constants (typical values for most of
the cores except pot core).
• 𝑘𝑠𝑓 = 0.95 Core stacking factor, which relates the effective cross-sectional area with the
physical area of the core. 0.95 is a typical value for laminated cores.
• 𝐾𝑣 = 4 Waveform factor. 4 for square wave and 4.44 for sinusoidal wave [11].
µ𝛺
• 𝜌𝑤 = 1.72𝑒 − 8 Initial wire resistivity.
𝑐𝑚
• 𝑘𝑢 = 0.4 The window utilization factor 𝑘𝑢 can vary from 0.2-0.8, being 0.8 a value for a
very tight winding; however, a value of 0.4 is recommended.
𝑃𝑜𝑢𝑡
• ∑ 𝑉𝐴 = 146.3 𝑘𝑉𝐴 Total power rating calculated as: ∑ 𝑉𝐴 = 𝑃𝑖𝑛 +
𝜂

Step 4: Core dimensions 𝑨𝒑 , 𝑨𝒄 , 𝑾𝒂 , 𝒍𝒄

4.1 𝐴𝑝 = 2.9069 ∗ 103 𝑐𝑚4 The minimum area product needed for this application as calculated
using the expression below. So, a selection of a core whose area product (6.2899 ∗ 104 𝑐𝑚4 )
is larger than (2.9069 ∗ 103 𝑐𝑚4 ) is required.
8⁄
√2 ∑ 𝑉𝐴 7
𝐴𝑝 = ( )
𝐾𝑣 𝑓𝐵𝑜𝑝𝑡 𝑘𝑓 𝐾𝑡 √𝑘𝑢 ∆𝑇

• 𝐾𝑡 = 4.8224 ∗ 104 and it can be calculated using:

ℎ𝑐 𝑘𝑎
𝐾𝑡 = √
𝜌𝑤 𝑘𝑤

4.2 𝐴𝑐 = 24.96 𝑐𝑚2 Cross-sectional area of the selected magnetic core as obtained from the
datasheet.
4.3 𝑊𝑎 = 126 𝑐𝑚2 Window area of the core calculated using:
𝑊𝑎 = 𝐶 ∗ 𝐵 ∗ 𝑠ℎ𝑒𝑙𝑙_𝐹𝑎𝑐𝑡𝑜𝑟
where 𝐶 = 10.5 𝑐𝑚 and 𝐵 = 6 𝑐𝑚 are the length and width of the selected core and
𝑠ℎ𝑒𝑙𝑙𝐹𝑎𝑐𝑡𝑜𝑟 = 2 since two C-cores been used for this design.
4.4 𝑙𝑐 = 46.2 𝑐𝑚 Mean length of the magnetic path around the core from the datasheet.

Step 5: Winding arrangements and dimensions 𝑱𝒐 , 𝑵𝒑 , 𝑵𝒔 , 𝑨𝒘𝒑 , 𝑨𝒘𝒔 , 𝒅𝒊

5.1 𝐽𝑜 = 127.754 𝐴/𝑐𝑚2 Current density calculated from the expression below considering the
effects of the copper loss, core loss, and the thermal heat transfer [7]:
ℎ𝑐 𝑘𝑎 ∆𝑇 1
𝐽𝑜 = √ √2𝑘 8
𝜌𝑤 𝑘𝑤 𝑢 √𝐴𝑝
5.2 𝑁𝑝 = 18 Primary turns calculated using:
𝑉𝑟𝑚𝑠
𝑁𝑝 =
𝑘𝑣 𝑓𝐵𝑚𝑎𝑥 𝐴𝑐
5.3 𝑁𝑠 = 18 Secondary turns since the transformer is a 1: 1 turn ratio or it is calculated using:

20
 𝑁𝑝 𝑉𝑠
𝑁𝑠 =
𝑉𝑝
5.4 𝐴𝑤𝑝 = 0.7201 𝑐𝑚2 Required primary bare wire area (𝑐𝑚2 ) calculated using:
𝐼𝑝
𝐴𝑤𝑝 =
𝐽𝑜
5.5 𝐴𝑤𝑠 = 0.7201 𝑐𝑚2 Required secondary bare wire area (𝑐𝑚2 ) calculated using:
𝐼𝑝
𝐴𝑤𝑝 =
𝐽𝑜
5.6 𝑑𝑖 = 2.5 𝑚𝑚 Minimum isolation distance between winding and it can be calculated using:
𝑉𝑖𝑜𝑠
𝑑𝑖 =
𝑘𝑖𝑠𝑜 𝐸𝑖𝑛𝑠
• 𝑉𝑖𝑠𝑜 = 45 𝑘𝑉 Isolation voltage level.
• 𝑘𝑖𝑠𝑜 = 0.4 Safety margin for isolation requirement
• 𝐸𝑖𝑛𝑠 = 45 𝑘𝑉/𝑚𝑚 Dielectric strength of selected insulation material
The winding-to-winding capacitance is reduced by adding a copper shield covered with
Kapton® tape between the primary and secondary windings. The complete layers organized from
the inner layer to the outer layers are: core, bobbin, primary conductors, Kapton® tape, copper
shield, Kapton® tape and secondary windings. Dupont Nomex® 410 insulation material is added
between the primary and secondary windings to meet the required 45 kV insulation level. This
material can withstand short-term electrical stresses of 34 kV/mm.

Step 6: Air-gap calculation 𝒍𝒈

𝑙𝑔 = 27.9 𝑚𝑚 Air-gap is needed according to the converter topology been used in this
application. The purpose of the air-gap is to decrease the magnetizing inductance to the
lowest possible value. It can be calculated using the expression below based on the core
structures.
𝜇𝑜 𝑙𝑐
𝑙𝑔 = (2𝑁𝐼𝑅𝑀𝑆 − )
𝐵𝑜 𝜇𝑟

Step 7: Magnetizing inductance evaluation 𝑳∗𝒎 , 𝑳𝒎

7.1 𝐿∗𝑚 = 66.5 µ𝐻 Target magnetizing inductance calculated using (1) and based on the type of
the converter as explained in point 1.9 above.
7.2 𝐿𝑚 = 77 µ𝐻 Actual magnetizing inductance and it can be calculated using the expression
below, which produces a value very close to the required one. At this point it is up to the
designer to reject this value and add or increase the air gap to get a value less than (66.5 µ𝐻)
or proceed to the next step.
𝑁𝑝2 𝑆𝐹 𝐴𝑐 µ𝑜 µ𝑟 𝑙𝑔 2𝐶
𝐿𝑚 = (1 + ln ( ))
𝑙𝑐 +𝑙𝑔 µ𝑟 √𝑆𝐹 𝐴𝑐 𝑔𝑙

• 𝑆𝐹 = 1 Stacking factor needed to achieve area product.

• µ𝑜 = 4π ∗ 10−7 Air permeability.
• µ𝑟 = 30 ∗ 103 Material permeability

21
Step 8: Leakage inductance evaluation 𝑳𝒌
The structure of the designed HFL-LPT is shown in Fig. 16 and Table 4 provides the main
dimensions of the designed HFT.
10.1 𝐿𝑘 = 0.1 𝑢𝐻 Actual leakage inductance based on the number of turns, the arrangement of
the windings, and the core structure shown Fig. 17 [11]. It can be calculated using:
𝜋(𝑀𝐿𝑇)𝑁2
𝐿𝑘 = (3𝑑𝑖𝑠𝑜 + Insulation Bobbin LITZ wires
𝑁𝐿
4𝑑𝑎 A
) 10−9 [𝐻]
3
• 𝑑𝑖𝑠𝑜 = 2.5 𝑚𝑚 The
distance between primary C
N L

Htot
and secondary windings.
It is defined based on the
insolation level diso
requirement.
df Copper Shield
• 𝑁𝐿 = 85.5 𝑚𝑚 The A B
Wtot
distance of the wire along
Fig. 16. Structure of the designed HFL-LPT.
the central core.
• 𝑀𝐿𝑇 = 0.462 m The mean length of a turn.
• 𝑑𝑎 = 9.5 𝑚𝑚 The diameter of the Litz wire.
Table 4. Main parameters of the designed HFT.
A 33 mm D 85 mm
B 60 mm 𝑑𝑓 3 mm
C 105 mm 𝑑𝑎 9.5 mm
𝑊𝑡𝑜𝑡 252 mm 𝑑𝑖𝑠𝑜 2.5 mm
𝐻𝑡𝑜𝑡 171 mm 𝑑𝑎𝑖𝑟 5 mm
𝑁𝐿 85.5 mm 𝑑𝑠 0.127 mm
The windings should be as close as possible to each other to minimize the leakage inductance.
For that reason, secondary windings are wound around the primary windings. The calculated
value of the leakage inductance is compared with the target value specified for the HFL-LPT
design (e.g., 𝐿𝑘 is zero in a flyback converter). The calculated value (𝐿𝑘 = 0.1 µ𝐻 ) is very
small in comparison to the magnetizing inductance. Therefore, designer should proceed to the
next step. If the value is larger than expected, then there are possible ways to reduce it. For
instance, one layer of primary and secondary windings could be wounded around the center pole
or the core in instead of interleaving windings as seen in Fig. 17 (two layers).

Step 9: FEA analysis

The previous design steps are verified using Finite-Element Analysis (FEA) with 𝐴𝑁𝑆𝑌𝑆𝑇𝑀
software. An example is shown in Fig. 17 where the value of 𝐵 is still within the allowable limits.
Most of the core structure experience density fields between (0.161 T green) and (0.096 T blue)
which is a perfect range of the calculated optimal flux. Once the ANSYS simulations are done,
the

22
 Fig. 17. Flux density field distribution inside the cores.
designed can visualize the distribution of the magnetic field and decide to proceed to the next
steps or go back to previous design steps to perform necessary changes.

Step 10: Volume calculation 𝑽𝒄 , 𝑽𝒘 , 𝑽𝑻

10.1 𝑉𝑐 = 2.306 ∗ 103 𝑐𝑚3 Core volume in 𝑐𝑚3 calculated using: 𝑉𝑐 = 𝑙𝑐 𝐴𝑐 .
10.2 𝑉𝑤 = 6.914 ∗ 103 𝑐𝑚3 Winding volume in 𝑐𝑚3 calculated using: 𝑉𝑤 = 𝑀𝐿𝑇 ∗ 𝑊𝑎 .
10.3 𝑉𝑇 = 9.22 ∗ 103 𝑐𝑚3 Total volume in 𝑐𝑚3 calculated using: 𝑉𝑇 = 𝑉𝑐 + 𝑉𝑤 .
If the application is characterized by space limitations and the volume specification is not
fulfilled, a new optimization design iteration can be considered by selecting a different operating
flux density in terms of the optimal volume in Step 3. However, the efficiency could be
compromised because there is a trade-off between efficiency and power density.

Step 11: Core and winding losses 𝑷𝒄𝒐𝒓𝒆 , 𝑷𝒄𝒖 , 𝜼

The two main transformer losses are the core and copper losses and their calculations must
include the harmonic content of the current in the transformer.
11.1 𝑃𝑐𝑜𝑟𝑒 = 168.9 𝑊 Power core losses. There are many approaches to calculate power cores
losses (i.e., separation of losses, Preisach model and Jiles-Atherton model based on the
hysteresis model). However, the core loss calculation here is based on the Improved
Generalised Steinmetz Equation (IGSE) [13] using the parameters for the core materials
given in [5]. So IGSE is used to obtain the value of 𝑃𝑣𝑖 . Therefore, 𝑃𝑐𝑜𝑟𝑒 now can be
calculated using: 𝑃𝑐𝑜𝑟𝑒 = 𝑉𝑡 ∗ 𝑃𝑣𝑖 .
• 𝑃𝑣𝑖 = 1.832 ∗ 104 𝑊/𝑚3 Resulting value using (iGSE)
• 𝑉𝑡 = 0.0092 𝑚3 Total volume in meter cubic.
11.2 𝑃𝑐𝑢 = 40 𝑊 Winding losses which are inversely proportional to the square of the
frequency 𝑓 and flux density 𝐵 and are calculated using: 𝑃𝑐𝑢 = 𝑅𝑠 ∗ 𝐼𝑃2 + 𝑅𝑝 ∗ 𝐼𝑠2 .
• 𝑅𝑠 = 𝑅𝑝 = 0.0024 𝛺 Total primary and secondary winding resistances.

23
 • 𝐼𝑝 = 𝐼𝑠 = 92 𝐴𝑟𝑚𝑠 . RMS primary and secondary transformer currents.
𝑃𝑜𝑢𝑡
11.3 𝜂 = 99.7 The efficiency of the SST design calculated using: 𝜂 = .
𝑃𝑜𝑢𝑡 +𝑃𝑡
• 𝑃𝑡 Total power losses 𝑃𝑡 = 𝑃𝑐𝑜𝑟𝑒 + 𝑃𝑐𝑢

Step 12: Temperature rise and isolation level ∆𝑻, 𝒅𝒊𝒔𝒐

𝑃 0.833
12.1 ∆𝑇 = 48.4𝑜 𝐶 Temperature rise calculated using: ∆𝑇 = ( 𝑇 ) .
𝐴𝑡
• 𝐴𝑡 the surface area in 𝑐𝑚2 which can be related to the area product as follows:
𝐴𝑡 = 𝐾𝑠 √𝐴𝑝

• 𝐾𝑠 = 39.2 For a C core.

12.2 𝑑𝑖𝑠𝑜 = 2.5𝑚𝑚 Isolation distance between windings.
The resulting temperature rise ΔT is evaluated to ensure that the specified temperature rise
(in Step 1) is not exceeded. In addition, the required isolation level is evaluated by calculating
the distance between conductors 𝑑𝑖𝑠𝑜 per the procedure given in [5]. If the requirements are not
fulfilled, a new iteration is initiated considering two options: changing the core dimensions in
Step 4, or the winding arrangement in Step 5. The dimensional parameters of the HFL-LPT
design are given in Table 5.

24
D. Work done on Task 4 (HFL-LPT design optimization at module and multi-module
levels) and Task 5 (Simulation and modeling of the HFL-LPT optimized design)
Once the single AC/AC module simulation was conducted, it was time to scale (and multi-
module simulate) the overall HFL-LPT power level up using plurality of AC/AC modules.
There were several challenges that was encountered. To begin with even though each module has
only finite number of SiC MOSFETs, a multi-module HFL-LPT has more MOSFETs and
passive components, and as such switching simulation became time consuming and often led to
simulation convergence related issues. This took some time to resolve some of the issues to make
the simulation operational. The next challenge was the recognition that when multiple modules
are cascaded in series at the input and the output sides to scale up the voltages (and hence
power), the number of passives are increasing multi-fold and hence, for n such module
connection, the number of passives increase n-fold. More importantly, the input-output-filter
magnetics are handling line-frequency components and hence connecting them in series implies
somewhat losing the advantage of HF operation. So, the filters really need to be placed at the
input and output of the overall HFL-LPT assembly. By doing so, it was observed that overall
components per module reduce even further as one increases the number of HFL-LPT AC/AC
modules.

Yet another realization was that even though the HFL-LPT can deal with unity as well as non-
unity power factor operations, from the standpoint of reducing the size of the overall HFL-LPT,
if the output load can enable a unity power factor operation, then, that yields the best scenario
with regard to compactness and simplicity. This also perhaps explains why power-factor-
compensation based operation is being increasingly required by standards and utilities. Fig. 18
shows the operational results of the two-AC/AC-module operation of the HFL-LPT with a HV
AC input voltage and a HV secondary output voltage. In this modulation-switching approach a
combination of HF switching of the SiC MOSFETs along with module-topological switching is
combined that leads to each module operating at HF during each half line cycle while in the
other half of the same line cycle, the switches of the same module not operating at HF. This
apparently, reduces circulating current and reduce the breakdown voltage.

The goal of the AC/AC module control strategy is to track a desired output AC voltage at the
output (input) for a given applied AC input (output) voltage. Essentially, the desired output AC
voltage, which is captured using Vref, is tracked by switching the MOSFETs in the AC/AC
module. However, because the output-to-input voltage gain of the AC/AC module is nonlinear, a
sinusoidal modulation of the MOSFETs does not necessarily yield sinusoidal output voltage. As
such, harmonic compensators are needed to mitigate the undesired non-fundamental harmonics.
Another aspect of the overall control so far is the incorporation of the feedforward term. This is
needed to partly compensate the inherent transport delay in the AC/AC-converter modular block
between the input and output AC

25
 a)

b1)

b2)

c)
Fig. 18. HV simulated results of the multi-module HFL-LPT using cascaded AC/AC modules.
(a) Power stage results with traces from top to bottom: SiC MOSFET control signals for AC/AC
modules; primary- and secondary-side FET device voltages for one of the AC/AC modules;
HFL-LPT output current; and HFL-LPT input voltage and current for unity power factor
operation. (b) Zoomed signals of waveforms in (a). (c) Control signal from bottom to top:
harmonic compensator output; feedforward control signal; and final command signal after
transformation that is used to generate the SiC MOSFET control signals.
26
Fig. 19. Multi-module simulation results using the nominal HFL-LPT model and the capture of
the level of computational involvement even for the simulation model.

27
voltages. Once the two-module HFL-LPT was tested, the multi-module HFL-LPT was simulated
and tested, as captured in Fig. 19 at the final input and output voltages.

Next, discuss about the HFL-LPT protection scheme.

Electric power distribution systems are normally subjected to short-circuit faults and overvoltage
stresses. Conventional transformers can be protected against short-circuit faults lasting several
milliseconds and even seconds by electromechanical circuit breakers (MCB) and power fuses
because of the transformer ride-through capabilities [14]-[17]. Surge arrester are normally used
to protect against overvoltages due to lightning strikes and other sources [16]-[18].
Unfortunately, high-frequency link (HFL) large-power transformer (LPT) based power
semiconductor devices are limited in terms of short-circuit and overvoltage capabilities. Short-
circuit faults in the case of HFL-LPTs are only acceptable during short intervals; few
microseconds without leading to semiconductor device failures [15]. The grid protection of HFL-
LPTs still remains a widely-open and important topic [19]-[22].

Fault classification
The following faults are applicable to HFL-LPTs [19]:
1) Internal Short-Circuit Faults
2) External Short-Circuit Faults: The fault analysis will depend if the system has three- or
four-wire configuration and whether is solidly grounded or not [16]. Line faults can
involve all three phase (3L), two phases (LL), two phases and ground (LLG), and one
phase to ground (LG).
3) Lightning Surges
4) System Switching Transients (like energizing switched capacitor banks)
5) Non-ideal Loads (like arc furnaces)

HFL-LPT protection requirements

A HFL-LPT protection scheme must satisfy the following requirements [19]:
1) Minimize Safety Hazards: Protective devices should prevent hazards during a fault, and
allow for isolating the system for maintenance or inspection purposes. In other words, the
faults should be isolated as fast as possible in order to minimize grid perturbations and
avoid high stresses, in particular, those upon the semiconductor devices.
2) Minimize Affected Area: All protective equipment should be coordinated among
themselves so the protective equipment closer to the (short-circuit) fault operates first,
and thus, minimizing the fault adverse impacts upon end customers. This is a significant
requirement a the HFL-LPT since fault coordination requires that the fault current be
impressed upon the system for several seconds for the closest protective equipment to the
fault opens (e.g., a distribution cut out or fuse blows). The HFL-LPT must be designed to

28
 sustain these high (fault) currents for several seconds – this leads to several power
semiconductor devices in parallel at each switching position increasing the overall cost.
3) Sensitivity: The protective equipment should be able to detect faults over a wide range (if
possible, those with small magnitudes - not an easy task), and avoid nuisance trips (like
those in the case or energizing capacitor banks).
4) Losses: The protective equipment should not add significant power losses during normal
operation.
5) Cost: Protective equipment costs should be reasonable when compared to the price of the
HFL-LPT.

Conventional transformer protection scheme

This section revises for completeness a simplified protection scheme for a fundamental-
frequency LPT addressing short circuits, overvoltage and grounding as shown in Fig. 20 for a
delta/wye-grounded connection since these transformers interfacing a sub-transmission voltage
to a medium voltage are typical in the USA [17]. Typical protection schemes for fundamental-
frequency LPT are as follows:
MV Side LV Side
CB Maintenance Bypass
Y
Disconnect Circuit Disconnect
Disconnect Breaker Switch
Fuse Switch
Switch

S4 F1 S1 CB1 S3

S1 CB3 S3
S5 F2

S6 F3 R0 S1 CB4 S3
GND1
GND5

Grounding
SPD1 SPD2 SPD3 SPD4 SPD2 SPD3
Surge
Surge
Arrester
GND2 GND3 GND4 Arrester GND2 GND3 GND4

Fig. 20. Conventional protection scheme for a fundamental-frequency Δ-Y grounded LPT.

A. Short-circuit, overload, and isolation protection

With reference to Fig. 20, the different protective equipment are [17]:
1) Power fuses open the circuit after a certain amount of time depending on the fault current
magnitude. Fuses are not able to break currents below their minimum breaking current
(MBC), which is larger than their nominal currents. So, fuses do not provide protection

29
 against overloads whose currents are below the MBC. In the USA, the maximum short-
circuit capability of fuses normally used in electric power distribution systems is 10 kA.
2) Circuit breakers (CB) interrupt short-circuit currents up to around 80 kA, have typical
total breaking times between 50 and 100 ms once that a trip signal is enabled, and enable
reconnecting the isolated portion of the system once that the fault is cleared; that is, they
are used in automated distribution systems. However, CB are more expensive than fuses.
3) Disconnectors (or disconnect switches or isolators) disconnect the LPT from the grid for
isolation during LPT maintenance or repair. Disconnect switches can operate under
normal load currents (load switches), or under no-load currents (no-load switches).

Fig. 20 illustrates the use of CBs in the low-voltage (LV) side for short-circuit and overload
protection when power flows from the high-voltage (HV) side, and power fuses for the HV side;
however, the latter could be changed by interrupter switches or CBs depending on the system
configuration.

B. Overvoltage protection
The insulation levels defined in various standards for short-duration power-frequency voltages
and lightning impulse voltages (e.g., ANSI/IEEE C57) are sufficient for handling switching and
power-frequency overvoltages. The metal-oxide varisters (MOVs) or surge arresters shown in
Fig. 20 limit the maximum phase-to-earth voltages during lightning surges. State-of-the art
transformers use MOVs on the HV and LV sides [18].

C. Grounding approaches
The grounding approach may be different for the LV and HV sides so the fault impedances to
faults involving ground are different. In Fig. 20, the LV side of the LPT has a solid earth
connection providing a short-impedance return path for faults involving ground and thus tripping
protective equipment in a coordinated manner [24]. Only the line and transformer impedances
limit short-circuit currents on the LV side and overvoltages at the star point does not occur.
These grounding concepts are possible for the HV sides, [25]:

a) Solid grounding (R0 ≈ 0): Solid grounding for wye-connected HV sides is limited to
grids with low short circuit power to avoid very high short-circuit currents that would
occur during LG faults.

b) Unearthed (R0→∞): The star point is only connected to the earth through parasitic
capacitances, or the star-point is not present (i.e., delta connection). The main advantage
of this grounding concept is limited ground short-circuit currents enabling the possibility
of operating the grid with a LG fault (i.e., continuity of service). The main drawbacks are
the difficulty to detect ground faults without additional monitoring, overvoltages may

30
 appear at the ungrounded star point during asymmetric faults, and overvoltages occurring
due to intermittent ground faults.
Therefore, the choice of the HV grounding depends on whether the transformer is delta or wye
connected as well as trade-offs between short-circuit currents and star-point overvoltages.

HFL-LPT protection scheme

The HFL-LPT protection scheme is developed on the base of the one shown in Fig. 20 since
CBs, power fuses, interrupter switches, disconnect switches and MOVs are reliable and cost
effective. However, additional pieces of equipment are required since the HFL-LPT has limited
current and voltage overload capabilities; in particular, the following must be considered [19]-
[21]:
• In general, the short-circuit capabilities of IGBTs are limited up to 5 to 6 times their rated
current for about 10 µs; time increases for lower currents until the package thermal
limitations are reached.
• There are also challenges about sustaining overvoltages above the power semiconductor
device maximum blocking or breakdown voltage. It is standard design practice to have
applied DC voltages between 50%-60% to provide sufficient margin for overvoltages due
to parasitic inductances.
• Some passive components must be designed to sustain higher current and voltages; for
example, filter inductors to avoid saturation when fault currents flow.

One advantage of the HFL-LPT is that the current and voltage measurements for identifying fault
and overload situations are available since they are needed for control and internal protection
purposes. Fig. 21 shows the conventional HFL-LPT protection scheme.

MV Protection HF LPT LV Protection

CB Maintenance Bypass
CB Maintenance Bypass
Disconnect Circuit Disconnect
Disconnect Circuit Disconnect
Switch Breaker Switch
Switch Breaker Switch

S4 CB5 S7 S1 CB1 S3

CB6
AC AC CB3
S5 S7 S1 S3

HF
LPT
S6 CB7 S7 S1 CB4 S3

R0
GND1 SPD4 SPD2 SPD3
Surge Grounding GND5 Surge
Arrester GND2 GND3 GND4 Arrester GND2 GND3 GND4

Fig. 21. Proposed conventional protection scheme for a HFL-LPT. (Same as Fig. 8)

31
A. Conventional protection scheme
1) Overvoltage protection: MOVs are placed at the HV and LV sides in order to clamp large
overvoltages [18], [25], [26]. MOVs are also placed between the phases on the HV side
for better voltage clamping [25]. Surge capacitors can be used to smooth voltage surges
at the input side of the HFL-LPT. [25], [26].
2) Overcurrent protection: CBs are used on both sides for interrupting normal phase
currents. Unfortunately, these CBs have break times of about 2 cycles so they cannot be
used to interrupt fault currents unless that the switching positions are designed to sustain
these high currents. CBs maybe replaced by the less expensive interrupter switch/power
fuse combination.
3) Voltage isolation: Disconnectors placed on both sides are used for maintenance or repair
conditions.
4) Start-up: Standard pre-charging resistor/bypass load switch combination during to limit
the inrush currents [15].
B. Additional protection components based on power electronics
Power-electronic components should be added to overcome the noted deficiencies of the
conventional protective equipment [8]. These protective equipment based on power electronics
should be considered:
a) Solid-state circuit breakers (SSCBs) as replacement of the electromechanical CBs on the
HV side since they can interrupt (fault) currents very fast including those due to internal
fault of the HFL-LPT [27]. Disadvantages are higher conduction losses, cost, and
complexity. An advantage would be that the SSCB may perform start-up requirements as
well as fault current limiting [28]-[31]. However, an economic analysis must be
performed between the higher SSCB costs against the higher costs resulting from
increasing the current capability of a solid-state power substation when protected by
conventional electromechanical CBs.
b) An AC crowbar can be used in parallel at the input of the HFL-LPT [21]. This solution
prevents overcurrent through the AC/DC converters in the HFL-LPT without adding
losses during nominal operation. An AC crowbar could be effective for internal faults of
the HFL-LPT. Furthermore, an AC crowbar can be also used for overvoltage protection.
c) Multiple-stage LCL filters used on the HV and LV sides of the HFL-LPT. The inductors
will limit the rise of the fault currents and the capacitors provide protection against
overvoltages.

Fig. 22 depicts the placement of the SSCB (simply realized by common-emitter or source
connection of two power semiconductor devices – in reality, the design will consist of several
devices to reach the voltage level of the system) and an AC crowbar (consisting of two
antiparallel thyristors with a series resistor (or inductor)). The SSCB commutates inductive
currents so a parallel MOV is used to clamp the voltage. The crowbar resistor limits the current
in order to ensure zero input current of the HFL-LPT.

32
 SSCB LSCR,HF-LPT

Iin, HF-LPT
Source
RSCR,HF-LPT
AC AC AC
Crowbar Single
HF LPT
Vin,HF-LPT
Surge
Arrester R0, eq,HF-LPT

Fig. 22. Additional protection components based on power electronics.

Next, a discussion on the HFL-LPT module optimization based on estimates based on

preliminary device and magnetics estimates provided are follows:
 Total 3-phase power: 100 MW; Power/phase: 33.33 MW
 Total primary phase voltage: 115 kV/√3 = 66.4 kV (RMS)
 Total secondary phase voltage: 69 kV/√3 = 39.84 kV (RMS)
 Input AC/AC block phase voltage: 1 kV (RMS) and 1.414 kV (peak)
 Output AC/AC block phase voltage: 0.6 kV (RMS) and 0.85 kV (peak)
 Device of choice: SiC MOSFET
▪ Breakdown voltage: 3.3 kV
▪ SiC MOSFET module rated current: 426 A (25o C) / 246 A (125 o C)
▪ Rds,on (on-state resistance): 2.5 – 9 milliohm
 Device voltage margin: primary: (3.3–1.414 – 0.85) kV  1 kV (without transformer leakage)
▪ This margin addresses additional parasitic volt. spikes
 Device peak current primary (and secondary): (33.33 MW x √2 /66.4 kV + ripple + 33.33
MW x √2/39.84 kV + ripple)  710 + 1,183 + ripple  1200 + ripple  1,300 A
 Number of cascaded blocks: 66.4 kV/1 kV  67 (choosing 68)
 Power per block: 33.33 MW/68 = 490,147 kW (assuming 1 leg per phase)
 Peak duty cycle (nominal): primary device  0.375; secondary device  0.625
 Given that the 3.3 kV SiC MOSFET module chosen can support 426 A at 25o C junction
temperature and 246 A at 125o C junction temperature, an intermediate continuous drain
current of 325 A is chosen.
Therefore, to support  1300 A per AC/AC block, one can either use 4 SiC MOSFET modules in
parallel per block or use 4 1-phase legs in parallel. The tradeoff is between stability, modularity,
flexibility, and redundancy. Given that,

 Total number of blocks: 4x68x3 = 816

 Power per block: 1300/4 kW
 Number of SiC MOSFET modules: 1,632

33
 Number of HFTs: 1,632
 Electrolytic capacitors: 0
 AC link capacitors: 6,528 micro-Farad level capacitors
 Line filters: 24
 Number of module controllers: 816 (assume 1 controller per module as 1 possible approach)
 Number of snubbers: 6,528

Considering the focus of this project, and assuming second option, the loss calculations are as
follows:
 Nominal device conduction loss per block (including primary and secondary MOSFETs and
assuming an approx. Rds,on of 9 milliohm)  (0.375*1300/4)2x 0.009 + (0.625*1300/4)2x
0.009 = 134 W + 372 W = 506 W
 Nominal device conduction loss for 3 phase HFL-LPT  506 W x 4 x 68 x 3 = 412,896 W
 Nominal device switching loss per block and using turn-on switching energy loss of 15 mJ
and turn-off switching energy loss of 46.3 mJ (following data sheet), and given that the
secondary side SiC MOSFET is turned on and off under zero voltage switching (ZVS) while
the primary-side MOSFET has snubber-assisted soft turn-off, one obtains the following: 
(15 mJ + 25%*46.3 mJ) x 20,000 Hz  532 W
 Nominal device switching loss for 3 phase HFL-LPT  532 x 4 x 68 x 3 W = 434,112 W

Assuming a magnetics loss (including HFT and inductors) for the 3-phase HFL-LPT  1.5% (or,
1,500,000 W). It is noted HFT efficiency at 20 kHz is estimated to be 99% and hence higher for
lower switching frequencies.
 Thus, a projected efficiency of HFL-LPT at 20 kHz would be ≤ 100 MW/(100 MW +
412,896 W + 434,112 W+1,500,000 W)  97.8%
 To improve the efficiency further, the 3.3 kV SiC MOSFET needs to be so operated such that
the Rds,on is 4.5 milliohm (it is noted that the lowest value of Rds,on is 2.5 milliohm). With
that, a projected efficiency of HFL-LPT at 20 kHz would be ≤ 100 MW/(100 MW +
412,896*(4.5/9.0) W + 434,112 W+1,500,000 W)  97.9%
 Further, the switching frequency needs to be lower than 20 kHz (unless the primary side SiC
FET can be switched on without loss). Assuming a switching frequency of 15 kHz, a
projected efficiency of HFL-LPT at 15 kHz and with Rds,on of 4.5 milliohm would be ≤ 100
MW/(100 MW + 412,896*(4.5/9.0) W + 434,112*(15/20) W+1,500,000 W) = 100 MW/(100
MW + 2,032,032 W) = 98%.
 If we assume a 50% split between winding and core loss of the magnetics, then, reducing the
switching frequency from 20 kHz to 15 kHz, will yield a magnetics loss of 1,171,875 W.
This yields a projected HFL-LPT efficiency of 100 MW/(100 MW + 412,896*(4.5/9.0) W +
434,112*(15/20) W + [1,500,000/2 W + 1,500,000/2 * (15/20)2 W]) = 100 MW/(100 MW +
206,448 W + 325,584 W + 750,000 W + 421,875 W) = 100 MW / (100 MW + 1,703,907 W)
= 98.3%.

34
 Keeping all other parameters the same, at 10 kHz, the projected efficiency is found to be 100
MW/(100 MW + 412,896*(4.5/9.0) W + 434,112*(10/20) W + [1,500,000/2 W +
1,500,000/2 * (10/20)2 W]) = 100 MW/(100 MW + 206,448 W + 108,528 W + 750,000 W +
187,500 W) = 100 MW / (100 MW + 1,252,476 W) = 98.7%.
 Keeping all other parameters the same, at 8 kHz, the projected efficiency is found to be 100
MW/(100 MW + 412,896*(4.5/9.0) W + 434,112*(8/20) W + [1,500,000/2 W + 1,500,000/2
* (8/20)2 W]) = 100 MW/(100 MW + 206,448 W + 173,644 W + 750,000 W + 120,000 W)
= 100 MW / (100 MW + 1,252,476 W) = 98.8%.
 So, clearly with a switching frequency between 8 kHz and 20 kHz will yield an efficiency of
98.5%. So, that is a solution and a more near-term one.
 Alternately, if the turn-on loss of the SiC MOSFET module can be eliminated, then, at 15
kHz, the following projected efficiency is obtained: ≤ 100 MW/(100 MW +
412,896*(4.5/9.0) W + [(25%*46.3 mJ) x 15,000 Hz] x 4 x 68 x 3 + [1,500,000/2 W +
1,500,000/2 * (15/20)2 W]) = 100 MW/(100 MW + 206,448 W + 141,678 W+ [750,000 W
+ 421,875 W]) = 98.5%. This appears to be a mid-term solution.
 On a similar note, if the turn-on loss of the SiC MOSFET module can be eliminated, then, at
8 kHz, the following projected efficiency is obtained: ≤ 100 MW/(100 MW +
412,896*(4.5/9.0) W + [(25%*46.3 mJ) x 8,000 Hz] x 4 x 68 x 3 + [1,500,000/2 W +
1,500,000/2 * (8/20)2 W])  99%. This also appears to be a mid-term solution.
 On a final note, a more optimized design of the magnetics and superior material selection for
the same is expected to cut the assumed magnetics loss mentioned above appreciably more
thereby providing further

The specific power and power density of the HFL-LPT cannot be determined exactly without
knowing the detailed component size, weight, and system layout. However, a rough upper bound
can be explored, which is detailed below:
 SiC MOSFET module weight: 0.8 kg
 SiC MOSFET module volume: 36 in3
 Number of SiC MOSFET modules: 1632
 HFT volume: 590 in3
 HFT weight: 35 kg (including core, winding/cable weights, and without liquid cooling)
 Number of HFT modules: 1632
 Upper bound of power density: 100,000,000 W / (36+590)*1632 in3 = 98 W/in3 leading to
an estimated volume of at least 1,020,408 in3, which when compared to a typical 100 MVA
line frequency transformer [33], is expected to yield a tangible reduction in volume.
 Upper bound on specific power: 100,000 kW / (0.8+35)*1632 kg 1.7 kW/kg
 This implies that the weight of the HFL-LPT is at least 58 tons. Comparing this to the
typical weight of a typical line-frequency 100 MVA transformer [33], a tangible reduction
in weight is expected. The HFT is designed for natural conduction and its weight estimate

35
 also includes cables and other accessories. With liquid cooling that weight is expected to
reduce further.
A rough cost estimate on some of the key aspects of the HFL-LPT as compared to conventional
LPT are as follows:
 Cost target of DOE of at the rate $0.015-0.022/VA for 100 MVA LPT is expected to be
$1.5M - $2.2M
 Dominant cost of the proposed SiC HFL-LPT:
o HFT cost (unit price): > $1,466 x 1,632  $2.4M (based on SUBAWARDEE’s
estimates provided below this subsection; needless to say, in bulk this price
should be lower)
o SiC module cost (unit price): $10,990 x 1,632  $18M (based unit price provided
per 3.3 kV SiC module price provided by a supplier; needless to say, in bulk this
price should be lower)
o In a relatively recent presentation [32] by Drs. John Palmour and Jeff Casady at
Cree provide a projected bulk pricing on 3.3 kV SiC MOSFET that is about 84%
lower than the unit price of the same devices, as shown in Fig. 23. With that, the
SiC module cost is expected to be $10,990 x 1,632 * 0.16  $2.9M
o Balance-of-plant system (BOPS) cost: Lower compared to the above 2 items
 Based on Si IGBT based 1 MVA, 10 kV/400 V, 3.6 kHz solid-state transformer (SST),
o The estimated hypothetical cost (based on an article published by a leading
group) for a 100 MVA at the same voltage is about $6M. So, for 115 kV/69 kV
(which is our focus), the cost of this Si-IGBT based SST will be significantly
higher.

Fig. 23. 3.3kV SiC MOSFET projected cost trend showing bulk and unit pricing [32].

36
What follows next, and as indicated above, is the calculation of the price estimate of the HFT.
The dimensions required for each necessary material are calculated and the total price rendition
based on the quotes obtained from manufacturers is shown.
a) LITZ wire length
The following cable length calculations are referred to the transformer sectors corresponding
to notations are shown in Fig. 24. The primary-side inner-layer cable length is calculated to be
𝑙𝑃𝐼 = 3.213 𝑚 based on (2) below. The secondary-side inner-layer cable length is obtained to be
𝑙𝑆𝐼 = 3.987 𝑚 using (3). The primary-side outer-layer cable length is 𝑙𝑃𝑂 = 4.761 𝑚 using (4)
and the secondary-side outer-layer cable length is 𝑙𝑆𝑂 = 5.535 𝑚 according to (5). Considering

Fig. 24. Transformer structure with layer notations for various materials; letter symbols
represent the length of the conductors and number symbols the length of the insulation and
shielding layers.

some additional length to make the connectors and other miscellaneous (𝑙𝑚𝑖𝑠𝑐 = 1 𝑚), the total
cable length should be at least 𝑙𝑡𝑜𝑡𝑎𝑙 = 18.5 𝑚 using (6).
𝑙𝑃𝐼 = 𝑁[2𝐴 + 2𝑑𝑓 + 2𝑑𝑖𝑠𝑜 + 2𝑑𝑎 + 𝐷] (2)
𝑙𝑆𝐼 = 𝑁[2𝐴 + 2𝑑𝑓 + 6𝑑𝑖𝑠𝑜 + 6𝑑𝑎 + 𝐷] (3)
𝑙𝑃𝑂 = 𝑁[2𝐴 + 2𝑑𝑓 + 10𝑑𝑖𝑠𝑜 + 10𝑑𝑎 + 𝐷] (4)
𝑙𝑆𝑂 = 𝑁[2𝐴 + 2𝑑𝑓 + 14𝑑𝑖𝑠𝑜 + 14𝑑𝑎 + 𝐷] (5)

37
 𝑙𝑡𝑜𝑡𝑎𝑙 > 𝑙𝑃𝐼 + 𝑙𝑆𝐼 + 𝑙𝑃𝑂 + 𝑙𝑆𝑂 + 𝑙𝑚𝑖𝑠𝑐 (6)
The selected cable for the proposed design is a Litz wire made from 4460 strands of 36 AWG
cable with detailed characteristics shown in Table 6.
b) Insulation material area
The insulation is made by the material with main specifications presented in Table 7.
Beginning from the layer closest to the center pole of the core structure, the length and total
surface of the layers of Nomex® insulation material are calculated in this section.
Table 6. Cable information.
Weight/Length Unit Price
Specifications Manufacturer
[𝐾𝑔/𝑚] [$/𝐾𝑔]
• Nylon Served LITZ wire
• 4460 strands of 36AWG
0.505249 www.hflitzwire.com 41.8048
• Resistance at 20 °C/Km:
0.3895 Ω

Table 7. Nomex® insulation material information.

Dielectric
Thickness Dielectric Unit Price
Specifications Manufacturer Strength
mm (mil) Constant [$/𝑚2 ]
kV/mm
Nomex® 410 0.25 (10) Dupont® 63 2.7 67.58

The length of the first layer is calculated as 𝑙𝑖𝑛𝑠1 = 0.319 𝑚 using (7). The length of the second,
third, fourth and fifth layers of insulation material are calculated as 𝑙𝑖𝑛𝑠2 = 0.362 𝑚, 𝑙𝑖𝑛𝑠3 =
0.405 𝑚, 𝑙𝑖𝑛𝑠4 = 0.448 𝑚, and 𝑙𝑖𝑛𝑠5 = 0.491 𝑚, using (8), (9), (10) and (11).
𝑙𝑖𝑛𝑠1 = 2(2𝐴 + 2𝑑𝑓 + 2𝑑𝑖𝑠𝑜 + 𝐷) (7)
𝑙𝑖𝑛𝑠2 = 2(2𝐴 + 2𝑑𝑓 + 4𝑑𝑖𝑠𝑜 + 2𝑑𝑎 + 𝐷) (8)
𝑙𝑖𝑛𝑠3 = 2(2𝐴 + 2𝑑𝑓 + 6𝑑𝑖𝑠𝑜 + 4𝑑𝑎 + 𝐷) (9)
𝑙𝑖𝑛𝑠4 = 2(2𝐴 + 2𝑑𝑓 + 8𝑑𝑖𝑠𝑜 + 6𝑑𝑎 + 𝐷) (10)
𝑙𝑖𝑛𝑠5 = 2(2𝐴 + 2𝑑𝑓 + 10𝑑𝑖𝑠𝑜 + 8𝑑𝑎 + 𝐷) (11)
®
The total length and area for the Nomex insulation material are calculated as 𝑙𝑖𝑛𝑠𝑇 = 2.025 𝑚
and 𝐴𝑖𝑛𝑠 = 0.2126 𝑚2 using (12) and (13).
𝐿𝑖𝑛𝑠𝑇 > 𝑙𝑖𝑛𝑠1 + 𝑙𝑖𝑛𝑠2 + 𝑙𝑖𝑛𝑠3 + 𝑙𝑖𝑛𝑠4 + 𝑙𝑖𝑛𝑠5 (12)
𝐴𝑖𝑛𝑠 = 𝑙𝑖𝑛𝑠𝑇 𝐶 (13)
Based on required insulation level, thickness and properties of the selected material and safety
margin of 25%, 5 layers of 10 mils Nomex material are used and the required area by (13) is
multiplied by 5.
c) Copper shield materials area

38
The copper shield is implemented by 0.05 mm width copper laminations covered by Kapton®
tape in both sides. The information of these materials can be found in Tables 8 and 9. The first
layer of shielding is located at the same place than the second layer of insulation, so the needed
length can be calculated using (8) as 𝑙𝑖𝑛𝑠2 = 0.362 𝑚. In the same way, the length of the second
and third layers of shielding can be calculated using (9) and (10) as 𝑙𝑖𝑛𝑠3 = 0.405 𝑚 and 𝑙𝑖𝑛𝑠4 =
0.448 𝑚. The total length of shielding can be calculated using (14) as 𝑙𝑠ℎ𝑖𝑒𝑙𝑑𝑇 = 1.255 𝑚.
𝑙𝑠ℎ𝑖𝑒𝑙𝑑𝑇 > 𝑙𝑖𝑛𝑠2 + 𝑙𝑖𝑛𝑠3 + 𝑙𝑖𝑛𝑠4 (14)

Table 8. Kapton® tape information.

Manufacturer Thickness [𝑚𝑚] Unit Price [$/𝑚2 ]
0.025 polyimide film
Dupont 8.32
0.0375 silicone adhesive

Table 9. Copper sheet information.

Material Thickness [𝑚𝑚] Unit Price [$/𝑚2 ]
99.99% pure copper 0.05 62.4

Table 10. Summary of price rendition for high power prototype.

Material Price [$] Quantity Needed Total Price [$]
Custom-Made Nanocrystalline 485 / set 2 sets 970
Cores
4460 strands / 36 AWG Litz Wire 21.1218 / m 18.5 m 390.75
® 2 2
Dupont Nomex 410 Material 67.58 / m 1.0631 m 71.85
Custom-Made Bobbin 20 / unit 1 20
2 2
Dupont Kapton Tape 8.32 / m 0.243 m 2.02
2 2
Copper Metal Sheet 0.05 mm Thick 62.4 / m 0.1215 m 7.58
Terminal Connectors 0.795 / unit 4 3.18
Total Prototype Price 1465.38

The total surface of the copper shield can be obtained using (15) as 𝐴𝑠ℎ𝑖𝑒𝑙𝑑 = 0.1318 𝑚2 while
the surface of the Kapton® tape is doubled as seen in (16) since it covers both sides of the copper
shield.
𝐴𝑠ℎ𝑖𝑒𝑙𝑑 = 𝑙𝑠ℎ𝑖𝑒𝑙𝑑𝑇 𝐶 (15a)
𝐴𝐾𝑎𝑝𝑡𝑜𝑛 = 2𝐴𝑠ℎ𝑖𝑒𝑙𝑑 (15b)
A summary with the price of the entire transformer prototype is presented in Table 10. The total
cost is approximately $1,465 using part costs for low volumes. Large-volume production should
lower the cost of the transformer significantly due to economy of scale.
E. Work done on Task 6 (Scaled experimental prototype single module for the HFL-LPT)

39
This is an important effort in a limited time. Two boards have been developed: one that represents
the AC/AC power stage, while the other, represents the feedback sensing and PWM flow-through
board. The latter is for interfacing to a controller board. It also includes the three-dimensional
module’s power package illustration and its all-layer board layout. The experimental results based
on the scaled-power HFL-LPT are shown in Fig. 25 through Fig. 27. It suggests that the novel
concept for HFL-LPT is a feasible solution. Further work is planned beyond the project deadline
to achieve even higher power operation using a modified PCB design by addressing noise, thermal
issues, protection, magnetics to name a few.

Fig. 25. Fig showing step down operation from 170 V peak AC (HFL-LPT module input) to 50 V
peak AC (secondary HFL-LPT module output) at about 30% of the rated power. The turns ratio of
the HFT is 1:2, which implies the actual output voltage is 100 V. Thus, an output to input voltage
of 100 V/ 170 V  0.6 which matches the ratio of the actual high power HFT of 69 kV/ 115 kV =
0.6. Traces from top to bottom: Input AC voltage, output AC voltage, output AC current.

Fig. 26. Same conditions as in Fig. 25. Traces from top to bottom: Input AC current, input AC
voltage, and output AC voltage. The input filter will be optimized to reduce AC current ripple.

40
Fig. 27. Same conditions as in Fig. 25. Traces from top to bottom: primary-side switch drain-to-
source voltage of one of the submodules of the scaled power AC/AC HFL-LPT module,
secondary-side switch drain-to-source voltage of one of the submodules of the scaled power
AC/AC HFL-LPT module, and primary-side switch drain-to-source voltage of the other
submodules of the scaled power AC/AC HFL-LPT module.

Appendix: Matlab code for HFT design

%% STEP 1. SYSTEM AND TOPOLOGY SPECIFICATIONS
disp('===== STEP 1. SYSTEM AND TOPOLOGY SPECIFICATIONS =====')
disp(' ')
prompt='Enter output power (VA): ';
Pout=input(prompt); %Output power in VA
prompt='Enter desired efficiency (%): ';
n=input(prompt)/100;%Desired efficiency
Pin=Pout/n; %Input Power (VA)
SVA=Pin+Pout; %Sum of input power and output power
prompt='Enter primary voltage (V): ';
Vp=input(prompt); %Primary voltage (V)
prompt='Enter secondary voltage (V): ';
Vs=input(prompt); %Secondary voltage (V)
prompt='Enter the isolation voltage level "Viso"(kV): ';
Viso=input(prompt); %Isolation voltage level (kV)
prompt='Enter primary current (A): ';
Ip=input(prompt); %Primary current (A)
prompt='Enter secondary current (A): ';
Is=input(prompt); %Secondary Current (A)
prompt='Enter operating frequency (Hz): ';
f=input(prompt); %Frequency (Hz)
T=1/f; %Period (s)
prompt='Enter expected temperature rise in Celsius: ';
DT=input(prompt); %Temperature rise (C)

41
prompt='Enter duty cycle (between 0 and 1): ';
D=input(prompt); %Duty Cycle
prompt='Enter waveform factor Kv (Ex. Square wave Kv=4 / Sinusoidal Kv=4.44): ';
Kv=input(prompt); %Waveform factor
prompt='Enter desired leakage inductance in (H): ';
Llk=input(prompt); %Desired leakage inductance for maximum power transfer (H)
prompt='Enter window utilization factor (between 0 and 1)(Ex. 0.4): ';
ku=input(prompt); %Window utilization factor
disp(' ')
%% Coefficients and dimensional parameters. Typical values (Ref.[1] pag. 61)
hc=10; %Coefficient of heat transfer 10W/m^2C for natutal convection. Up to
30W/m^2C
ka=40; %Dimensionless Quantity (Ref.[1] pag. 61)
kw=10; %Dimensionless Quantity (Ref.[1] pag. 61)
kc=5.6; %Dimensionless Quantity (Ref.[1] pag. 61)
kf=0.95; %Core stacking factor
phiw=1.72e-8; %initial wire resistivity for flux density and area product calculations
(ohm*m)

%% STEP 2. MATERIAL PROPERTIES

disp('===== STEP 2. MATERIAL PROPERTIES =====')
disp(' ')
disp('Core Material')
prompt='Enter selected core material: 1 for amorphous, 2 for ferrite, 3 for nanocrystalline, or 4
for other: ';
material=input(prompt);
if (material==1)
Kc=1.3617; %Coefficient of the Steinmentz equation in (W/m3)
alpha=1.51; %Coefficient of the steinmentz equation
beta=1.74; %Coefficient of the steinmentz equation
Bsat=1.56; %Saturation flux density (T)
elseif (material==2)
Kc=17.1; %Coefficient of the Steinmentz equation in (W/m3)
alpha=1.46; %Coefficient of the steinmentz equation
beta=2.75; %Coefficient of the steinmentz equation
Bsat=0.47; %Saturation flux density (T)
elseif (material==3)
Kc=2.3; %Coefficient of the Steinmentz equation in (W/m3)
alpha=1.32; %Coefficient of the steinmentz equation
beta=2.12; %Coefficient of the steinmentz equation
Bsat=1.2; %Saturation flux density (T)
elseif (material==4)
prompt='Enter Steinmentz coefficient "Kc" in (W/m^3): ';
Kc=input(prompt);
prompt='Enter Steinmentz coefficient "alpha": ';
alpha=input(prompt);

42
 prompt='Enter Steinmentz coefficient "beta": ';
beta=input(prompt);
prompt='Enter saturation flux density (Bsat) in (T): ';
Bsat=input(prompt);
end
disp(' ')
disp('Insulation Material')
prompt='Enter dielectric strength of selected insulation material "Eins" in (kV/mm): ';
Eins=input(prompt); %Dielectric strength of the insulation material in (kV/mm)
prompt='Enter a saftey margin for isolation requirement "kiso"(Ex. 0.4): ';
kiso=input(prompt); %Safety margin parameter for isolation requirement
disp(' ')

%% STEP 3. OPTIMUM FLUX DENSITY

disp('===== STEP 3. OPTIMUM FLUX DENSITY =====')
disp(' ')
Bop=(((hc*ka*DT)^(2/3))./((1.5874).*((phiw*kw*ku)^(1/12)).*(kc*Kc.*f.^alpha).^(7/12))).*((K
v.*f.*kf*ku./SVA).^(1/6)) %Teslas (T) (Ref.[1] pag. 126)
disp('This is the calculated optimum flux density. Bare in mind the tradeoff between efficiency
and volume.')
disp('If the flux density is increased, the volume can be reduced, but also the efficiency gets
reduced')
disp('**Always consider Bop < Bsat')
disp(' ')
prompt='If Bop is the desired flux density, enter Y, if this is not the desired flux density, enter N:
';
desired=input(prompt,'s');
if (strcmp(desired,'Y') || strcmp(desired,'y')) %if user enters yes
Bop=Bop; %calculated flux density will be used
elseif (strcmp(desired,'N') || strcmp(desired,'n')) %if user enters no
prompt='Enter the desired flux density in (T): ';
Bop=input(prompt); %Introduce a different value of flux density when the optimum is not
desired
else error('Program exit') %if user does not enter a proper choice, exit
end
DB=2*Bop; %Peak to Peak Flux Density
disp(' ')

%% STEP 4. CORE DIMENSIONS

disp('===== STEP 4. CORE DIMENSIONS =====')
disp(' ')
disp('Area Product:')
Kt=(hc*ka/(phiw*kw))^0.5; %48.2x10^3 (Ref.[1] pag. 61)
Ap=(((sqrt(2))*SVA./(Kv.*f.*Bop*kf*Kt.*((ku*DT).^(0.5)))).^(8/7))*1e8 %(cm^4)(Ref.[1] pag.
125)

43
disp('Based on Ap, select a core from a data sheet whose area product is larger than the
calculated value')
disp('Consider stacked cores if the larger area product in the data sheet is not sufficient')
disp(' ')
prompt='Enter the number of stacked cores needed to achieve optimum Ap. If not needed, enter
1: ';
Nc=input(prompt); %number of cores needed to achieve the optimum Ap
prompt='If a Shell-type transformer structure is considered, enter "S" If a Core-type is
considered, enter "C": ';
cont=input(prompt, 's');
if (strcmp(cont,'S') || strcmp(cont,'s')) %if user enters shell-type
shell_factor = 2; %this will be used to double the mean length and the mass
elseif (strcmp(cont,'C') || strcmp(cont,'c')) %if user enters core-type
shell_factor = 1; %this will be multiplied by the mean length and mass and they will not be
doubled
else error('Program exit') %if user does not enter a proper choice
end
disp('Now you have to enter the core dimensions from datasheet. See Metglas datasheet for label
reference')
prompt='Enter the total width "d"(cm): ';
d=input(prompt)*Nc; %core width (cm)
prompt='Enter the height of the window area "c" (cm): ';
c=input(prompt); %height of window area (cm)
prompt='Enter height of the core "f" (cm): ';
f1=input(prompt); %height of core (cm)
prompt='Enter the length of the window area "b" (cm): ';
b=input(prompt); %length of the window area (cm)
prompt='Enter the length of the core "e" (cm): ';
e=input(prompt); %length of the core (cm)
l=0.5*(e-b); %length of cross sectional area (cm)
prompt='Enter the mean length of the core "lm" (cm): ';
lm=input(prompt); %mean length of the core (x2 if shell type)(cm)
prompt='Enter the cross sectinal area of the core "Ac" (cm^2): ';
Ac=input(prompt)*shell_factor*Nc; %cross sectional area of core (cm^2) (shell_fator will be 2 if
shell type, otherwise it will be 1)
Wa = b*c*shell_factor; %Window Area (cm^2)
prompt='Enter the mass of the core (g): ';
m = input(prompt)*Nc*shell_factor; %mass of core (shell_fator will be 2 if shell type, otherwise
is will be 1)(grams)
prompt='Enter the density of the core (g/cm^3): ';
density = input(prompt); %(g/cm^3)
V=m/density; %core volume from datasheet
disp('This is the real area product of the core:')
Ap = Wa*Ac %Area product (cm^4)
Apm = Ap/(100^4); %Area product (m^4)
disp(' ')

44
%% STEP 5. WINDING CHARACTERIZATION
disp('===== STEP 5. WINDING CHARACTERIZATION =====')
disp(' ')
disp('Calculated current density J (A/cm^2)')
J = (((hc*ka*DT)/(2*phiw*kw*ku))^(1/2))*(1/(Apm^(1/8)))/(100^2) %Current Density
(A/cm^2) (Ref.[1] pag. 125)
%% Selection of wire dimension (considering skin effect due to high-frequency operation)
disp('Required total wire area based on current density, and primary and secondary currents
(cm^2)')
Awp = Ip/J % Required primary bare wire area (cm^2)
Aws = Is/J % Required secondary bare wire area (cm^2)
disp('Skin depth (cm):')
skin = 6.62/(sqrt(f)) % Skin depth (cm)
disp('Maximum wire diameter (single strand) (cm):')
dskin = 2*skin % bare conductor diameter (cm)
disp('Maximum wire area (single strand) (cm^2):')
Askin = pi*skin^2 % bare conductor area (cm^2)
prompt='Enter area of selected wire based on Askin or dskin (cm^2): ';
Aw = input(prompt); % Cross sectional area of selected wire (cm^2)
prompt='Enter the resistivity (uOhm/cm): ';
rho=input(prompt); % Resistivity of selected wire (uOhm/cm)
disp('Minimum number of strands for primary "PS" and secondary "SS"')
PS = round(Awp/Aw) % Required number of primary strands
SS = round(Aws/Aw) % Required number of secondary strands
%% Number of turns for primary and secondary
disp('Number of primary turns "Np":')
Np = Vp./(Kv.*Bop.*kf*Ac*(10^-4)*f); %Number of turns primary (Ref.[1] pag. 128)
Np=ceil(Np)
disp('The number of turns is a free paramenter that can adjust the leakage inductance')
prompt='If Np is the desired primary turns, enter Y. If not, enter N: ';
desired=input(prompt,'s');
if (strcmp(desired,'Y') || strcmp(desired,'y')) %if user enters yes
Np=Np; %calculated Np will be used
elseif (strcmp(desired,'N') || strcmp(desired,'n')) %if user enters no
prompt='Enter the desired Np: ';
Np=input(prompt); %Introduce a different value of Np
else error('Program exit') %if user does not enter a proper choice, exit
end
disp('Number of secondary turns "Ns":')
Ns = Np*(Vs/Vp) %Number of secondary turns
disp('Mean Length Turn (MLT):')
MLT = (2*d)+2*(shell_factor*l)+(b*0.8)*(2+pi) %Mean Length Per turn (cm) (Ref. [2] Eq. 4-
23, Ref. [3])
disp('**Verify that the selected winding arrangement can actually fit in the core window area**')
disp(' ')

45
%% STEP 6. ISOLATION DISTANCE
disp('===== STEP 6. ISOLATION DISTANCE =====')
disp(' ')
disp('This is the minimum isolation distance between primary and secondary windings based')
disp('on the isolation level and insulation material (mm): ')
dimin=Viso/(kiso*Eins) %Minimum isolation distance between primary and secondary
windings (mm) (Ref. [4])
disp('The isolation distance dimin could be increased in order to adjust the leakage inductance')
disp('**di>dimin')
prompt='If dimin is the desired isolation distance, enter Y. If not, enter N: ';
desired=input(prompt,'s');
if (strcmp(desired,'Y') || strcmp(desired,'y')) %if user enters yes
dimin=dimin; %calculated Np will be used
elseif (strcmp(desired,'N') || strcmp(desired,'n')) %if user enters no
prompt='Enter the desired di: ';
dimin=input(prompt); %Introduce a different value of di
else error('Program exit') %if user does not enter a proper choice, exit
end
disp(' ')

%% STEP 7. LEAKAGE INDUCTANCE ESTIMATION

disp('===== STEP 7. LEAKAGE INDUCTANCE ESTIMATION =====')
disp(' ')
disp('This estimation is only applicable to a shell-type structure. If a Core-type structure was
selected,')
disp('a leakage inductance estimation would require 2D or 3D Finite Element simulations')
disp('Calculated leakage inductance (H):')
Lkp=(4*pi*10^-7).*(Np^2).*MLT*(c+2*(dimin*10^-1))*(10^-2)/(3*b) %Primary leakage
inductance (H)
disp('If this value is not desired, it could be adjusted in a second iteration by modifying the
number of')
disp('primary turns or increasing the isolation distance.')
disp(' ')

%% STEP 8. VOLUME CALCULATION

disp('===== STEP 8. VOLUME CALCULATION =====')
disp(' ')
disp('Calculated total volume (dm^3)')
Vw=MLT*Wa; %Volume of the windings cm^3
Vc=lm*Ac; %Volume of the core cm^3
Vt=Vw+Vc; %total volume in cm^3
Vtd=(1e-3).*Vt %in dm^3
Vtm=(1e-6)*Vt; %in m^3
disp(' ')

46
%% STEP 9. LOSSES CALCULATION
disp('===== STEP 9. LOSSES CALCULATION =====')
disp(' ')
disp('Core loss using the iGSE')
ki = Kc/(2^(beta-1)*pi^(alpha-1)*(1.1044+(6.8244/(alpha+1.354)))); %Approximation of ki
iGSE (Ref.[1] pag. 204)
disp('in (W/m^3):')
Pvi = ki*(DB^(beta-alpha))*(1/T)*(2*DB^alpha*(D*T)^(1-alpha)) %Loss per unit volume
(iGSE) (W/m3)(Ref.[1] pag. 204)
disp('in (W):')
Pfei = Vtm*Pvi %Core losses (iGSE) (W)
disp(' ')
disp('Winding loss (W):')
rhop = rho/PS; %Primary Resistance per cm (uOhm/cm)
rhos = rho/SS; %Secondary resistance per cm (uOhm/cm)
RP = rhop*Np*MLT*(10^-6); %Total Primary Resistance (Ohm)
RS = rhos*Ns*MLT*(10^-6); %Total Secondary Resistance (Ohm)
Pcup = RP*(Ip^2); %Primary Copper Losses(W)
Pcus = RS*(Is^2); %Secondary Copper Losses (W)
Pcu = Pcup + Pcus %Total Copper Losses (W)
disp(' ')
disp('Total loss (W):')
Ptoti = Pfei + Pcu %Total loss with iGSE(W)
disp(' ')

%% STEP 10. EFFICIENCY & TEMPERATURE RISE

disp('===== STEP 10. EFFICIENCY & TEMPERATURE RISE =====')
disp(' ')
disp('Calculated efficiency')
Effi = Pout/(Pout + Ptoti) %Efficiency
disp('The efficiency could be increased in a second iteration by reducing the operating flux
density in Step 3.')
disp('If the optimum flux density has been used and the obtained efficiency is not desired,
consider using a')
disp('different core material.')
disp(' ')
disp('Calculated temperature rise based on the power dissipation per unit area')
Ks=39.2; %For C core Table 5-4 Ref. [2]
At=Ks*(Ap)^0.5; %Surface area (cm^2)Eq. 5-30 Ref. [2]
Pdis=Ptoti/At; %power dissipated per unit area (W/cm^2)Eq. 6-17 Ref. [2]
Tr=450*(Pdis)^0.826 %Temperature rise (C) Eq. 6-19 Ref. [2]
%check to see if claculated temperature rise exceeds the desired value previously entered
if (Tr>DT)
disp('The calculated temperature rise exceeds the desired value previously entered');
prompt='To continue with this temperature rise enter Y. To reject this and start the design
process over enter N: ';

47
 continueprocess=input(prompt,'s');
if (strcmp(continueprocess,'Y') || strcmp(continueprocess,'y')) %if user enters yes
Tr=Tr;
else
disp('In order to decrease the temperature, select a larger core');
error('Program exit') %if user enters no or if the user enters a value that is not valid
end
else
Tr=Tr; %if the DT (desired temperature rise) is greater than Tr, continue
end
disp(' ')

%% SUMMARY OF THE RESULTS

disp('===== SUMMARY OF THE RESULTS =====')
disp(' ')
disp(sprintf('Pout=''%d''VA (Rated power)',Pout));
disp(sprintf('Vp=''%d''V (Primary voltage)',Vp));
disp(sprintf('Vs=''%d''V (Secondary voltage)',Vs));
disp(sprintf('f=''%d''Hz (Frequency)',f));
if (material == 1)
disp('core material = Amorphous')
elseif (material == 2)
disp('core material = Ferrite')
elseif (material == 3)
disp('core material = Nanocrystalline')
elseif (material == 4)
disp('core material = other')
end
disp(sprintf('B=''%d''T (Flux density)',Bop));
disp(sprintf('Np=''%d''(Primary turns)',Np));
disp(sprintf('Ns=''%d''(Secondary turns)',Ns));
disp(sprintf('Awp=''%d''cm^2 (Required total primary wire area)',Awp));
disp(sprintf('Aws=''%d''cm^2 (Required total secondary wire area)',Aws));
disp(sprintf('Askin=''%d''cm^2 (Maximum area of a single strand)',Aws));
disp(sprintf('Aw=''%d''cm^2 (Selected area of a single strand)',Aws));
disp(sprintf('PS=''%d''(Minimum number of primary strands)',PS));
disp(sprintf('SS=''%d''(Minimum number of secondary strands)',SS));
disp(sprintf('di=''%d''mm(Isolation distance between windings)',dimin));
disp(sprintf('Lkp=''%d''H (leakage inductance)',Lkp));
disp(sprintf('Vt=''%d''dm^3(Total volume)',Lkp));
disp(sprintf('Pcu=''%d''W (Winding loss)',Pcu));
disp(sprintf('Pfe=''%d''W (Core loss)',Pfei));
disp(sprintf('Effi=''%f''(efficiency)',Effi));
disp(sprintf('Tr=''%f''C (temperature rise)',Tr));
disp('===== END =====')

48
References
[1] Liquid-filled power transformers, ABB [Also available at
https://library.e.abb.com/public/299a52373c3fd0e6c12578be003a476f/PPTR_MPT_brochure
_2406PL170-W1-en.pdf]
[2] https://www.dhs.gov/sites/default/files/publications/RecX%20-%20Emergency%20Spare%2
0Transformer%20Strategy-508.pdf
[3] Large power transformers and the U.S. Electric Grid, The Office of Electricity Delivery and
Energy Reliability U.S. Department of Energy, June 2012.
[4] L. Heinemann, “An active cooled high power, high frequency transformer with high
insulation capability,” in Proc. IEEE Applied. Power Electronics Conf., 2002, pp. 352–357.
[5] W. G. Hurley and W.H. Wölfle, Transformers and inductors for power electronics: Theory,
design and applications, 1st ed., Wiley, 2013.
[6] H. F. Fan and H. Li, “High frequency transformer isolated bidirectional DC-DC converter
modules with high efficiency over wide load range for 20 kVA solid state transformer,”
IEEE Trans. on Power Electronics, vol. 26, no. 12, pp. 3599–3608, Dec. 2011.
[7] G. Ortiz, M. Leibl, J. W. Kolar, and O. Apeldoorn, “Medium frequency transformer for
solid-state-transformer application- design and experimental verification,” in Proc. IEEE
10th Int. Conf. Power Electronic Drive System, 2013, pp. 1285–1290.
[8] S. Xu, Y. Xunwei, F. Wang, A. Q. Haung, “Design and demonstration of 3.6 kV-120 V/10
kVA solid-state transformer for smart grid application,” IEEE Trans. on Power Electronics,
Vol. 29, no. 8, pp. 3982-3988, Aug 2014.
[9] R. J. G. Montoya, A. Mallela, and J. C. Balda, “An evaluation of selected solid-state
transformer topologies for electric distribution systems,” in Applied Power Electronics
Conference and Exposition (APEC), 2015, pp. 1022–1029.
[10] W.G. Hurley, W. H. Wöfle, J. G. Breslin, “Optimized transformer design: Inclusive of
high frequency effects,” IEEE Trans. on Power Electronics, vol. 13, no. 4, July 1998.
[11] C. William, T. McLyman, Transformer and inductor design handbook, 4th ed., Taylor &
Francis Group, 2011.
[12] [Online]. Available: http://www.kingmagnetics.com/nanocrystalline-c-core.html
[13] B. Cougo, J. W. Kolar, “Integration of leakage inductance in tape wound core transformers
for dual active bridge converters,” in Proc. of the 7th International Conference Integrated
Power Electronics Systems (CIPS), 2012, pp. 1-6, Mar 2012.
[14] “MV/LV transformer substations: Theory and examples of short-circuit calculation”, ABB,
Bergamo, Italy, 2008.
[15] R. Smeets, L. van der Sluis, M. Kapetanovic, D. F. Peelo, and A. Janssen, Switching in
electrical transmission and distribution systems, New York, NY, USA: Wiley, 2014.
[16] D. Fulchiron, “Protection of MV/LV substation transformers,” Schneider, Grenoble, France,
Tech. Rep. 192, 2008.
[17] Totally Integrated Power, System protection/safety coordination, 2nd ed. Siemens, Munich,
Germany, 2005.

49
[18] “Overvoltage protection, metal oxide surge arresters in medium voltage systems”, ABB,
Wettingen, Switzerland, 2011.
[19] S. Madhusoodhanan, D. Patel, S. Bhattacharya, J.A. Carr, Z. Wang, “Protection of a
transformerless intelligent power substation,” IEEE Power Electronics for Distributed
Generation Systems Symposium (PEDG), July 2013.
[20] J. Carr, Z. Wang, S. Bhattacharya, K. Hatua, and S. Madhusoodhanan, “Overlaoding and
overvoltage evaluation of a transformerless intelligent power substation,” IEEE Power and
Energy Society General Meeting (PES), July 2013.
[21] T. Guillod, F. Krismer, J.W. Kolar, “Protection of MV converters in the grid: The case of
MV/LV solid-state transformers,” IEEE J. Emerging Selected Topics Power Electronics,
2016, 5, 393–408.
[22] J. E. Huber, J. W. Kolar, “Volume/weight/cost comparison of a 1 MVA 10 kV/400 V solid-
state against a conventional low-frequency distribution transformer,” IEEE Energy
Conversion Congress and Exposition (ECCE), Sep. 2014, pp. 4545–4552.
[23] “Low-Voltage Switchgear and Control Gear”, document IEC-60947, 2011.
[24] B. Lacrois and R. Calvas, “Earthing systems worldwide and evolutions”, Merlin Gerin,
Grenoble, France, Tech. Rep. 173, 1995.
[25] D. Paul and S. I. Venugopalan, “Power distribution system equipment overvoltage
protection,” IEEE Trans. on Industry Applications, vol. 30, no. 5, pp. 1290–1297, Sep. 1994.
[26] D. Paul and S. I. Venugopalan, “Power distribution system equipment overvoltage
protection,” IEEE Trans. on Industry Applications, vol. 30, no. 5, pp. 1290–1297, 1994.
[27] C. Meyer, S. Schröder, and R. W. De Doncker, “Solid-state circuit breakers and current
limiters for medium-voltage systems having distributed power systems,” IEEE Transactions
on Power Electronics, vol. 19, no. 5, pp. 1333–1340, Sep. 2004.
[28] T. Ueda, M. Morita, H. Arita, Y. Kida, Y. Kurosawa, and T. Yamagiwa, “Solid-state current
limiter for power distribution systems,” IEEE Transactions on Power Delivery, vol. 8, no. 4,
pp. 1796–1801, Oct. 1993.
[29] Y. Yusi, C. Farnell, H. Zhang, A. Mantooth, J.C. Balda, S.S. Ang, “A SiC fault current
limiter for distribution systems”, 2014 IEEE Energy Conversion Congress and Exposition,
Pittsburgh (PA), September 14-18.
[30] Hao Zhang, Simon Ang, Chris Farnell, Yusi Liu, Juan Balda, Alan Mantooth, “A SiC
SGTO/PIN diode power electronic module for fault current limiter”, IEEE 4th Symposium on
Power Electronics for Distributed Generation Systems, Rogers (AR), July 8-11, 2013.
[31] O. Saadeh, E. Johnson, M. Saadeh, A. Escobar Mejía, H. C. Schinmer, B. Rowden, A.
Mantooth, J. C. Balda, S. S. Ang, “A 4kV silicon carbide solid state fault current limiter”,
IEEE Energy Conversion Conference and Exposition, September 15-20, Raleigh, North
Carolina.
[32] J. Casady and J. Palmour, “Power products commercial roadmap for SiC from 2012-2020”
and “Power products rel data & pricing forecasts for 650V-15kV SiC power modules,
MOSFETs & diodes”, September 2014.
[33] https://www.slideshare.net/VanPhuongPham/2-station-transformer-100-mva-
230kvdatasheet-revb
50
[34] S.K. Mazumder, T. Sarkar, and K. Acharya, “A directFET based high-frequency fuel-cell
inverter,” IEEE Journal of Emerging and Selected Topics in Power Electronics, vol. 3, no. 4,
pp. 1132-1141, 2015.

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