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VN750 / VN750S VN750PT / VN750-B5: High Side Driver
VN750 / VN750S VN750PT / VN750-B5: High Side Driver
® / VN750PT / VN750-B5
VCC OVERVOLTAGE
CLAMP DETECTION
UNDERVOLTAGE
DETECTION
GND
Power CLAMP
INPUT DRIVER
OUTPUT
LOGIC
CURRENT LIMITER
OVERTEMPERATURE
DETECTION OFF STATE OPENLOAD
AND OUTPUT SHORTED TO VCC
DETECTION
1
VN750 / VN750S / VN750PT / VN750-B5
5 OUTPUT
VCC 5 4 N.C.
4 STATUS
OUTPUT STATUS 3 VCC
OUTPUT INPUT 2 INPUT
VCC 8 1 GND 1 GND
PENTAWATT
IS
IIN
VCC
INPUT
ISTAT IOUT
STATUS OUTPUT VCC
GND
VIN
VSTAT VOUT
IGND
2/29
VN750 / VN750S / VN750PT / VN750-B5
THERMAL DATA
Value
Symbol Parameter Unit
S0-8 PENTAWATT P2PAK PPAK
Rthj-case Thermal Resistance Junction-case Max - 2.1 2.1 2.1 °C/W
Rthj-lead Thermal Resistance Junction-lead Max 30 - - - °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 93 (*) 62.1 52.1 (**) 77.1 (**) °C/W
(*) When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35µm thick) connected to all VCC pins. Horizontal
mounting and no artificial air flow.
(**) When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35µm thick). Horizontal mounting and no artificial air
flow.
SWITCHING (VCC=13V)
Symbol Parameter Test Conditions Min Typ Max Unit
td(on) Turn-on Delay Time RL=6.5Ω from VIN rising edge to VOUT=1.3V 40 µs
td(off) Turn-off Delay Time RL=6.5Ω from VIN falling edge to VOUT=11.7V 30 µs
dVOUT/dt(on) Turn-on Voltage Slope RL=6.5Ω from VOUT=1.3V to VOUT=10.4V (#) V/µs
dVOUT/dt(off) Turn-off Voltage Slope RL=6.5Ω from VOUT=11.7V to VOUT=1.3V (#) V/µs
INPUT PIN
Symbol Parameter Test Conditions Min Typ Max Unit
VIL Input Low Level (#) 1.25 V
IIL Low Level Input Current VIN=1.25V 1 (#) µA
VIH Input High Level 3.25 (#) V
IIH High Level Input Current VIN=3.25V (#) 10 µA
Vhyst Input Hysteresis Voltage 0.5 (#) V
IIN=1mA 6 6.8 8 V
VICL Input Clamp Voltage
IIN=-1mA -0.7 V
3/29
1
VN750 / VN750S / VN750PT / VN750-B5
PROTECTIONS
Symbol Parameter Test Conditions Min Typ Max Unit
TTSD Shut-down Temperature 150 175 200 °C
TR Reset Temperature 135 °C
Thyst Thermal Hysteresis 7 15 °C
Status delay in overload
tSDL Tj>Tjsh 20 µs
condition
9V<VCC<36V 6 9 15 A
Ilim Current limitation
5V<VCC<36V 15 A
Turn-off Output Clamp
Vdemag IOUT=2A; VIN=0V; L=6mH VCC-41 VCC-48 VCC-55 V
Voltage
OPENLOAD DETECTION
Symbol Parameter Test Conditions Min Typ Max Unit
Openload ON State
IOL VIN=5V 50 (#) 200 mA
Detection Threshold
Openload ON State
tDOL(on) IOUT=0A 200 µs
Detection Delay
Openload OFF State
VOL Voltage Detection VIN=0V 1.5 (#) 3.5 V
Threshold
Openload Detection Delay
tDOL(off) 1000 µs
at Turn Off
OPEN LOAD STATUS TIMING (with external pull-up) OVERTEMP STATUS TIMING
VOUT > VOL IOUT< IOL
Tj > Tjsh
VIN
VIN
VSTAT
VSTAT
4/29
2 1
VN750 / VN750S / VN750PT / VN750-B5
VOUT
90%
80%
dVOUT/dt(on) dVOUT/dt(off)
10%
t
VIN
td(on) td(off)
TRUTH TABLE
CONDITIONS INPUT OUTPUT STATUS
L L H
Normal Operation
H H H
L L H
Current Limitation H X (Tj < TTSD) H
H X (Tj > TTSD) L
L L H
Overtemperature
H L L
L L X
Undervoltage
H L X
L L H
Overvoltage
H L H
L H L
Output Voltage > VOL
H H H
L L H
Output Current < IOL
H H L
5/29
1
VN750 / VN750S / VN750PT / VN750-B5
TEST LEVELS
ISO T/R 7637/1
Delays and
Test Pulse I II III IV
Impedance
1 -25 V -50 V -75 V -100 V 2 ms 10 Ω
2 +25 V +50 V +75 V +100 V 0.2 ms 10 Ω
3a -25 V -50 V -100 V -150 V 0.1 µs 50 Ω
3b +25 V +50 V +75 V +100 V 0.1 µs 50 Ω
4 -4 V -5 V -6 V -7 V 100 ms, 0.01 Ω
5 +26.5 V +46.5 V +66.5 V +86.5 V 400 ms, 2 Ω
CLASS CONTENTS
C All functions of the device are performed as designed after exposure to disturbance.
E One or more functions of the device is not performed as designed after exposure to disturbance
and cannot be returned to proper operation without replacing the device.
6/29
1
VN750 / VN750S / VN750PT / VN750-B5
Figure 1: Waveforms
NORMAL OPERATION
INPUT
LOAD VOLTAGE
STATUS
UNDERVOLTAGE
VCC VUSDhyst
VUSD
INPUT
LOAD VOLTAGE
STATUS undefined
OVERVOLTAGE
VCC<VOV VCC>VOV
VCC
INPUT
LOAD VOLTAGE
STATUS
INPUT
VOUT>VOL
LOAD VOLTAGE
VOL
STATUS
LOAD VOLTAGE
STATUS
OVERTEMPERATURE
Tj TTSD
TR
INPUT
LOAD CURRENT
STATUS
7/29
1
1
VN750 / VN750S / VN750PT / VN750-B5
APPLICATION SCHEMATIC
+5V +5V
Rprot VCC
STATUS
Dld
µC Rprot INPUT
OUTPUT
GND
RGND
VGND DGND
GND PROTECTION NETWORK AGAINST This small signal diode can be safely shared amongst
REVERSE BATTERY several different HSD. Also in this case, the presence of
the ground network will produce a shift (j600mV) in the
Solution 1: Resistor in the ground line (RGND only). This input threshold and the status output values if the
can be used with any type of load. microprocessor ground is not common with the device
The following is an indication on how to dimension the ground. This shift will not vary if more than one HSD
RGND resistor. shares the same diode/resistor network.
1) RGND ≤ 600mV / (IS(on)max). LOAD DUMP PROTECTION
2) RGND ≥ (−VCC) / (-IGND) Dld is necessary (Voltage Transient Suppressor) if the
where -IGND is the DC reverse ground pin current and can load dump peak voltage exceeds VCC max DC rating. The
be found in the absolute maximum rating section of the same applies if the device will be subject to transients on
device’s datasheet. the VCC line that are greater than the ones shown in the
Power Dissipation in RGND (when VCC<0: during reverse ISO T/R 7637/1 table.
battery situations) is: µC I/Os PROTECTION:
PD= (-VCC)2/RGND If a ground protection network is used and negative
This resistor can be shared amongst several different transients are present on the VCC line, the control pins will
HSD. Please note that the value of this resistor should be be pulled negative. ST suggests to insert a resistor (Rprot )
calculated with formula (1) where IS(on)max becomes the in line to prevent the µC I/Os pins to latch-up.
sum of the maximum on-state currents of the different The value of these resistors is a compromise between the
devices. leakage current of µC and the current required by the
Please note that if the microprocessor ground is not HSD I/Os (Input levels compatibility) with the latch-up limit
common with the device ground then the RGND will of µC I/Os.
produce a shift (IS(on)max * RGND) in the input thresholds -VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax
and the status output values. This shift will vary
depending on many devices are ON in the case of several Calculation example:
high side drivers sharing the same RGND. For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V
If the calculated power dissipation leads to a large resistor 5kΩ ≤ Rprot ≤ 65kΩ.
or several devices have to share the same resistor then Recommended Rprot value is 10kΩ.
the ST suggests to utilize Solution 2 (see below).
Solution 2: A diode (DGND) in the ground line.
A resistor (RGND=1kΩ) should be inserted in parallel to
DGND if the device will be driving an inductive load.
8/29
1 1
VN750 / VN750S / VN750PT / VN750-B5
Off state open load detection requires an external pull-up 2) no misdetection when load is disconnected: in this
resistor (RPU) connected between OUTPUT pin and a case the VOUT has to be higher than VOLmax; this
positive supply voltage (VPU) like the +5V line used to results in the following condition RPU<(VPU–VOLmax)/
supply the microprocessor. IL(off2).
The external resistor has to be selected according to the Because Is(OFF) may significantly increase if Vout is pulled
following requirements: high (up to several mA), the pull-up resistor RPU should
1) no false open load indication when load is connected: be connected to a supply that is switched OFF when the
in this case we have to avoid VOUT to be higher than module is in standby.
VOlmin; this results in the following condition The values of VOLmin, VOLmax and IL(off2) are available in
VOUT=(VPU/(RL+RPU))RL<VOlmin. the Electrical Characteristics section.
V batt. VPU
VCC
RPU
DRIVER
INPUT + IL(off2)
LOGIC
OUT
+
R
-
STATUS
VOL
RL
GROUND
9/29
1
VN750 / VN750S / VN750PT / VN750-B5
2.5 6
Off state
Vin=3.25V
2 Vcc=36V
5
Vin=Vout=0V
1.5
4
1
3
0.5
2
0
-0.5 1
-1 0
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (ºC) Tc (ºC)
7.8
Iin=1mA
7.6 0.04
7.4 Vstat=5V
7.2 0.03
6.8 0.02
6.6
6.4 0.01
6.2
6 0
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (°C) Tc (°C)
7.8
0.5 Istat=1mA
7.6
Istat=1.6mA
7.4
0.4
7.2
0.3 7
6.8
0.2
6.6
6.4
0.1
6.2
0 6
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (ºC) Tc (°C)
10/29
1
VN750 / VN750S / VN750PT / VN750-B5
110
120 Iout=2A
Iout=2A 100
Vcc=8V; 13V; 36V Tc= 150°C
100 90
80
80
Tc= 125°C
70
60
60
40 50
Tc= 25°C
40
20 Tc= - 40°C
30
0 20
-50 -25 0 25 50 75 100 125 150 175 5 10 15 20 25 30 35 40
Tc (ºC) Vcc (V)
200
3.4
Vcc=13V
180
Vin=5V
3.2
160
140 3
120
2.8
100
80 2.6
60
2.4
40
2.2
20
0 2
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (ºC) Tc (ºC)
2.6 1.4
1.3
2.4
1.2
2.2
1.1
2
1
1.8
0.9
1.6
0.8
1.4
0.7
1.2 0.6
1 0.5
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (ºC) Tc (ºC)
11/29
1 1
VN750 / VN750S / VN750PT / VN750-B5
48 4.5
46 Vin=0V
4
44
3.5
42
40 3
38 2.5
36
2
34
1.5
32
30 1
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (°C) Tc (ºC)
900 450
800
Vcc=13V Vcc=13V
400
Rl=6.5Ohm Rl=6.5Ohm
700 350
600 300
500 250
400 200
300 150
200 100
100 50
0 0
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (ºC) Tc (ºC)
Ilim Vs Tcase
Ilim (A)
20
18
Vcc=13V
16
14
12
10
0
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
12/29
1 1
VN750 / VN750S / VN750PT / VN750-B5
ILMAX (A)
100
10
A
B
C
1
0.1 1 10 100
L(mH)
A = Single Pulse at TJstart=150ºC
B= Repetitive pulse at TJstart=100ºC
C= Repetitive Pulse at TJstart=125ºC
Conditions:
VCC=13.5V
Values are generated with RL=0Ω
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves B and C.
VIN, IL
Demagnetization Demagnetization Demagnetization
13/29
VN750 / VN750S / VN750PT / VN750-B5
ILMAX (A)
100
10
B
C
1
0.1 1 10 100
L(mH)
A = Single Pulse at TJstart=150ºC
B= Repetitive pulse at TJstart=100ºC
C= Repetitive Pulse at TJstart=125ºC
Conditions:
VCC=13.5V
Values are generated with RL=0Ω
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves B and C.
VIN, IL
Demagnetization Demagnetization Demagnetization
14/29
VN750 / VN750S / VN750PT / VN750-B5
SO-8 PC Board
Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm,
Cu thickness=35µm, Copper areas: 0.14cm2, 0.8cm2, 2cm2).
110
105
100
95
90
85
80
75
70
0 0.5 1 1.5 2 2.5
PCB Cu heatsink area (cm^2)
15/29
VN750 / VN750S / VN750PT / VN750-B5
P2PAK PC Board
Layout condition of Rth and Zth measurements (PCB FR4 area= 60mm x 60mm, PCB thickness=2mm,
Cu thickness=35µm, Copper areas: 0.97cm2, 8cm2).
RTHj_amb (°C/W)
55
Tj-Tamb=50°C
50
45
40
35
30
0 2 4 6 8 10
PCB Cu heatsink area (cm^2)
16/29
VN750 / VN750S / VN750PT / VN750-B5
PPAK PC Board
Layout condition of Rth and Zth measurements (PCB FR4 area= 60mm x 60mm, PCB thickness=2mm,
Cu thickness=35µm, Copper areas: 0.44cm2, 8cm2).
RTHj_amb (ºC/W)
90
80
70
60
50
40
30
20
10
0
0 2 4 6 8 10
PCB Cu heatsink area (cm^2)
17/29
VN750 / VN750S / VN750PT / VN750-B5
ZTH (°C/W)
1000
0.5 cm2
100
2 cm2
10
0.1
0.01
0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)
18/29
VN750 / VN750S / VN750PT / VN750-B5
ZTH (°C/W)
1000
100 0.44 cm 2
6 cm2
10
0.1
0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)
19/29
VN750 / VN750S / VN750PT / VN750-B5
ZTH (°C/W)
1000
100
0.5 cm2
6 cm2
10
0.1
0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)
20/29
VN750 / VN750S / VN750PT / VN750-B5
mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 1.75 0.068
a1 0.1 0.25 0.003 0.009
a2 1.65 0.064
a3 0.65 0.85 0.025 0.033
b 0.35 0.48 0.013 0.018
b1 0.19 0.25 0.007 0.010
C 0.25 0.5 0.010 0.019
c1 45 (typ.)
D 4.8 5 0.188 0.196
E 5.8 6.2 0.228 0.244
e 1.27 0.050
e3 3.81 0.150
F 3.8 4 0.14 0.157
L 0.4 1.27 0.015 0.050
M 0.6 0.023
S 8 (max.)
L1 0.8 1.2 0.031 0.047
21/29
VN750 / VN750S / VN750PT / VN750-B5
22/29
VN750 / VN750S / VN750PT / VN750-B5
P010R
23/29
VN750 / VN750S / VN750PT / VN750-B5
P032T1
24/29
VN750 / VN750S / VN750PT / VN750-B5
SO-8 TUBE SHIPMENT (no suffix)
B
C Base Q.ty 100
Bulk Q.ty 2000
Tube length (± 0.5) 532
A A 3.2
B 6
C (± 0.1) 0.6
REEL DIMENSIONS
Base Q.ty 2500
Bulk Q.ty 2500
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 12.4
N (min) 60
T (max) 18.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width W 12
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 8
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 5.5
Compartment Depth K (max) 4.5
Hole Spacing P1 (± 0.1) 2
Start
25/29
VN750 / VN750S / VN750PT / VN750-B5
Base Q.ty 50
Bulk Q.ty 1000
B Tube length (± 0.5) 532
A 18
B 33.1
C (± 0.1) 1
C
All dimensions are in mm.
26/29
VN750 / VN750S / VN750PT / VN750-B5
2
P PAK TUBE SHIPMENT (no suffix)
Base Q.ty 50
Bulk Q.ty 1000
B Tube length (± 0.5) 532
A 18
C
B 33.1
C (± 0.1) 1
REEL DIMENSIONS
Base Q.ty 1000
Bulk Q.ty 1000
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 24.4
N (min) 60
T (max) 30.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width W 24
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 16
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 11.5
Compartment Depth K (max) 6.5
Hole Spacing P1 (± 0.1) 2
Start
27/29
VN750 / VN750S / VN750PT / VN750-B5
PPAK SUGGESTED PAD LAYOUT PPAK TUBE SHIPMENT (no suffix)
A
C
Base Q.ty 75
Bulk Q.ty 3000
Tube length (± 0.5) 532
A 6
B B 21.3
C (± 0.1) 0.6
3 1.8 6.7
All dimensions are in mm.
REEL DIMENSIONS
Base Q.ty 2500
Bulk Q.ty 2500
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 16.4
N (min) 60
T (max) 22.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width W 16
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 8
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 7.5
Compartment Depth K (max) 2.75
Hole Spacing P1 (± 0.1) 2
Start
28/29
1
VN750 / VN750S / VN750PT / VN750-B5
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a trademark of STMicroelectronics
http://www.st.com
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