ECE 3050 —Dafe._li(20/oz Paget x Reales" ules Se idewifying the type of feedback L) Ldertify The hop. This helps yeu see whee the A network és od what /s fhe 6 network, 2.) Layget— series or shat ? a) Tests dor Skaok : If one of fhe, fermival: om tha” mped tronsisher (fhe trousistr where Sa imped signal 0s Crab inact with fhe fed back sequal), is on ae gros Me feedback shunf, (on verify by writing ag dscdp — Sf néitlee fhe Zor UV deymcol ave on ac Ground. Try te write Sha equation. Age dso kg b) Tes}s for series— Lf Kets tle Dov U termed 15 om ac Gvoowd, thon fhe CVveedt fs series if Ags Us- ap. 3) Owtped ~ Series- shonk? TF one of fhe O or V fermnols is on AC growwh , the outpel must Shot fo, rh neither the 0 or U fermisale are on AC ground, fhe feedback és Shot if fe gy variable O when OO Series 1§ fhe “pL Voriable —~ 0 chow Re 0ECE 3050 - Analysis of Transistor Feedback Amplifiers Page 1 ANALYSIS OF TRANSISTOR FEEDBACK AMPLIFIERS Steps In Analyzing Transistor Feedback Amplifiers L. Identify the topology. 2. Detemiine whether the feedback is positive or negative 3. Open the loop and calculate A, B, Rj, and Ro, 4. Use the Table to find Af, Ri¢ and Rof or Ap, Rip, and Rop. 5. Use the information in 4.) to find whatever is required (Voud/Vin, Rin, Rout €tC.) Generic Transistor Concept Properties of a Generic Transistor A signal can only. 4 {g0 out the O terminal @ A signal can only I goin the Tterminal {= aa signal can in or out the U terminal Identification of the Feedback Topology Isolate the input and output transistor(s) and apply the following identification. Input Shunt: Output Series: Shunt:ECE 3050 - Analysis of Transistor Feedback Amplifiers EXAMPLE OF FEEDBACK TOPOLOGY IDENTIFICATION Use the rules of identifying feedback topologies to identify the four different topologies for the circuits shown below. Page 2 its Land or Gt | riECE 3050 - Analysis of Transistor Feedback Amplifiers Page 3 RULES FOR IDENTIFYING POSITIVE AND NEGATIVE FEEDBACK 1. Identify the feedback loop by tracing its path on the diagram. If there are alternate paths, always choose the path with the highest loop gain. (Remember that a signal can go in the "I" of "U" terminal of a transistor and can only come out the "O" or “U" terminal.) 2. At any point on the feedback loop, assume the signal is positive and put a "+" mark at that point. Trace the signal around the loop remembering that the signal only inverts when it goes in a "I" terminal and out the "O" terminal of a transistor. All other paths through a transistor do not invert (ie., "I" to "U" and "U" to "O"). 3. When you have traced the polarity of the signal around the feedback loop back to the point where you placed the "+", the feedback is negative if the signal polarity is "-" and positive if the signal polarity is "+". Example 1ECE 3050 - Analysis of Transistor Feedback Amplifiers Page 4 EXAMPLE OF FEEDBACK TOPOLOGY IDENTIFICATION Use the rules of identifying feedback topologies to create the four different negative feedback topologies using the identical starting structure. 1. Voltage-Vottage (Series-Shunt) 2. Cusrent-Voltage (Shunt-Shunt) 3, Voltage-Current (Series-Series) 4, Current-Current (Shunt-Series)ECE 3050 - Analysis of Transistor Feedback Amplifiers Page 5 RULES FOR ANALYSIS OF TRANSISTOR FEEDBACK AMPLIFIERS Series-Shunt Rg1 = Resistance seen looking out the I or U terminal of the input transistor with Vo ga = Resistance seen looking out the O or U terminal of the output transistor with i Series-Series Rg1 = Resistance seen looking out the I or U terminal of the input transistor with i ga = Resistance seen looking out the O or U terminal of the output transistor with i Shunt-Shunt sistance seen looking out the I or U terminal of the input transistor with vo = 0. sistance seen looking out the O or U terminal of the output transistor with v Shunt-Series sistance seen looking out the I or U terminal of the input transistor with Resistance seen looking out the O or U terminal of the output transistor with vj = 0.ECE 3050 - Analysis of Transistor Feedback Amplifiers Feedback Ampl Summary of the Important Relationships of Open-loop and Closed-loop Page 6 Voltage Transconductance Quantity Amplifier Amplifier Taparouput J Vortage-volape Votagecament Gurentvolage Curren-curen variable Model tac an yee ‘Small Signal 7 : WD: we, : Amplitcr wih | "a5 Anse » Mest a Source & Load} “T_"S NS an in na Tas _R5=DorksecRy_| Rg -DorRoeeky_ | Rese orkgoh | Ry sea Roe Ka RL Sor Ri>>Ro OFRLCRy | RLseoRpR, | Ri =Oo RR, Overall Forward RRA RRoGni |, Rskiknt ___RsRoA Gain TRERYRLAR | PRSROR RD | "MRSRIRLRD | A RSRIRLERD Festback Series-shunt Series series ‘Shunt shunt ‘Shantseries Topology Taeal 8 finite | Ya = Te, a rs ey Rg and Ry a bt | b+ i oT | Feedback sma] 5,88) 3 pe - Oe os ; Signal Models ic L A a A Closed-Loop Gain dca! Rg Ag Gut Rint eA @ os | ae Tae) | ODay | R= TaRniy | A= Ga Trosed Loop Input Resist. | Rip = Ri + Avy) | Rip=RiC1 + Gg) ance (Ideal Rs and RL) Closed Loop Output Resis- Rop= Ro(1 + Rms) Rop = Ro(l + Ai) ance deal RS and Ry) Ciosed Loop Gain ay ow BARE AVF Teavig | OMF= ThoMip A= Tap Closed-Loop RRs Input Resi Ryp= R= a ance (ReRSKI+AyBy) | RRS) + GyBy) R= Ty Abs RRL Closed-Loop a Ror= Ror= Oompa Re Tove | BoRLd+oM8) RoeRLCHAIB) Darput Ress RL Re awoeaf ers | Rour=Ror | Rour=RaRorR.) | Rour=Rop | Roursptor RD Output Fb. Ck