Forty Five Years of Computer Architecture—All That’s Old is New Again
Harvey G. Cragon
The University of Texas at Austin
cragon@uts.cc.utexas.edu
Abstract
Reviewing the last 45 years of computer design, I find that
most of the performance-improvement advances in
computer microarchitecture have been based on the
exploitation of only two ideas: locality and pipelining.
These two concepts will be discussed, thereby illustrating
their primacy in performance enhancement.
1. Introduction
The implementation of the Institute for Advanced
Studies (IAS) architecture primarily followed the serial
execution model; an instruction is completed before
another instruction begins [1]. The exception was that two
instructions were packed into one memory word and were
fetched from memory at the same time; a performance
benefit possible only because of instruction spatial
locality.
In the 1950s and early 1960s, gains in processor
performance depended primarily on increases in raw
circuit and memory speed (such as transistors and random
access core memory). Since that time, there are two
implementation ideas that have dominated techniques for
increasing the performance of computers: locality and
pipelining.
2. Locality
During the 1960s, locality was first employed to
improve both the performance and usefulness of
computers. In addition, locality provides a powerful tool
for overcoming some of the performance problems
resulting from pipelining, the other primary concept.
The ideal memory—infinite size, zero latency, and
zero cost—can be approximated because of temporal and
spatial locality. Caches [2] and virtual memory [3], along
with translation lookaside buffers (TLBs), would not be
design options without temporal and spatial locality. If all
instruction and data references were uniformly distributed
over the address space, we would be dependent on raw
memory speed alone for performance
Even today we see a new application of caching
applied to internet service to improve its performance.
Frequently referenced pages are cached, sometimes
locally; an example of temporal locality.
Spatial locality plays a key role in interleaved
memory, DRAM architectures, and disk arrays to
overcome their basic long latencies. In addition,
superscalar implementations depend on the spatial
relationship between instructions in order to issue more
than one instruction in a clock.
3. Pipelining
Early computer designers adopted ad-hoc concurrency
implementations such as fetching the next instruction
while the current instruction is still being executed. These
ad-hoc steps yielded incremental improvements in
performance along with excessively complicated designs.
Generalized pipelining eliminated the ad-hoc overlap
design procedure [4]. Pipelining was first applied to high
performance supercomputers and is today the design
paradigm for most microarchitecture.
The benefits of pipelining are: a faster clock and a
theoretical execution rate of one instruction per clock, for
degree one superscalar, while serial execution model
processors have an execution rate of less than 0.1
instructions per clock. However, the high theoretical
performance rate of a pipeline can be greatly diminished
because of structural hazards, data hazards and branch
stalls.
Solving structural hazard problems generally requires
replication of the resource leading to possible coherency
problems. Split caches are an example of a replicate
resource that themselves depend upon locality to function.
Data hazards introduce stalls that can be mitigated by
out of order instruction issue. Calling upon locality,
designers implement reorder buffers to insure in order
updating of the processor state.
Branch stalls reduce pipeline performance leading to
the need for branch prediction strategies and hardware.
Many prediction strategies depend on temporal locality
employed with branch target buffers and branch target
caches to benefit from the temporal locality of branch
direction information
.
3. Conclusion
Can you imagine what the microarchitecture of a
modern processor would look like without locality and
pipelining? Would we have the performance of today
based only upon advances in circuit and memory
technology? I think not. Upon these two concepts hang
most of the advances in microarchitecture of the past 45
years.

[1] A.W. Burks, H.H Goldstine, J von Neumann, Preliminary

Discussions of the Logical Design of and Electronic Computing
Instrument, US Army Ordnance Department Report, 1946.

[2] F.F. Lee “Study of “Look-aside” Memory”, IEEE

Transactions on Computer, 18: 11, November 1969m PP 1062-
1064.

[3] T. Kilburn, D.B.G. Edwards, M.J. Lanigan, F.H.

Summer, “One-level Storage System”, IRE Transactions
on Electronic Computers, 11: 2, February 1962, pp. 223-
235.

[4] L.W. Cotton, Circuit Implementation of High-speed

Pipelined Systems”, Proceedings Fall Joint Computer
Conference, AFIPS, Vol. 27, 1965, pp. 489-504.