5 4 3 2 1

ANA_3V3 3V3
ANA_3V3
R34 4.7K U7 R35 0R
C37 100nF 35
COMP 13
39 VAA1 29
GND R0 VAA2
40 30

22
21
20
19
18
U5 BANK1_R12 41 R1 VAA3
BANK1_T12 42 R2

NC11
NC10
NC9
NC8
NC7
6 BANK1_T14 43 R3
VDD 9 BANK1_T13 44 R4
C35 RST BANK1_T15 45 R5 J7
BANK1_R14 46 R6
100nF BANK1_R16 47 R7 1
BANK1_R15 48 R8 2 6
3 23 R9 3
D
29 GND CTS 24 1 34 4 1 11 D
GND_TP RTS GND G0 IOR
26 BANK0_IO_B5 2 33 5
GND TXD 25 BANK0_IO_A4 BANK1_P16 3 G1 IOR 6

R37
R38
R39
GND RXD BANK1_P15 4 G2 7
USB_5V_IN BANK1_L13 5 G3 32 8
C36 BANK1_L12 6 G4 IOG 31 9
J4 4.7uF J1 BANK1_M14 7 G5 IOG 10
9 8 28 BANK1_M13 8 G6 11
G4 1 7 VBUS DTR 12 BANK1_N16 9 G7 28 12

75R
75R
75R
8 Vcc 2 5 REGIN SUSPEND 11 BANK1_N14 10 G8 IOB 27 BANK0_IO_A14 13
G3 D- 3 4 D- SUSPEND 2 G9 IOB BANK0_IO_B14 14
10
15
7 D+ 4 D+ RI 1 14 15
GND 5
G2 ID 5 DCD 27 15 B0
GND DSR B1
NC1
NC2
NC3
NC4
NC5
NC6
6 BANK1_M15 16 GND GND GND

16

17
G1 BANK1_K12 17 B2 CONN_VGA
MINI_USB CP2102-GM BANK1_K11 18 B3
B4
10
13
14
15
16
17

BANK1_L14 19
BANK1_L16 20 B5
BANK1_K16 21 B6 ANA_3V3
BANK1_K15 22 B7 C39
GND BANK1_J13 23 B8 36 C38 100nF 100nF
B9 VREF
BANK1_K14 24 37 R36 560R
CLOCK RSET GND
GND
GND R62 4.7K 12
BANK1_M16 11 SYNC 26
BLANK GND1 25
3V3 3V3 R40 4.7K 38 GND2
ANA_3V3 PSAVE
AD7123
C40 C41 C42 GND
GND R1
4.7K 100nF
100nF
100nF
27
11
17
32
43
55

U8
3
7

GND
J2
AVCC
AVCC

VCC
VCC
VCC
VCC
VCC
VCC

C C2 C
1 2 0.1uF 42 54 BANK1_B15
3 4 RESET# CLKOUT/PE1 13 BANK1_J12
BANK1_E12 5 6 BANK1_E13 IFCLK/PE0
BANK1_B15 7 8 BANK1_B16 GND
BANK1_C15 9 10 BANK1_C16 5 29 BANK1_H15
BANK1_D14 11 12 BANK1_D16 XTALIN CTL0/FLAGA 30 BANK1_G14
BANK1_E15 13 14 BANK1_E16 CTL1/FLAGB 31 BANK1_G16
BANK1_F15 15 16 BANK1_F16 CTL2/FLAGC
BANK1_G11 17 18 BANK1_F12
BANK1_F14 19 20 BANK1_F13 Y1 40 BANK1_F16
BANK1_G16 21 22 BANK1_G14 24.000 MHz 4 PA7/FLAGD/SLCS# 2 BANK1_E12
BANK1_H15 23 24 BANK1_H16 XTALOUT RDY1/SLWR 1 BANK1_E13
25 26 RDY0/SLRD
3

BANK1_G12 BANK1_H11 35 BANK1_F13

BANK1_H13 27 28 BANK1_H14 PA2/SLOE 39 BANK1_G11
BANK1_J14 29 30 BANK1_J16 J5 PA6/PKTEND 37 BANK1_F14
BANK1_J11 31 32 BANK1_J12 9 PA4/FIFOADR0 38 BANK1_F12
BANK1_K14 33 34 BANK1_J13 G4 1 PA5/FIFOADR1
BANK1_K15 35 36 BANK1_K16 C3 C16 8 Vcc 2 9
BANK1_L16 37 38 BANK1_L14 22PF 22PF G3 D- 3 8 DMINUS 18 BANK1_J11
BANK1_K11 39 40 BANK1_K12 7 D+ 4 DPLUS PB0/FD0 19 BANK1_J16
BANK1_M15 41 42 BANK1_M16 G2 ID 5 PB1/FD1 20 BANK1_J14
43 44 GND PB2/FD2
4

BANK1_N14 BANK1_N16 6 21 BANK1_H14

BANK1_M13 45 46 BANK1_M14 G1 PB3/FD3 22 BANK1_H13
BANK1_L12 47 48 BANK1_L13 3V3 MINI_USB PB4/FD4 23 BANK1_H11 F1
BANK1_P15 49 50 BANK1_P16 PB5/FD5 24 BANK1_G12
BANK1_R15 51 52 BANK1_R16 PB6/FD6 25 BANK1_H16
M
BANK1_R14 53 54 BANK1_T15 GND GND GND PB7/FD7 45 BANK1_F15 F2
BANK1_T13 55 56 BANK1_T14 PD0/FD8 46 BANK1_E16
BANK1_T12 57 58 BANK1_R12 R5 GND GND PD1/FD9 47 BANK1_E15
M
59 60 4.7K SCL 15 PD2/FD10 48 BANK1_D16
61 62 MN1 SDA 16 SCL PD3/FD11 49 BANK1_D14
USB_5V_IN 63 64 USB_5V_IN SDA PD4/FD12
1 6 50 BANK1_C16
HDR_32X2 2 A0 SCL 5 PD5/FD13 51 BANK1_C15
3 A1 SDA 3V3 PD6/FD14 52 BANK1_B16
NC 8 PD7/FD15
VCC
36 R70 4.7K
B
7 4 WAKEUP 44 PA3/WU2 34 PA1 B
WP GND C13 14 WAKEUP PA1/INT1# 33 PA0
Thermal

GND RESERVED PA0/INT0#

AGND
AGND

AT24C128 100NF
GND
GND
GND
GND
GND
GND

CY7C68013A_56LTXC
6
10

57
12
26
28
53
56
41

J3 GND GND GND

3V3 3V3 3V3 3V3 3V3
1 2
3V3 3 4 3V3
BANK0_IO_A14 5 6 BANK0_IO_B14
BANK0_IO_C13 7 8 BANK0_IO_A13 R65 R66 R67 R69 R68
BANK0_IO_B12 9 10 BANK0_IO_A12 4.7K 4.7K 4.7K 4.7K 4.7K
BANK0_IO_C11 11 12 BANK0_IO_A11 GND
BANK0_IO_B10 13 14 BANK0_IO_A9
BANK0_IO_C9 15 16 BANK0_IO_A8
BANK0_IO_B8 17 18 BANK0_IO_A7 SCL WAKEUP PA1
BANK0_IO_C7 19 20 BANK0_IO_A6
BANK0_IO_B6 21 22 BANK0_IO_A5 SDA PA0
BANK0_IO_B5 23 24 BANK0_IO_A4
BANK0_IO_E10 25 26 BANK0_IO_C10
BANK0_IO_E11 27 28 BANK0_IO_F10
BANK0_IO_F9 29 30 BANK0_IO_D9
BANK0_IO_C8 31 32 BANK0_IO_D8
BANK0_IO_E7 33 34 BANK0_IO_E6
BANK0_IO_F7 35 36 BANK0_IO_C6
BANK0_IO_D6 37 38 BANK2_IO_M6 J6 JP1
BANK2_IO_P4 39 40 BANK2_IO_N5
41 42 USB_5V_IN 1 2 USB_5V_IN 3V3 1 2 GND
BANK2_IO_P5 BANK2_IO_N6 R63 4.7K BANK0_IO_A13 BANK0_IO_C13 4.7K R64
43 44 3 4 3V3 3 4 3V3
BANK2_IO_M7 BANK2_IO_P6 BANK2_IO_M11 BANK2_IO_P12 BANK0_IO_A12 BANK0_IO_B12
BANK2_IO_N8 45 46 BANK2_IO_L7 BANK2_IO_P11 5 6 BANK2_IO_M10 BANK0_IO_A11 5 6 BANK0_IO_C11
BANK2_IO_P9 47 48 BANK2_IO_T4 BANK2_IO_M9 7 8 BANK2_IO_N9 BANK0_IO_A9 7 8 BANK0_IO_B10
BANK2_IO_T5 49 50 BANK2_IO_R5 BANK2_IO_T7 9 10 BANK2_IO_T6 BANK0_IO_A8 9 10 BANK0_IO_C9
BANK2_IO_T6 51 52 BANK2_IO_T7 BANK2_IO_R5 11 12 BANK2_IO_T5 BANK0_IO_A7 11 12 BANK0_IO_B8
BANK2_IO_N9 53 54 BANK2_IO_M9 BANK2_IO_T4 13 14 BANK2_IO_P9 BANK0_IO_A6 13 14 BANK0_IO_C7
BANK2_IO_M10 55 56 BANK2_IO_P11 BANK2_IO_L7 15 16 BANK2_IO_N8 BANK0_IO_A5 15 16 BANK0_IO_B6
BANK2_IO_P12 57 58 BANK2_IO_M11 BANK2_IO_P6 17 18 BANK2_IO_M7 17 18
59 60 BANK2_IO_N6 19 20 BANK2_IO_P5 HDR_9X2
A A
61 62 BANK2_IO_N5 21 22 BANK2_IO_P4
USB_5V_IN 63 64 USB_5V_IN 23 24
BANK2_IO_M6 BANK0_IO_D6
HDR_32X2 BANK0_IO_C6 25 26 BANK0_IO_F7
BANK0_IO_E6 27 28 BANK0_IO_E7
BANK0_IO_D8 29 30 BANK0_IO_C8
BANK0_IO_D9 31 32 BANK0_IO_F9
BANK0_IO_F10 33 34 BANK0_IO_E11
BANK0_IO_C10 35 36 BANK0_IO_E10
37 38
39 40
HDR_20X2
Title
QM_FPGA_Daughter_board
Size Document Number Rev
C <Doc> 02
GND
Date: Saturday, September 02, 2017 Sheet 1 of 1
5 4 3 2 1