entity ContadorAsc65 is

Port ( clk : in STD_LOGIC;

reset : in STD_LOGIC;

salida : out STD_LOGIC_VECTOR (6 downto 0));-- 7 bits

end ContadorAsc65;

architecture Behavioral of ContadorAsc65 is

signal D : STD_LOGIC_VECTOR (6 downto 0);

signal Q : STD_LOGIC_VECTOR (6 downto 0);

begin

process (clk)

begin

if clk'event and clk='1' then

if reset = '1' then

Q <= "0000000";

else

Q <= D;

end if;

end if;
end process;

D <= "0000000" when Q = 65 else

Q + "1";

salida <= Q;

end Behavioral;

end Behavioral;

entity SimuAsc65 is

-- Port ( );

end SimuAsc65;

architecture Behavioral of SimuAsc65 is

component ContadorAsc65

port(

clk : in STD_LOGIC;

reset : in STD_LOGIC;
 salida : out STD_LOGIC_VECTOR (6 downto 0));

end component;

-- Señales de las entradas

signal clk : std_logic := '0';

signal reset: std_logic := '0';

-- Señales de salidas

signal salida : std_logic_vector(6 downto 0);

-- Constante de tiempo para la simulacion

constant PERIOD : time := 10 ns;

begin

process
begin--Reloj 555

clk <= '0';

wait for PERIOD/2;

clk <= '1';

wait for PERIOD/2;

end process;

UO: ContadorAsc65

Port map (

clk => clk,

reset => reset,

salida => salida

);

process

begin

--- Estímulos de la simulación

wait for 100 ns;

reset <= '1';

wait for 100 ns;

reset <= '0';

wait;

end process;

end Behavioral;