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DUMP START
[A1] 08/12/1970 23:13:44 EC St (Sw: PWRS Hw: -)
[A1] 08/12/1970 23:13:44 9500MPR rel 8.0 (aligned to 7.1 ICS rev. 9615) Beta 31
Patch 00 - OSE5.8.1 SDK6.5.6 - [trunk rev.10109] Sep 14 2017/20:18:32
[A1] 08/12/1970 23:13:44 CORE found file /home/adm-lc-ng/debug/scratchDB=[1]
[A1] 08/12/1970 23:13:50 Reset db[0]
[A1] 08/12/1970 23:13:57 Reset db[1]
[A1] 08/12/1970 23:14:00 SWP [Act V08000E EC 353100] [Sby V08000E EC 353100]
[A1] 08/01/1970 21:09:49 EC St (Sw: PWRS Hw: -)
[A1] 08/01/1970 21:09:49 9500MPR rel 8.0 (aligned to 7.1 ICS rev. 9615) Beta 31
Patch 00 - OSE5.8.1 SDK6.5.6 - [trunk rev.10109] Sep 14 2017/20:18:32
[A1] 08/01/1970 21:09:56 SWP [Act V08000E EC 353100] [Sby V08000E EC 353100]
[A1] 08/01/1970 21:11:17 MPT-ACC PLUGIN configuration COLD SLOT 2 STARTED
[A1] 08/01/1970 21:11:18 MPT-#2 FPGA Version Mismatch FDUJU :V02.04.06
Expected:V02.08.02
[A1] 08/01/1970 21:11:18 Started download of fpga on slot: 2 - Retry #: 1
[A1] 08/01/1970 21:11:20 MPT-ACC PLUGIN configuration COLD SLOT 3 STARTED
[A1] 08/01/1970 21:11:20 MPT-#3 FPGA Version Mismatch FDUJU :V02.04.06
Expected:V02.08.02
[A1] 08/01/1970 21:11:20 Started download of fpga on slot: 3 - Retry #: 1
[A1] 08/01/1970 21:11:20 DUJUAN download on slot 3 goes in WAIT state
[A1] 08/01/1970 21:11:22 EASV2 PLUGIN configuration COLD SLOT 4 STARTED
[A1] 08/01/1970 21:21:01 Dujuan download and activation on slot: 2 completed with
success
[A1] 08/01/1970 21:21:01 MPT-ACC PLUGIN configuration COLD SLOT 2 STARTED
[A1] 08/01/1970 21:21:01 MPTACC PLUGOUT SLOT 2 STARTED
[A1] 08/01/1970 21:22:45 [INFO/PLM_BRD/EQP] vi_pdh_plugin#8116 -]
downloadStart_func(7) - PDH-#7 download FPGA V01.04.00 completed with success
DUMP END