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-- Nombre: JOSE LUIS MARTINEZ ROCHA

-- Documento: 1101756229

-- Fecha: 21/09/2020

-- Proyecto: Simulacion suma de productos Z=CB+CB

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library IEEE;

use IEEE.std_logic_1164.all;

use IEEE.numeric_std.all;

use IEEE.std_logic_unsigned.all;

entity karnaugh is

Port ( A : in STD_LOGIC;

B : in STD_LOGIC;

C: in STD_LOGIC;

F : out STD_LOGIC

);

end Karnaugh;

architecture Behavioral of karnaugh is

begin

-- DISEÑO

F <= (A AND (NOT B)) OR (C AND B);

end Behavioral;
SIMULACION

library IEEE;

use IEEE.STD_LOGIC_1164.ALL;

entity Simulacion is

--

end Simulacion;

architecture Behavioral of Simulacion is

component karnaugh

port ( A : in STD_LOGIC;

B : in STD_LOGIC;

C : in STD_LOGIC;

F : out STD_LOGIC

);

end component;

-- Señales de las entradas

signal A_s,B_s,C_s : STD_LOGIC:= '0';

-- Señales de salidas
signal F_s : STD_LOGIC;

begin

UO: karnaugh Port map (

A => A_s,

B => B_s,

C => C_s,

F => F_s

);

process

constant PERIOD : time := 100 ns;

begin

C_s <= '0';

wait for PERIOD/2;

C_s <= '1';

wait for PERIOD/2;

end process;

process

constant PERIOD : time := 200 ns;

begin

B_s <= '0';

wait for PERIOD/2;

B_s <= '1';

wait for PERIOD/2;

end process;

process

constant PERIOD : time := 400 ns;

begin

A_s <= '0';

wait for PERIOD/2;

A_s <= '1';

wait for PERIOD/2;

end process;

end Behavioral;