ee Jura oe) STAN Sel=l\y =a} TR-751A/E | SERVICE MANUALCIRCUIT DESCRIPTION —— MODEL Tarsiaccmtway | TRISIE UNIT ~ wn aca | xeon Wee si cowrmotumrr | eonacoan wen |. xesiaoeer ey ores soo. xep-1310-0 MPOST a - | xeowoa4 vcon220.99 Toi) TRISIAIE Po towd chon FREQUENCY CONFIGURATION ‘The TR-7SIA/E utilizes 2 PLL synthesizer system in: corporating @ dicital VFO, which covers each band in SH steps. (See Fig, 1.) Received signals are mixed with the first local oscillator (133.305 to 137.295MHz) to produce the first intermediate frequency of 10.69MHz, In SSB or CW, the receiver operates as 3 single conversion system, The 10.695MHz IF signal is applied 0 crystal filter XF1 (L71-0249-05), ‘and the signal is then applied to the ring detector to obtain the audio output. In FM, the receiver operates as a double conversion system, The 10,695MHz signal is mixed with the PLL re ‘erence frequency of 10.24MHz to produce the second intermediate frequency of 455kH2 ‘The transmitter system operates as a double conversion system, In SSB mode, ouput from the carrier oscillator is modulated by 2 balanced modulator to produce an inter ‘mediate frequency signal, which is then mixed with the first local oscillator signal to produce the two meter {transmit signal. The carrier oscillator circuit is controlled by the microprocessor according to the selected mode. During USB or CW receive, the carrier oscillator fre- quency is 10.6935MHz. During LSB receive, itis 10.6965 10.695MHz crystal oscillator frequency is used that is irectly modulated and then mixed with the first local oscillator signal ‘To minimize internal heterodyne tones and spurs in the frequency generator and analysis are controlled by 3 ‘microprocessor. The PL L-based frequency system consists of two PLL synthesizer loops controlled by a ¢-bit high speed microprocessor and 2 stable, analog RIT oscillator circuit, 10.695m [toni carn denon [ wen Pass banawiath onc attenuation banceidth 2.2kH2 oF move at 638 Witnin=1.5kH at 2008 attention | 6008 mare win 2aoke rinsing mossinse | 124m -SRoF “Table 2 Crystal filter 10F2.25 (L71-0249-06) characterises (Composit unit (AX) XF1) Me, During OW transmit, itis 1OS943MHD. In FM, 2 DHE f ise 7 = DH i Fig. 1 Frequency configuration@e ea @ RECEIVER SYSTEM © General Incoming signals from the antenna pass through @ low: ass filter in the Transmitter Final unit and a diode switch (05,06) for transmit/receive selection. The signals then go Through ‘wo antenna coils (L201 and L202) and then are amplified by @ GaAs FET (0201). Undesiced signals are removed from the RF signal by a Spole helical resonator {L203} and the resulting signal is then applied to the First mixer (0202). The signal is mixed there with the first local Oscillator signal from the PLL system to produce the first, IF signal of 10.695MHz. Undesiable adjacent channel signals are removed from the first IF signal by a two stage ‘monolithic crystal filter (MCF : XF201) The first IF signal is then distributed to either the SSB. or FM circuits. In the SSB circuit, the first IF signal goes through noise blanker gate (01 and 02} then amplified by @ Dual Gate MOS FET (G1) and then applied to the SSB crystal filter (XF1). The filtered signal is then amplified by the 1st IF Amplifier (Q2) and the 2nd IF Amplifier (Q3) and then ‘applied to the ring detecttor (D5—D8) to obtain the rece ed audio signal In the FM circuit, the first IF signal is amplified by a Grounded Gate (Q4) J-FET and applied to the second mixer (05). The IF signal is mixed with 10.24MH2 to pro: duce the second IF signal of 455kH2. Adjacent channel interference is removed from the second IF signals by FM ceramic filter (CF1), the second IF signal is then amplified {and detected by IC2 to obtain the received audio signal ‘The audio signal trom the $$8 and FM circuits is then amplifies by a common audio preamplifier QT (X58. 1110-00). High-frequency components are removed from the audio signal by an active LPF (Q2). The audio signal is then applied to the audio volume control on the front Panel. The aucio signal is amplified again by audio amplifier IC1 (X60:1310-XX) and then applied to the speaker assehetkHe Within 26kH2 (rom 2554Ha) Within #12.5kHe (rom 4554Ha] 388 ols [insertion toss a8 or ios Gusantood attenuation (within # 100k from 455kHi2) VO matching impacance ae Table 4 Ceramic filter CFW AS5F (L71-0315-05) characteristics (Composite unit (RX) CF1) 358 or les © Front end and AGC circuit The performance of any receiver is determined largely by the performance of its front end section. Important factors which determine the performance of a receiver are sensitivity and two signal characteristics, Recently. most single mode receivers have used GaAs FETs to improve their sensitivity, while all-mode receivers used Oual Gate MOS FETS for improved AGC characteristics and RF gain control of their high frequency amplifiers. This was because, even though the AGC line was placed between the high frequency amplifier and intermediate frequency ampli fier. the best way to improve the AGC characteristic had eon to control the second gate of the dual-gate MOS FET. When GaAs FET's were used, such AGC characteris: ties hed not been obtained even if the second gate wes Controlled by the same voltage that was used for 2 Dual Gate MOS FET. Fig, 2 shows the AGC Vs. gain attenuation characteristics obtained from the high frequency amplifier (MOS FET : 3SK76) and GaAs FET : 3SK129 used in a ‘TR-2000G, Since the intermediate frequency amplifier uses 3 MOS FET : 3SK73, almost no attenuation occurs in the high frequency amplifier even if the AGC voltage is fed Girectly into the GaAs FET. C lem Rating ° — [- [Nominal center frequency (fo) | ¥0.696MHE | Lo [Poss anawvieth witnin 27 er ot 348d T son vans Witnin «254 ot 4038) “eo [Arenson an | witnin 5H at 6038 Toa or more within = 1H a 4038 or more spurious 8 -20 Sunranteee attenuation at fo~to # SOOKHE i 8038 or more sourious at 3 0 _ fo-I910=10kH2) a [Riooie 1008 ores 7 so) Tasertion loss 1598 or ies | Terminating imomdance 3k 2/00 Table 3 10.695MHz MCF (L71-0216-05) characteristics oe as (Composit unit (AX) XF201) G2 Voto ev ——sskr6 mosrer ----- 35K 129 GoasrET Fig. 2 AGC attenuation compsrison 3TR-751A/E CIRCUIT DESCRIPTION The TR-751A/E AGC circuit has been designed to allow the AGC voltage to control the GaAs FET similar to the control that was obtained with the MOS FET. As shown in Fig, 3, AGC voltage from an amplifier similar to that used in previous models is fed into the intermediate fre quency amplifier. The AGC voltage is approx. 4V when no signal is present, The AGC voltage is amplified by the ‘non-DC current inversion amplifier circuit that is com posed of Op Amplifier (IC3}, Its outout is then applied to the GaAs FET. The output voltage is set to approx. 25V. when no signal is present, or at minimum RF gain. The AGC characteristics are shown in Fig, 4, The AGC time constant is automatically switched to slow in SSB mode (oF 10 fast in CW mode. The high sensitivity of the receiver system ig thus obtained without sacrificing any two signal characteristic Additionally, the RF gain control, provides @ convenient method of tuning out undesired signals even when receiving signals that are t0 strong from near by local stations. : . ral icf ETT Fig. 4 AGC attenuation comparison o2.03 for] Sirs awe Serco t_@) Fig. 3 AGC circuit black diagram ‘The TR-7S1A/E SSB suglach circuit is a noise operated type squelch. As compared with signal type squelch, noise detection squelch may be opened even by very weak signals, such a8 are frequently encountered in SSB, ‘The high sensitivity of the squelch circuit provides ‘advantages when receiving VHF signals trom distant sta tions and when scanning. Generally, signal type squelch ‘cannot surpass noise detection type in sensitivity, since they are opened by changes in the AGC voltage, It means ‘that, £0 open a signal type squelch, sufficient voltage level of signal to deflect the $ meter i required, The sensitivity of the TR-751A/E squolch is 0.1uV or less (a weak signal hich will not deflect the § meter.) The squelch signal is applied to 1C2 used in FM mode, through the SSB filter, SSB IF, and buffer amplifier. This IC, mixes the signal with 10.24MH2 to produce 455kH. Like the FM IF, the A55kHz signa is also amplified by IC2 and applied to the same squelch circuit as that used in FM mode. Since SSB signals do not contain carrier, unlike FM signals, the time constant ciccuit is switched between FM mode and $SB mode to get an appropriate response time,TR-751A/E CIRCUIT DESCRIPTION TRANSMITTER SYSTEM © General ‘The transmitter system operates as a single conversion system, ‘Audio signals from the microphone are amplified by 3 low-noise transistor (025) and applied to the SSB or FMA Circuits which provide approx. 2648 gain In SSB, the amplified signal passes through the SSB microphone gain contral, and is amplified by (Q27) and ‘applied to the balanced modulator {IC4), The balanced modulator consists of an IC that provides stable carrier suppression without being influenced by changes in tem: perature. Signals from the microphone amplifier are mixed with the carrier to produce a DSB signal, The DSB signal is, applied to the SSB filter (with @ center frequency of 10.695MHz) to produce the SSB signal In FM, the signal amplified by the SSB/FM common micro- phone amplifier (Q25) is applied through the buffer ampli fier (24) and FM microphone gain control, and then 0 the pre-emphasis circuit, amplified by (IC1), and limited by Op amplifier (1C1). High frequency components are then removed from the signal by a 18dB/oct splatter filter, {and the signal is sent to the FM modulation circuit. In the FM modulation circuit, signals from the 10.695 Mz crystal oscillator circuit are directly modulated by varactor diode (021), variable capacitor. This direct fre ‘quency modulation enables a flat transmitter frequency response 10 be obtained from low frequencies to high frequencies. If the frequency deviation becomes excessive, the deviation level will vary fram the upper to the lower portion of the signal. The TR-7S1A/E is designed so that the upper and lower portions of the signal are balanced even with maximum frequency deviation, SSB/FM switching is performed by diode switching cir cuit according to the selected mode, and then amplifies by the transmitter IF circuit, This IF amplifier circuit con SIsts of @ dualgate MOS FET, whose sacond gate is ore: Vided with ALC voltage to control the transmitter autout, The transmitter IF signal is then mixed with the PLL signal by balanced mixer consisting of two FETs (Qt. 2) to produce a 144MH2 signal. Undesirable components are removed from the signal by a band-pass filter to mini ‘mize spurious emission, The signal from the band-pass filter is then amplified twice, once by a dual-gate MOS FET (03) land once by transistor (Q4), to raise the signal to the level ‘necessary 10 drive the Final unit, The TR-751A/E contains {an additional transistor amplifier (25). The signal from the drive circuit is amplified by the Power module (01) in the Final unit, and goes through the ANT switching and diodes (D5, 06) and low-pass filter 10, remove higher harmonies, and is supplied to the sntenna © (CW circuit description In OW, the balanced modulator is unbalanced by AGC signal to allow the caerier to pass. OW keying is performed by switching the balanced ‘mixer in the drive circuit and a bias voltage is applied to the first gate of amplifier. Fig, 6 shows the keying waveform. The leading and trailing edges are smoothed to prevent key clicks. To facilitate CW communications, the CW circuit con ‘tains CW semi break-in and side tone circuits, ‘The CW semi break-in circuit is a Schmitt circuit consist ing of transistors (1-04) or the break-in sub assembly, “The delay time can be adjusted with VR7. ‘The side tone circuit operates whenever the key is closed. The side tone circuit operates in modes other than CW, 0 key adjustment and morse code practice can be performed. Transistor (9) is used as the oscillator. Signals from the side tone circuit are amplified by the audio amp: lifier (IC1). The output frequency of approx. 800H2 can be adjusted with potentiometer (VR), 5 CWwaveformTR-751A/E CIRCUIT DESCRIPTION '* ALC and SWR protection circuits Fig. 6 shows the basic ALC and SWR protection circuits. ‘ALC detection is made by amplifying a sample from the Power module in the Final unit. The DC output signal is ‘amplified by transistor (Q7) lower the ALC which controls. the gain of the IF amplifiers. Low power is selected by controling the ALC Amplifier (Q7) with transistor (Q8) If the linearity of the Final is not well balances with ALC feedback, SSB distortion may occur. The TR-751A/E is designed to minimize SSB distortion —--—-———~—, 024: 3SK73(GR) Ot Ms7727 sz ALEURNE LowPoweR sw POWER SWITCHING. ro The SWR protection circuit detects and amplifies any reflected power due to mismatching in the antenna with a CM coupler. Output from the SWR protection circuit lowers the ALC reference voltage to reduce the gain of the power module for protection, FINAL UNIT (X45-1490-11) ‘50 PROTECTION DETECTION ees yre - ‘COMPOSITE UNIT (X60-1310:XX) -_t_ PROTECTION AN Fig. 6 ALC and SWR protectioncireuitsCIRCUIT DESCRIPTION PLL SYNTHESIZER Fig, 7 is the PLL system block diagram The most important feature of the TR-7S1A/E PLL system is that it the main loop VCO (Loop A) is composed of a subunit to avoid the unit being influenced by outside forces (especially vibration), which improve the frequency stability. During mobile operation in SSB or CW, this provides a great increase advantage in reliability ‘The PLL system uses two loops to form a digital VEO Which covers each band in 50H? steps, Each of the loops uses 2 PLL IC (TC9172P) with pulse swallow type pre scaler. ‘The 6 loop utilizes 2 2 5kHz comparison frequency. The range of its VCO output fregency is trom 28 to 27MHz (frequency division ratio 11200 to 10800 : 1). The B loop VCO output is frequency divided by 50 (to produce 560 to S40kHz). which is us6d to produce a signal that covers 20kHz from 9.68 to 9.70MH2 in SOH2 steps, This signal is then mixed with the reference oscillator frequency of 10.24MHz, The RIT oscillator circuit utilizes a signal of 11.806MH2 ‘which is multipled by nine. The oscillator frequency range can be varied #1.2kHz or more by varying the voltage of the variable capacitor in the oscillator (analog control) When the RIT switch is off, the variable capacitor voltage 's fixed, because of high resistance, and the RIT oscillator ‘operates as 2 stable focal frequency oscillator. The RIT ON. signal is detected by the microprocessor and transferred to the PLL IC containing which contains an 1/0 port to control the RIT switching circuit, The RIT oscillator out- ut is mixed with 9.68 to 9,70MH2 to produce a frequency range from 115.925 to 115,945MHz for A loop mixing, The A loop uses 3 20kHz comparison frequency to control loop A over 3 range of IF 17,38 to 19.37MHz 10 yield @ VCO output range frequency from 133.305 to 187.305MHz (frequency division ratio 869 to 1069 - 1), To cover the entire band in 50H2 steps, the VCO output is mixed with local oscillator signals of 115.925 to 115.945, Me. As described above, the PLL system reliability is im Proved by incorporating the VCO A loop as a sub-unit and high density system by using large scale integration. Boaters, Fig. 7 PLLsystem block diagram TR-751A/EDIGITAL CONTROL UNIT © General ‘The Control unit consists of two PC boards : one on the front panel and the other on the main chassis, The pro: cessing is controlled by three microprocessor (hereafter called the MPUs}. Fig. 8 is the Control unit block diagram. The Control Unit includes three MPUs, their interface ciruits, an input circuit (consisting of 3 rotary encoder, keys, and switches) 4 reset backup circuit, a mode switching circuit, and various other switching circuits CIRCUIT DESCRIPTION Fig. 8 Control unit block diagramTR-751A/E CIRCUIT DESCRIPTION © MPU interface circuits Fig. © shows how the three MPUs are interfaced. To exchange data between the MPUs, three clock and dota VO lines (SCR, SI and SO) and two each of contro! lines SCK, SOR, DCK, and ORO are provides FRONT paNeL, vo DSSTOX 8/6) © Reset backup circuit Fig. 9 also shows the reset backup circuit. When the transceiver power is turned on, an approx. 20ms H level ulse is sent from the reset circuit using a dedicated reset IC (IC201) to the RES line, Since the RES line is connect ed to all MPUs (MPU, MPU-II, MPU-III), the MPUs begin ‘operation at the same time. When the power is turned off, 1C202 recognizes that the voltage of the SV line fell to ASV oor less, and sets the low voltage fallen detect line (VFO) to @ low level. The VED signal is sent to MPU-L POO and MPU enters the backup mode. Output voltage from the lithium battery for backup is supplied to MPU and MPU providing backup for two MPUs. Washes we, ieee we rte Fig. 9 Intertace between MPUs and reset backup circuit10 © Key, switch and encoder circuits micrm | 3 Fig. 10 shows the Key, switch, and encoder input cit [Cretic ‘cuits. The front panel keys are arranged in a matrix and key Switeh\Port [OWN | signals are sent to MPUAII, using a key scan technique. The uP+oWN | 0 | microphone switch lines (PTT. UP, DOWN, etc) are con Pres 0 nected to MPUGI through the protection diodes, CH time toon fo constant circuit, and chatter absorption circuits. ‘The nn encoder is also connected to MPUAI through the CR time ete constant circuit and the inverter of the Schmitt tigger in wa [apo t+} puts (10201) for chattering absorstion. ‘OFFmcss) | 1 [orrocse [1 CIRCUIT DESCRIPTION Table 5 Microphne input losie a Fo Wr..ock| a vat_|cowrowe lve P20 I [ait ea] cs | Go | nes | cw Func. _| Pas iCE/TONE roa fF] AUTO [A] FMiLsa fa) useiewfa] Rev FS] wa Pas fo] Fster [7] scav fa] _w[alOFeseT fs} ae ag as wpu-z sofa 1c304 ear =} | reve A sen Aw A — Fig, 10 Key, switch and encoder input circuit“a * CIRCUIT DESCRIPTION '© Mode voltage switching and standby circuit Fig. 11 shows the mode voltage switching and standby ircuit. When a mode is selected with a front panel key, the corresponding port on MPUAL is set to high (SV) and ‘an appropriate mode voltage is transmitted by switching ‘the BV line. When the PTT is pressed, MPU-I sends information to MPULL and port P22 of MPU: is set to H, switching Q4, © Other 1/0 circuits 1. Busy input circuit ‘The Busy input circuit is used to determine whether the scan oF DCL system has received a signal. The squelch signal from the receiver system is switched by Q7 and applied to port PIO of MPULL. This signal also turns the BUSY indicator on, using Q6 and QE for switching 2. Squelch switching circuit The squelch switching circuit is used to switch between the squelch control on the panel and internal VAT (Q1— 3). Usually, Q3 is on to enable the squelch control on the ‘panel. When the DCL system searches for 3 open channel, 1 and 2 are switched on, and Q3 is turned off by signals from port P42 of MPU: to enable internal trimmer VR 3. Audio mute output (AL) When checking memory channel M1, performing code sauelch, oF searching for an open channel during alert Operations, port P41 of MPU is set to H (SV) to mute audio output 4, Microphone mute output (ME) The ME signal is used to mute audio inputs from the ‘microphone wien the OCL system transmits contro! signal. Port P53 of MPU-IT is set to H (SV) to switch 26 in the MIC input of the RX unit. This signa is also used to Control @ modern IC in the modem unit MU-1 tea 12 EQUIVALENT CIRCUIT Be & moss cn me ~ 0s se oo eve = Gi — 0 sce 5 ‘Maun suassis ——+os OSB 1460XRI LA) Rev ccocomrmo ow FaONT pane besseso nT ver NeU-E cen 2 a Fig. 11 MODE voltage switching and standby circuit nTR-751A/E CIRCUIT DESCRIPTION Test points tee] ocs | OCL Chin Select Data line between MPU:I and MPU-II. Temporarily set to H when an MU-1 or V5.1 related [772 [ona {bet reams enwaton spread sinter rowt fo MPU woerouet cre nee - - (Detects 2 voltage drop in the SV line. The voltage of this line is SV when power ison, 7 TPT VED | votuo®Faen neet | and OV wnanaower ot owen tw OV lawl Ser oe Wea he ot ha ps ine ssa, he VED tn broken, o 16201 or 109 © ea = 1 {Ui 10 monitor the yout own DEL cont signal tough the nna ake ve Tomontort comet isbn fo TON | | | Connect only ween CO-10 is usd, Microprocessor clock vTeour | ~ ‘Sends the S498Hz produced by frequency dividing XI (@.1@MHE) by 1. ter | 00 se [This lock isu to CLI of MPUAI (168) trouah C12. | ica Bin Clock nou forte above pin. The Ske svare wove canbe monitor wep Connectors VEO] valiage Folon Data] Sone loncion as TPT abo | Power fine between MPU-T (ICT) and MPU:IH (IC4), Backed up by a li Microorocessor backup | when the transceiver power is ff, Set to SV when power om hum battery voo | voltage 2.8V wnen cower is off, When the voltage drops, the battery s exhausted, ofits eriohera a | circuit (026 or C151 is faulty - - nes a Reset line between MPUT, MPUGH, and MPU, ® Supolies » SV peak wave for approx. 20m when Bower is tuned on, sce Slave Chip Slect__| Dat line between MPU-Land MPU-I. Temporarily set to H when a front panel operation i made jses_t Wien iin isnot reset to L, the SCS, SRO, SCK, SOI, or SOO lim broken or te LCD. seo Stow Roavest | asemby maybe fouty. Table 6 Test pins Nee [VOT Function [Lesic[Pin No | Nome 1 [P10 [1 | BUSY inact Busy FAP 23 ne 2] Prt) [ovr aetet inoue 24 lose 1 Teer - ry 3 [P12 [1 | Dre detect input - P60_| 0 | OC request (ORG) fe | int [a Fra T= Not wes ner FoI | 0 cL cup sel (05 ian 5 Not wa NC) P62 0 | Sieve reat (SRA) ro 1c300) ST © | Ouro tor 01671? dection #68__| 0 | Siow chip wise SCS) fo 1501) Tone noi ovat 780K (3 W) © | LS0 rede sit oviout (n (85H) UI = [Noruses Cr [510 [ew made select ouput fin GW =H) JL © [PL set sna [782 [0 [us® mode sect outout in USS TIAL | PLL sent ick Fi meds act ovtout in FH) I = [Netw Noted NC) = [Notes vaio uibutin Aca seh) TO PLLA oop wb Ap ss [SOsect ouput in open sven] Srtseeesee— Alcs [rotons ne t 1 7 37 GND. | = ~ o 7 over pin (SV) ~ — 33 Te our | 0 | s4akte outout (To iCai | = [Connect o star 40 [P20 [© [Outbut tr switching ode INT] y= Notwseg (GNO} ~ [a T0 Tost for wth P00 1 | Lom voto arte nase VFS P22 [0 | Trans set (wort nage Fa [21 |Sce 71 svat cock nout Sc, BER 23 ce 2 [50 0 Swat ot tout 600,000) Ne So= Sa Table 7 uPO7S08HG-545-22 (MPU-) pin functions (Control unit IC1) 12Dinero) AVA CIRCUIT DESCRIPTION ans, | Name V0 Foon Tease [Pinta [nme [70] Fontan r=] TPA Gin V8 BUSY moat ant ~ Note WEI Po) x 1 notame - 1 ot oe io ram 1) a a notes = Novem (GN) «| Bao-3e50-14 MADEL NAME PLATE xminz - * | Ba0-3e51-04 | migbeL NAME PLATE |r : + | Ba-2aze-03 | LABEL «con kmame - x | Ba2-2432-03 | LaBeL crane tw - + | Ras-toae-o4 BADGE (TR-751A) | xmune - |] B43-1069-04 | apse cR-7ieytRIe | 7 - x | B43-1070-08 BADGE (TR-751E) “ - Bas-0410-00 | UARRANTY caRD K - * | 850-609-009, INSTRUCTISN RANUAL (TR-7516/E) | ERLM2W - * | S0-8070-00 INSTRUCTION MARU. CTR=7512)7R18 | 'T - 09-0¢71-05 4P PLUG (acs) - E30-2020-15, De ceRD (acs¥) | at so | | F20-os20-n6 INSULATING BRARD | FO5-7025-05, FUSE (7A) acsy - Fe0-0521-04 INSULATING BOARDCLITHUN BTRY) % 601-0810-04 COILED SPRING, | ” 902-0505-05 | KNOB FITTING SPRING Ey + | Go2-0850-02 | GND SPRING » Gi0-0626-08 | Fer a * | G10-D6a3-04 NON-UOVEN FrBRIC 42 40 | + | Gi6-os0s-04 | wrevarren protective | - | | e13-o823-04 | custioniacsy) - 653-0515-04 Feut - » | Ho1-B010-03 HEN CARTEN BEX(TR-7510) kane - « | wot-aort-o3 TTEn CARTON BOXCTR-7Sie)TRIG | T - | + | Hot-aoi2-03, LER CARTAN BOXCTR- 751 u | | | wio-2501-93 POLYSTYRENE FRAMED FIXTURE (TOP s/HtO-2612-02 | PALYSTYRENE FORMED FIxtUy + | 13-0a08-02 PROTECTIVE PLATE H25-0029-04 PROTECTIGN BAG (SCREW ETC | He5-o103-04 PROTECTION BAG (RIC PNT ANGLED He5-O106-04 | PROTECTION BAG CTR-ToIa/E : | | es-onié-o4 PRETECTIRN BAG (AESY) | - H25-0117-04 PROTECTION BAG COC eBRD 4 yoo-0439-05 | Eger cacsy) | 3] fiet-aie SP NGUNTING HARDWARE iE ae SWITCH GUIDE A (1-0) jae | 08 WITCH GUIDE | 23TR-751A/E 28 % Now Pares Parts wltrout Parts No. are not supoten, PARTS LIST Les aeicies non mentions dans le Parts No. ne sont ps Fours. ‘elle one Parts No. werden riont geiefe Ref. Ne, [oseroefen] Parts No Description omes ie min sans Bata 67 se | se2-02e9-05 | PaNeL pusHING | | - 319-0319-24 MIC Heer r - | | Jet-oaos-os | ute" Ban a | *| ke-o7e0-03 | rain TUNING KNOB mz =| ke3-07e3-04 | Noe (AE U8L-RITD 3 + | K2?-0a82-03 | KNOBCBUTTOND —KEY-1 | ra x | x27-0a8s-03 | eNOBCBUTTON) —KEY-2 5 |=) e2z-o4e0-03 | eNGBCRUTTEN) —KEY-3 | % ia | | k27-0485-03 | kn@ecpurTeN) KEY | 7 ta | +| k27-0a66-03 | KNBBURUTTEN) — FEY-S. | 8 te | +) «27-0487-03 | xnmpcBuTEN) — KEY-6. 3 ia |x| x2r-o48-03 | kNOBCEUTTN) KEY? | 80 ta | +) e27-0487-03 | KNGBCRUTTAN) —KEY-a a 1a | | K2z-0490-03 KNGBCBUTTRND — KEY-9 | 82 1a | ©| <22-0491-03 | KNOBCRUTTEN) —KEY-O. | | 8 ties] | k29-30e4-05 | KNOB ASSY ge in’ | + | «29-30a5-05 | nga ass (FUNC) 8s SC | + | K29-30a6-08 | RNGB ASSY (SD.RF GAIN) 8 3c | | kex-s047-04 KNGB RING - | | Nov-oo0s-02 | Hex Heap screw cacsy) - NO9-0632-05, TAPTITE SCREW ACACSYD - Nig-osio-0¢ | Nur cacsr) - NIS-1040-45 | FLAT WASHER (MOUNTING BRACKET) = NIS-1060-46 | FLAT WASHER ervarminaex Your ¥ tw &e crfareiire = [GHEE Moore u | ei cersepinox loupe — o.o10ue x tw + [craemisss |Glinc Geass um | coovoabo-os | euectea ive ow | oa cavoreiniox [cutee gor OY | | os Chisenss-08 | Ceramic ceenctien cose | | ce 637 crzsepinioex [ome c 900 oe ceigreimion lane © eeenour E35 ae cefarenmions | Guee togee es cyonaaee-oy” [etecks = ur” dow cas Ceraroinios [EIFS Oiour +} orem: lowe c —— reo0e Serseeimioe [Sure loo | cevsroneae: [eure Sore | cryaroinene [ome coe” ceoachicioon | Etecrke Te” eww | exec loupe oar x | chrareivion | ure Soba” Grfaroniox cue Cte | | cergreniiio.s laure oper” S| Eidas | Jerrsretiioa” [cutee — tSdope | cei6-239 crgsepiecom [upc ooze x ea cersebinioo [Gi © Pogope” ear s|ccmemarse |oure dot bee Gcoreimox [eur © Tagore | 3 s|eroreoat-os" eterna Se ow | 301-204 cerzeeiwnox [cmc o.ox0ur x | Ses Cevarcnnassos [cue E ——S5QEUF | : | [eve-o0se-05 | ge netea sacxer 7 extsieos | femme 9) : Eev-oae-ot | Tein : + | eze-oeéi-oa | Cente : ||P EST-Stee-88 | REMNECTIS wine crse-romi-an» a +| e40-sou9-05 | pin connector c1ze) 32 |" |eto-sose-o9 | PIN cormecten {Lips 5 Ea-seae-os | FIN CRMEETER CaP a fab-s20-05 [pin connector (Se) | i ao-s00?-05 | Pin ceeecren (ioe | we cso-sees-os em coeecton cer) Fi Fao-soei-os [Pin Eonecies (or rine i 9 e49-5092-05 [PIN COELTOR (ae) fo | |Eao-sbi5-os | IN comecren (ep) sea Bio-so37-05 [PIN carwecran (SP) eve cso-szar-os [pin comwecron we) sibs Fio-geay-os [PIN Comecton (Se) ims | | E40"Sese-05 | Pin canmecroe (3p ie ao-octi-05 | Fin ceanecton (oP) | ro Eao-oeti-as | BIN cormetten (Sp) ua . +] si-se2i-0a | cover |TR-751A/E % New Ports PARTS LIST Parts without Parts No. are not supp, Les articles non mentionnes dans le Parts No.ne sont pas fours Tele onne Parts No. werden niont gatofert. Ref. No [Address|New] Parts No Description omes |e mip) sae 5 Batra x *| L7e-oor7-05 | ReSeNATER «4, 194nHZ)FAR.CaSA - No9-0608-05 screw : »| no9-0e98-05 | ScREW 1. 7x8) R201 «202 Re2-0670-05 | cup oon 3R301 302 Re2-0670-05 | CHIP R 0 gH RI | R90-0662-05 | muLTI-cenp came) Rs gx7senenio3y | CHIP R 1K sat Ro Revare2n733 | CHIP R am 3 now R10 Re73EBERG72I | CHIP R 4.7% 1/104 Ril -15 Re7arBOnG7SS | CHIP R a Vou Rie 1? Re7aeRen73y | CHIP 2 1704 fs Reqareeniosy «| CHIP R Of 1/10W R19 RETFEEAGTI «| CHIP R 470 1/08 «| Reo RDL@DECHA7I | SHALL-RD a? 3 ove | a Ret | recrarpena7ss | CHIP R am 1 ytou | 42.3 Rei ReaeReASESS | CHIP R Sek 5 17104 R22 | | exesruonz223 | Gute 22 3 a Zt0u | Tuer Res R2-0670-05 | CHIP R oom kein Rea RK7SFROALEST R aK J a/ou | keane | R52 RICTSFBOATISS a 33 rtow | Tw Ras RK7aFEORIIS) zg 55 3 17iow | Tus B53 | | Recr3eRonarsy g a 3 110M | TW Rae Re?FBOAIZa9 F tek 3 t/iom | Tus 835 RK7SFROAG 72 R 4% 3 wvioW | TH R36 RNIAEKQB9102F Siok | F oivaw | TW Rx? RK7SFBORSGON R 56 J iow £38 RK7SEROAD TSS R 27k J 1/104 539 RerSFB2ALOaT R took 3 iyiod | wer | 839 R92-0670-05 Rg osm Tues, Rag RerarB2AG723 | CHIP R 4% a 1/10 Rai Reqsenensze) «| CHIP BJ I/tow R201 Re73FeeAi03) | CHIP 10K 3 1/toM R203 Re?SFBOAB2SI | CHIP eK Iiow | R208 Re7aepente2s | cHIP R Lees A/10M R204 || | Revaesencess | chip & eee J a730u Roos x | Re7aFBeneeas | CHIP R eeu J A7iou R206 Re73FReAS«] © | CHIP R sek FIO reo? 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TR-751A/ Ret No [Addres Joe Parts No. Description Desti- [Re onesie aly sans saan aay D9 .20 Danonzx CHIP DIBDE | 25 +26 | | pawe2o2k CHIP DISDE s Seu GHP BEE 030 ‘DAN202K CHIP DISDE | eS SEE IGS arse | * | prerraee DIGITAL TRANSISTO® 23