 Tabular method : also known as the Quine-McCluskey method is particularly useful when

minimising functions having a large number of variables, e.g. The six-variable functions. Computer
programs have been developed employing this algorithm. The method reduces a function
in standard sum of products form to a set of prime implicants(It is an implicant of a function which
does not imply any other implicant of the function.) from which as many variables are eliminated
as possible. These prime implicants are then examined to see if some are redundant.

The tabular method makes repeated use of the law A +   = 1. Note that Binary notation is
used for the function, although decimal notation is also used for the functions. As usual a
variable in true form is denoted by 1, in inverted form by 0, and the abscence of a variable by
a dash ( - ).

Rules of Tabular Method

Consider a function of three variables f(A, B, C): 

 
Consider the function:

 
Listing the two minterms shows they can be

combined   
Now consider the following:

 
Note that these variables cannot be

combined   
This is because the FIRST RULE of the Tabular method for two terms to combine, and thus
eliminate one variable, is that they must differ in only one digit position.
Bear in mind that when two terms are combined, one of the combined terms has one digit
more at logic 1 than the other combined term. This indicates that the number of 1's in a term
is significant and is referred to as its index.

For example: f(A, B, C, D)

0000...................Index 0 
0010, 1000.............Index 1 
1010, 0011, 1001.......Index 2 
1110, 1011.............Index 3 
1111...................Index 4

The necessary condition for combining two terms is that the indices of the two terms must
differ by one logic variable which must also be the same.

Example 1:

Consider the function: Z = f(A,B,C) =   +  C+A  + A C

To make things easier, change the function into binary notation with index value and decimal
value.

Tabulate the index groups in a colunm and insert the decimal value alongside.

From the first list, we combine terms that differ by 1 digit only from one index group to the
next. These terms from the first list are then seperated into groups in the second list. Note
that the ticks are just there to show that one term has been combined with another term.
From the second list we can see that the expression is now reduced to: Z =   +   +  C + A
From the second list note that the term having an index of 0 can be combined with the terms
of index 1. Bear in mind that the dash indicates a missing variable and must line up in order
to get a third list. The final simplified expression is: Z = 

Bear in mind that any unticked terms in any list must be included in the final expression
(none occured here except from the last list). Note that the only prime implicant here is Z =  .

 Combinational circuit is a circuit in which we combine the different gates in the

circuit, for example encoder, decoder, multiplexer and demultiplexer. Some of the
characteristics of combinational circuits are following −
1. The output of combinational circuit at any instant of time, depends only on the
levels present at input terminals.
2. The combinational circuit do not use any memory. The previous state of input
does not have any effect on the present state of the circuit.
3. A combinational circuit can have an n number of inputs and m number of
outputs.

Block diagram

 Decoder :A decoder is a combinational circuit. It has n input and to a maximum m =

2n outputs. Decoder is identical to a demultiplexer without any data input. It
performs operations which are exactly opposite to those of an encoder.
Block diagram

Examples of Decoders are following.

 Code converters
 BCD to seven segment decoders
  Nixie tube decoders
 Relay actuator
2 to 4 Line Decoder : The block diagram of 2 to 4 line decoder is shown in the fig. A and B are
the two inputs where D through D are the four outputs. Truth table explains the operations
of a decoder. It shows that each output is 1 for only a specific combination of inputs.
Block diagram Truth Table

Logic Circuit

 Encoder : Encoder is a
combinational circuit which is designed to perform the inverse operation of the
decoder. An encoder has n number of input lines and m number of output lines. An
encoder produces an m bit binary code corresponding to the digital input number.
The encoder accepts an n input digital word and converts it into an m bit another
digital word.
 Block diagram

Examples of Encoders are following.

 Priority encoders
 Decimal to BCD encoder
 Octal to binary encoder
 Hexadecimal to binary encoder

 S-R flip flop Operation

S.N. Condition Operation

1 S=R=0: If S = R = 0 then output of NAND gates 3 and 4 are forced to become 1.

No change Hence R' and S' both will be equal to 1. Since S' and R' are the input of the basic S-
R latch using NAND gates, there will be no change in the state of outputs.

2 S = 0, Since S = 0, output of NAND-3 i.e. R' = 1 and E = 1 the output of NAND-4 i.e. S' = 0.
R = 1,
E=1 Hence Qn+1 = 0 and Qn+1 bar = 1. This is reset condition.

3 S = 1, Output of NAND-3 i.e. R' = 0 and output of NAND-4 i.e. S' = 1.

R = 0,
E=1 Hence output of S-R NAND latch is Qn+1 = 1 and Qn+1 bar = 0. This is the reset
condition.

4 S = 1, As S = 1, R = 1 and E = 1, the output of NAND gates 3 and 4 both are 0 i.e. S' = R' =
R = 1,
0.
E=1
Hence the Race condition will occur in the basic NAND latch.
  State Assignment : The number of gates needed to implement a sequential logic network
depends strongly on how we assign encoded Boolean values to symbolic states. Unfortunately,
the only way to obtain the best possible assignment is to try every choice for the encoding, an
extremely large number for real state machines. For example, a four-state finite state machine,
such as the traffic light controller of the last chapter, has 4! (4 factorial) = 4 * 3 * 2 * 1 = 24
different encodings.

 Race condition : aka race hazard is the behavior of an electronic, software, or

other system where the output is dependent on the sequence or timing of other uncontrollable
events. It becomes a bug when events do not happen in the order the programmer intended. The
term originates with the idea of two signals racing each other to influence the output first.
Race conditions can occur in electronics systems, especially logic circuits, and in computer software,
especially multithreaded or distributed programs.

 Hazard : In digital logic, a hazard in a system is an undesirable effect caused by either a

deficiency in the system or external influences. Logic hazards are manifestations of a problem in
which changes in the input variables do not change the output correctly due to some form of delay
caused by logic elements (NOT, AND, OR gates, etc.) This results in the logic not performing its
function properly. The three different most common kinds of hazards are usually referred to as
static, dynamic and function hazards.
Hazards are a temporary problem, as the logic circuit will eventually settle to the desired function.

 Threshold logic: The threshold gate also contains at least one input and only one output.
Additionally, it contains the respective weights to each input and a threshold value. The values of
these weights and threshold could be of any finite real number.

Let the inputs of threshold gate are X1, X2, X3,…, Xn. The corresponding weights of these inputs are
W1, W2, W3,…, Wn. The symbol of Threshold gate is shown in the following figure.

Threshold gate is represented with a circle and it

is having ‘n’ inputs, X1 to Xn and single output,
Y. This circle is made into two parts. One part
represents the weights corresponding to the
inputs and other part represents Threshold
value, T.
The sum of products of inputs with corresponding weights is known as weighted sum. If this weighted
sum is greater than or equal to Threshold value, T then only the output, Y will be equal to one.
Otherwise, the output, Y will be equal to zero.

Mathematically, we can write this relationship between inputs and output of Threshold gate as
below.
Y=1,ifW1X1+W2X2+W3X3+...WnXn≥TY=1,ifW1X1+W2X2+W3X3+...WnXn≥T

𝑌 = 0, otherwise. (w=weight)

Therefore, we can implement various logic gates and Boolean functions just by changing the values of
weights and / or Threshold value, T.

 Relay circuits: Solid State Relays are normally-open semiconductor equivalents of the
electromechanical relay that can be used to control electrical loads without the use of moving parts.